[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / ppc / syslib / ipic.h
blob2b56a4fcf373e1e5e7a0aaa2ae03ae0c88f25058
1 /*
2 * arch/ppc/kernel/ipic.h
4 * IPIC private definitions and structure.
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
8 * Copyright 2005 Freescale Semiconductor, Inc
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
15 #ifndef __IPIC_H__
16 #define __IPIC_H__
18 #include <asm/ipic.h>
20 #define MPC83xx_IPIC_SIZE (0x00100)
22 /* System Global Interrupt Configuration Register */
23 #define SICFR_IPSA 0x00010000
24 #define SICFR_IPSD 0x00080000
25 #define SICFR_MPSA 0x00200000
26 #define SICFR_MPSB 0x00400000
28 /* System External Interrupt Mask Register */
29 #define SEMSR_SIRQ0 0x00008000
31 /* System Error Control Register */
32 #define SERCR_MCPR 0x00000001
34 struct ipic {
35 volatile u32 __iomem *regs;
36 unsigned int irq_offset;
39 struct ipic_info {
40 u8 pend; /* pending register offset from base */
41 u8 mask; /* mask register offset from base */
42 u8 prio; /* priority register offset from base */
43 u8 force; /* force register offset from base */
44 u8 bit; /* register bit position (as per doc)
45 bit mask = 1 << (31 - bit) */
46 u8 prio_mask; /* priority mask value */
49 #endif /* __IPIC_H__ */