[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / ppc64 / kernel / pmac_setup.c
blob6cf03d387b912a7ef999087796238b86f5812d52
1 /*
2 * arch/ppc/platforms/setup.c
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 * Adapted for Power Macintosh by Paul Mackerras
8 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10 * Derived from "arch/alpha/kernel/setup.c"
11 * Copyright (C) 1995 Linus Torvalds
13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
23 * bootup setup stuff..
26 #undef DEBUG
28 #include <linux/config.h>
29 #include <linux/init.h>
30 #include <linux/errno.h>
31 #include <linux/sched.h>
32 #include <linux/kernel.h>
33 #include <linux/mm.h>
34 #include <linux/stddef.h>
35 #include <linux/unistd.h>
36 #include <linux/ptrace.h>
37 #include <linux/slab.h>
38 #include <linux/user.h>
39 #include <linux/a.out.h>
40 #include <linux/tty.h>
41 #include <linux/string.h>
42 #include <linux/delay.h>
43 #include <linux/ioport.h>
44 #include <linux/major.h>
45 #include <linux/initrd.h>
46 #include <linux/vt_kern.h>
47 #include <linux/console.h>
48 #include <linux/ide.h>
49 #include <linux/pci.h>
50 #include <linux/adb.h>
51 #include <linux/cuda.h>
52 #include <linux/pmu.h>
53 #include <linux/irq.h>
54 #include <linux/seq_file.h>
55 #include <linux/root_dev.h>
56 #include <linux/bitops.h>
58 #include <asm/processor.h>
59 #include <asm/sections.h>
60 #include <asm/prom.h>
61 #include <asm/system.h>
62 #include <asm/io.h>
63 #include <asm/pci-bridge.h>
64 #include <asm/iommu.h>
65 #include <asm/machdep.h>
66 #include <asm/dma.h>
67 #include <asm/btext.h>
68 #include <asm/cputable.h>
69 #include <asm/pmac_feature.h>
70 #include <asm/time.h>
71 #include <asm/of_device.h>
72 #include <asm/lmb.h>
73 #include <asm/smu.h>
75 #include "pmac.h"
76 #include "mpic.h"
78 #ifdef DEBUG
79 #define DBG(fmt...) udbg_printf(fmt)
80 #else
81 #define DBG(fmt...)
82 #endif
84 static int current_root_goodness = -1;
85 #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
87 extern int powersave_nap;
88 int sccdbg;
90 sys_ctrler_t sys_ctrler;
91 EXPORT_SYMBOL(sys_ctrler);
93 #ifdef CONFIG_PMAC_SMU
94 unsigned long smu_cmdbuf_abs;
95 EXPORT_SYMBOL(smu_cmdbuf_abs);
96 #endif
98 extern void udbg_init_scc(struct device_node *np);
100 void __pmac pmac_show_cpuinfo(struct seq_file *m)
102 struct device_node *np;
103 char *pp;
104 int plen;
105 char* mbname;
106 int mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
107 PMAC_MB_INFO_MODEL, 0);
108 unsigned int mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
109 PMAC_MB_INFO_FLAGS, 0);
111 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
112 (long)&mbname) != 0)
113 mbname = "Unknown";
115 /* find motherboard type */
116 seq_printf(m, "machine\t\t: ");
117 np = find_devices("device-tree");
118 if (np != NULL) {
119 pp = (char *) get_property(np, "model", NULL);
120 if (pp != NULL)
121 seq_printf(m, "%s\n", pp);
122 else
123 seq_printf(m, "PowerMac\n");
124 pp = (char *) get_property(np, "compatible", &plen);
125 if (pp != NULL) {
126 seq_printf(m, "motherboard\t:");
127 while (plen > 0) {
128 int l = strlen(pp) + 1;
129 seq_printf(m, " %s", pp);
130 plen -= l;
131 pp += l;
133 seq_printf(m, "\n");
135 } else
136 seq_printf(m, "PowerMac\n");
138 /* print parsed model */
139 seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
140 seq_printf(m, "pmac flags\t: %08x\n", mbflags);
142 /* Indicate newworld */
143 seq_printf(m, "pmac-generation\t: NewWorld\n");
147 void __init pmac_setup_arch(void)
149 /* init to some ~sane value until calibrate_delay() runs */
150 loops_per_jiffy = 50000000;
152 /* Probe motherboard chipset */
153 pmac_feature_init();
154 #if 0
155 /* Lock-enable the SCC channel used for debug */
156 if (sccdbg) {
157 np = of_find_node_by_name(NULL, "escc");
158 if (np)
159 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np,
160 PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);
162 #endif
163 /* We can NAP */
164 powersave_nap = 1;
166 #ifdef CONFIG_ADB_PMU
167 /* Initialize the PMU if any */
168 find_via_pmu();
169 #endif
170 #ifdef CONFIG_PMAC_SMU
171 /* Initialize the SMU if any */
172 smu_init();
173 #endif
175 /* Init NVRAM access */
176 pmac_nvram_init();
178 /* Setup SMP callback */
179 #ifdef CONFIG_SMP
180 pmac_setup_smp();
181 #endif
183 /* Lookup PCI hosts */
184 pmac_pci_init();
186 #ifdef CONFIG_DUMMY_CONSOLE
187 conswitchp = &dummy_con;
188 #endif
191 #ifdef CONFIG_SCSI
192 void note_scsi_host(struct device_node *node, void *host)
194 /* Obsolete */
196 #endif
199 static int initializing = 1;
201 static int pmac_late_init(void)
203 initializing = 0;
204 return 0;
207 late_initcall(pmac_late_init);
209 /* can't be __init - can be called whenever a disk is first accessed */
210 void __pmac note_bootable_part(dev_t dev, int part, int goodness)
212 extern dev_t boot_dev;
213 char *p;
215 if (!initializing)
216 return;
217 if ((goodness <= current_root_goodness) &&
218 ROOT_DEV != DEFAULT_ROOT_DEVICE)
219 return;
220 p = strstr(saved_command_line, "root=");
221 if (p != NULL && (p == saved_command_line || p[-1] == ' '))
222 return;
224 if (!boot_dev || dev == boot_dev) {
225 ROOT_DEV = dev + part;
226 boot_dev = 0;
227 current_root_goodness = goodness;
231 void __pmac pmac_restart(char *cmd)
233 switch(sys_ctrler) {
234 #ifdef CONFIG_ADB_PMU
235 case SYS_CTRLER_PMU:
236 pmu_restart();
237 break;
238 #endif
240 #ifdef CONFIG_PMAC_SMU
241 case SYS_CTRLER_SMU:
242 smu_restart();
243 break;
244 #endif
245 default:
250 void __pmac pmac_power_off(void)
252 switch(sys_ctrler) {
253 #ifdef CONFIG_ADB_PMU
254 case SYS_CTRLER_PMU:
255 pmu_shutdown();
256 break;
257 #endif
258 #ifdef CONFIG_PMAC_SMU
259 case SYS_CTRLER_SMU:
260 smu_shutdown();
261 break;
262 #endif
263 default:
268 void __pmac pmac_halt(void)
270 pmac_power_off();
273 #ifdef CONFIG_BOOTX_TEXT
274 static int dummy_getc_poll(void)
276 return -1;
279 static unsigned char dummy_getc(void)
281 return 0;
284 static void btext_putc(unsigned char c)
286 btext_drawchar(c);
289 static void __init init_boot_display(void)
291 char *name;
292 struct device_node *np = NULL;
293 int rc = -ENODEV;
295 printk("trying to initialize btext ...\n");
297 name = (char *)get_property(of_chosen, "linux,stdout-path", NULL);
298 if (name != NULL) {
299 np = of_find_node_by_path(name);
300 if (np != NULL) {
301 if (strcmp(np->type, "display") != 0) {
302 printk("boot stdout isn't a display !\n");
303 of_node_put(np);
304 np = NULL;
308 if (np)
309 rc = btext_initialize(np);
310 if (rc == 0)
311 return;
313 for (np = NULL; (np = of_find_node_by_type(np, "display"));) {
314 if (get_property(np, "linux,opened", NULL)) {
315 printk("trying %s ...\n", np->full_name);
316 rc = btext_initialize(np);
317 printk("result: %d\n", rc);
319 if (rc == 0)
320 return;
323 #endif /* CONFIG_BOOTX_TEXT */
326 * Early initialization.
328 void __init pmac_init_early(void)
330 DBG(" -> pmac_init_early\n");
332 /* Initialize hash table, from now on, we can take hash faults
333 * and call ioremap
335 hpte_init_native();
337 /* Init SCC */
338 if (strstr(cmd_line, "sccdbg")) {
339 sccdbg = 1;
340 udbg_init_scc(NULL);
343 else {
344 #ifdef CONFIG_BOOTX_TEXT
345 init_boot_display();
347 ppc_md.udbg_putc = btext_putc;
348 ppc_md.udbg_getc = dummy_getc;
349 ppc_md.udbg_getc_poll = dummy_getc_poll;
350 #endif /* CONFIG_BOOTX_TEXT */
353 /* Setup interrupt mapping options */
354 ppc64_interrupt_controller = IC_OPEN_PIC;
356 iommu_init_early_u3();
358 DBG(" <- pmac_init_early\n");
361 static int pmac_u3_cascade(struct pt_regs *regs, void *data)
363 return mpic_get_one_irq((struct mpic *)data, regs);
366 static __init void pmac_init_IRQ(void)
368 struct device_node *irqctrler = NULL;
369 struct device_node *irqctrler2 = NULL;
370 struct device_node *np = NULL;
371 struct mpic *mpic1, *mpic2;
373 /* We first try to detect Apple's new Core99 chipset, since mac-io
374 * is quite different on those machines and contains an IBM MPIC2.
376 while ((np = of_find_node_by_type(np, "open-pic")) != NULL) {
377 struct device_node *parent = of_get_parent(np);
378 if (parent && !strcmp(parent->name, "u3"))
379 irqctrler2 = of_node_get(np);
380 else
381 irqctrler = of_node_get(np);
382 of_node_put(parent);
384 if (irqctrler != NULL && irqctrler->n_addrs > 0) {
385 unsigned char senses[128];
387 printk(KERN_INFO "PowerMac using OpenPIC irq controller at 0x%08x\n",
388 (unsigned int)irqctrler->addrs[0].address);
390 prom_get_irq_senses(senses, 0, 128);
391 mpic1 = mpic_alloc(irqctrler->addrs[0].address,
392 MPIC_PRIMARY | MPIC_WANTS_RESET,
393 0, 0, 128, 256, senses, 128, " K2-MPIC ");
394 BUG_ON(mpic1 == NULL);
395 mpic_init(mpic1);
397 if (irqctrler2 != NULL && irqctrler2->n_intrs > 0 &&
398 irqctrler2->n_addrs > 0) {
399 printk(KERN_INFO "Slave OpenPIC at 0x%08x hooked on IRQ %d\n",
400 (u32)irqctrler2->addrs[0].address,
401 irqctrler2->intrs[0].line);
403 pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler2, 0, 0);
404 prom_get_irq_senses(senses, 128, 128 + 128);
406 /* We don't need to set MPIC_BROKEN_U3 here since we don't have
407 * hypertransport interrupts routed to it
409 mpic2 = mpic_alloc(irqctrler2->addrs[0].address,
410 MPIC_BIG_ENDIAN | MPIC_WANTS_RESET,
411 0, 128, 128, 0, senses, 128, " U3-MPIC ");
412 BUG_ON(mpic2 == NULL);
413 mpic_init(mpic2);
414 mpic_setup_cascade(irqctrler2->intrs[0].line,
415 pmac_u3_cascade, mpic2);
418 of_node_put(irqctrler);
419 of_node_put(irqctrler2);
422 static void __init pmac_progress(char *s, unsigned short hex)
424 if (sccdbg) {
425 udbg_puts(s);
426 udbg_puts("\n");
428 #ifdef CONFIG_BOOTX_TEXT
429 else if (boot_text_mapped) {
430 btext_drawstring(s);
431 btext_drawstring("\n");
433 #endif /* CONFIG_BOOTX_TEXT */
437 * pmac has no legacy IO, anything calling this function has to
438 * fail or bad things will happen
440 static int pmac_check_legacy_ioport(unsigned int baseport)
442 return -ENODEV;
445 static int __init pmac_declare_of_platform_devices(void)
447 struct device_node *np;
449 np = find_devices("u3");
450 if (np) {
451 for (np = np->child; np != NULL; np = np->sibling)
452 if (strncmp(np->name, "i2c", 3) == 0) {
453 of_platform_device_create(np, "u3-i2c");
454 break;
458 return 0;
461 device_initcall(pmac_declare_of_platform_devices);
464 * Called very early, MMU is off, device-tree isn't unflattened
466 static int __init pmac_probe(int platform)
468 if (platform != PLATFORM_POWERMAC)
469 return 0;
471 * On U3, the DART (iommu) must be allocated now since it
472 * has an impact on htab_initialize (due to the large page it
473 * occupies having to be broken up so the DART itself is not
474 * part of the cacheable linar mapping
476 alloc_u3_dart_table();
478 #ifdef CONFIG_PMAC_SMU
480 * SMU based G5s need some memory below 2Gb, at least the current
481 * driver needs that. We have to allocate it now. We allocate 4k
482 * (1 small page) for now.
484 smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
485 #endif /* CONFIG_PMAC_SMU */
487 return 1;
490 struct machdep_calls __initdata pmac_md = {
491 #ifdef CONFIG_HOTPLUG_CPU
492 .cpu_die = generic_mach_cpu_die,
493 #endif
494 .probe = pmac_probe,
495 .setup_arch = pmac_setup_arch,
496 .init_early = pmac_init_early,
497 .get_cpuinfo = pmac_show_cpuinfo,
498 .init_IRQ = pmac_init_IRQ,
499 .get_irq = mpic_get_irq,
500 .pcibios_fixup = pmac_pcibios_fixup,
501 .restart = pmac_restart,
502 .power_off = pmac_power_off,
503 .halt = pmac_halt,
504 .get_boot_time = pmac_get_boot_time,
505 .set_rtc_time = pmac_set_rtc_time,
506 .get_rtc_time = pmac_get_rtc_time,
507 .calibrate_decr = pmac_calibrate_decr,
508 .feature_call = pmac_do_feature_call,
509 .progress = pmac_progress,
510 .check_legacy_ioport = pmac_check_legacy_ioport