arch/sh/boards/se/73180/irq.c

   1 /*
   2  * arch/sh/boards/se/73180/irq.c
   3  *
   4  * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
   5  * Based on arch/sh/boards/se/7300/irq.c
   6  *
   7  * Modified for SH-Mobile SolutionEngine 73180 Support
   8  *              by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
   9  *
  10  *
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/init.h>
  15 #include <linux/irq.h>
  16 #include <asm/irq.h>
  17 #include <asm/io.h>
  18 #include <asm/mach/se73180.h>
  19
  20 static int
  21 intreq2irq(int i)
  22 {
  23         if (i == 5)
  24                 return 10;
  25         return 32 + 7 - i;
  26 }
  27
  28 static int
  29 irq2intreq(int irq)
  30 {
  31         if (irq == 10)
  32                 return 5;
  33         return 7 - (irq - 32);
  34 }
  35
  36 static void
  37 disable_intreq_irq(unsigned int irq)
  38 {
  39         ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSK0);
  40 }
  41
  42 static void
  43 enable_intreq_irq(unsigned int irq)
  44 {
  45         ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSKCLR0);
  46 }
  47
  48 static void
  49 mask_and_ack_intreq_irq(unsigned int irq)
  50 {
  51         disable_intreq_irq(irq);
  52 }
  53
  54 static unsigned int
  55 startup_intreq_irq(unsigned int irq)
  56 {
  57         enable_intreq_irq(irq);
  58         return 0;
  59 }
  60
  61 static void
  62 shutdown_intreq_irq(unsigned int irq)
  63 {
  64         disable_intreq_irq(irq);
  65 }
  66
  67 static void
  68 end_intreq_irq(unsigned int irq)
  69 {
  70         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
  71                 enable_intreq_irq(irq);
  72 }
  73
  74 static struct hw_interrupt_type intreq_irq_type = {
  75         .typename = "intreq",
  76         .startup = startup_intreq_irq,
  77         .shutdown = shutdown_intreq_irq,
  78         .enable = enable_intreq_irq,
  79         .disable = disable_intreq_irq,
  80         .ack = mask_and_ack_intreq_irq,
  81         .end = end_intreq_irq
  82 };
  83
  84 void
  85 make_intreq_irq(unsigned int irq)
  86 {
  87         disable_irq_nosync(irq);
  88         irq_desc[irq].handler = &intreq_irq_type;
  89         disable_intreq_irq(irq);
  90 }
  91
  92 int
  93 shmse_irq_demux(int irq)
  94 {
  95         if (irq == IRQ5_IRQ)
  96                 return 10;
  97         return irq;
  98 }
  99
 100 /*
 101  * Initialize IRQ setting
 102  */
 103 void __init
 104 init_73180se_IRQ(void)
 105 {
 106         make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
 107
 108         ctrl_outw(0x2000, 0xb03fffec);  /* mrshpc irq enable */
 109         ctrl_outw(0x2000, 0xb07fffec);  /* mrshpc irq enable */
 110         ctrl_outl(3 << ((7 - 5) * 4), INTC_INTPRI0);    /* irq5 pri=3 */
 111         ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1);       /* low-level irq */
 112         make_intreq_irq(10);
 113
 114         make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);
 115
 116         ctrl_outb(0x0f, INTC_IMCR5);    /* enable SCIF IRQ */
 117
 118         make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
 119         make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
 120         make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
 121         make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
 122         make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
 123                      IIC0_PRIORITY);
 124         make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
 125                      IIC0_PRIORITY);
 126         make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
 127         make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
 128         make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
 129
 130         /* VIO interrupt */
 131         make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
 132         make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
 133         make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
 134
 135         make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
 136         ctrl_outw(0x2000, PA_MRSHPC + 0x0c);    /* mrshpc irq enable */
 137 }