1 /* arch/sparc64/kernel/kprobes.c
3 * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
6 #include <linux/config.h>
7 #include <linux/kernel.h>
8 #include <linux/kprobes.h>
10 #include <asm/kdebug.h>
11 #include <asm/signal.h>
13 /* We do not have hardware single-stepping on sparc64.
14 * So we implement software single-stepping with breakpoint
15 * traps. The top-level scheme is similar to that used
16 * in the x86 kprobes implementation.
18 * In the kprobe->ainsn.insn[] array we store the original
19 * instruction at index zero and a break instruction at
22 * When we hit a kprobe we:
23 * - Run the pre-handler
24 * - Remember "regs->tnpc" and interrupt level stored in
25 * "regs->tstate" so we can restore them later
26 * - Disable PIL interrupts
27 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
28 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
29 * - Mark that we are actively in a kprobe
31 * At this point we wait for the second breakpoint at
32 * kprobe->ainsn.insn[1] to hit. When it does we:
33 * - Run the post-handler
34 * - Set regs->tpc to "remembered" regs->tnpc stored above,
35 * restore the PIL interrupt level in "regs->tstate" as well
36 * - Make any adjustments necessary to regs->tnpc in order
37 * to handle relative branches correctly. See below.
38 * - Mark that we are no longer actively in a kprobe.
41 int arch_prepare_kprobe(struct kprobe
*p
)
46 void arch_copy_kprobe(struct kprobe
*p
)
48 p
->ainsn
.insn
[0] = *p
->addr
;
49 p
->ainsn
.insn
[1] = BREAKPOINT_INSTRUCTION_2
;
52 void arch_remove_kprobe(struct kprobe
*p
)
56 /* kprobe_status settings */
57 #define KPROBE_HIT_ACTIVE 0x00000001
58 #define KPROBE_HIT_SS 0x00000002
60 static struct kprobe
*current_kprobe
;
61 static unsigned long current_kprobe_orig_tnpc
;
62 static unsigned long current_kprobe_orig_tstate_pil
;
63 static unsigned int kprobe_status
;
65 static inline void prepare_singlestep(struct kprobe
*p
, struct pt_regs
*regs
)
67 current_kprobe_orig_tnpc
= regs
->tnpc
;
68 current_kprobe_orig_tstate_pil
= (regs
->tstate
& TSTATE_PIL
);
69 regs
->tstate
|= TSTATE_PIL
;
71 /*single step inline, if it a breakpoint instruction*/
72 if (p
->opcode
== BREAKPOINT_INSTRUCTION
) {
73 regs
->tpc
= (unsigned long) p
->addr
;
74 regs
->tnpc
= current_kprobe_orig_tnpc
;
76 regs
->tpc
= (unsigned long) &p
->ainsn
.insn
[0];
77 regs
->tnpc
= (unsigned long) &p
->ainsn
.insn
[1];
81 static inline void disarm_kprobe(struct kprobe
*p
, struct pt_regs
*regs
)
86 regs
->tpc
= (unsigned long) p
->addr
;
87 regs
->tnpc
= current_kprobe_orig_tnpc
;
88 regs
->tstate
= ((regs
->tstate
& ~TSTATE_PIL
) |
89 current_kprobe_orig_tstate_pil
);
92 static int kprobe_handler(struct pt_regs
*regs
)
95 void *addr
= (void *) regs
->tpc
;
100 if (kprobe_running()) {
101 /* We *are* holding lock here, so this is safe.
102 * Disarm the probe we just hit, and ignore it.
104 p
= get_kprobe(addr
);
106 if (kprobe_status
== KPROBE_HIT_SS
) {
107 regs
->tstate
= ((regs
->tstate
& ~TSTATE_PIL
) |
108 current_kprobe_orig_tstate_pil
);
112 disarm_kprobe(p
, regs
);
116 if (p
->break_handler
&& p
->break_handler(p
, regs
))
119 /* If it's not ours, can't be delete race, (we hold lock). */
124 p
= get_kprobe(addr
);
127 if (*(u32
*)addr
!= BREAKPOINT_INSTRUCTION
) {
129 * The breakpoint instruction was removed right
130 * after we hit it. Another cpu has removed
131 * either a probepoint or a debugger breakpoint
132 * at this address. In either case, no further
133 * handling of this interrupt is appropriate.
137 /* Not one of ours: let kernel handle it */
141 kprobe_status
= KPROBE_HIT_ACTIVE
;
143 if (p
->pre_handler
&& p
->pre_handler(p
, regs
))
147 prepare_singlestep(p
, regs
);
148 kprobe_status
= KPROBE_HIT_SS
;
152 preempt_enable_no_resched();
156 /* If INSN is a relative control transfer instruction,
157 * return the corrected branch destination value.
159 * The original INSN location was REAL_PC, it actually
160 * executed at PC and produced destination address NPC.
162 static unsigned long relbranch_fixup(u32 insn
, unsigned long real_pc
,
163 unsigned long pc
, unsigned long npc
)
165 /* Branch not taken, no mods necessary. */
166 if (npc
== pc
+ 0x4UL
)
167 return real_pc
+ 0x4UL
;
169 /* The three cases are call, branch w/prediction,
170 * and traditional branch.
172 if ((insn
& 0xc0000000) == 0x40000000 ||
173 (insn
& 0xc1c00000) == 0x00400000 ||
174 (insn
& 0xc1c00000) == 0x00800000) {
175 /* The instruction did all the work for us
176 * already, just apply the offset to the correct
177 * instruction location.
179 return (real_pc
+ (npc
- pc
));
182 return real_pc
+ 0x4UL
;
185 /* If INSN is an instruction which writes it's PC location
186 * into a destination register, fix that up.
188 static void retpc_fixup(struct pt_regs
*regs
, u32 insn
, unsigned long real_pc
)
190 unsigned long *slot
= NULL
;
192 /* Simplest cast is call, which always uses %o7 */
193 if ((insn
& 0xc0000000) == 0x40000000) {
194 slot
= ®s
->u_regs
[UREG_I7
];
197 /* Jmpl encodes the register inside of the opcode */
198 if ((insn
& 0xc1f80000) == 0x81c00000) {
199 unsigned long rd
= ((insn
>> 25) & 0x1f);
202 slot
= ®s
->u_regs
[rd
];
204 /* Hard case, it goes onto the stack. */
208 slot
= (unsigned long *)
209 (regs
->u_regs
[UREG_FP
] + STACK_BIAS
);
218 * Called after single-stepping. p->addr is the address of the
219 * instruction whose first byte has been replaced by the breakpoint
220 * instruction. To avoid the SMP problems that can occur when we
221 * temporarily put back the original opcode to single-step, we
222 * single-stepped a copy of the instruction. The address of this
223 * copy is p->ainsn.insn.
225 * This function prepares to return from the post-single-step
228 static void resume_execution(struct kprobe
*p
, struct pt_regs
*regs
)
230 u32 insn
= p
->ainsn
.insn
[0];
232 regs
->tpc
= current_kprobe_orig_tnpc
;
233 regs
->tnpc
= relbranch_fixup(insn
,
234 (unsigned long) p
->addr
,
235 (unsigned long) &p
->ainsn
.insn
[0],
237 retpc_fixup(regs
, insn
, (unsigned long) p
->addr
);
239 regs
->tstate
= ((regs
->tstate
& ~TSTATE_PIL
) |
240 current_kprobe_orig_tstate_pil
);
243 static inline int post_kprobe_handler(struct pt_regs
*regs
)
245 if (!kprobe_running())
248 if (current_kprobe
->post_handler
)
249 current_kprobe
->post_handler(current_kprobe
, regs
, 0);
251 resume_execution(current_kprobe
, regs
);
254 preempt_enable_no_resched();
259 /* Interrupts disabled, kprobe_lock held. */
260 static inline int kprobe_fault_handler(struct pt_regs
*regs
, int trapnr
)
262 if (current_kprobe
->fault_handler
263 && current_kprobe
->fault_handler(current_kprobe
, regs
, trapnr
))
266 if (kprobe_status
& KPROBE_HIT_SS
) {
267 resume_execution(current_kprobe
, regs
);
270 preempt_enable_no_resched();
276 * Wrapper routine to for handling exceptions.
278 int kprobe_exceptions_notify(struct notifier_block
*self
, unsigned long val
,
281 struct die_args
*args
= (struct die_args
*)data
;
284 if (kprobe_handler(args
->regs
))
288 if (post_kprobe_handler(args
->regs
))
292 if (kprobe_running() &&
293 kprobe_fault_handler(args
->regs
, args
->trapnr
))
297 if (kprobe_running() &&
298 kprobe_fault_handler(args
->regs
, args
->trapnr
))
307 asmlinkage
void kprobe_trap(unsigned long trap_level
, struct pt_regs
*regs
)
309 BUG_ON(trap_level
!= 0x170 && trap_level
!= 0x171);
311 if (user_mode(regs
)) {
313 bad_trap(regs
, trap_level
);
317 /* trap_level == 0x170 --> ta 0x70
318 * trap_level == 0x171 --> ta 0x71
320 if (notify_die((trap_level
== 0x170) ? DIE_DEBUG
: DIE_DEBUG_2
,
321 (trap_level
== 0x170) ? "debug" : "debug_2",
322 regs
, 0, trap_level
, SIGTRAP
) != NOTIFY_STOP
)
323 bad_trap(regs
, trap_level
);
326 /* Jprobes support. */
327 static struct pt_regs jprobe_saved_regs
;
328 static struct pt_regs
*jprobe_saved_regs_location
;
329 static struct sparc_stackf jprobe_saved_stack
;
331 int setjmp_pre_handler(struct kprobe
*p
, struct pt_regs
*regs
)
333 struct jprobe
*jp
= container_of(p
, struct jprobe
, kp
);
335 jprobe_saved_regs_location
= regs
;
336 memcpy(&jprobe_saved_regs
, regs
, sizeof(*regs
));
338 /* Save a whole stack frame, this gets arguments
339 * pushed onto the stack after using up all the
342 memcpy(&jprobe_saved_stack
,
343 (char *) (regs
->u_regs
[UREG_FP
] + STACK_BIAS
),
344 sizeof(jprobe_saved_stack
));
346 regs
->tpc
= (unsigned long) jp
->entry
;
347 regs
->tnpc
= ((unsigned long) jp
->entry
) + 0x4UL
;
348 regs
->tstate
|= TSTATE_PIL
;
353 void jprobe_return(void)
355 preempt_enable_no_resched();
356 __asm__
__volatile__(
357 ".globl jprobe_return_trap_instruction\n"
358 "jprobe_return_trap_instruction:\n\t"
362 extern void jprobe_return_trap_instruction(void);
364 extern void __show_regs(struct pt_regs
* regs
);
366 int longjmp_break_handler(struct kprobe
*p
, struct pt_regs
*regs
)
368 u32
*addr
= (u32
*) regs
->tpc
;
370 if (addr
== (u32
*) jprobe_return_trap_instruction
) {
371 if (jprobe_saved_regs_location
!= regs
) {
372 printk("JPROBE: Current regs (%p) does not match "
373 "saved regs (%p).\n",
374 regs
, jprobe_saved_regs_location
);
375 printk("JPROBE: Saved registers\n");
376 __show_regs(jprobe_saved_regs_location
);
377 printk("JPROBE: Current registers\n");
381 /* Restore old register state. Do pt_regs
382 * first so that UREG_FP is the original one for
383 * the stack frame restore.
385 memcpy(regs
, &jprobe_saved_regs
, sizeof(*regs
));
387 memcpy((char *) (regs
->u_regs
[UREG_FP
] + STACK_BIAS
),
389 sizeof(jprobe_saved_stack
));