[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / v850 / kernel / ma.c
blobb3dfbc5d2f4074b2f420070351fd77c2ae9cd259
1 /*
2 * arch/v850/kernel/ma.c -- V850E/MA series of cpu chips
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
11 * Written by Miles Bader <miles@gnu.org>
14 #include <linux/config.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/mm.h>
18 #include <linux/swap.h>
19 #include <linux/bootmem.h>
20 #include <linux/irq.h>
22 #include <asm/atomic.h>
23 #include <asm/page.h>
24 #include <asm/machdep.h>
25 #include <asm/v850e_timer_d.h>
27 #include "mach.h"
29 void __init mach_sched_init (struct irqaction *timer_action)
31 /* Start hardware timer. */
32 v850e_timer_d_configure (0, HZ);
33 /* Install timer interrupt handler. */
34 setup_irq (IRQ_INTCMD(0), timer_action);
37 static struct v850e_intc_irq_init irq_inits[] = {
38 { "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
39 { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 },
40 { "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 },
41 { "CSI", IRQ_INTCSI(0), IRQ_INTCSI_NUM, 4, 4 },
42 { "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 4, 3 },
43 { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 4, 4 },
44 { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 4, 5 },
45 { 0 }
47 #define NUM_IRQ_INITS ((sizeof irq_inits / sizeof irq_inits[0]) - 1)
49 static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
51 /* Initialize MA chip interrupts. */
52 void __init ma_init_irqs (void)
54 v850e_intc_init_irq_types (irq_inits, hw_itypes);
57 /* Called before configuring an on-chip UART. */
58 void ma_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
60 /* We only know about the first two UART channels (though
61 specific chips may have more). */
62 if (chan < 2) {
63 unsigned bits = 0x3 << (chan * 3);
64 /* Specify that the relevant pins on the chip should do
65 serial I/O, not direct I/O. */
66 MA_PORT4_PMC |= bits;
67 /* Specify that we're using the UART, not the CSI device. */
68 MA_PORT4_PFC |= bits;