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[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / char / drm / ffb_drv.h
blob8bf7f1e143f1128c79389f630a9db947fd9cd162
1 /* $Id: ffb_drv.h,v 1.1 2000/06/01 04:24:39 davem Exp $
2 * ffb_drv.h: Creator/Creator3D direct rendering driver.
3 *
4 * Copyright (C) 2000 David S. Miller (davem@redhat.com)
5 */
6
7 /* Auxilliary clips. */
8 typedef struct {
9 volatile unsigned int min;
10 volatile unsigned int max;
11 } ffb_auxclip, *ffb_auxclipPtr;
12
13 /* FFB register set. */
14 typedef struct _ffb_fbc {
15 /* Next vertex registers, on the right we list which drawops
16 * use said register and the logical name the register has in
17 * that context.
18 */ /* DESCRIPTION DRAWOP(NAME) */
19 /*0x00*/unsigned int pad1[3]; /* Reserved */
20 /*0x0c*/volatile unsigned int alpha; /* ALPHA Transparency */
21 /*0x10*/volatile unsigned int red; /* RED */
22 /*0x14*/volatile unsigned int green; /* GREEN */
23 /*0x18*/volatile unsigned int blue; /* BLUE */
24 /*0x1c*/volatile unsigned int z; /* DEPTH */
25 /*0x20*/volatile unsigned int y; /* Y triangle(DOYF) */
26 /* aadot(DYF) */
27 /* ddline(DYF) */
28 /* aaline(DYF) */
29 /*0x24*/volatile unsigned int x; /* X triangle(DOXF) */
30 /* aadot(DXF) */
31 /* ddline(DXF) */
32 /* aaline(DXF) */
33 /*0x28*/unsigned int pad2[2]; /* Reserved */
34 /*0x30*/volatile unsigned int ryf; /* Y (alias to DOYF) ddline(RYF) */
35 /* aaline(RYF) */
36 /* triangle(RYF) */
37 /*0x34*/volatile unsigned int rxf; /* X ddline(RXF) */
38 /* aaline(RXF) */
39 /* triangle(RXF) */
40 /*0x38*/unsigned int pad3[2]; /* Reserved */
41 /*0x40*/volatile unsigned int dmyf; /* Y (alias to DOYF) triangle(DMYF) */
42 /*0x44*/volatile unsigned int dmxf; /* X triangle(DMXF) */
43 /*0x48*/unsigned int pad4[2]; /* Reserved */
44 /*0x50*/volatile unsigned int ebyi; /* Y (alias to RYI) polygon(EBYI) */
45 /*0x54*/volatile unsigned int ebxi; /* X polygon(EBXI) */
46 /*0x58*/unsigned int pad5[2]; /* Reserved */
47 /*0x60*/volatile unsigned int by; /* Y brline(RYI) */
48 /* fastfill(OP) */
49 /* polygon(YI) */
50 /* rectangle(YI) */
51 /* bcopy(SRCY) */
52 /* vscroll(SRCY) */
53 /*0x64*/volatile unsigned int bx; /* X brline(RXI) */
54 /* polygon(XI) */
55 /* rectangle(XI) */
56 /* bcopy(SRCX) */
57 /* vscroll(SRCX) */
58 /* fastfill(GO) */
59 /*0x68*/volatile unsigned int dy; /* destination Y fastfill(DSTY) */
60 /* bcopy(DSRY) */
61 /* vscroll(DSRY) */
62 /*0x6c*/volatile unsigned int dx; /* destination X fastfill(DSTX) */
63 /* bcopy(DSTX) */
64 /* vscroll(DSTX) */
65 /*0x70*/volatile unsigned int bh; /* Y (alias to RYI) brline(DYI) */
66 /* dot(DYI) */
67 /* polygon(ETYI) */
68 /* Height fastfill(H) */
69 /* bcopy(H) */
70 /* vscroll(H) */
71 /* Y count fastfill(NY) */
72 /*0x74*/volatile unsigned int bw; /* X dot(DXI) */
73 /* brline(DXI) */
74 /* polygon(ETXI) */
75 /* fastfill(W) */
76 /* bcopy(W) */
77 /* vscroll(W) */
78 /* fastfill(NX) */
79 /*0x78*/unsigned int pad6[2]; /* Reserved */
80 /*0x80*/unsigned int pad7[32]; /* Reserved */
81
82 /* Setup Unit's vertex state register */
83 /*100*/ volatile unsigned int suvtx;
84 /*104*/ unsigned int pad8[63]; /* Reserved */
85
86 /* Frame Buffer Control Registers */
87 /*200*/ volatile unsigned int ppc; /* Pixel Processor Control */
88 /*204*/ volatile unsigned int wid; /* Current WID */
89 /*208*/ volatile unsigned int fg; /* FG data */
90 /*20c*/ volatile unsigned int bg; /* BG data */
91 /*210*/ volatile unsigned int consty; /* Constant Y */
92 /*214*/ volatile unsigned int constz; /* Constant Z */
93 /*218*/ volatile unsigned int xclip; /* X Clip */
94 /*21c*/ volatile unsigned int dcss; /* Depth Cue Scale Slope */
95 /*220*/ volatile unsigned int vclipmin; /* Viewclip XY Min Bounds */
96 /*224*/ volatile unsigned int vclipmax; /* Viewclip XY Max Bounds */
97 /*228*/ volatile unsigned int vclipzmin; /* Viewclip Z Min Bounds */
98 /*22c*/ volatile unsigned int vclipzmax; /* Viewclip Z Max Bounds */
99 /*230*/ volatile unsigned int dcsf; /* Depth Cue Scale Front Bound */
100 /*234*/ volatile unsigned int dcsb; /* Depth Cue Scale Back Bound */
101 /*238*/ volatile unsigned int dczf; /* Depth Cue Z Front */
102 /*23c*/ volatile unsigned int dczb; /* Depth Cue Z Back */
103 /*240*/ unsigned int pad9; /* Reserved */
104 /*244*/ volatile unsigned int blendc; /* Alpha Blend Control */
105 /*248*/ volatile unsigned int blendc1; /* Alpha Blend Color 1 */
106 /*24c*/ volatile unsigned int blendc2; /* Alpha Blend Color 2 */
107 /*250*/ volatile unsigned int fbramitc; /* FB RAM Interleave Test Control */
108 /*254*/ volatile unsigned int fbc; /* Frame Buffer Control */
109 /*258*/ volatile unsigned int rop; /* Raster OPeration */
110 /*25c*/ volatile unsigned int cmp; /* Frame Buffer Compare */
111 /*260*/ volatile unsigned int matchab; /* Buffer AB Match Mask */
112 /*264*/ volatile unsigned int matchc; /* Buffer C(YZ) Match Mask */
113 /*268*/ volatile unsigned int magnab; /* Buffer AB Magnitude Mask */
114 /*26c*/ volatile unsigned int magnc; /* Buffer C(YZ) Magnitude Mask */
115 /*270*/ volatile unsigned int fbcfg0; /* Frame Buffer Config 0 */
116 /*274*/ volatile unsigned int fbcfg1; /* Frame Buffer Config 1 */
117 /*278*/ volatile unsigned int fbcfg2; /* Frame Buffer Config 2 */
118 /*27c*/ volatile unsigned int fbcfg3; /* Frame Buffer Config 3 */
119 /*280*/ volatile unsigned int ppcfg; /* Pixel Processor Config */
120 /*284*/ volatile unsigned int pick; /* Picking Control */
121 /*288*/ volatile unsigned int fillmode; /* FillMode */
122 /*28c*/ volatile unsigned int fbramwac; /* FB RAM Write Address Control */
123 /*290*/ volatile unsigned int pmask; /* RGB PlaneMask */
124 /*294*/ volatile unsigned int xpmask; /* X PlaneMask */
125 /*298*/ volatile unsigned int ypmask; /* Y PlaneMask */
126 /*29c*/ volatile unsigned int zpmask; /* Z PlaneMask */
127 /*2a0*/ ffb_auxclip auxclip[4]; /* Auxilliary Viewport Clip */
128
129 /* New 3dRAM III support regs */
130 /*2c0*/ volatile unsigned int rawblend2;
131 /*2c4*/ volatile unsigned int rawpreblend;
132 /*2c8*/ volatile unsigned int rawstencil;
133 /*2cc*/ volatile unsigned int rawstencilctl;
134 /*2d0*/ volatile unsigned int threedram1;
135 /*2d4*/ volatile unsigned int threedram2;
136 /*2d8*/ volatile unsigned int passin;
137 /*2dc*/ volatile unsigned int rawclrdepth;
138 /*2e0*/ volatile unsigned int rawpmask;
139 /*2e4*/ volatile unsigned int rawcsrc;
140 /*2e8*/ volatile unsigned int rawmatch;
141 /*2ec*/ volatile unsigned int rawmagn;
142 /*2f0*/ volatile unsigned int rawropblend;
143 /*2f4*/ volatile unsigned int rawcmp;
144 /*2f8*/ volatile unsigned int rawwac;
145 /*2fc*/ volatile unsigned int fbramid;
146
147 /*300*/ volatile unsigned int drawop; /* Draw OPeration */
148 /*304*/ unsigned int pad10[2]; /* Reserved */
149 /*30c*/ volatile unsigned int lpat; /* Line Pattern control */
150 /*310*/ unsigned int pad11; /* Reserved */
151 /*314*/ volatile unsigned int fontxy; /* XY Font coordinate */
152 /*318*/ volatile unsigned int fontw; /* Font Width */
153 /*31c*/ volatile unsigned int fontinc; /* Font Increment */
154 /*320*/ volatile unsigned int font; /* Font bits */
155 /*324*/ unsigned int pad12[3]; /* Reserved */
156 /*330*/ volatile unsigned int blend2;
157 /*334*/ volatile unsigned int preblend;
158 /*338*/ volatile unsigned int stencil;
159 /*33c*/ volatile unsigned int stencilctl;
160
161 /*340*/ unsigned int pad13[4]; /* Reserved */
162 /*350*/ volatile unsigned int dcss1; /* Depth Cue Scale Slope 1 */
163 /*354*/ volatile unsigned int dcss2; /* Depth Cue Scale Slope 2 */
164 /*358*/ volatile unsigned int dcss3; /* Depth Cue Scale Slope 3 */
165 /*35c*/ volatile unsigned int widpmask;
166 /*360*/ volatile unsigned int dcs2;
167 /*364*/ volatile unsigned int dcs3;
168 /*368*/ volatile unsigned int dcs4;
169 /*36c*/ unsigned int pad14; /* Reserved */
170 /*370*/ volatile unsigned int dcd2;
171 /*374*/ volatile unsigned int dcd3;
172 /*378*/ volatile unsigned int dcd4;
173 /*37c*/ unsigned int pad15; /* Reserved */
174 /*380*/ volatile unsigned int pattern[32]; /* area Pattern */
175 /*400*/ unsigned int pad16[8]; /* Reserved */
176 /*420*/ volatile unsigned int reset; /* chip RESET */
177 /*424*/ unsigned int pad17[247]; /* Reserved */
178 /*800*/ volatile unsigned int devid; /* Device ID */
179 /*804*/ unsigned int pad18[63]; /* Reserved */
180 /*900*/ volatile unsigned int ucsr; /* User Control & Status Register */
181 /*904*/ unsigned int pad19[31]; /* Reserved */
182 /*980*/ volatile unsigned int mer; /* Mode Enable Register */
183 /*984*/ unsigned int pad20[1439]; /* Reserved */
184 } ffb_fbc, *ffb_fbcPtr;
185
186 struct ffb_hw_context {
187 int is_2d_only;
188
189 unsigned int ppc;
190 unsigned int wid;
191 unsigned int fg;
192 unsigned int bg;
193 unsigned int consty;
194 unsigned int constz;
195 unsigned int xclip;
196 unsigned int dcss;
197 unsigned int vclipmin;
198 unsigned int vclipmax;
199 unsigned int vclipzmin;
200 unsigned int vclipzmax;
201 unsigned int dcsf;
202 unsigned int dcsb;
203 unsigned int dczf;
204 unsigned int dczb;
205 unsigned int blendc;
206 unsigned int blendc1;
207 unsigned int blendc2;
208 unsigned int fbc;
209 unsigned int rop;
210 unsigned int cmp;
211 unsigned int matchab;
212 unsigned int matchc;
213 unsigned int magnab;
214 unsigned int magnc;
215 unsigned int pmask;
216 unsigned int xpmask;
217 unsigned int ypmask;
218 unsigned int zpmask;
219 unsigned int auxclip0min;
220 unsigned int auxclip0max;
221 unsigned int auxclip1min;
222 unsigned int auxclip1max;
223 unsigned int auxclip2min;
224 unsigned int auxclip2max;
225 unsigned int auxclip3min;
226 unsigned int auxclip3max;
227 unsigned int drawop;
228 unsigned int lpat;
229 unsigned int fontxy;
230 unsigned int fontw;
231 unsigned int fontinc;
232 unsigned int area_pattern[32];
233 unsigned int ucsr;
234 unsigned int stencil;
235 unsigned int stencilctl;
236 unsigned int dcss1;
237 unsigned int dcss2;
238 unsigned int dcss3;
239 unsigned int dcs2;
240 unsigned int dcs3;
241 unsigned int dcs4;
242 unsigned int dcd2;
243 unsigned int dcd3;
244 unsigned int dcd4;
245 unsigned int mer;
246 };
247
248 #define FFB_MAX_CTXS 32
249
250 enum ffb_chip_type {
251 ffb1_prototype = 0, /* Early pre-FCS FFB */
252 ffb1_standard, /* First FCS FFB, 100Mhz UPA, 66MHz gclk */
253 ffb1_speedsort, /* Second FCS FFB, 100Mhz UPA, 75MHz gclk */
254 ffb2_prototype, /* Early pre-FCS vertical FFB2 */
255 ffb2_vertical, /* First FCS FFB2/vertical, 100Mhz UPA, 100MHZ gclk,
256 75(SingleBuffer)/83(DoubleBuffer) MHz fclk */
257 ffb2_vertical_plus, /* Second FCS FFB2/vertical, same timings */
258 ffb2_horizontal, /* First FCS FFB2/horizontal, same timings as FFB2/vert */
259 ffb2_horizontal_plus, /* Second FCS FFB2/horizontal, same timings */
260 afb_m3, /* FCS Elite3D, 3 float chips */
261 afb_m6 /* FCS Elite3D, 6 float chips */
262 };
263
264 typedef struct ffb_dev_priv {
265 /* Misc software state. */
266 int prom_node;
267 enum ffb_chip_type ffb_type;
268 u64 card_phys_base;
269 struct miscdevice miscdev;
270
271 /* Controller registers. */
272 ffb_fbcPtr regs;
273
274 /* Context table. */
275 struct ffb_hw_context *hw_state[FFB_MAX_CTXS];
276 } ffb_dev_priv_t;
277
278 extern unsigned long ffb_get_unmapped_area(struct file *filp,
279 unsigned long hint,
280 unsigned long len,
281 unsigned long pgoff,
282 unsigned long flags);
283 extern void ffb_set_context_ioctls(void);
284 extern drm_ioctl_desc_t DRM(ioctls)[];
285
286 extern int ffb_driver_context_switch(drm_device_t *dev, int old, int new);
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