[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / char / rio / eisa.h
blob59371b0528b071bb5eb0221ff648c5f2a8c09e7c
1 /*
2 ** -----------------------------------------------------------------------------
3 **
4 ** Perle Specialix driver for Linux
5 ** Ported from existing RIO Driver for SCO sources.
8 * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 ** Module : eisa.h
25 ** SID : 1.2
26 ** Last Modified : 11/6/98 11:34:10
27 ** Retrieved : 11/6/98 11:34:21
29 ** ident @(#)eisa.h 1.2
31 ** -----------------------------------------------------------------------------
34 #ifndef __rio_eisa_h__
35 #define __rio_eisa_h__
37 #ifdef SCCS_LABELS
38 #ifndef lint
39 static char *_eisa_h_sccs_ = "@(#)eisa.h 1.2";
40 #endif
41 #endif
44 ** things to do with the EISA bus
47 #define RIO_EISA_STRING_ADDRESS 0xfffd9 /* where EISA is stored */
49 #define RIO_MAX_EISA_SLOTS 16 /* how many EISA slots? */
51 #define RIO_EISA_IDENT 0x984D /* Specialix */
52 #define RIO_EISA_PRODUCT_CODE 0x14 /* Code 14 */
53 #define RIO_EISA_ENABLE_BIT 0x01 /* To enable card */
55 #define EISA_MEMORY_BASE_LO 0xC00 /* A16-A23 */
56 #define EISA_MEMORY_BASE_HI 0xC01 /* A24-A31 */
57 #define EISA_INTERRUPT_VEC 0xC02 /* see below */
58 #define EISA_CONTROL_PORT 0xC02 /* see below */
59 #define EISA_INTERRUPT_RESET 0xC03 /* read to clear IRQ */
61 #define EISA_PRODUCT_IDENT_LO 0xC80 /* where RIO_EISA_IDENT is */
62 #define EISA_PRODUCT_IDENT_HI 0xC81
63 #define EISA_PRODUCT_NUMBER 0xC82 /* where PROD_CODE is */
64 #define EISA_REVISION_NUMBER 0xC83 /* revision (1dp) */
65 #define EISA_ENABLE 0xC84 /* set LSB to enable card */
66 #define EISA_UNIQUE_NUM_0 0xC88 /* vomit */
67 #define EISA_UNIQUE_NUM_1 0xC8A
68 #define EISA_UNIQUE_NUM_2 0xC90 /* bit strangely arranged */
69 #define EISA_UNIQUE_NUM_3 0xC92
70 #define EISA_MANUF_YEAR 0xC98 /* when */
71 #define EISA_MANUF_WEEK 0xC9A /* more when */
73 #define EISA_TP_BOOT_FROM_RAM 0x01
74 #define EISA_TP_BOOT_FROM_LINK 0x00
75 #define EISA_TP_FAST_LINKS 0x02
76 #define EISA_TP_SLOW_LINKS 0x00
77 #define EISA_TP_BUS_ENABLE 0x04
78 #define EISA_TP_BUS_DISABLE 0x00
79 #define EISA_TP_RUN 0x08
80 #define EISA_TP_RESET 0x00
81 #define EISA_POLLED 0x00
82 #define EISA_IRQ_3 0x30
83 #define EISA_IRQ_4 0x40
84 #define EISA_IRQ_5 0x50
85 #define EISA_IRQ_6 0x60
86 #define EISA_IRQ_7 0x70
87 #define EISA_IRQ_9 0x90
88 #define EISA_IRQ_10 0xA0
89 #define EISA_IRQ_11 0xB0
90 #define EISA_IRQ_12 0xC0
91 #define EISA_IRQ_14 0xE0
92 #define EISA_IRQ_15 0xF0
94 #define EISA_INTERRUPT_MASK 0xF0
95 #define EISA_CONTROL_MASK 0x0F
97 #define RIO_EISA_DEFAULT_MODE EISA_TP_SLOW_LINKS
99 #define RIOEisaToIvec(X) (uchar )((uchar)((X) & EISA_INTERRUPT_MASK)>>4)
101 #define INBZ(z,x) inb(((z)<<12) | (x))
102 #define OUTBZ(z,x,y) outb((((z)<<12) | (x)), y)
104 #endif /* __rio_eisa_h__ */