[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / i2c / busses / i2c-sis96x.c
blob3cac6d43bce576208c402fb9494471f5b8ef0b3a
1 /*
2 sis96x.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
5 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 This module must be considered BETA unless and until
24 the chipset manufacturer releases a datasheet.
25 The register definitions are based on the SiS630.
27 This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
28 for just about every machine for which users have reported.
29 If this module isn't detecting your 96x south bridge, have a
30 look there.
32 We assume there can only be one SiS96x with one SMBus interface.
35 #include <linux/config.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/kernel.h>
39 #include <linux/delay.h>
40 #include <linux/stddef.h>
41 #include <linux/sched.h>
42 #include <linux/ioport.h>
43 #include <linux/i2c.h>
44 #include <linux/init.h>
45 #include <asm/io.h>
48 HISTORY:
49 2003-05-11 1.0.0 Updated from lm_sensors project for kernel 2.5
50 (was i2c-sis645.c from lm_sensors 2.7.0)
52 #define SIS96x_VERSION "1.0.0"
54 /* base address register in PCI config space */
55 #define SIS96x_BAR 0x04
57 /* SiS96x SMBus registers */
58 #define SMB_STS 0x00
59 #define SMB_EN 0x01
60 #define SMB_CNT 0x02
61 #define SMB_HOST_CNT 0x03
62 #define SMB_ADDR 0x04
63 #define SMB_CMD 0x05
64 #define SMB_PCOUNT 0x06
65 #define SMB_COUNT 0x07
66 #define SMB_BYTE 0x08
67 #define SMB_DEV_ADDR 0x10
68 #define SMB_DB0 0x11
69 #define SMB_DB1 0x12
70 #define SMB_SAA 0x13
72 /* register count for request_region */
73 #define SMB_IOSIZE 0x20
75 /* Other settings */
76 #define MAX_TIMEOUT 500
78 /* SiS96x SMBus constants */
79 #define SIS96x_QUICK 0x00
80 #define SIS96x_BYTE 0x01
81 #define SIS96x_BYTE_DATA 0x02
82 #define SIS96x_WORD_DATA 0x03
83 #define SIS96x_PROC_CALL 0x04
84 #define SIS96x_BLOCK_DATA 0x05
86 static struct i2c_adapter sis96x_adapter;
87 static u16 sis96x_smbus_base = 0;
89 static inline u8 sis96x_read(u8 reg)
91 return inb(sis96x_smbus_base + reg) ;
94 static inline void sis96x_write(u8 reg, u8 data)
96 outb(data, sis96x_smbus_base + reg) ;
99 /* Execute a SMBus transaction.
100 int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
102 static int sis96x_transaction(int size)
104 int temp;
105 int result = 0;
106 int timeout = 0;
108 dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
110 /* Make sure the SMBus host is ready to start transmitting */
111 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
113 dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
114 "Resetting...\n", temp);
116 /* kill the transaction */
117 sis96x_write(SMB_HOST_CNT, 0x20);
119 /* check it again */
120 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
121 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
122 return -1;
123 } else {
124 dev_dbg(&sis96x_adapter.dev, "Successful\n");
128 /* Turn off timeout interrupts, set fast host clock */
129 sis96x_write(SMB_CNT, 0x20);
131 /* clear all (sticky) status flags */
132 temp = sis96x_read(SMB_STS);
133 sis96x_write(SMB_STS, temp & 0x1e);
135 /* start the transaction by setting bit 4 and size bits */
136 sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));
138 /* We will always wait for a fraction of a second! */
139 do {
140 msleep(1);
141 temp = sis96x_read(SMB_STS);
142 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
144 /* If the SMBus is still busy, we give up */
145 if (timeout >= MAX_TIMEOUT) {
146 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
147 result = -1;
150 /* device error - probably missing ACK */
151 if (temp & 0x02) {
152 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
153 result = -1;
156 /* bus collision */
157 if (temp & 0x04) {
158 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
159 result = -1;
162 /* Finish up by resetting the bus */
163 sis96x_write(SMB_STS, temp);
164 if ((temp = sis96x_read(SMB_STS))) {
165 dev_dbg(&sis96x_adapter.dev, "Failed reset at "
166 "end of transaction! (0x%02x)\n", temp);
169 return result;
172 /* Return -1 on error. */
173 static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
174 unsigned short flags, char read_write,
175 u8 command, int size, union i2c_smbus_data * data)
178 switch (size) {
179 case I2C_SMBUS_QUICK:
180 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
181 size = SIS96x_QUICK;
182 break;
184 case I2C_SMBUS_BYTE:
185 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
186 if (read_write == I2C_SMBUS_WRITE)
187 sis96x_write(SMB_CMD, command);
188 size = SIS96x_BYTE;
189 break;
191 case I2C_SMBUS_BYTE_DATA:
192 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
193 sis96x_write(SMB_CMD, command);
194 if (read_write == I2C_SMBUS_WRITE)
195 sis96x_write(SMB_BYTE, data->byte);
196 size = SIS96x_BYTE_DATA;
197 break;
199 case I2C_SMBUS_PROC_CALL:
200 case I2C_SMBUS_WORD_DATA:
201 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
202 sis96x_write(SMB_CMD, command);
203 if (read_write == I2C_SMBUS_WRITE) {
204 sis96x_write(SMB_BYTE, data->word & 0xff);
205 sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
207 size = (size == I2C_SMBUS_PROC_CALL ?
208 SIS96x_PROC_CALL : SIS96x_WORD_DATA);
209 break;
211 case I2C_SMBUS_BLOCK_DATA:
212 /* TO DO: */
213 dev_info(&adap->dev, "SMBus block not implemented!\n");
214 return -1;
215 break;
217 default:
218 dev_info(&adap->dev, "Unsupported I2C size\n");
219 return -1;
220 break;
223 if (sis96x_transaction(size))
224 return -1;
226 if ((size != SIS96x_PROC_CALL) &&
227 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
228 return 0;
230 switch (size) {
231 case SIS96x_BYTE:
232 case SIS96x_BYTE_DATA:
233 data->byte = sis96x_read(SMB_BYTE);
234 break;
236 case SIS96x_WORD_DATA:
237 case SIS96x_PROC_CALL:
238 data->word = sis96x_read(SMB_BYTE) +
239 (sis96x_read(SMB_BYTE + 1) << 8);
240 break;
242 return 0;
245 static u32 sis96x_func(struct i2c_adapter *adapter)
247 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
248 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
249 I2C_FUNC_SMBUS_PROC_CALL;
252 static struct i2c_algorithm smbus_algorithm = {
253 .name = "Non-I2C SMBus adapter",
254 .id = I2C_ALGO_SMBUS,
255 .smbus_xfer = sis96x_access,
256 .functionality = sis96x_func,
259 static struct i2c_adapter sis96x_adapter = {
260 .owner = THIS_MODULE,
261 .class = I2C_CLASS_HWMON,
262 .algo = &smbus_algorithm,
263 .name = "unset",
266 static struct pci_device_id sis96x_ids[] = {
267 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
268 { 0, }
271 MODULE_DEVICE_TABLE (pci, sis96x_ids);
273 static int __devinit sis96x_probe(struct pci_dev *dev,
274 const struct pci_device_id *id)
276 u16 ww = 0;
277 int retval;
279 if (sis96x_smbus_base) {
280 dev_err(&dev->dev, "Only one device supported.\n");
281 return -EBUSY;
284 pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
285 if (PCI_CLASS_SERIAL_SMBUS != ww) {
286 dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
287 return -ENODEV;
290 sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
291 if (!sis96x_smbus_base) {
292 dev_err(&dev->dev, "SiS96x SMBus base address "
293 "not initialized!\n");
294 return -EINVAL;
296 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
297 sis96x_smbus_base);
299 /* Everything is happy, let's grab the memory and set things up. */
300 if (!request_region(sis96x_smbus_base, SMB_IOSIZE, "sis96x-smbus")) {
301 dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
302 "already in use!\n", sis96x_smbus_base,
303 sis96x_smbus_base + SMB_IOSIZE - 1);
305 sis96x_smbus_base = 0;
306 return -EINVAL;
309 /* set up the driverfs linkage to our parent device */
310 sis96x_adapter.dev.parent = &dev->dev;
312 snprintf(sis96x_adapter.name, I2C_NAME_SIZE,
313 "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
315 if ((retval = i2c_add_adapter(&sis96x_adapter))) {
316 dev_err(&dev->dev, "Couldn't register adapter!\n");
317 release_region(sis96x_smbus_base, SMB_IOSIZE);
318 sis96x_smbus_base = 0;
321 return retval;
324 static void __devexit sis96x_remove(struct pci_dev *dev)
326 if (sis96x_smbus_base) {
327 i2c_del_adapter(&sis96x_adapter);
328 release_region(sis96x_smbus_base, SMB_IOSIZE);
329 sis96x_smbus_base = 0;
333 static struct pci_driver sis96x_driver = {
334 .name = "sis96x_smbus",
335 .id_table = sis96x_ids,
336 .probe = sis96x_probe,
337 .remove = __devexit_p(sis96x_remove),
340 static int __init i2c_sis96x_init(void)
342 printk(KERN_INFO "i2c-sis96x version %s\n", SIS96x_VERSION);
343 return pci_register_driver(&sis96x_driver);
346 static void __exit i2c_sis96x_exit(void)
348 pci_unregister_driver(&sis96x_driver);
351 MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
352 MODULE_DESCRIPTION("SiS96x SMBus driver");
353 MODULE_LICENSE("GPL");
355 /* Register initialization functions using helper macros */
356 module_init(i2c_sis96x_init);
357 module_exit(i2c_sis96x_exit);