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[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / i2c / chips / w83627hf.c
blobb1da5ed696d3de73f3ee2f3528015f1fc0a4bc87
1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
31 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
32
33 For other winbond chips, and for i2c support in the above chips,
34 use w83781d.c.
35
36 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
37 supported yet.
38 */
39
40 #include <linux/module.h>
41 #include <linux/init.h>
42 #include <linux/slab.h>
43 #include <linux/jiffies.h>
44 #include <linux/i2c.h>
45 #include <linux/i2c-sensor.h>
46 #include <linux/i2c-vid.h>
47 #include <asm/io.h>
48 #include "lm75.h"
49
50 static u16 force_addr;
51 module_param(force_addr, ushort, 0);
52 MODULE_PARM_DESC(force_addr,
53 "Initialize the base address of the sensors");
54 static u8 force_i2c = 0x1f;
55 module_param(force_i2c, byte, 0);
56 MODULE_PARM_DESC(force_i2c,
57 "Initialize the i2c address of the sensors");
58
59 /* Addresses to scan */
60 static unsigned short normal_i2c[] = { I2C_CLIENT_END };
61 static unsigned int normal_isa[] = { 0, I2C_CLIENT_ISA_END };
62
63 /* Insmod parameters */
64 SENSORS_INSMOD_4(w83627hf, w83627thf, w83697hf, w83637hf);
65
66 static int init = 1;
67 module_param(init, bool, 0);
68 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
69
70 /* modified from kernel/include/traps.c */
71 static int REG; /* The register to read/write */
72 #define DEV 0x07 /* Register: Logical device select */
73 static int VAL; /* The value to read/write */
74
75 /* logical device numbers for superio_select (below) */
76 #define W83627HF_LD_FDC 0x00
77 #define W83627HF_LD_PRT 0x01
78 #define W83627HF_LD_UART1 0x02
79 #define W83627HF_LD_UART2 0x03
80 #define W83627HF_LD_KBC 0x05
81 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
82 #define W83627HF_LD_GAME 0x07
83 #define W83627HF_LD_MIDI 0x07
84 #define W83627HF_LD_GPIO1 0x07
85 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
86 #define W83627HF_LD_GPIO2 0x08
87 #define W83627HF_LD_GPIO3 0x09
88 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
89 #define W83627HF_LD_ACPI 0x0a
90 #define W83627HF_LD_HWM 0x0b
91
92 #define DEVID 0x20 /* Register: Device ID */
93
94 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
95 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
96 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
97
98 static inline void
99 superio_outb(int reg, int val)
100 {
101 outb(reg, REG);
102 outb(val, VAL);
103 }
104
105 static inline int
106 superio_inb(int reg)
107 {
108 outb(reg, REG);
109 return inb(VAL);
110 }
111
112 static inline void
113 superio_select(int ld)
114 {
115 outb(DEV, REG);
116 outb(ld, VAL);
117 }
118
119 static inline void
120 superio_enter(void)
121 {
122 outb(0x87, REG);
123 outb(0x87, REG);
124 }
125
126 static inline void
127 superio_exit(void)
128 {
129 outb(0xAA, REG);
130 }
131
132 #define W627_DEVID 0x52
133 #define W627THF_DEVID 0x82
134 #define W697_DEVID 0x60
135 #define W637_DEVID 0x70
136 #define WINB_ACT_REG 0x30
137 #define WINB_BASE_REG 0x60
138 /* Constants specified below */
139
140 /* Length of ISA address segment */
141 #define WINB_EXTENT 8
142
143 /* Where are the ISA address/data registers relative to the base address */
144 #define W83781D_ADDR_REG_OFFSET 5
145 #define W83781D_DATA_REG_OFFSET 6
146
147 /* The W83781D registers */
148 /* The W83782D registers for nr=7,8 are in bank 5 */
149 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
150 (0x554 + (((nr) - 7) * 2)))
151 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
152 (0x555 + (((nr) - 7) * 2)))
153 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
154 (0x550 + (nr) - 7))
155
156 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
157 #define W83781D_REG_FAN(nr) (0x27 + (nr))
158
159 #define W83781D_REG_TEMP2_CONFIG 0x152
160 #define W83781D_REG_TEMP3_CONFIG 0x252
161 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
162 ((nr == 2) ? (0x0150) : \
163 (0x27)))
164 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
165 ((nr == 2) ? (0x153) : \
166 (0x3A)))
167 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
168 ((nr == 2) ? (0x155) : \
169 (0x39)))
170
171 #define W83781D_REG_BANK 0x4E
172
173 #define W83781D_REG_CONFIG 0x40
174 #define W83781D_REG_ALARM1 0x41
175 #define W83781D_REG_ALARM2 0x42
176 #define W83781D_REG_ALARM3 0x450
177
178 #define W83781D_REG_IRQ 0x4C
179 #define W83781D_REG_BEEP_CONFIG 0x4D
180 #define W83781D_REG_BEEP_INTS1 0x56
181 #define W83781D_REG_BEEP_INTS2 0x57
182 #define W83781D_REG_BEEP_INTS3 0x453
183
184 #define W83781D_REG_VID_FANDIV 0x47
185
186 #define W83781D_REG_CHIPID 0x49
187 #define W83781D_REG_WCHIPID 0x58
188 #define W83781D_REG_CHIPMAN 0x4F
189 #define W83781D_REG_PIN 0x4B
190
191 #define W83781D_REG_VBAT 0x5D
192
193 #define W83627HF_REG_PWM1 0x5A
194 #define W83627HF_REG_PWM2 0x5B
195 #define W83627HF_REG_PWMCLK12 0x5C
196
197 #define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */
198 #define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */
199 #define W83627THF_REG_PWM3 0x11 /* 637HF too */
200
201 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */
202
203 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
204 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
205 W83627THF_REG_PWM3 };
206 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
207 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
208
209 #define W83781D_REG_I2C_ADDR 0x48
210 #define W83781D_REG_I2C_SUBADDR 0x4A
211
212 /* Sensor selection */
213 #define W83781D_REG_SCFG1 0x5D
214 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
215 #define W83781D_REG_SCFG2 0x59
216 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
217 #define W83781D_DEFAULT_BETA 3435
218
219 /* Conversions. Limit checking is only done on the TO_REG
220 variants. Note that you should be a bit careful with which arguments
221 these macros are called: arguments may be evaluated more than once.
222 Fixing this is just not worth it. */
223 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
224 #define IN_FROM_REG(val) ((val) * 16)
225
226 static inline u8 FAN_TO_REG(long rpm, int div)
227 {
228 if (rpm == 0)
229 return 255;
230 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
231 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
232 254);
233 }
234
235 #define TEMP_MIN (-128000)
236 #define TEMP_MAX ( 127000)
237
238 /* TEMP: 0.001C/bit (-128C to +127C)
239 REG: 1C/bit, two's complement */
240 static u8 TEMP_TO_REG(int temp)
241 {
242 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
243 ntemp += (ntemp<0 ? -500 : 500);
244 return (u8)(ntemp / 1000);
245 }
246
247 static int TEMP_FROM_REG(u8 reg)
248 {
249 return (s8)reg * 1000;
250 }
251
252 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
253
254 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
255
256 #define BEEP_MASK_FROM_REG(val) (val)
257 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
258 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
259 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
260
261 #define DIV_FROM_REG(val) (1 << (val))
262
263 static inline u8 DIV_TO_REG(long val)
264 {
265 int i;
266 val = SENSORS_LIMIT(val, 1, 128) >> 1;
267 for (i = 0; i < 6; i++) {
268 if (val == 0)
269 break;
270 val >>= 1;
271 }
272 return ((u8) i);
273 }
274
275 /* For each registered chip, we need to keep some data in memory. That
276 data is pointed to by w83627hf_list[NR]->data. The structure itself is
277 dynamically allocated, at the same time when a new client is allocated. */
278 struct w83627hf_data {
279 struct i2c_client client;
280 struct semaphore lock;
281 enum chips type;
282
283 struct semaphore update_lock;
284 char valid; /* !=0 if following fields are valid */
285 unsigned long last_updated; /* In jiffies */
286
287 struct i2c_client *lm75; /* for secondary I2C addresses */
288 /* pointer to array of 2 subclients */
289
290 u8 in[9]; /* Register value */
291 u8 in_max[9]; /* Register value */
292 u8 in_min[9]; /* Register value */
293 u8 fan[3]; /* Register value */
294 u8 fan_min[3]; /* Register value */
295 u8 temp;
296 u8 temp_max; /* Register value */
297 u8 temp_max_hyst; /* Register value */
298 u16 temp_add[2]; /* Register value */
299 u16 temp_max_add[2]; /* Register value */
300 u16 temp_max_hyst_add[2]; /* Register value */
301 u8 fan_div[3]; /* Register encoding, shifted right */
302 u8 vid; /* Register encoding, combined */
303 u32 alarms; /* Register encoding, combined */
304 u32 beep_mask; /* Register encoding, combined */
305 u8 beep_enable; /* Boolean */
306 u8 pwm[3]; /* Register value */
307 u16 sens[3]; /* 782D/783S only.
308 1 = pentium diode; 2 = 3904 diode;
309 3000-5000 = thermistor beta.
310 Default = 3435.
311 Other Betas unimplemented */
312 u8 vrm;
313 u8 vrm_ovt; /* Register value, 627thf & 637hf only */
314 };
315
316
317 static int w83627hf_attach_adapter(struct i2c_adapter *adapter);
318 static int w83627hf_detect(struct i2c_adapter *adapter, int address,
319 int kind);
320 static int w83627hf_detach_client(struct i2c_client *client);
321
322 static int w83627hf_read_value(struct i2c_client *client, u16 register);
323 static int w83627hf_write_value(struct i2c_client *client, u16 register,
324 u16 value);
325 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
326 static void w83627hf_init_client(struct i2c_client *client);
327
328 static struct i2c_driver w83627hf_driver = {
329 .owner = THIS_MODULE,
330 .name = "w83627hf",
331 .id = I2C_DRIVERID_W83627HF,
332 .flags = I2C_DF_NOTIFY,
333 .attach_adapter = w83627hf_attach_adapter,
334 .detach_client = w83627hf_detach_client,
335 };
336
337 /* following are the sysfs callback functions */
338 #define show_in_reg(reg) \
339 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
340 { \
341 struct w83627hf_data *data = w83627hf_update_device(dev); \
342 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
343 }
344 show_in_reg(in)
345 show_in_reg(in_min)
346 show_in_reg(in_max)
347
348 #define store_in_reg(REG, reg) \
349 static ssize_t \
350 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
351 { \
352 struct i2c_client *client = to_i2c_client(dev); \
353 struct w83627hf_data *data = i2c_get_clientdata(client); \
354 u32 val; \
355 \
356 val = simple_strtoul(buf, NULL, 10); \
357 \
358 down(&data->update_lock); \
359 data->in_##reg[nr] = IN_TO_REG(val); \
360 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
361 data->in_##reg[nr]); \
362 \
363 up(&data->update_lock); \
364 return count; \
365 }
366 store_in_reg(MIN, min)
367 store_in_reg(MAX, max)
368
369 #define sysfs_in_offset(offset) \
370 static ssize_t \
371 show_regs_in_##offset (struct device *dev, char *buf) \
372 { \
373 return show_in(dev, buf, offset); \
374 } \
375 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
376
377 #define sysfs_in_reg_offset(reg, offset) \
378 static ssize_t show_regs_in_##reg##offset (struct device *dev, char *buf) \
379 { \
380 return show_in_##reg (dev, buf, offset); \
381 } \
382 static ssize_t \
383 store_regs_in_##reg##offset (struct device *dev, \
384 const char *buf, size_t count) \
385 { \
386 return store_in_##reg (dev, buf, count, offset); \
387 } \
388 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
389 show_regs_in_##reg##offset, store_regs_in_##reg##offset);
390
391 #define sysfs_in_offsets(offset) \
392 sysfs_in_offset(offset) \
393 sysfs_in_reg_offset(min, offset) \
394 sysfs_in_reg_offset(max, offset)
395
396 sysfs_in_offsets(1);
397 sysfs_in_offsets(2);
398 sysfs_in_offsets(3);
399 sysfs_in_offsets(4);
400 sysfs_in_offsets(5);
401 sysfs_in_offsets(6);
402 sysfs_in_offsets(7);
403 sysfs_in_offsets(8);
404
405 /* use a different set of functions for in0 */
406 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
407 {
408 long in0;
409
410 if ((data->vrm_ovt & 0x01) &&
411 (w83627thf == data->type || w83637hf == data->type))
412
413 /* use VRM9 calculation */
414 in0 = (long)((reg * 488 + 70000 + 50) / 100);
415 else
416 /* use VRM8 (standard) calculation */
417 in0 = (long)IN_FROM_REG(reg);
418
419 return sprintf(buf,"%ld\n", in0);
420 }
421
422 static ssize_t show_regs_in_0(struct device *dev, char *buf)
423 {
424 struct w83627hf_data *data = w83627hf_update_device(dev);
425 return show_in_0(data, buf, data->in[0]);
426 }
427
428 static ssize_t show_regs_in_min0(struct device *dev, char *buf)
429 {
430 struct w83627hf_data *data = w83627hf_update_device(dev);
431 return show_in_0(data, buf, data->in_min[0]);
432 }
433
434 static ssize_t show_regs_in_max0(struct device *dev, char *buf)
435 {
436 struct w83627hf_data *data = w83627hf_update_device(dev);
437 return show_in_0(data, buf, data->in_max[0]);
438 }
439
440 static ssize_t store_regs_in_min0(struct device *dev,
441 const char *buf, size_t count)
442 {
443 struct i2c_client *client = to_i2c_client(dev);
444 struct w83627hf_data *data = i2c_get_clientdata(client);
445 u32 val;
446
447 val = simple_strtoul(buf, NULL, 10);
448
449 down(&data->update_lock);
450
451 if ((data->vrm_ovt & 0x01) &&
452 (w83627thf == data->type || w83637hf == data->type))
453
454 /* use VRM9 calculation */
455 data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
456 else
457 /* use VRM8 (standard) calculation */
458 data->in_min[0] = IN_TO_REG(val);
459
460 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
461 up(&data->update_lock);
462 return count;
463 }
464
465 static ssize_t store_regs_in_max0(struct device *dev,
466 const char *buf, size_t count)
467 {
468 struct i2c_client *client = to_i2c_client(dev);
469 struct w83627hf_data *data = i2c_get_clientdata(client);
470 u32 val;
471
472 val = simple_strtoul(buf, NULL, 10);
473
474 down(&data->update_lock);
475
476 if ((data->vrm_ovt & 0x01) &&
477 (w83627thf == data->type || w83637hf == data->type))
478
479 /* use VRM9 calculation */
480 data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
481 else
482 /* use VRM8 (standard) calculation */
483 data->in_max[0] = IN_TO_REG(val);
484
485 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
486 up(&data->update_lock);
487 return count;
488 }
489
490 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
491 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
492 show_regs_in_min0, store_regs_in_min0);
493 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
494 show_regs_in_max0, store_regs_in_max0);
495
496 #define device_create_file_in(client, offset) \
497 do { \
498 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
499 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
500 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
501 } while (0)
502
503 #define show_fan_reg(reg) \
504 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
505 { \
506 struct w83627hf_data *data = w83627hf_update_device(dev); \
507 return sprintf(buf,"%ld\n", \
508 FAN_FROM_REG(data->reg[nr-1], \
509 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
510 }
511 show_fan_reg(fan);
512 show_fan_reg(fan_min);
513
514 static ssize_t
515 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
516 {
517 struct i2c_client *client = to_i2c_client(dev);
518 struct w83627hf_data *data = i2c_get_clientdata(client);
519 u32 val;
520
521 val = simple_strtoul(buf, NULL, 10);
522
523 down(&data->update_lock);
524 data->fan_min[nr - 1] =
525 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
526 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
527 data->fan_min[nr - 1]);
528
529 up(&data->update_lock);
530 return count;
531 }
532
533 #define sysfs_fan_offset(offset) \
534 static ssize_t show_regs_fan_##offset (struct device *dev, char *buf) \
535 { \
536 return show_fan(dev, buf, offset); \
537 } \
538 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
539
540 #define sysfs_fan_min_offset(offset) \
541 static ssize_t show_regs_fan_min##offset (struct device *dev, char *buf) \
542 { \
543 return show_fan_min(dev, buf, offset); \
544 } \
545 static ssize_t \
546 store_regs_fan_min##offset (struct device *dev, const char *buf, size_t count) \
547 { \
548 return store_fan_min(dev, buf, count, offset); \
549 } \
550 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
551 show_regs_fan_min##offset, store_regs_fan_min##offset);
552
553 sysfs_fan_offset(1);
554 sysfs_fan_min_offset(1);
555 sysfs_fan_offset(2);
556 sysfs_fan_min_offset(2);
557 sysfs_fan_offset(3);
558 sysfs_fan_min_offset(3);
559
560 #define device_create_file_fan(client, offset) \
561 do { \
562 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
563 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
564 } while (0)
565
566 #define show_temp_reg(reg) \
567 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
568 { \
569 struct w83627hf_data *data = w83627hf_update_device(dev); \
570 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
571 return sprintf(buf,"%ld\n", \
572 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
573 } else { /* TEMP1 */ \
574 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
575 } \
576 }
577 show_temp_reg(temp);
578 show_temp_reg(temp_max);
579 show_temp_reg(temp_max_hyst);
580
581 #define store_temp_reg(REG, reg) \
582 static ssize_t \
583 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
584 { \
585 struct i2c_client *client = to_i2c_client(dev); \
586 struct w83627hf_data *data = i2c_get_clientdata(client); \
587 u32 val; \
588 \
589 val = simple_strtoul(buf, NULL, 10); \
590 \
591 down(&data->update_lock); \
592 \
593 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
594 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
595 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
596 data->temp_##reg##_add[nr-2]); \
597 } else { /* TEMP1 */ \
598 data->temp_##reg = TEMP_TO_REG(val); \
599 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
600 data->temp_##reg); \
601 } \
602 \
603 up(&data->update_lock); \
604 return count; \
605 }
606 store_temp_reg(OVER, max);
607 store_temp_reg(HYST, max_hyst);
608
609 #define sysfs_temp_offset(offset) \
610 static ssize_t \
611 show_regs_temp_##offset (struct device *dev, char *buf) \
612 { \
613 return show_temp(dev, buf, offset); \
614 } \
615 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
616
617 #define sysfs_temp_reg_offset(reg, offset) \
618 static ssize_t show_regs_temp_##reg##offset (struct device *dev, char *buf) \
619 { \
620 return show_temp_##reg (dev, buf, offset); \
621 } \
622 static ssize_t \
623 store_regs_temp_##reg##offset (struct device *dev, \
624 const char *buf, size_t count) \
625 { \
626 return store_temp_##reg (dev, buf, count, offset); \
627 } \
628 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
629 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
630
631 #define sysfs_temp_offsets(offset) \
632 sysfs_temp_offset(offset) \
633 sysfs_temp_reg_offset(max, offset) \
634 sysfs_temp_reg_offset(max_hyst, offset)
635
636 sysfs_temp_offsets(1);
637 sysfs_temp_offsets(2);
638 sysfs_temp_offsets(3);
639
640 #define device_create_file_temp(client, offset) \
641 do { \
642 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
643 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
644 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
645 } while (0)
646
647 static ssize_t
648 show_vid_reg(struct device *dev, char *buf)
649 {
650 struct w83627hf_data *data = w83627hf_update_device(dev);
651 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
652 }
653 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
654 #define device_create_file_vid(client) \
655 device_create_file(&client->dev, &dev_attr_cpu0_vid)
656
657 static ssize_t
658 show_vrm_reg(struct device *dev, char *buf)
659 {
660 struct w83627hf_data *data = w83627hf_update_device(dev);
661 return sprintf(buf, "%ld\n", (long) data->vrm);
662 }
663 static ssize_t
664 store_vrm_reg(struct device *dev, const char *buf, size_t count)
665 {
666 struct i2c_client *client = to_i2c_client(dev);
667 struct w83627hf_data *data = i2c_get_clientdata(client);
668 u32 val;
669
670 val = simple_strtoul(buf, NULL, 10);
671 data->vrm = val;
672
673 return count;
674 }
675 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
676 #define device_create_file_vrm(client) \
677 device_create_file(&client->dev, &dev_attr_vrm)
678
679 static ssize_t
680 show_alarms_reg(struct device *dev, char *buf)
681 {
682 struct w83627hf_data *data = w83627hf_update_device(dev);
683 return sprintf(buf, "%ld\n", (long) data->alarms);
684 }
685 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
686 #define device_create_file_alarms(client) \
687 device_create_file(&client->dev, &dev_attr_alarms)
688
689 #define show_beep_reg(REG, reg) \
690 static ssize_t show_beep_##reg (struct device *dev, char *buf) \
691 { \
692 struct w83627hf_data *data = w83627hf_update_device(dev); \
693 return sprintf(buf,"%ld\n", \
694 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
695 }
696 show_beep_reg(ENABLE, enable)
697 show_beep_reg(MASK, mask)
698
699 #define BEEP_ENABLE 0 /* Store beep_enable */
700 #define BEEP_MASK 1 /* Store beep_mask */
701
702 static ssize_t
703 store_beep_reg(struct device *dev, const char *buf, size_t count,
704 int update_mask)
705 {
706 struct i2c_client *client = to_i2c_client(dev);
707 struct w83627hf_data *data = i2c_get_clientdata(client);
708 u32 val, val2;
709
710 val = simple_strtoul(buf, NULL, 10);
711
712 down(&data->update_lock);
713
714 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
715 data->beep_mask = BEEP_MASK_TO_REG(val);
716 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
717 data->beep_mask & 0xff);
718 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
719 ((data->beep_mask) >> 16) & 0xff);
720 val2 = (data->beep_mask >> 8) & 0x7f;
721 } else { /* We are storing beep_enable */
722 val2 =
723 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
724 data->beep_enable = BEEP_ENABLE_TO_REG(val);
725 }
726
727 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
728 val2 | data->beep_enable << 7);
729
730 up(&data->update_lock);
731 return count;
732 }
733
734 #define sysfs_beep(REG, reg) \
735 static ssize_t show_regs_beep_##reg (struct device *dev, char *buf) \
736 { \
737 return show_beep_##reg(dev, buf); \
738 } \
739 static ssize_t \
740 store_regs_beep_##reg (struct device *dev, const char *buf, size_t count) \
741 { \
742 return store_beep_reg(dev, buf, count, BEEP_##REG); \
743 } \
744 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
745 show_regs_beep_##reg, store_regs_beep_##reg);
746
747 sysfs_beep(ENABLE, enable);
748 sysfs_beep(MASK, mask);
749
750 #define device_create_file_beep(client) \
751 do { \
752 device_create_file(&client->dev, &dev_attr_beep_enable); \
753 device_create_file(&client->dev, &dev_attr_beep_mask); \
754 } while (0)
755
756 static ssize_t
757 show_fan_div_reg(struct device *dev, char *buf, int nr)
758 {
759 struct w83627hf_data *data = w83627hf_update_device(dev);
760 return sprintf(buf, "%ld\n",
761 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
762 }
763
764 /* Note: we save and restore the fan minimum here, because its value is
765 determined in part by the fan divisor. This follows the principle of
766 least suprise; the user doesn't expect the fan minimum to change just
767 because the divisor changed. */
768 static ssize_t
769 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
770 {
771 struct i2c_client *client = to_i2c_client(dev);
772 struct w83627hf_data *data = i2c_get_clientdata(client);
773 unsigned long min;
774 u8 reg;
775 unsigned long val = simple_strtoul(buf, NULL, 10);
776
777 down(&data->update_lock);
778
779 /* Save fan_min */
780 min = FAN_FROM_REG(data->fan_min[nr],
781 DIV_FROM_REG(data->fan_div[nr]));
782
783 data->fan_div[nr] = DIV_TO_REG(val);
784
785 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
786 & (nr==0 ? 0xcf : 0x3f))
787 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
788 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
789
790 reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
791 & ~(1 << (5 + nr)))
792 | ((data->fan_div[nr] & 0x04) << (3 + nr));
793 w83627hf_write_value(client, W83781D_REG_VBAT, reg);
794
795 /* Restore fan_min */
796 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
797 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
798
799 up(&data->update_lock);
800 return count;
801 }
802
803 #define sysfs_fan_div(offset) \
804 static ssize_t show_regs_fan_div_##offset (struct device *dev, char *buf) \
805 { \
806 return show_fan_div_reg(dev, buf, offset); \
807 } \
808 static ssize_t \
809 store_regs_fan_div_##offset (struct device *dev, \
810 const char *buf, size_t count) \
811 { \
812 return store_fan_div_reg(dev, buf, count, offset - 1); \
813 } \
814 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
815 show_regs_fan_div_##offset, store_regs_fan_div_##offset);
816
817 sysfs_fan_div(1);
818 sysfs_fan_div(2);
819 sysfs_fan_div(3);
820
821 #define device_create_file_fan_div(client, offset) \
822 do { \
823 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
824 } while (0)
825
826 static ssize_t
827 show_pwm_reg(struct device *dev, char *buf, int nr)
828 {
829 struct w83627hf_data *data = w83627hf_update_device(dev);
830 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
831 }
832
833 static ssize_t
834 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
835 {
836 struct i2c_client *client = to_i2c_client(dev);
837 struct w83627hf_data *data = i2c_get_clientdata(client);
838 u32 val;
839
840 val = simple_strtoul(buf, NULL, 10);
841
842 down(&data->update_lock);
843
844 if (data->type == w83627thf) {
845 /* bits 0-3 are reserved in 627THF */
846 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
847 w83627hf_write_value(client,
848 W836X7HF_REG_PWM(data->type, nr),
849 data->pwm[nr - 1] |
850 (w83627hf_read_value(client,
851 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
852 } else {
853 data->pwm[nr - 1] = PWM_TO_REG(val);
854 w83627hf_write_value(client,
855 W836X7HF_REG_PWM(data->type, nr),
856 data->pwm[nr - 1]);
857 }
858
859 up(&data->update_lock);
860 return count;
861 }
862
863 #define sysfs_pwm(offset) \
864 static ssize_t show_regs_pwm_##offset (struct device *dev, char *buf) \
865 { \
866 return show_pwm_reg(dev, buf, offset); \
867 } \
868 static ssize_t \
869 store_regs_pwm_##offset (struct device *dev, const char *buf, size_t count) \
870 { \
871 return store_pwm_reg(dev, buf, count, offset); \
872 } \
873 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
874 show_regs_pwm_##offset, store_regs_pwm_##offset);
875
876 sysfs_pwm(1);
877 sysfs_pwm(2);
878 sysfs_pwm(3);
879
880 #define device_create_file_pwm(client, offset) \
881 do { \
882 device_create_file(&client->dev, &dev_attr_pwm##offset); \
883 } while (0)
884
885 static ssize_t
886 show_sensor_reg(struct device *dev, char *buf, int nr)
887 {
888 struct w83627hf_data *data = w83627hf_update_device(dev);
889 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
890 }
891
892 static ssize_t
893 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
894 {
895 struct i2c_client *client = to_i2c_client(dev);
896 struct w83627hf_data *data = i2c_get_clientdata(client);
897 u32 val, tmp;
898
899 val = simple_strtoul(buf, NULL, 10);
900
901 down(&data->update_lock);
902
903 switch (val) {
904 case 1: /* PII/Celeron diode */
905 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
906 w83627hf_write_value(client, W83781D_REG_SCFG1,
907 tmp | BIT_SCFG1[nr - 1]);
908 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
909 w83627hf_write_value(client, W83781D_REG_SCFG2,
910 tmp | BIT_SCFG2[nr - 1]);
911 data->sens[nr - 1] = val;
912 break;
913 case 2: /* 3904 */
914 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
915 w83627hf_write_value(client, W83781D_REG_SCFG1,
916 tmp | BIT_SCFG1[nr - 1]);
917 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
918 w83627hf_write_value(client, W83781D_REG_SCFG2,
919 tmp & ~BIT_SCFG2[nr - 1]);
920 data->sens[nr - 1] = val;
921 break;
922 case W83781D_DEFAULT_BETA: /* thermistor */
923 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
924 w83627hf_write_value(client, W83781D_REG_SCFG1,
925 tmp & ~BIT_SCFG1[nr - 1]);
926 data->sens[nr - 1] = val;
927 break;
928 default:
929 dev_err(&client->dev,
930 "Invalid sensor type %ld; must be 1, 2, or %d\n",
931 (long) val, W83781D_DEFAULT_BETA);
932 break;
933 }
934
935 up(&data->update_lock);
936 return count;
937 }
938
939 #define sysfs_sensor(offset) \
940 static ssize_t show_regs_sensor_##offset (struct device *dev, char *buf) \
941 { \
942 return show_sensor_reg(dev, buf, offset); \
943 } \
944 static ssize_t \
945 store_regs_sensor_##offset (struct device *dev, const char *buf, size_t count) \
946 { \
947 return store_sensor_reg(dev, buf, count, offset); \
948 } \
949 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
950 show_regs_sensor_##offset, store_regs_sensor_##offset);
951
952 sysfs_sensor(1);
953 sysfs_sensor(2);
954 sysfs_sensor(3);
955
956 #define device_create_file_sensor(client, offset) \
957 do { \
958 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
959 } while (0)
960
961
962 /* This function is called when:
963 * w83627hf_driver is inserted (when this module is loaded), for each
964 available adapter
965 * when a new adapter is inserted (and w83627hf_driver is still present) */
966 static int w83627hf_attach_adapter(struct i2c_adapter *adapter)
967 {
968 return i2c_detect(adapter, &addr_data, w83627hf_detect);
969 }
970
971 static int w83627hf_find(int sioaddr, int *address)
972 {
973 u16 val;
974
975 REG = sioaddr;
976 VAL = sioaddr + 1;
977
978 superio_enter();
979 val= superio_inb(DEVID);
980 if(val != W627_DEVID &&
981 val != W627THF_DEVID &&
982 val != W697_DEVID &&
983 val != W637_DEVID) {
984 superio_exit();
985 return -ENODEV;
986 }
987
988 superio_select(W83627HF_LD_HWM);
989 val = (superio_inb(WINB_BASE_REG) << 8) |
990 superio_inb(WINB_BASE_REG + 1);
991 *address = val & ~(WINB_EXTENT - 1);
992 if (*address == 0 && force_addr == 0) {
993 superio_exit();
994 return -ENODEV;
995 }
996 if (force_addr)
997 *address = force_addr; /* so detect will get called */
998
999 superio_exit();
1000 return 0;
1001 }
1002
1003 int w83627hf_detect(struct i2c_adapter *adapter, int address,
1004 int kind)
1005 {
1006 int val;
1007 struct i2c_client *new_client;
1008 struct w83627hf_data *data;
1009 int err = 0;
1010 const char *client_name = "";
1011
1012 if (!i2c_is_isa_adapter(adapter)) {
1013 err = -ENODEV;
1014 goto ERROR0;
1015 }
1016
1017 if(force_addr)
1018 address = force_addr & ~(WINB_EXTENT - 1);
1019
1020 if (!request_region(address, WINB_EXTENT, w83627hf_driver.name)) {
1021 err = -EBUSY;
1022 goto ERROR0;
1023 }
1024
1025 if(force_addr) {
1026 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1027 superio_enter();
1028 superio_select(W83627HF_LD_HWM);
1029 superio_outb(WINB_BASE_REG, address >> 8);
1030 superio_outb(WINB_BASE_REG+1, address & 0xff);
1031 superio_exit();
1032 }
1033
1034 superio_enter();
1035 val= superio_inb(DEVID);
1036 if(val == W627_DEVID)
1037 kind = w83627hf;
1038 else if(val == W697_DEVID)
1039 kind = w83697hf;
1040 else if(val == W627THF_DEVID)
1041 kind = w83627thf;
1042 else if(val == W637_DEVID)
1043 kind = w83637hf;
1044 else {
1045 dev_info(&adapter->dev,
1046 "Unsupported chip (dev_id=0x%02X).\n", val);
1047 goto ERROR1;
1048 }
1049
1050 superio_select(W83627HF_LD_HWM);
1051 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1052 superio_outb(WINB_ACT_REG, 1);
1053 superio_exit();
1054
1055 /* OK. For now, we presume we have a valid client. We now create the
1056 client structure, even though we cannot fill it completely yet.
1057 But it allows us to access w83627hf_{read,write}_value. */
1058
1059 if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1060 err = -ENOMEM;
1061 goto ERROR1;
1062 }
1063 memset(data, 0, sizeof(struct w83627hf_data));
1064
1065 new_client = &data->client;
1066 i2c_set_clientdata(new_client, data);
1067 new_client->addr = address;
1068 init_MUTEX(&data->lock);
1069 new_client->adapter = adapter;
1070 new_client->driver = &w83627hf_driver;
1071 new_client->flags = 0;
1072
1073
1074 if (kind == w83627hf) {
1075 client_name = "w83627hf";
1076 } else if (kind == w83627thf) {
1077 client_name = "w83627thf";
1078 } else if (kind == w83697hf) {
1079 client_name = "w83697hf";
1080 } else if (kind == w83637hf) {
1081 client_name = "w83637hf";
1082 }
1083
1084 /* Fill in the remaining client fields and put into the global list */
1085 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1086 data->type = kind;
1087 data->valid = 0;
1088 init_MUTEX(&data->update_lock);
1089
1090 /* Tell the I2C layer a new client has arrived */
1091 if ((err = i2c_attach_client(new_client)))
1092 goto ERROR2;
1093
1094 data->lm75 = NULL;
1095
1096 /* Initialize the chip */
1097 w83627hf_init_client(new_client);
1098
1099 /* A few vars need to be filled upon startup */
1100 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1101 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1102 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1103
1104 /* Register sysfs hooks */
1105 device_create_file_in(new_client, 0);
1106 if (kind != w83697hf)
1107 device_create_file_in(new_client, 1);
1108 device_create_file_in(new_client, 2);
1109 device_create_file_in(new_client, 3);
1110 device_create_file_in(new_client, 4);
1111 if (kind != w83627thf && kind != w83637hf) {
1112 device_create_file_in(new_client, 5);
1113 device_create_file_in(new_client, 6);
1114 }
1115 device_create_file_in(new_client, 7);
1116 device_create_file_in(new_client, 8);
1117
1118 device_create_file_fan(new_client, 1);
1119 device_create_file_fan(new_client, 2);
1120 if (kind != w83697hf)
1121 device_create_file_fan(new_client, 3);
1122
1123 device_create_file_temp(new_client, 1);
1124 device_create_file_temp(new_client, 2);
1125 if (kind != w83697hf)
1126 device_create_file_temp(new_client, 3);
1127
1128 if (kind != w83697hf)
1129 device_create_file_vid(new_client);
1130
1131 if (kind != w83697hf)
1132 device_create_file_vrm(new_client);
1133
1134 device_create_file_fan_div(new_client, 1);
1135 device_create_file_fan_div(new_client, 2);
1136 if (kind != w83697hf)
1137 device_create_file_fan_div(new_client, 3);
1138
1139 device_create_file_alarms(new_client);
1140
1141 device_create_file_beep(new_client);
1142
1143 device_create_file_pwm(new_client, 1);
1144 device_create_file_pwm(new_client, 2);
1145 if (kind == w83627thf || kind == w83637hf)
1146 device_create_file_pwm(new_client, 3);
1147
1148 device_create_file_sensor(new_client, 1);
1149 device_create_file_sensor(new_client, 2);
1150 if (kind != w83697hf)
1151 device_create_file_sensor(new_client, 3);
1152
1153 return 0;
1154
1155 ERROR2:
1156 kfree(data);
1157 ERROR1:
1158 release_region(address, WINB_EXTENT);
1159 ERROR0:
1160 return err;
1161 }
1162
1163 static int w83627hf_detach_client(struct i2c_client *client)
1164 {
1165 int err;
1166
1167 if ((err = i2c_detach_client(client))) {
1168 dev_err(&client->dev,
1169 "Client deregistration failed, client not detached.\n");
1170 return err;
1171 }
1172
1173 release_region(client->addr, WINB_EXTENT);
1174 kfree(i2c_get_clientdata(client));
1175
1176 return 0;
1177 }
1178
1179
1180 /*
1181 ISA access must always be locked explicitly!
1182 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1183 would slow down the W83781D access and should not be necessary.
1184 There are some ugly typecasts here, but the good news is - they should
1185 nowhere else be necessary! */
1186 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1187 {
1188 struct w83627hf_data *data = i2c_get_clientdata(client);
1189 int res, word_sized;
1190
1191 down(&data->lock);
1192 word_sized = (((reg & 0xff00) == 0x100)
1193 || ((reg & 0xff00) == 0x200))
1194 && (((reg & 0x00ff) == 0x50)
1195 || ((reg & 0x00ff) == 0x53)
1196 || ((reg & 0x00ff) == 0x55));
1197 if (reg & 0xff00) {
1198 outb_p(W83781D_REG_BANK,
1199 client->addr + W83781D_ADDR_REG_OFFSET);
1200 outb_p(reg >> 8,
1201 client->addr + W83781D_DATA_REG_OFFSET);
1202 }
1203 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1204 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1205 if (word_sized) {
1206 outb_p((reg & 0xff) + 1,
1207 client->addr + W83781D_ADDR_REG_OFFSET);
1208 res =
1209 (res << 8) + inb_p(client->addr +
1210 W83781D_DATA_REG_OFFSET);
1211 }
1212 if (reg & 0xff00) {
1213 outb_p(W83781D_REG_BANK,
1214 client->addr + W83781D_ADDR_REG_OFFSET);
1215 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1216 }
1217 up(&data->lock);
1218 return res;
1219 }
1220
1221 static int w83627thf_read_gpio5(struct i2c_client *client)
1222 {
1223 int res = 0xff, sel;
1224
1225 superio_enter();
1226 superio_select(W83627HF_LD_GPIO5);
1227
1228 /* Make sure these GPIO pins are enabled */
1229 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1230 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1231 goto exit;
1232 }
1233
1234 /* Make sure the pins are configured for input
1235 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1236 sel = superio_inb(W83627THF_GPIO5_IOSR);
1237 if ((sel & 0x1f) != 0x1f) {
1238 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1239 "function\n");
1240 goto exit;
1241 }
1242
1243 dev_info(&client->dev, "Reading VID from GPIO5\n");
1244 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1245
1246 exit:
1247 superio_exit();
1248 return res;
1249 }
1250
1251 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1252 {
1253 struct w83627hf_data *data = i2c_get_clientdata(client);
1254 int word_sized;
1255
1256 down(&data->lock);
1257 word_sized = (((reg & 0xff00) == 0x100)
1258 || ((reg & 0xff00) == 0x200))
1259 && (((reg & 0x00ff) == 0x53)
1260 || ((reg & 0x00ff) == 0x55));
1261 if (reg & 0xff00) {
1262 outb_p(W83781D_REG_BANK,
1263 client->addr + W83781D_ADDR_REG_OFFSET);
1264 outb_p(reg >> 8,
1265 client->addr + W83781D_DATA_REG_OFFSET);
1266 }
1267 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1268 if (word_sized) {
1269 outb_p(value >> 8,
1270 client->addr + W83781D_DATA_REG_OFFSET);
1271 outb_p((reg & 0xff) + 1,
1272 client->addr + W83781D_ADDR_REG_OFFSET);
1273 }
1274 outb_p(value & 0xff,
1275 client->addr + W83781D_DATA_REG_OFFSET);
1276 if (reg & 0xff00) {
1277 outb_p(W83781D_REG_BANK,
1278 client->addr + W83781D_ADDR_REG_OFFSET);
1279 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1280 }
1281 up(&data->lock);
1282 return 0;
1283 }
1284
1285 /* Called when we have found a new W83781D. It should set limits, etc. */
1286 static void w83627hf_init_client(struct i2c_client *client)
1287 {
1288 struct w83627hf_data *data = i2c_get_clientdata(client);
1289 int i;
1290 int type = data->type;
1291 u8 tmp;
1292
1293 if(init) {
1294 /* save this register */
1295 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1296 /* Reset all except Watchdog values and last conversion values
1297 This sets fan-divs to 2, among others */
1298 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1299 /* Restore the register and disable power-on abnormal beep.
1300 This saves FAN 1/2/3 input/output values set by BIOS. */
1301 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1302 /* Disable master beep-enable (reset turns it on).
1303 Individual beeps should be reset to off but for some reason
1304 disabling this bit helps some people not get beeped */
1305 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1306 }
1307
1308 /* Minimize conflicts with other winbond i2c-only clients... */
1309 /* disable i2c subclients... how to disable main i2c client?? */
1310 /* force i2c address to relatively uncommon address */
1311 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1312 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1313
1314 /* Read VID only once */
1315 if (w83627hf == data->type || w83637hf == data->type) {
1316 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1317 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1318 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1319 } else if (w83627thf == data->type) {
1320 data->vid = w83627thf_read_gpio5(client) & 0x3f;
1321 }
1322
1323 /* Read VRM & OVT Config only once */
1324 if (w83627thf == data->type || w83637hf == data->type) {
1325 data->vrm_ovt =
1326 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1327 data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
1328 } else {
1329 /* Convert VID to voltage based on default VRM */
1330 data->vrm = i2c_which_vrm();
1331 }
1332
1333 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1334 for (i = 1; i <= 3; i++) {
1335 if (!(tmp & BIT_SCFG1[i - 1])) {
1336 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1337 } else {
1338 if (w83627hf_read_value
1339 (client,
1340 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1341 data->sens[i - 1] = 1;
1342 else
1343 data->sens[i - 1] = 2;
1344 }
1345 if ((type == w83697hf) && (i == 2))
1346 break;
1347 }
1348
1349 if(init) {
1350 /* Enable temp2 */
1351 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1352 if (tmp & 0x01) {
1353 dev_warn(&client->dev, "Enabling temp2, readings "
1354 "might not make sense\n");
1355 w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1356 tmp & 0xfe);
1357 }
1358
1359 /* Enable temp3 */
1360 if (type != w83697hf) {
1361 tmp = w83627hf_read_value(client,
1362 W83781D_REG_TEMP3_CONFIG);
1363 if (tmp & 0x01) {
1364 dev_warn(&client->dev, "Enabling temp3, "
1365 "readings might not make sense\n");
1366 w83627hf_write_value(client,
1367 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1368 }
1369 }
1370
1371 if (type == w83627hf) {
1372 /* enable PWM2 control (can't hurt since PWM reg
1373 should have been reset to 0xff) */
1374 w83627hf_write_value(client, W83627HF_REG_PWMCLK12,
1375 0x19);
1376 }
1377 /* enable comparator mode for temp2 and temp3 so
1378 alarm indication will work correctly */
1379 i = w83627hf_read_value(client, W83781D_REG_IRQ);
1380 if (!(i & 0x40))
1381 w83627hf_write_value(client, W83781D_REG_IRQ,
1382 i | 0x40);
1383 }
1384
1385 /* Start monitoring */
1386 w83627hf_write_value(client, W83781D_REG_CONFIG,
1387 (w83627hf_read_value(client,
1388 W83781D_REG_CONFIG) & 0xf7)
1389 | 0x01);
1390 }
1391
1392 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1393 {
1394 struct i2c_client *client = to_i2c_client(dev);
1395 struct w83627hf_data *data = i2c_get_clientdata(client);
1396 int i;
1397
1398 down(&data->update_lock);
1399
1400 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1401 || !data->valid) {
1402 for (i = 0; i <= 8; i++) {
1403 /* skip missing sensors */
1404 if (((data->type == w83697hf) && (i == 1)) ||
1405 ((data->type == w83627thf || data->type == w83637hf)
1406 && (i == 4 || i == 5)))
1407 continue;
1408 data->in[i] =
1409 w83627hf_read_value(client, W83781D_REG_IN(i));
1410 data->in_min[i] =
1411 w83627hf_read_value(client,
1412 W83781D_REG_IN_MIN(i));
1413 data->in_max[i] =
1414 w83627hf_read_value(client,
1415 W83781D_REG_IN_MAX(i));
1416 }
1417 for (i = 1; i <= 3; i++) {
1418 data->fan[i - 1] =
1419 w83627hf_read_value(client, W83781D_REG_FAN(i));
1420 data->fan_min[i - 1] =
1421 w83627hf_read_value(client,
1422 W83781D_REG_FAN_MIN(i));
1423 }
1424 for (i = 1; i <= 3; i++) {
1425 u8 tmp = w83627hf_read_value(client,
1426 W836X7HF_REG_PWM(data->type, i));
1427 /* bits 0-3 are reserved in 627THF */
1428 if (data->type == w83627thf)
1429 tmp &= 0xf0;
1430 data->pwm[i - 1] = tmp;
1431 if(i == 2 &&
1432 (data->type == w83627hf || data->type == w83697hf))
1433 break;
1434 }
1435
1436 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1437 data->temp_max =
1438 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1439 data->temp_max_hyst =
1440 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1441 data->temp_add[0] =
1442 w83627hf_read_value(client, W83781D_REG_TEMP(2));
1443 data->temp_max_add[0] =
1444 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1445 data->temp_max_hyst_add[0] =
1446 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1447 if (data->type != w83697hf) {
1448 data->temp_add[1] =
1449 w83627hf_read_value(client, W83781D_REG_TEMP(3));
1450 data->temp_max_add[1] =
1451 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1452 data->temp_max_hyst_add[1] =
1453 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1454 }
1455
1456 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1457 data->fan_div[0] = (i >> 4) & 0x03;
1458 data->fan_div[1] = (i >> 6) & 0x03;
1459 if (data->type != w83697hf) {
1460 data->fan_div[2] = (w83627hf_read_value(client,
1461 W83781D_REG_PIN) >> 6) & 0x03;
1462 }
1463 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1464 data->fan_div[0] |= (i >> 3) & 0x04;
1465 data->fan_div[1] |= (i >> 4) & 0x04;
1466 if (data->type != w83697hf)
1467 data->fan_div[2] |= (i >> 5) & 0x04;
1468 data->alarms =
1469 w83627hf_read_value(client, W83781D_REG_ALARM1) |
1470 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1471 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1472 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1473 data->beep_enable = i >> 7;
1474 data->beep_mask = ((i & 0x7f) << 8) |
1475 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1476 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1477 data->last_updated = jiffies;
1478 data->valid = 1;
1479 }
1480
1481 up(&data->update_lock);
1482
1483 return data;
1484 }
1485
1486 static int __init sensors_w83627hf_init(void)
1487 {
1488 int addr;
1489
1490 if (w83627hf_find(0x2e, &addr)
1491 && w83627hf_find(0x4e, &addr)) {
1492 return -ENODEV;
1493 }
1494 normal_isa[0] = addr;
1495
1496 return i2c_add_driver(&w83627hf_driver);
1497 }
1498
1499 static void __exit sensors_w83627hf_exit(void)
1500 {
1501 i2c_del_driver(&w83627hf_driver);
1502 }
1503
1504 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1505 "Philip Edelbrock <phil@netroedge.com>, "
1506 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1507 MODULE_DESCRIPTION("W83627HF driver");
1508 MODULE_LICENSE("GPL");
1509
1510 module_init(sensors_w83627hf_init);
1511 module_exit(sensors_w83627hf_exit);
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