drivers/media/dvb/frontends/cx22702.c

   1 /*
   2     Conexant 22702 DVB OFDM demodulator driver
   3
   4     based on:
   5         Alps TDMB7 DVB OFDM demodulator driver
   6
   7     Copyright (C) 2001-2002 Convergence Integrated Media GmbH
   8           Holger Waechtler <holger@convergence.de>
   9
  10     Copyright (C) 2004 Steven Toth <steve@toth.demon.co.uk>
  11
  12     This program is free software; you can redistribute it and/or modify
  13     it under the terms of the GNU General Public License as published by
  14     the Free Software Foundation; either version 2 of the License, or
  15     (at your option) any later version.
  16
  17     This program is distributed in the hope that it will be useful,
  18     but WITHOUT ANY WARRANTY; without even the implied warranty of
  19     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20     GNU General Public License for more details.
  21
  22     You should have received a copy of the GNU General Public License
  23     along with this program; if not, write to the Free Software
  24     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25
  26 */
  27
  28 #include <linux/kernel.h>
  29 #include <linux/init.h>
  30 #include <linux/module.h>
  31 #include <linux/string.h>
  32 #include <linux/slab.h>
  33 #include <linux/delay.h>
  34 #include "dvb_frontend.h"
  35 #include "dvb-pll.h"
  36 #include "cx22702.h"
  37
  38
  39 struct cx22702_state {
  40
  41         struct i2c_adapter* i2c;
  42
  43         struct dvb_frontend_ops ops;
  44
  45         /* configuration settings */
  46         const struct cx22702_config* config;
  47
  48         struct dvb_frontend frontend;
  49
  50         /* previous uncorrected block counter */
  51         u8 prevUCBlocks;
  52 };
  53
  54 static int debug = 0;
  55 #define dprintk if (debug) printk
  56
  57 /* Register values to initialise the demod */
  58 static u8 init_tab [] = {
  59         0x00, 0x00, /* Stop aquisition */
  60         0x0B, 0x06,
  61         0x09, 0x01,
  62         0x0D, 0x41,
  63         0x16, 0x32,
  64         0x20, 0x0A,
  65         0x21, 0x17,
  66         0x24, 0x3e,
  67         0x26, 0xff,
  68         0x27, 0x10,
  69         0x28, 0x00,
  70         0x29, 0x00,
  71         0x2a, 0x10,
  72         0x2b, 0x00,
  73         0x2c, 0x10,
  74         0x2d, 0x00,
  75         0x48, 0xd4,
  76         0x49, 0x56,
  77         0x6b, 0x1e,
  78         0xc8, 0x02,
  79         0xf8, 0x02,
  80         0xf9, 0x00,
  81         0xfa, 0x00,
  82         0xfb, 0x00,
  83         0xfc, 0x00,
  84         0xfd, 0x00,
  85 };
  86
  87 static int cx22702_writereg (struct cx22702_state* state, u8 reg, u8 data)
  88 {
  89         int ret;
  90         u8 buf [] = { reg, data };
  91         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
  92
  93         ret = i2c_transfer(state->i2c, &msg, 1);
  94
  95         if (ret != 1)
  96                 printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  97                         __FUNCTION__, reg, data, ret);
  98
  99         return (ret != 1) ? -1 : 0;
 100 }
 101
 102 static u8 cx22702_readreg (struct cx22702_state* state, u8 reg)
 103 {
 104         int ret;
 105         u8 b0 [] = { reg };
 106         u8 b1 [] = { 0 };
 107
 108         struct i2c_msg msg [] = {
 109                 { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
 110                 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
 111
 112         ret = i2c_transfer(state->i2c, msg, 2);
 113
 114         if (ret != 2)
 115                 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
 116
 117         return b1[0];
 118 }
 119
 120 static int cx22702_set_inversion (struct cx22702_state *state, int inversion)
 121 {
 122         u8 val;
 123
 124         switch (inversion) {
 125
 126                 case INVERSION_AUTO:
 127                         return -EOPNOTSUPP;
 128
 129                 case INVERSION_ON:
 130                         val = cx22702_readreg (state, 0x0C);
 131                         return cx22702_writereg (state, 0x0C, val | 0x01);
 132
 133                 case INVERSION_OFF:
 134                         val = cx22702_readreg (state, 0x0C);
 135                         return cx22702_writereg (state, 0x0C, val & 0xfe);
 136
 137                 default:
 138                         return -EINVAL;
 139
 140         }
 141
 142 }
 143
 144 /* Retrieve the demod settings */
 145 static int cx22702_get_tps (struct cx22702_state *state, struct dvb_ofdm_parameters *p)
 146 {
 147         u8 val;
 148
 149         /* Make sure the TPS regs are valid */
 150         if (!(cx22702_readreg(state, 0x0A) & 0x20))
 151                 return -EAGAIN;
 152
 153         val = cx22702_readreg (state, 0x01);
 154         switch( (val&0x18)>>3) {
 155                 case 0: p->constellation =   QPSK; break;
 156                 case 1: p->constellation = QAM_16; break;
 157                 case 2: p->constellation = QAM_64; break;
 158         }
 159         switch( val&0x07 ) {
 160                 case 0: p->hierarchy_information = HIERARCHY_NONE; break;
 161                 case 1: p->hierarchy_information =    HIERARCHY_1; break;
 162                 case 2: p->hierarchy_information =    HIERARCHY_2; break;
 163                 case 3: p->hierarchy_information =    HIERARCHY_4; break;
 164         }
 165
 166
 167         val = cx22702_readreg (state, 0x02);
 168         switch( (val&0x38)>>3 ) {
 169                 case 0: p->code_rate_HP = FEC_1_2; break;
 170                 case 1: p->code_rate_HP = FEC_2_3; break;
 171                 case 2: p->code_rate_HP = FEC_3_4; break;
 172                 case 3: p->code_rate_HP = FEC_5_6; break;
 173                 case 4: p->code_rate_HP = FEC_7_8; break;
 174         }
 175         switch( val&0x07 ) {
 176                 case 0: p->code_rate_LP = FEC_1_2; break;
 177                 case 1: p->code_rate_LP = FEC_2_3; break;
 178                 case 2: p->code_rate_LP = FEC_3_4; break;
 179                 case 3: p->code_rate_LP = FEC_5_6; break;
 180                 case 4: p->code_rate_LP = FEC_7_8; break;
 181         }
 182
 183
 184         val = cx22702_readreg (state, 0x03);
 185         switch( (val&0x0c)>>2 ) {
 186                 case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
 187                 case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
 188                 case 2: p->guard_interval =  GUARD_INTERVAL_1_8; break;
 189                 case 3: p->guard_interval =  GUARD_INTERVAL_1_4; break;
 190         }
 191         switch( val&0x03 ) {
 192                 case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
 193                 case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
 194         }
 195
 196         return 0;
 197 }
 198
 199 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
 200 static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 201 {
 202         u8 val;
 203         struct cx22702_state* state = fe->demodulator_priv;
 204
 205         /* set PLL */
 206         cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe);
 207         if (state->config->pll_set) {
 208                 state->config->pll_set(fe, p);
 209         } else if (state->config->pll_desc) {
 210                 u8 pllbuf[4];
 211                 struct i2c_msg msg = { .addr = state->config->pll_address,
 212                                        .buf = pllbuf, .len = 4 };
 213                 dvb_pll_configure(state->config->pll_desc, pllbuf,
 214                                   p->frequency,
 215                                   p->u.ofdm.bandwidth);
 216                 i2c_transfer(state->i2c, &msg, 1);
 217         } else {
 218                 BUG();
 219         }
 220         cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1);
 221
 222         /* set inversion */
 223         cx22702_set_inversion (state, p->inversion);
 224
 225         /* set bandwidth */
 226         switch(p->u.ofdm.bandwidth) {
 227         case BANDWIDTH_6_MHZ:
 228                 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20 );
 229                 break;
 230         case BANDWIDTH_7_MHZ:
 231                 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10 );
 232                 break;
 233         case BANDWIDTH_8_MHZ:
 234                 cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );
 235                 break;
 236         default:
 237                 dprintk ("%s: invalid bandwidth\n",__FUNCTION__);
 238                 return -EINVAL;
 239         }
 240
 241
 242         p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working
 243
 244         /* use auto configuration? */
 245         if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) ||
 246            (p->u.ofdm.constellation==QAM_AUTO) ||
 247            (p->u.ofdm.code_rate_HP==FEC_AUTO) ||
 248            (p->u.ofdm.code_rate_LP==FEC_AUTO) ||
 249            (p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) ||
 250            (p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {
 251
 252                 /* TPS Source - use hardware driven values */
 253                 cx22702_writereg(state, 0x06, 0x10);
 254                 cx22702_writereg(state, 0x07, 0x9);
 255                 cx22702_writereg(state, 0x08, 0xC1);
 256                 cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );
 257                 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
 258                 cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
 259                 printk("%s: Autodetecting\n",__FUNCTION__);
 260                 return 0;
 261         }
 262
 263         /* manually programmed values */
 264         val=0;
 265         switch(p->u.ofdm.constellation) {
 266                 case   QPSK: val = (val&0xe7); break;
 267                 case QAM_16: val = (val&0xe7)|0x08; break;
 268                 case QAM_64: val = (val&0xe7)|0x10; break;
 269                 default:
 270                         dprintk ("%s: invalid constellation\n",__FUNCTION__);
 271                         return -EINVAL;
 272         }
 273         switch(p->u.ofdm.hierarchy_information) {
 274                 case HIERARCHY_NONE: val = (val&0xf8); break;
 275                 case    HIERARCHY_1: val = (val&0xf8)|1; break;
 276                 case    HIERARCHY_2: val = (val&0xf8)|2; break;
 277                 case    HIERARCHY_4: val = (val&0xf8)|3; break;
 278                 default:
 279                         dprintk ("%s: invalid hierarchy\n",__FUNCTION__);
 280                         return -EINVAL;
 281         }
 282         cx22702_writereg (state, 0x06, val);
 283
 284         val=0;
 285         switch(p->u.ofdm.code_rate_HP) {
 286                 case FEC_NONE:
 287                 case FEC_1_2: val = (val&0xc7); break;
 288                 case FEC_2_3: val = (val&0xc7)|0x08; break;
 289                 case FEC_3_4: val = (val&0xc7)|0x10; break;
 290                 case FEC_5_6: val = (val&0xc7)|0x18; break;
 291                 case FEC_7_8: val = (val&0xc7)|0x20; break;
 292                 default:
 293                         dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);
 294                         return -EINVAL;
 295         }
 296         switch(p->u.ofdm.code_rate_LP) {
 297                 case FEC_NONE:
 298                 case FEC_1_2: val = (val&0xf8); break;
 299                 case FEC_2_3: val = (val&0xf8)|1; break;
 300                 case FEC_3_4: val = (val&0xf8)|2; break;
 301                 case FEC_5_6: val = (val&0xf8)|3; break;
 302                 case FEC_7_8: val = (val&0xf8)|4; break;
 303                 default:
 304                         dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);
 305                         return -EINVAL;
 306         }
 307         cx22702_writereg (state, 0x07, val);
 308
 309         val=0;
 310         switch(p->u.ofdm.guard_interval) {
 311                 case GUARD_INTERVAL_1_32: val = (val&0xf3); break;
 312                 case GUARD_INTERVAL_1_16: val = (val&0xf3)|0x04; break;
 313                 case  GUARD_INTERVAL_1_8: val = (val&0xf3)|0x08; break;
 314                 case  GUARD_INTERVAL_1_4: val = (val&0xf3)|0x0c; break;
 315                 default:
 316                         dprintk ("%s: invalid guard_interval\n",__FUNCTION__);
 317                         return -EINVAL;
 318         }
 319         switch(p->u.ofdm.transmission_mode) {
 320                 case TRANSMISSION_MODE_2K: val = (val&0xfc); break;
 321                 case TRANSMISSION_MODE_8K: val = (val&0xfc)|1; break;
 322                 default:
 323                         dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);
 324                         return -EINVAL;
 325         }
 326         cx22702_writereg(state, 0x08, val);
 327         cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02 );
 328         cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
 329
 330         /* Begin channel aquisition */
 331         cx22702_writereg(state, 0x00, 0x01);
 332
 333         return 0;
 334 }
 335
 336 /* Reset the demod hardware and reset all of the configuration registers
 337    to a default state. */
 338 static int cx22702_init (struct dvb_frontend* fe)
 339 {
 340         int i;
 341         struct cx22702_state* state = fe->demodulator_priv;
 342
 343         cx22702_writereg (state, 0x00, 0x02);
 344
 345         msleep(10);
 346
 347         for (i=0; i<sizeof(init_tab); i+=2)
 348                 cx22702_writereg (state, init_tab[i], init_tab[i+1]);
 349
 350
 351         /* init PLL */
 352         if (state->config->pll_init) {
 353                 cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe);
 354                 state->config->pll_init(fe);
 355                 cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1);
 356         }
 357
 358         return 0;
 359 }
 360
 361 static int cx22702_read_status(struct dvb_frontend* fe, fe_status_t* status)
 362 {
 363         struct cx22702_state* state = fe->demodulator_priv;
 364         u8 reg0A;
 365         u8 reg23;
 366
 367         *status = 0;
 368
 369         reg0A = cx22702_readreg (state, 0x0A);
 370         reg23 = cx22702_readreg (state, 0x23);
 371
 372         dprintk ("%s: status demod=0x%02x agc=0x%02x\n"
 373                 ,__FUNCTION__,reg0A,reg23);
 374
 375         if(reg0A & 0x10) {
 376                 *status |= FE_HAS_LOCK;
 377                 *status |= FE_HAS_VITERBI;
 378                 *status |= FE_HAS_SYNC;
 379         }
 380
 381         if(reg0A & 0x20)
 382                 *status |= FE_HAS_CARRIER;
 383
 384         if(reg23 < 0xf0)
 385                 *status |= FE_HAS_SIGNAL;
 386
 387         return 0;
 388 }
 389
 390 static int cx22702_read_ber(struct dvb_frontend* fe, u32* ber)
 391 {
 392         struct cx22702_state* state = fe->demodulator_priv;
 393
 394         if(cx22702_readreg (state, 0xE4) & 0x02) {
 395                 /* Realtime statistics */
 396                 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
 397                         | (cx22702_readreg (state, 0xDF)&0x7F);
 398         } else {
 399                 /* Averagtine statistics */
 400                 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
 401                         | cx22702_readreg (state, 0xDF);
 402         }
 403
 404         return 0;
 405 }
 406
 407 static int cx22702_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
 408 {
 409         struct cx22702_state* state = fe->demodulator_priv;
 410
 411         *signal_strength = cx22702_readreg (state, 0x23);
 412
 413         return 0;
 414 }
 415
 416 static int cx22702_read_snr(struct dvb_frontend* fe, u16* snr)
 417 {
 418         struct cx22702_state* state = fe->demodulator_priv;
 419
 420         u16 rs_ber=0;
 421         if(cx22702_readreg (state, 0xE4) & 0x02) {
 422                 /* Realtime statistics */
 423                 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
 424                         | (cx22702_readreg (state, 0xDF)& 0x7F);
 425         } else {
 426                 /* Averagine statistics */
 427                 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 8
 428                         | cx22702_readreg (state, 0xDF);
 429         }
 430         *snr = ~rs_ber;
 431
 432         return 0;
 433 }
 434
 435 static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 436 {
 437         struct cx22702_state* state = fe->demodulator_priv;
 438
 439         u8 _ucblocks;
 440
 441         /* RS Uncorrectable Packet Count then reset */
 442         _ucblocks = cx22702_readreg (state, 0xE3);
 443         if (state->prevUCBlocks < _ucblocks) *ucblocks = (_ucblocks - state->prevUCBlocks);
 444         else *ucblocks = state->prevUCBlocks - _ucblocks;
 445         state->prevUCBlocks = _ucblocks;
 446
 447         return 0;
 448 }
 449
 450 static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 451 {
 452         struct cx22702_state* state = fe->demodulator_priv;
 453
 454         u8 reg0C = cx22702_readreg (state, 0x0C);
 455
 456         p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
 457         return cx22702_get_tps (state, &p->u.ofdm);
 458 }
 459
 460 static void cx22702_release(struct dvb_frontend* fe)
 461 {
 462         struct cx22702_state* state = fe->demodulator_priv;
 463         kfree(state);
 464 }
 465
 466 static struct dvb_frontend_ops cx22702_ops;
 467
 468 struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
 469                                     struct i2c_adapter* i2c)
 470 {
 471         struct cx22702_state* state = NULL;
 472
 473         /* allocate memory for the internal state */
 474         state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
 475         if (state == NULL) goto error;
 476
 477         /* setup the state */
 478         state->config = config;
 479         state->i2c = i2c;
 480         memcpy(&state->ops, &cx22702_ops, sizeof(struct dvb_frontend_ops));
 481         state->prevUCBlocks = 0;
 482
 483         /* check if the demod is there */
 484         if (cx22702_readreg(state, 0x1f) != 0x3) goto error;
 485
 486         /* create dvb_frontend */
 487         state->frontend.ops = &state->ops;
 488         state->frontend.demodulator_priv = state;
 489         return &state->frontend;
 490
 491 error:
 492         kfree(state);
 493         return NULL;
 494 }
 495
 496 static struct dvb_frontend_ops cx22702_ops = {
 497
 498         .info = {
 499                 .name                   = "Conexant CX22702 DVB-T",
 500                 .type                   = FE_OFDM,
 501                 .frequency_min          = 177000000,
 502                 .frequency_max          = 858000000,
 503                 .frequency_stepsize     = 166666,
 504                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 505                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 506                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
 507                 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
 508                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
 509         },
 510
 511         .release = cx22702_release,
 512
 513         .init = cx22702_init,
 514
 515         .set_frontend = cx22702_set_tps,
 516         .get_frontend = cx22702_get_frontend,
 517
 518         .read_status = cx22702_read_status,
 519         .read_ber = cx22702_read_ber,
 520         .read_signal_strength = cx22702_read_signal_strength,
 521         .read_snr = cx22702_read_snr,
 522         .read_ucblocks = cx22702_read_ucblocks,
 523 };
 524
 525 module_param(debug, int, 0644);
 526 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
 527
 528 MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
 529 MODULE_AUTHOR("Steven Toth");
 530 MODULE_LICENSE("GPL");
 531
 532 EXPORT_SYMBOL(cx22702_attach);