2 NxtWave Communications - NXT6000 demodulator driver
4 Copyright (C) 2002-2003 Florian Schirmer <jolt@tuxbox.org>
5 Copyright (C) 2003 Paul Andreassen <paul@andreassen.com.au>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
28 #include "dvb_frontend.h"
29 #include "nxt6000_priv.h"
34 struct nxt6000_state
{
35 struct i2c_adapter
* i2c
;
36 struct dvb_frontend_ops ops
;
37 /* configuration settings */
38 const struct nxt6000_config
* config
;
39 struct dvb_frontend frontend
;
43 #define dprintk if (debug) printk
45 static int nxt6000_writereg(struct nxt6000_state
* state
, u8 reg
, u8 data
)
47 u8 buf
[] = { reg
, data
};
48 struct i2c_msg msg
= {.addr
= state
->config
->demod_address
,.flags
= 0,.buf
= buf
,.len
= 2 };
51 if ((ret
= i2c_transfer(state
->i2c
, &msg
, 1)) != 1)
52 dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg
, data
, ret
);
54 return (ret
!= 1) ? -EFAULT
: 0;
57 static u8
nxt6000_readreg(struct nxt6000_state
* state
, u8 reg
)
62 struct i2c_msg msgs
[] = {
63 {.addr
= state
->config
->demod_address
,.flags
= 0,.buf
= b0
,.len
= 1},
64 {.addr
= state
->config
->demod_address
,.flags
= I2C_M_RD
,.buf
= b1
,.len
= 1}
67 ret
= i2c_transfer(state
->i2c
, msgs
, 2);
70 dprintk("nxt6000: nxt6000_read error (reg: 0x%02X, ret: %d)\n", reg
, ret
);
75 static void nxt6000_reset(struct nxt6000_state
* state
)
79 val
= nxt6000_readreg(state
, OFDM_COR_CTL
);
81 nxt6000_writereg(state
, OFDM_COR_CTL
, val
& ~COREACT
);
82 nxt6000_writereg(state
, OFDM_COR_CTL
, val
| COREACT
);
85 static int nxt6000_set_bandwidth(struct nxt6000_state
* state
, fe_bandwidth_t bandwidth
)
93 nominal_rate
= 0x55B7;
97 nominal_rate
= 0x6400;
100 case BANDWIDTH_8_MHZ
:
101 nominal_rate
= 0x7249;
108 if ((result
= nxt6000_writereg(state
, OFDM_TRL_NOMINALRATE_1
, nominal_rate
& 0xFF)) < 0)
111 return nxt6000_writereg(state
, OFDM_TRL_NOMINALRATE_2
, (nominal_rate
>> 8) & 0xFF);
114 static int nxt6000_set_guard_interval(struct nxt6000_state
* state
, fe_guard_interval_t guard_interval
)
116 switch (guard_interval
) {
118 case GUARD_INTERVAL_1_32
:
119 return nxt6000_writereg(state
, OFDM_COR_MODEGUARD
, 0x00 | (nxt6000_readreg(state
, OFDM_COR_MODEGUARD
) & ~0x03));
121 case GUARD_INTERVAL_1_16
:
122 return nxt6000_writereg(state
, OFDM_COR_MODEGUARD
, 0x01 | (nxt6000_readreg(state
, OFDM_COR_MODEGUARD
) & ~0x03));
124 case GUARD_INTERVAL_AUTO
:
125 case GUARD_INTERVAL_1_8
:
126 return nxt6000_writereg(state
, OFDM_COR_MODEGUARD
, 0x02 | (nxt6000_readreg(state
, OFDM_COR_MODEGUARD
) & ~0x03));
128 case GUARD_INTERVAL_1_4
:
129 return nxt6000_writereg(state
, OFDM_COR_MODEGUARD
, 0x03 | (nxt6000_readreg(state
, OFDM_COR_MODEGUARD
) & ~0x03));
136 static int nxt6000_set_inversion(struct nxt6000_state
* state
, fe_spectral_inversion_t inversion
)
141 return nxt6000_writereg(state
, OFDM_ITB_CTL
, 0x00);
144 return nxt6000_writereg(state
, OFDM_ITB_CTL
, ITBINV
);
152 static int nxt6000_set_transmission_mode(struct nxt6000_state
* state
, fe_transmit_mode_t transmission_mode
)
156 switch (transmission_mode
) {
158 case TRANSMISSION_MODE_2K
:
159 if ((result
= nxt6000_writereg(state
, EN_DMD_RACQ
, 0x00 | (nxt6000_readreg(state
, EN_DMD_RACQ
) & ~0x03))) < 0)
162 return nxt6000_writereg(state
, OFDM_COR_MODEGUARD
, (0x00 << 2) | (nxt6000_readreg(state
, OFDM_COR_MODEGUARD
) & ~0x04));
164 case TRANSMISSION_MODE_8K
:
165 case TRANSMISSION_MODE_AUTO
:
166 if ((result
= nxt6000_writereg(state
, EN_DMD_RACQ
, 0x02 | (nxt6000_readreg(state
, EN_DMD_RACQ
) & ~0x03))) < 0)
169 return nxt6000_writereg(state
, OFDM_COR_MODEGUARD
, (0x01 << 2) | (nxt6000_readreg(state
, OFDM_COR_MODEGUARD
) & ~0x04));
177 static void nxt6000_setup(struct dvb_frontend
* fe
)
179 struct nxt6000_state
* state
= fe
->demodulator_priv
;
181 nxt6000_writereg(state
, RS_COR_SYNC_PARAM
, SYNC_PARAM
);
182 nxt6000_writereg(state
, BER_CTRL
, /*(1 << 2) | */ (0x01 << 1) | 0x01);
183 nxt6000_writereg(state
, VIT_BERTIME_2
, 0x00); // BER Timer = 0x000200 * 256 = 131072 bits
184 nxt6000_writereg(state
, VIT_BERTIME_1
, 0x02); //
185 nxt6000_writereg(state
, VIT_BERTIME_0
, 0x00); //
186 nxt6000_writereg(state
, VIT_COR_INTEN
, 0x98); // Enable BER interrupts
187 nxt6000_writereg(state
, VIT_COR_CTL
, 0x82); // Enable BER measurement
188 nxt6000_writereg(state
, VIT_COR_CTL
, VIT_COR_RESYNC
| 0x02 );
189 nxt6000_writereg(state
, OFDM_COR_CTL
, (0x01 << 5) | (nxt6000_readreg(state
, OFDM_COR_CTL
) & 0x0F));
190 nxt6000_writereg(state
, OFDM_COR_MODEGUARD
, FORCEMODE8K
| 0x02);
191 nxt6000_writereg(state
, OFDM_AGC_CTL
, AGCLAST
| INITIAL_AGC_BW
);
192 nxt6000_writereg(state
, OFDM_ITB_FREQ_1
, 0x06);
193 nxt6000_writereg(state
, OFDM_ITB_FREQ_2
, 0x31);
194 nxt6000_writereg(state
, OFDM_CAS_CTL
, (0x01 << 7) | (0x02 << 3) | 0x04);
195 nxt6000_writereg(state
, CAS_FREQ
, 0xBB); /* CHECKME */
196 nxt6000_writereg(state
, OFDM_SYR_CTL
, 1 << 2);
197 nxt6000_writereg(state
, OFDM_PPM_CTL_1
, PPM256
);
198 nxt6000_writereg(state
, OFDM_TRL_NOMINALRATE_1
, 0x49);
199 nxt6000_writereg(state
, OFDM_TRL_NOMINALRATE_2
, 0x72);
200 nxt6000_writereg(state
, ANALOG_CONTROL_0
, 1 << 5);
201 nxt6000_writereg(state
, EN_DMD_RACQ
, (1 << 7) | (3 << 4) | 2);
202 nxt6000_writereg(state
, DIAG_CONFIG
, TB_SET
);
204 if (state
->config
->clock_inversion
)
205 nxt6000_writereg(state
, SUB_DIAG_MODE_SEL
, CLKINVERSION
);
207 nxt6000_writereg(state
, SUB_DIAG_MODE_SEL
, 0);
209 nxt6000_writereg(state
, TS_FORMAT
, 0);
211 if (state
->config
->pll_init
) {
212 nxt6000_writereg(state
, ENABLE_TUNER_IIC
, 0x01); /* open i2c bus switch */
213 state
->config
->pll_init(fe
);
214 nxt6000_writereg(state
, ENABLE_TUNER_IIC
, 0x00); /* close i2c bus switch */
218 static void nxt6000_dump_status(struct nxt6000_state
*state
)
223 printk("RS_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, RS_COR_STAT));
224 printk("VIT_SYNC_STATUS: 0x%02X\n", nxt6000_readreg(fe, VIT_SYNC_STATUS));
225 printk("OFDM_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_COR_STAT));
226 printk("OFDM_SYR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_SYR_STAT));
227 printk("OFDM_TPS_RCVD_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_1));
228 printk("OFDM_TPS_RCVD_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_2));
229 printk("OFDM_TPS_RCVD_3: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_3));
230 printk("OFDM_TPS_RCVD_4: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_4));
231 printk("OFDM_TPS_RESERVED_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_1));
232 printk("OFDM_TPS_RESERVED_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_2));
234 printk("NXT6000 status:");
236 val
= nxt6000_readreg(state
, RS_COR_STAT
);
238 printk(" DATA DESCR LOCK: %d,", val
& 0x01);
239 printk(" DATA SYNC LOCK: %d,", (val
>> 1) & 0x01);
241 val
= nxt6000_readreg(state
, VIT_SYNC_STATUS
);
243 printk(" VITERBI LOCK: %d,", (val
>> 7) & 0x01);
245 switch ((val
>> 4) & 0x07) {
248 printk(" VITERBI CODERATE: 1/2,");
252 printk(" VITERBI CODERATE: 2/3,");
256 printk(" VITERBI CODERATE: 3/4,");
260 printk(" VITERBI CODERATE: 5/6,");
264 printk(" VITERBI CODERATE: 7/8,");
268 printk(" VITERBI CODERATE: Reserved,");
272 val
= nxt6000_readreg(state
, OFDM_COR_STAT
);
274 printk(" CHCTrack: %d,", (val
>> 7) & 0x01);
275 printk(" TPSLock: %d,", (val
>> 6) & 0x01);
276 printk(" SYRLock: %d,", (val
>> 5) & 0x01);
277 printk(" AGCLock: %d,", (val
>> 4) & 0x01);
279 switch (val
& 0x0F) {
282 printk(" CoreState: IDLE,");
286 printk(" CoreState: WAIT_AGC,");
290 printk(" CoreState: WAIT_SYR,");
294 printk(" CoreState: WAIT_PPM,");
298 printk(" CoreState: WAIT_TRL,");
302 printk(" CoreState: WAIT_TPS,");
306 printk(" CoreState: MONITOR_TPS,");
310 printk(" CoreState: Reserved,");
314 val
= nxt6000_readreg(state
, OFDM_SYR_STAT
);
316 printk(" SYRLock: %d,", (val
>> 4) & 0x01);
317 printk(" SYRMode: %s,", (val
>> 2) & 0x01 ? "8K" : "2K");
319 switch ((val
>> 4) & 0x03) {
322 printk(" SYRGuard: 1/32,");
326 printk(" SYRGuard: 1/16,");
330 printk(" SYRGuard: 1/8,");
334 printk(" SYRGuard: 1/4,");
338 val
= nxt6000_readreg(state
, OFDM_TPS_RCVD_3
);
340 switch ((val
>> 4) & 0x07) {
343 printk(" TPSLP: 1/2,");
347 printk(" TPSLP: 2/3,");
351 printk(" TPSLP: 3/4,");
355 printk(" TPSLP: 5/6,");
359 printk(" TPSLP: 7/8,");
363 printk(" TPSLP: Reserved,");
367 switch (val
& 0x07) {
370 printk(" TPSHP: 1/2,");
374 printk(" TPSHP: 2/3,");
378 printk(" TPSHP: 3/4,");
382 printk(" TPSHP: 5/6,");
386 printk(" TPSHP: 7/8,");
390 printk(" TPSHP: Reserved,");
394 val
= nxt6000_readreg(state
, OFDM_TPS_RCVD_4
);
396 printk(" TPSMode: %s,", val
& 0x01 ? "8K" : "2K");
398 switch ((val
>> 4) & 0x03) {
401 printk(" TPSGuard: 1/32,");
405 printk(" TPSGuard: 1/16,");
409 printk(" TPSGuard: 1/8,");
413 printk(" TPSGuard: 1/4,");
418 /* Strange magic required to gain access to RF_AGC_STATUS */
419 nxt6000_readreg(state
, RF_AGC_VAL_1
);
420 val
= nxt6000_readreg(state
, RF_AGC_STATUS
);
421 val
= nxt6000_readreg(state
, RF_AGC_STATUS
);
423 printk(" RF AGC LOCK: %d,", (val
>> 4) & 0x01);
427 static int nxt6000_read_status(struct dvb_frontend
* fe
, fe_status_t
* status
)
430 struct nxt6000_state
* state
= fe
->demodulator_priv
;
434 core_status
= nxt6000_readreg(state
, OFDM_COR_STAT
);
436 if (core_status
& AGCLOCKED
)
437 *status
|= FE_HAS_SIGNAL
;
439 if (nxt6000_readreg(state
, OFDM_SYR_STAT
) & GI14_SYR_LOCK
)
440 *status
|= FE_HAS_CARRIER
;
442 if (nxt6000_readreg(state
, VIT_SYNC_STATUS
) & VITINSYNC
)
443 *status
|= FE_HAS_VITERBI
;
445 if (nxt6000_readreg(state
, RS_COR_STAT
) & RSCORESTATUS
)
446 *status
|= FE_HAS_SYNC
;
448 if ((core_status
& TPSLOCKED
) && (*status
== (FE_HAS_SIGNAL
| FE_HAS_CARRIER
| FE_HAS_VITERBI
| FE_HAS_SYNC
)))
449 *status
|= FE_HAS_LOCK
;
452 nxt6000_dump_status(state
);
457 static int nxt6000_init(struct dvb_frontend
* fe
)
459 struct nxt6000_state
* state
= fe
->demodulator_priv
;
461 nxt6000_reset(state
);
467 static int nxt6000_set_frontend(struct dvb_frontend
* fe
, struct dvb_frontend_parameters
*param
)
469 struct nxt6000_state
* state
= fe
->demodulator_priv
;
472 nxt6000_writereg(state
, ENABLE_TUNER_IIC
, 0x01); /* open i2c bus switch */
473 state
->config
->pll_set(fe
, param
);
474 nxt6000_writereg(state
, ENABLE_TUNER_IIC
, 0x00); /* close i2c bus switch */
476 if ((result
= nxt6000_set_bandwidth(state
, param
->u
.ofdm
.bandwidth
)) < 0)
478 if ((result
= nxt6000_set_guard_interval(state
, param
->u
.ofdm
.guard_interval
)) < 0)
480 if ((result
= nxt6000_set_transmission_mode(state
, param
->u
.ofdm
.transmission_mode
)) < 0)
482 if ((result
= nxt6000_set_inversion(state
, param
->inversion
)) < 0)
488 static void nxt6000_release(struct dvb_frontend
* fe
)
490 struct nxt6000_state
* state
= fe
->demodulator_priv
;
494 static int nxt6000_read_snr(struct dvb_frontend
* fe
, u16
* snr
)
496 struct nxt6000_state
* state
= fe
->demodulator_priv
;
498 *snr
= nxt6000_readreg( state
, OFDM_CHC_SNR
) / 8;
503 static int nxt6000_read_ber(struct dvb_frontend
* fe
, u32
* ber
)
505 struct nxt6000_state
* state
= fe
->demodulator_priv
;
507 nxt6000_writereg( state
, VIT_COR_INTSTAT
, 0x18 );
509 *ber
= (nxt6000_readreg( state
, VIT_BER_1
) << 8 ) |
510 nxt6000_readreg( state
, VIT_BER_0
);
512 nxt6000_writereg( state
, VIT_COR_INTSTAT
, 0x18); // Clear BER Done interrupts
517 static int nxt6000_read_signal_strength(struct dvb_frontend
* fe
, u16
* signal_strength
)
519 struct nxt6000_state
* state
= fe
->demodulator_priv
;
521 *signal_strength
= (short) (511 -
522 (nxt6000_readreg(state
, AGC_GAIN_1
) +
523 ((nxt6000_readreg(state
, AGC_GAIN_2
) & 0x03) << 8)));
528 static struct dvb_frontend_ops nxt6000_ops
;
530 struct dvb_frontend
* nxt6000_attach(const struct nxt6000_config
* config
,
531 struct i2c_adapter
* i2c
)
533 struct nxt6000_state
* state
= NULL
;
535 /* allocate memory for the internal state */
536 state
= kmalloc(sizeof(struct nxt6000_state
), GFP_KERNEL
);
537 if (state
== NULL
) goto error
;
539 /* setup the state */
540 state
->config
= config
;
542 memcpy(&state
->ops
, &nxt6000_ops
, sizeof(struct dvb_frontend_ops
));
544 /* check if the demod is there */
545 if (nxt6000_readreg(state
, OFDM_MSC_REV
) != NXT6000ASICDEVICE
) goto error
;
547 /* create dvb_frontend */
548 state
->frontend
.ops
= &state
->ops
;
549 state
->frontend
.demodulator_priv
= state
;
550 return &state
->frontend
;
557 static struct dvb_frontend_ops nxt6000_ops
= {
560 .name
= "NxtWave NXT6000 DVB-T",
563 .frequency_max
= 863250000,
564 .frequency_stepsize
= 62500,
565 /*.frequency_tolerance = *//* FIXME: 12% of SR */
566 .symbol_rate_min
= 0, /* FIXME */
567 .symbol_rate_max
= 9360000, /* FIXME */
568 .symbol_rate_tolerance
= 4000,
569 .caps
= FE_CAN_FEC_1_2
| FE_CAN_FEC_2_3
| FE_CAN_FEC_3_4
|
570 FE_CAN_FEC_4_5
| FE_CAN_FEC_5_6
| FE_CAN_FEC_6_7
|
571 FE_CAN_FEC_7_8
| FE_CAN_FEC_8_9
| FE_CAN_FEC_AUTO
|
572 FE_CAN_QAM_16
| FE_CAN_QAM_64
| FE_CAN_QAM_AUTO
|
573 FE_CAN_TRANSMISSION_MODE_AUTO
| FE_CAN_GUARD_INTERVAL_AUTO
|
574 FE_CAN_HIERARCHY_AUTO
,
577 .release
= nxt6000_release
,
579 .init
= nxt6000_init
,
581 .set_frontend
= nxt6000_set_frontend
,
583 .read_status
= nxt6000_read_status
,
584 .read_ber
= nxt6000_read_ber
,
585 .read_signal_strength
= nxt6000_read_signal_strength
,
586 .read_snr
= nxt6000_read_snr
,
589 module_param(debug
, int, 0644);
590 MODULE_PARM_DESC(debug
, "Turn on/off frontend debugging (default:off).");
592 MODULE_DESCRIPTION("NxtWave NXT6000 DVB-T demodulator driver");
593 MODULE_AUTHOR("Florian Schirmer");
594 MODULE_LICENSE("GPL");
596 EXPORT_SYMBOL(nxt6000_attach
);