[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / media / dvb / frontends / tda10021.c
blob87d5f4d8790ffdfb47d6d78704e48fd699508005
1 /*
2 TDA10021 - Single Chip Cable Channel Receiver driver module
3 used on the the Siemens DVB-C cards
5 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
6 Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
7 Support for TDA10021
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/config.h>
25 #include <linux/delay.h>
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/string.h>
31 #include <linux/slab.h>
33 #include "dvb_frontend.h"
34 #include "tda10021.h"
37 struct tda10021_state {
38 struct i2c_adapter* i2c;
39 struct dvb_frontend_ops ops;
40 /* configuration settings */
41 const struct tda10021_config* config;
42 struct dvb_frontend frontend;
44 u8 pwm;
45 u8 reg0;
49 #if 0
50 #define dprintk(x...) printk(x)
51 #else
52 #define dprintk(x...)
53 #endif
55 static int verbose;
57 #define XIN 57840000UL
58 #define DISABLE_INVERSION(reg0) do { reg0 |= 0x20; } while (0)
59 #define ENABLE_INVERSION(reg0) do { reg0 &= ~0x20; } while (0)
60 #define HAS_INVERSION(reg0) (!(reg0 & 0x20))
62 #define FIN (XIN >> 4)
64 static int tda10021_inittab_size = 0x40;
65 static u8 tda10021_inittab[0x40]=
67 0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
68 0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
69 0xb8, 0x3f, 0xa0, 0x00, 0xcd, 0x01, 0x00, 0xff,
70 0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
71 0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
72 0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
73 0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
74 0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
77 static int tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
79 u8 buf[] = { reg, data };
80 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
81 int ret;
83 ret = i2c_transfer (state->i2c, &msg, 1);
84 if (ret != 1)
85 printk("DVB: TDA10021(%d): %s, writereg error "
86 "(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
87 state->frontend.dvb->num, __FUNCTION__, reg, data, ret);
89 msleep(10);
90 return (ret != 1) ? -EREMOTEIO : 0;
93 static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
95 u8 b0 [] = { reg };
96 u8 b1 [] = { 0 };
97 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
98 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
99 int ret;
101 ret = i2c_transfer (state->i2c, msg, 2);
102 if (ret != 2)
103 printk("DVB: TDA10021(%d): %s: readreg error (ret == %i)\n",
104 state->frontend.dvb->num, __FUNCTION__, ret);
105 return b1[0];
108 //get access to tuner
109 static int lock_tuner(struct tda10021_state* state)
111 u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
112 struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
114 if(i2c_transfer(state->i2c, &msg, 1) != 1)
116 printk("tda10021: lock tuner fails\n");
117 return -EREMOTEIO;
119 return 0;
122 //release access from tuner
123 static int unlock_tuner(struct tda10021_state* state)
125 u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
126 struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
128 if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
130 printk("tda10021: unlock tuner fails\n");
131 return -EREMOTEIO;
133 return 0;
136 static int tda10021_setup_reg0 (struct tda10021_state* state, u8 reg0,
137 fe_spectral_inversion_t inversion)
139 reg0 |= state->reg0 & 0x63;
141 if (INVERSION_ON == inversion)
142 ENABLE_INVERSION(reg0);
143 else if (INVERSION_OFF == inversion)
144 DISABLE_INVERSION(reg0);
146 tda10021_writereg (state, 0x00, reg0 & 0xfe);
147 tda10021_writereg (state, 0x00, reg0 | 0x01);
149 state->reg0 = reg0;
150 return 0;
153 static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
155 s32 BDR;
156 s32 BDRI;
157 s16 SFIL=0;
158 u16 NDEC = 0;
159 u32 tmp, ratio;
161 if (symbolrate > XIN/2)
162 symbolrate = XIN/2;
163 if (symbolrate < 500000)
164 symbolrate = 500000;
166 if (symbolrate < XIN/16) NDEC = 1;
167 if (symbolrate < XIN/32) NDEC = 2;
168 if (symbolrate < XIN/64) NDEC = 3;
170 if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
171 if (symbolrate < (u32)(XIN/16)) SFIL = 0;
172 if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
173 if (symbolrate < (u32)(XIN/32)) SFIL = 0;
174 if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
175 if (symbolrate < (u32)(XIN/64)) SFIL = 0;
176 if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
178 symbolrate <<= NDEC;
179 ratio = (symbolrate << 4) / FIN;
180 tmp = ((symbolrate << 4) % FIN) << 8;
181 ratio = (ratio << 8) + tmp / FIN;
182 tmp = (tmp % FIN) << 8;
183 ratio = (ratio << 8) + (tmp + FIN/2) / FIN;
185 BDR = ratio;
186 BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
188 if (BDRI > 0xFF)
189 BDRI = 0xFF;
191 SFIL = (SFIL << 4) | tda10021_inittab[0x0E];
193 NDEC = (NDEC << 6) | tda10021_inittab[0x03];
195 tda10021_writereg (state, 0x03, NDEC);
196 tda10021_writereg (state, 0x0a, BDR&0xff);
197 tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
198 tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
200 tda10021_writereg (state, 0x0d, BDRI);
201 tda10021_writereg (state, 0x0e, SFIL);
203 return 0;
206 static int tda10021_init (struct dvb_frontend *fe)
208 struct tda10021_state* state = fe->demodulator_priv;
209 int i;
211 dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
213 //tda10021_writereg (fe, 0, 0);
215 for (i=0; i<tda10021_inittab_size; i++)
216 tda10021_writereg (state, i, tda10021_inittab[i]);
218 tda10021_writereg (state, 0x34, state->pwm);
220 //Comment by markus
221 //0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
222 //0x2A[4] == BYPPLL -> Power down mode (default 1)
223 //0x2A[5] == LCK -> PLL Lock Flag
224 //0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
226 //Activate PLL
227 tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
229 if (state->config->pll_init) {
230 lock_tuner(state);
231 state->config->pll_init(fe);
232 unlock_tuner(state);
235 return 0;
238 static int tda10021_set_parameters (struct dvb_frontend *fe,
239 struct dvb_frontend_parameters *p)
241 struct tda10021_state* state = fe->demodulator_priv;
243 //table for QAM4-QAM256 ready QAM4 QAM16 QAM32 QAM64 QAM128 QAM256
244 //CONF
245 static const u8 reg0x00 [] = { 0x14, 0x00, 0x04, 0x08, 0x0c, 0x10 };
246 //AGCREF value
247 static const u8 reg0x01 [] = { 0x78, 0x8c, 0x8c, 0x6a, 0x78, 0x5c };
248 //LTHR value
249 static const u8 reg0x05 [] = { 0x78, 0x87, 0x64, 0x46, 0x36, 0x26 };
250 //MSETH
251 static const u8 reg0x08 [] = { 0x8c, 0xa2, 0x74, 0x43, 0x34, 0x23 };
252 //AREF
253 static const u8 reg0x09 [] = { 0x96, 0x91, 0x96, 0x6a, 0x7e, 0x6b };
255 int qam = p->u.qam.modulation;
257 if (qam < 0 || qam > 5)
258 return -EINVAL;
260 //printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->u.qam.symbol_rate);
262 lock_tuner(state);
263 state->config->pll_set(fe, p);
264 unlock_tuner(state);
266 tda10021_set_symbolrate (state, p->u.qam.symbol_rate);
267 tda10021_writereg (state, 0x34, state->pwm);
269 tda10021_writereg (state, 0x01, reg0x01[qam]);
270 tda10021_writereg (state, 0x05, reg0x05[qam]);
271 tda10021_writereg (state, 0x08, reg0x08[qam]);
272 tda10021_writereg (state, 0x09, reg0x09[qam]);
274 tda10021_setup_reg0 (state, reg0x00[qam], p->inversion);
276 return 0;
279 static int tda10021_read_status(struct dvb_frontend* fe, fe_status_t* status)
281 struct tda10021_state* state = fe->demodulator_priv;
282 int sync;
284 *status = 0;
285 //0x11[0] == EQALGO -> Equalizer algorithms state
286 //0x11[1] == CARLOCK -> Carrier locked
287 //0x11[2] == FSYNC -> Frame synchronisation
288 //0x11[3] == FEL -> Front End locked
289 //0x11[6] == NODVB -> DVB Mode Information
290 sync = tda10021_readreg (state, 0x11);
292 if (sync & 2)
293 *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
295 if (sync & 4)
296 *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
298 if (sync & 8)
299 *status |= FE_HAS_LOCK;
301 return 0;
304 static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
306 struct tda10021_state* state = fe->demodulator_priv;
308 u32 _ber = tda10021_readreg(state, 0x14) |
309 (tda10021_readreg(state, 0x15) << 8) |
310 ((tda10021_readreg(state, 0x16) & 0x0f) << 16);
311 *ber = 10 * _ber;
313 return 0;
316 static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
318 struct tda10021_state* state = fe->demodulator_priv;
320 u8 gain = tda10021_readreg(state, 0x17);
321 *strength = (gain << 8) | gain;
323 return 0;
326 static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
328 struct tda10021_state* state = fe->demodulator_priv;
330 u8 quality = ~tda10021_readreg(state, 0x18);
331 *snr = (quality << 8) | quality;
333 return 0;
336 static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
338 struct tda10021_state* state = fe->demodulator_priv;
340 *ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
341 if (*ucblocks == 0x7f)
342 *ucblocks = 0xffffffff;
344 /* reset uncorrected block counter */
345 tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
346 tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
348 return 0;
351 static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
353 struct tda10021_state* state = fe->demodulator_priv;
354 int sync;
355 s8 afc = 0;
357 sync = tda10021_readreg(state, 0x11);
358 afc = tda10021_readreg(state, 0x19);
359 if (verbose) {
360 /* AFC only valid when carrier has been recovered */
361 printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
362 "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
363 state->frontend.dvb->num, afc,
364 -((s32)p->u.qam.symbol_rate * afc) >> 10);
367 p->inversion = HAS_INVERSION(state->reg0) ? INVERSION_ON : INVERSION_OFF;
368 p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
370 p->u.qam.fec_inner = FEC_NONE;
371 p->frequency = ((p->frequency + 31250) / 62500) * 62500;
373 if (sync & 2)
374 p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
376 return 0;
379 static int tda10021_sleep(struct dvb_frontend* fe)
381 struct tda10021_state* state = fe->demodulator_priv;
383 tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */
384 tda10021_writereg (state, 0x00, 0x80); /* standby */
386 return 0;
389 static void tda10021_release(struct dvb_frontend* fe)
391 struct tda10021_state* state = fe->demodulator_priv;
392 kfree(state);
395 static struct dvb_frontend_ops tda10021_ops;
397 struct dvb_frontend* tda10021_attach(const struct tda10021_config* config,
398 struct i2c_adapter* i2c,
399 u8 pwm)
401 struct tda10021_state* state = NULL;
403 /* allocate memory for the internal state */
404 state = kmalloc(sizeof(struct tda10021_state), GFP_KERNEL);
405 if (state == NULL) goto error;
407 /* setup the state */
408 state->config = config;
409 state->i2c = i2c;
410 memcpy(&state->ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
411 state->pwm = pwm;
412 state->reg0 = tda10021_inittab[0];
414 /* check if the demod is there */
415 if ((tda10021_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
417 /* create dvb_frontend */
418 state->frontend.ops = &state->ops;
419 state->frontend.demodulator_priv = state;
420 return &state->frontend;
422 error:
423 kfree(state);
424 return NULL;
427 static struct dvb_frontend_ops tda10021_ops = {
429 .info = {
430 .name = "Philips TDA10021 DVB-C",
431 .type = FE_QAM,
432 .frequency_stepsize = 62500,
433 .frequency_min = 51000000,
434 .frequency_max = 858000000,
435 .symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */
436 .symbol_rate_max = (XIN/2)/4, /* SACLK/4 */
437 #if 0
438 .frequency_tolerance = ???,
439 .symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */
440 #endif
441 .caps = 0x400 | //FE_CAN_QAM_4
442 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
443 FE_CAN_QAM_128 | FE_CAN_QAM_256 |
444 FE_CAN_FEC_AUTO
447 .release = tda10021_release,
449 .init = tda10021_init,
450 .sleep = tda10021_sleep,
452 .set_frontend = tda10021_set_parameters,
453 .get_frontend = tda10021_get_frontend,
455 .read_status = tda10021_read_status,
456 .read_ber = tda10021_read_ber,
457 .read_signal_strength = tda10021_read_signal_strength,
458 .read_snr = tda10021_read_snr,
459 .read_ucblocks = tda10021_read_ucblocks,
462 module_param(verbose, int, 0644);
463 MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
465 MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
466 MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
467 MODULE_LICENSE("GPL");
469 EXPORT_SYMBOL(tda10021_attach);