drivers/mtd/nand/nand_ids.c

   1 /*
   2  *  drivers/mtd/nandids.c
   3  *
   4  *  Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
   5   *
   6  * $Id: nand_ids.c,v 1.10 2004/05/26 13:40:12 gleixner Exp $
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  */
  13 #include <linux/module.h>
  14 #include <linux/mtd/nand.h>
  15 /*
  16 *       Chip ID list
  17 *
  18 *       Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
  19 *       options
  20 *
  21 *       Pagesize; 0, 256, 512
  22 *       0       get this information from the extended chip ID
  23 +       256     256 Byte page size
  24 *       512     512 Byte page size
  25 */
  26 struct nand_flash_dev nand_flash_ids[] = {
  27         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  28         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  29         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  30         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  31         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  32         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  33         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  34         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  35         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  36         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
  37
  38         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
  39         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
  40         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  41         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  42
  43         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
  44         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
  45         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
  46         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
  47
  48         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
  49         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
  50         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
  51         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
  52
  53         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
  54         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
  55         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
  56         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
  57
  58         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
  59         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
  60         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  61         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  62
  63         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
  64
  65         {"NAND 512MiB 3,3V 8-bit",      0xDC, 512, 512, 0x4000, 0},
  66
  67         /* These are the new chips with large page size. The pagesize
  68         * and the erasesize is determined from the extended id bytes
  69         */
  70         /* 1 Gigabit */
  71         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  72         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  73         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  74         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  75
  76         /* 2 Gigabit */
  77         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  78         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  79         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  80         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  81
  82         /* 4 Gigabit */
  83         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  84         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  85         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  86         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  87
  88         /* 8 Gigabit */
  89         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  90         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  91         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  92         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  93
  94         /* 16 Gigabit */
  95         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  96         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
  97         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  98         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
  99
 100         /* Renesas AND 1 Gigabit. Those chips do not support extended id and have a strange page/block layout !
 101          * The chosen minimum erasesize is 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page planes
 102          * 1 block = 2 pages, but due to plane arrangement the blocks 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7
 103          * Anyway JFFS2 would increase the eraseblock size so we chose a combined one which can be erased in one go
 104          * There are more speed improvements for reads and writes possible, but not implemented now
 105          */
 106         {"AND 128MiB 3,3V 8-bit",       0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY},
 107
 108         {NULL,}
 109 };
 110
 111 /*
 112 *       Manufacturer ID list
 113 */
 114 struct nand_manufacturers nand_manuf_ids[] = {
 115         {NAND_MFR_TOSHIBA, "Toshiba"},
 116         {NAND_MFR_SAMSUNG, "Samsung"},
 117         {NAND_MFR_FUJITSU, "Fujitsu"},
 118         {NAND_MFR_NATIONAL, "National"},
 119         {NAND_MFR_RENESAS, "Renesas"},
 120         {NAND_MFR_STMICRO, "ST Micro"},
 121         {0x0, "Unknown"}
 122 };
 123
 124 EXPORT_SYMBOL (nand_manuf_ids);
 125 EXPORT_SYMBOL (nand_flash_ids);
 126
 127 MODULE_LICENSE ("GPL");
 128 MODULE_AUTHOR ("Thomas Gleixner <tglx@linutronix.de>");
 129 MODULE_DESCRIPTION ("Nand device & manufacturer ID's");