1 /*******************************************************************************
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 The full GNU General Public License is included in this distribution in the
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
31 /* Local prototypes */
32 static uint16_t ixgb_shift_in_bits(struct ixgb_hw
*hw
);
34 static void ixgb_shift_out_bits(struct ixgb_hw
*hw
,
37 static void ixgb_standby_eeprom(struct ixgb_hw
*hw
);
39 static boolean_t
ixgb_wait_eeprom_command(struct ixgb_hw
*hw
);
41 static void ixgb_cleanup_eeprom(struct ixgb_hw
*hw
);
43 /******************************************************************************
44 * Raises the EEPROM's clock input.
46 * hw - Struct containing variables accessed by shared code
47 * eecd_reg - EECD's current value
48 *****************************************************************************/
50 ixgb_raise_clock(struct ixgb_hw
*hw
,
53 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
54 * wait 50 microseconds.
56 *eecd_reg
= *eecd_reg
| IXGB_EECD_SK
;
57 IXGB_WRITE_REG(hw
, EECD
, *eecd_reg
);
62 /******************************************************************************
63 * Lowers the EEPROM's clock input.
65 * hw - Struct containing variables accessed by shared code
66 * eecd_reg - EECD's current value
67 *****************************************************************************/
69 ixgb_lower_clock(struct ixgb_hw
*hw
,
72 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
73 * wait 50 microseconds.
75 *eecd_reg
= *eecd_reg
& ~IXGB_EECD_SK
;
76 IXGB_WRITE_REG(hw
, EECD
, *eecd_reg
);
81 /******************************************************************************
82 * Shift data bits out to the EEPROM.
84 * hw - Struct containing variables accessed by shared code
85 * data - data to send to the EEPROM
86 * count - number of bits to shift out
87 *****************************************************************************/
89 ixgb_shift_out_bits(struct ixgb_hw
*hw
,
96 /* We need to shift "count" bits out to the EEPROM. So, value in the
97 * "data" parameter will be shifted out to the EEPROM one bit at a time.
98 * In order to do this, "data" must be broken down into bits.
100 mask
= 0x01 << (count
- 1);
101 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
102 eecd_reg
&= ~(IXGB_EECD_DO
| IXGB_EECD_DI
);
104 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
105 * and then raising and then lowering the clock (the SK bit controls
106 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM
107 * by setting "DI" to "0" and then raising and then lowering the clock.
109 eecd_reg
&= ~IXGB_EECD_DI
;
112 eecd_reg
|= IXGB_EECD_DI
;
114 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
118 ixgb_raise_clock(hw
, &eecd_reg
);
119 ixgb_lower_clock(hw
, &eecd_reg
);
125 /* We leave the "DI" bit set to "0" when we leave this routine. */
126 eecd_reg
&= ~IXGB_EECD_DI
;
127 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
131 /******************************************************************************
132 * Shift data bits in from the EEPROM
134 * hw - Struct containing variables accessed by shared code
135 *****************************************************************************/
137 ixgb_shift_in_bits(struct ixgb_hw
*hw
)
143 /* In order to read a register from the EEPROM, we need to shift 16 bits
144 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
145 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
146 * bit. During this "shifting in" process the "DI" bit should always be
150 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
152 eecd_reg
&= ~(IXGB_EECD_DO
| IXGB_EECD_DI
);
155 for(i
= 0; i
< 16; i
++) {
157 ixgb_raise_clock(hw
, &eecd_reg
);
159 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
161 eecd_reg
&= ~(IXGB_EECD_DI
);
162 if(eecd_reg
& IXGB_EECD_DO
)
165 ixgb_lower_clock(hw
, &eecd_reg
);
171 /******************************************************************************
172 * Prepares EEPROM for access
174 * hw - Struct containing variables accessed by shared code
176 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
177 * function should be called before issuing a command to the EEPROM.
178 *****************************************************************************/
180 ixgb_setup_eeprom(struct ixgb_hw
*hw
)
184 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
186 /* Clear SK and DI */
187 eecd_reg
&= ~(IXGB_EECD_SK
| IXGB_EECD_DI
);
188 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
191 eecd_reg
|= IXGB_EECD_CS
;
192 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
196 /******************************************************************************
197 * Returns EEPROM to a "standby" state
199 * hw - Struct containing variables accessed by shared code
200 *****************************************************************************/
202 ixgb_standby_eeprom(struct ixgb_hw
*hw
)
206 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
209 eecd_reg
&= ~(IXGB_EECD_CS
| IXGB_EECD_SK
);
210 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
214 eecd_reg
|= IXGB_EECD_SK
;
215 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
219 eecd_reg
|= IXGB_EECD_CS
;
220 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
224 eecd_reg
&= ~IXGB_EECD_SK
;
225 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
230 /******************************************************************************
231 * Raises then lowers the EEPROM's clock pin
233 * hw - Struct containing variables accessed by shared code
234 *****************************************************************************/
236 ixgb_clock_eeprom(struct ixgb_hw
*hw
)
240 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
242 /* Rising edge of clock */
243 eecd_reg
|= IXGB_EECD_SK
;
244 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
247 /* Falling edge of clock */
248 eecd_reg
&= ~IXGB_EECD_SK
;
249 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
254 /******************************************************************************
255 * Terminates a command by lowering the EEPROM's chip select pin
257 * hw - Struct containing variables accessed by shared code
258 *****************************************************************************/
260 ixgb_cleanup_eeprom(struct ixgb_hw
*hw
)
264 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
266 eecd_reg
&= ~(IXGB_EECD_CS
| IXGB_EECD_DI
);
268 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
270 ixgb_clock_eeprom(hw
);
274 /******************************************************************************
275 * Waits for the EEPROM to finish the current command.
277 * hw - Struct containing variables accessed by shared code
279 * The command is done when the EEPROM's data out pin goes high.
282 * TRUE: EEPROM data pin is high before timeout.
283 * FALSE: Time expired.
284 *****************************************************************************/
286 ixgb_wait_eeprom_command(struct ixgb_hw
*hw
)
291 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
292 * the command in question.
294 ixgb_standby_eeprom(hw
);
296 /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM will
297 * signal that the command has been completed by raising the DO signal.
298 * If DO does not go high in 10 milliseconds, then error out.
300 for(i
= 0; i
< 200; i
++) {
301 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
303 if(eecd_reg
& IXGB_EECD_DO
)
312 /******************************************************************************
313 * Verifies that the EEPROM has a valid checksum
315 * hw - Struct containing variables accessed by shared code
317 * Reads the first 64 16 bit words of the EEPROM and sums the values read.
318 * If the the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
322 * TRUE: Checksum is valid
323 * FALSE: Checksum is not valid.
324 *****************************************************************************/
326 ixgb_validate_eeprom_checksum(struct ixgb_hw
*hw
)
328 uint16_t checksum
= 0;
331 for(i
= 0; i
< (EEPROM_CHECKSUM_REG
+ 1); i
++)
332 checksum
+= ixgb_read_eeprom(hw
, i
);
334 if(checksum
== (uint16_t) EEPROM_SUM
)
340 /******************************************************************************
341 * Calculates the EEPROM checksum and writes it to the EEPROM
343 * hw - Struct containing variables accessed by shared code
345 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
346 * Writes the difference to word offset 63 of the EEPROM.
347 *****************************************************************************/
349 ixgb_update_eeprom_checksum(struct ixgb_hw
*hw
)
351 uint16_t checksum
= 0;
354 for(i
= 0; i
< EEPROM_CHECKSUM_REG
; i
++)
355 checksum
+= ixgb_read_eeprom(hw
, i
);
357 checksum
= (uint16_t) EEPROM_SUM
- checksum
;
359 ixgb_write_eeprom(hw
, EEPROM_CHECKSUM_REG
, checksum
);
363 /******************************************************************************
364 * Writes a 16 bit word to a given offset in the EEPROM.
366 * hw - Struct containing variables accessed by shared code
367 * reg - offset within the EEPROM to be written to
368 * data - 16 bit word to be writen to the EEPROM
370 * If ixgb_update_eeprom_checksum is not called after this function, the
371 * EEPROM will most likely contain an invalid checksum.
373 *****************************************************************************/
375 ixgb_write_eeprom(struct ixgb_hw
*hw
, uint16_t offset
, uint16_t data
)
377 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
379 /* Prepare the EEPROM for writing */
380 ixgb_setup_eeprom(hw
);
382 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
383 * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
385 ixgb_shift_out_bits(hw
, EEPROM_EWEN_OPCODE
, 5);
386 ixgb_shift_out_bits(hw
, 0, 4);
388 /* Prepare the EEPROM */
389 ixgb_standby_eeprom(hw
);
391 /* Send the Write command (3-bit opcode + 6-bit addr) */
392 ixgb_shift_out_bits(hw
, EEPROM_WRITE_OPCODE
, 3);
393 ixgb_shift_out_bits(hw
, offset
, 6);
396 ixgb_shift_out_bits(hw
, data
, 16);
398 ixgb_wait_eeprom_command(hw
);
400 /* Recover from write */
401 ixgb_standby_eeprom(hw
);
403 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
404 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
407 ixgb_shift_out_bits(hw
, EEPROM_EWDS_OPCODE
, 5);
408 ixgb_shift_out_bits(hw
, 0, 4);
410 /* Done with writing */
411 ixgb_cleanup_eeprom(hw
);
413 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
414 ee_map
->init_ctrl_reg_1
= EEPROM_ICW1_SIGNATURE_CLEAR
;
419 /******************************************************************************
420 * Reads a 16 bit word from the EEPROM.
422 * hw - Struct containing variables accessed by shared code
423 * offset - offset of 16 bit word in the EEPROM to read
426 * The 16-bit value read from the eeprom
427 *****************************************************************************/
429 ixgb_read_eeprom(struct ixgb_hw
*hw
,
434 /* Prepare the EEPROM for reading */
435 ixgb_setup_eeprom(hw
);
437 /* Send the READ command (opcode + addr) */
438 ixgb_shift_out_bits(hw
, EEPROM_READ_OPCODE
, 3);
440 * We have a 64 word EEPROM, there are 6 address bits
442 ixgb_shift_out_bits(hw
, offset
, 6);
445 data
= ixgb_shift_in_bits(hw
);
447 /* End this read operation */
448 ixgb_standby_eeprom(hw
);
453 /******************************************************************************
454 * Reads eeprom and stores data in shared structure.
455 * Validates eeprom checksum and eeprom signature.
457 * hw - Struct containing variables accessed by shared code
460 * TRUE: if eeprom read is successful
462 *****************************************************************************/
464 ixgb_get_eeprom_data(struct ixgb_hw
*hw
)
467 uint16_t checksum
= 0;
468 struct ixgb_ee_map_type
*ee_map
;
470 DEBUGFUNC("ixgb_get_eeprom_data");
472 ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
474 DEBUGOUT("ixgb_ee: Reading eeprom data\n");
475 for(i
= 0; i
< IXGB_EEPROM_SIZE
; i
++) {
477 ee_data
= ixgb_read_eeprom(hw
, i
);
479 hw
->eeprom
[i
] = le16_to_cpu(ee_data
);
482 if (checksum
!= (uint16_t) EEPROM_SUM
) {
483 DEBUGOUT("ixgb_ee: Checksum invalid.\n");
484 /* clear the init_ctrl_reg_1 to signify that the cache is
486 ee_map
->init_ctrl_reg_1
= EEPROM_ICW1_SIGNATURE_CLEAR
;
490 if ((ee_map
->init_ctrl_reg_1
& le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK
))
491 != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID
)) {
492 DEBUGOUT("ixgb_ee: Signature invalid.\n");
499 /******************************************************************************
500 * Local function to check if the eeprom signature is good
501 * If the eeprom signature is good, calls ixgb)get_eeprom_data.
503 * hw - Struct containing variables accessed by shared code
506 * TRUE: eeprom signature was good and the eeprom read was successful
508 ******************************************************************************/
510 ixgb_check_and_get_eeprom_data (struct ixgb_hw
* hw
)
512 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
514 if ((ee_map
->init_ctrl_reg_1
& le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK
))
515 == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID
)) {
518 return ixgb_get_eeprom_data(hw
);
522 /******************************************************************************
523 * return a word from the eeprom
525 * hw - Struct containing variables accessed by shared code
526 * index - Offset of eeprom word
529 * Word at indexed offset in eeprom, if valid, 0 otherwise.
530 ******************************************************************************/
532 ixgb_get_eeprom_word(struct ixgb_hw
*hw
, uint16_t index
)
535 if ((index
< IXGB_EEPROM_SIZE
) &&
536 (ixgb_check_and_get_eeprom_data(hw
) == TRUE
)) {
537 return(hw
->eeprom
[index
]);
543 /******************************************************************************
544 * return the mac address from EEPROM
546 * hw - Struct containing variables accessed by shared code
547 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
550 ******************************************************************************/
552 ixgb_get_ee_mac_addr(struct ixgb_hw
*hw
,
556 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
558 DEBUGFUNC("ixgb_get_ee_mac_addr");
560 if (ixgb_check_and_get_eeprom_data(hw
) == TRUE
) {
561 for (i
= 0; i
< IXGB_ETH_LENGTH_OF_ADDRESS
; i
++) {
562 mac_addr
[i
] = ee_map
->mac_addr
[i
];
563 DEBUGOUT2("mac(%d) = %.2X\n", i
, mac_addr
[i
]);
568 /******************************************************************************
569 * return the compatibility flags from EEPROM
571 * hw - Struct containing variables accessed by shared code
574 * compatibility flags if EEPROM contents are valid, 0 otherwise
575 ******************************************************************************/
577 ixgb_get_ee_compatibility(struct ixgb_hw
*hw
)
579 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
581 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
582 return(ee_map
->compatibility
);
587 /******************************************************************************
588 * return the Printed Board Assembly number from EEPROM
590 * hw - Struct containing variables accessed by shared code
593 * PBA number if EEPROM contents are valid, 0 otherwise
594 ******************************************************************************/
596 ixgb_get_ee_pba_number(struct ixgb_hw
*hw
)
598 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
599 return (le16_to_cpu(hw
->eeprom
[EEPROM_PBA_1_2_REG
])
600 | (le16_to_cpu(hw
->eeprom
[EEPROM_PBA_3_4_REG
])<<16));
605 /******************************************************************************
606 * return the Initialization Control Word 1 from EEPROM
608 * hw - Struct containing variables accessed by shared code
611 * Initialization Control Word 1 if EEPROM contents are valid, 0 otherwise
612 ******************************************************************************/
614 ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw
*hw
)
616 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
618 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
619 return(ee_map
->init_ctrl_reg_1
);
624 /******************************************************************************
625 * return the Initialization Control Word 2 from EEPROM
627 * hw - Struct containing variables accessed by shared code
630 * Initialization Control Word 2 if EEPROM contents are valid, 0 otherwise
631 ******************************************************************************/
633 ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw
*hw
)
635 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
637 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
638 return(ee_map
->init_ctrl_reg_2
);
643 /******************************************************************************
644 * return the Subsystem Id from EEPROM
646 * hw - Struct containing variables accessed by shared code
649 * Subsystem Id if EEPROM contents are valid, 0 otherwise
650 ******************************************************************************/
652 ixgb_get_ee_subsystem_id(struct ixgb_hw
*hw
)
654 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
656 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
657 return(ee_map
->subsystem_id
);
662 /******************************************************************************
663 * return the Sub Vendor Id from EEPROM
665 * hw - Struct containing variables accessed by shared code
668 * Sub Vendor Id if EEPROM contents are valid, 0 otherwise
669 ******************************************************************************/
671 ixgb_get_ee_subvendor_id(struct ixgb_hw
*hw
)
673 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
675 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
676 return(ee_map
->subvendor_id
);
681 /******************************************************************************
682 * return the Device Id from EEPROM
684 * hw - Struct containing variables accessed by shared code
687 * Device Id if EEPROM contents are valid, 0 otherwise
688 ******************************************************************************/
690 ixgb_get_ee_device_id(struct ixgb_hw
*hw
)
692 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
694 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
695 return(ee_map
->device_id
);
700 /******************************************************************************
701 * return the Vendor Id from EEPROM
703 * hw - Struct containing variables accessed by shared code
706 * Device Id if EEPROM contents are valid, 0 otherwise
707 ******************************************************************************/
709 ixgb_get_ee_vendor_id(struct ixgb_hw
*hw
)
711 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
713 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
714 return(ee_map
->vendor_id
);
719 /******************************************************************************
720 * return the Software Defined Pins Register from EEPROM
722 * hw - Struct containing variables accessed by shared code
725 * SDP Register if EEPROM contents are valid, 0 otherwise
726 ******************************************************************************/
728 ixgb_get_ee_swdpins_reg(struct ixgb_hw
*hw
)
730 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
732 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
733 return(ee_map
->swdpins_reg
);
738 /******************************************************************************
739 * return the D3 Power Management Bits from EEPROM
741 * hw - Struct containing variables accessed by shared code
744 * D3 Power Management Bits if EEPROM contents are valid, 0 otherwise
745 ******************************************************************************/
747 ixgb_get_ee_d3_power(struct ixgb_hw
*hw
)
749 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
751 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
752 return(ee_map
->d3_power
);
757 /******************************************************************************
758 * return the D0 Power Management Bits from EEPROM
760 * hw - Struct containing variables accessed by shared code
763 * D0 Power Management Bits if EEPROM contents are valid, 0 otherwise
764 ******************************************************************************/
766 ixgb_get_ee_d0_power(struct ixgb_hw
*hw
)
768 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
770 if(ixgb_check_and_get_eeprom_data(hw
) == TRUE
)
771 return(ee_map
->d0_power
);