[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / pcmcia / ti113x.h
bloba8a1d104524a5c261decbaed8c896a18a52461e6
1 /*
2 * ti113x.h 1.16 1999/10/25 20:03:34
4 * The contents of this file are subject to the Mozilla Public License
5 * Version 1.1 (the "License"); you may not use this file except in
6 * compliance with the License. You may obtain a copy of the License
7 * at http://www.mozilla.org/MPL/
9 * Software distributed under the License is distributed on an "AS IS"
10 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
11 * the License for the specific language governing rights and
12 * limitations under the License.
14 * The initial developer of the original code is David A. Hinds
15 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
16 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
18 * Alternatively, the contents of this file may be used under the
19 * terms of the GNU General Public License version 2 (the "GPL"), in which
20 * case the provisions of the GPL are applicable instead of the
21 * above. If you wish to allow the use of your version of this file
22 * only under the terms of the GPL and not to allow others to use
23 * your version of this file under the MPL, indicate your decision by
24 * deleting the provisions above and replace them with the notice and
25 * other provisions required by the GPL. If you do not delete the
26 * provisions above, a recipient may use your version of this file
27 * under either the MPL or the GPL.
30 #ifndef _LINUX_TI113X_H
31 #define _LINUX_TI113X_H
33 #include <linux/config.h>
35 /* Register definitions for TI 113X PCI-to-CardBus bridges */
37 /* System Control Register */
38 #define TI113X_SYSTEM_CONTROL 0x0080 /* 32 bit */
39 #define TI113X_SCR_SMIROUTE 0x04000000
40 #define TI113X_SCR_SMISTATUS 0x02000000
41 #define TI113X_SCR_SMIENB 0x01000000
42 #define TI113X_SCR_VCCPROT 0x00200000
43 #define TI113X_SCR_REDUCEZV 0x00100000
44 #define TI113X_SCR_CDREQEN 0x00080000
45 #define TI113X_SCR_CDMACHAN 0x00070000
46 #define TI113X_SCR_SOCACTIVE 0x00002000
47 #define TI113X_SCR_PWRSTREAM 0x00000800
48 #define TI113X_SCR_DELAYUP 0x00000400
49 #define TI113X_SCR_DELAYDOWN 0x00000200
50 #define TI113X_SCR_INTERROGATE 0x00000100
51 #define TI113X_SCR_CLKRUN_SEL 0x00000080
52 #define TI113X_SCR_PWRSAVINGS 0x00000040
53 #define TI113X_SCR_SUBSYSRW 0x00000020
54 #define TI113X_SCR_CB_DPAR 0x00000010
55 #define TI113X_SCR_CDMA_EN 0x00000008
56 #define TI113X_SCR_ASYNC_IRQ 0x00000004
57 #define TI113X_SCR_KEEPCLK 0x00000002
58 #define TI113X_SCR_CLKRUN_ENA 0x00000001
60 #define TI122X_SCR_SER_STEP 0xc0000000
61 #define TI122X_SCR_INTRTIE 0x20000000
62 #define TI122X_SCR_CBRSVD 0x00400000
63 #define TI122X_SCR_MRBURSTDN 0x00008000
64 #define TI122X_SCR_MRBURSTUP 0x00004000
65 #define TI122X_SCR_RIMUX 0x00000001
67 /* Multimedia Control Register */
68 #define TI1250_MULTIMEDIA_CTL 0x0084 /* 8 bit */
69 #define TI1250_MMC_ZVOUTEN 0x80
70 #define TI1250_MMC_PORTSEL 0x40
71 #define TI1250_MMC_ZVEN1 0x02
72 #define TI1250_MMC_ZVEN0 0x01
74 #define TI1250_GENERAL_STATUS 0x0085 /* 8 bit */
75 #define TI1250_GPIO0_CONTROL 0x0088 /* 8 bit */
76 #define TI1250_GPIO1_CONTROL 0x0089 /* 8 bit */
77 #define TI1250_GPIO2_CONTROL 0x008a /* 8 bit */
78 #define TI1250_GPIO3_CONTROL 0x008b /* 8 bit */
79 #define TI1250_GPIO_MODE_MASK 0xc0
81 /* IRQMUX/MFUNC Register */
82 #define TI122X_MFUNC 0x008c /* 32 bit */
83 #define TI122X_MFUNC0_MASK 0x0000000f
84 #define TI122X_MFUNC1_MASK 0x000000f0
85 #define TI122X_MFUNC2_MASK 0x00000f00
86 #define TI122X_MFUNC3_MASK 0x0000f000
87 #define TI122X_MFUNC4_MASK 0x000f0000
88 #define TI122X_MFUNC5_MASK 0x00f00000
89 #define TI122X_MFUNC6_MASK 0x0f000000
91 #define TI122X_MFUNC0_INTA 0x00000002
92 #define TI125X_MFUNC0_INTB 0x00000001
93 #define TI122X_MFUNC1_INTB 0x00000020
94 #define TI122X_MFUNC3_IRQSER 0x00001000
97 /* Retry Status Register */
98 #define TI113X_RETRY_STATUS 0x0090 /* 8 bit */
99 #define TI113X_RSR_PCIRETRY 0x80
100 #define TI113X_RSR_CBRETRY 0x40
101 #define TI113X_RSR_TEXP_CBB 0x20
102 #define TI113X_RSR_MEXP_CBB 0x10
103 #define TI113X_RSR_TEXP_CBA 0x08
104 #define TI113X_RSR_MEXP_CBA 0x04
105 #define TI113X_RSR_TEXP_PCI 0x02
106 #define TI113X_RSR_MEXP_PCI 0x01
108 /* Card Control Register */
109 #define TI113X_CARD_CONTROL 0x0091 /* 8 bit */
110 #define TI113X_CCR_RIENB 0x80
111 #define TI113X_CCR_ZVENABLE 0x40
112 #define TI113X_CCR_PCI_IRQ_ENA 0x20
113 #define TI113X_CCR_PCI_IREQ 0x10
114 #define TI113X_CCR_PCI_CSC 0x08
115 #define TI113X_CCR_SPKROUTEN 0x02
116 #define TI113X_CCR_IFG 0x01
118 #define TI1220_CCR_PORT_SEL 0x20
119 #define TI122X_CCR_AUD2MUX 0x04
121 /* Device Control Register */
122 #define TI113X_DEVICE_CONTROL 0x0092 /* 8 bit */
123 #define TI113X_DCR_5V_FORCE 0x40
124 #define TI113X_DCR_3V_FORCE 0x20
125 #define TI113X_DCR_IMODE_MASK 0x06
126 #define TI113X_DCR_IMODE_ISA 0x02
127 #define TI113X_DCR_IMODE_SERIAL 0x04
129 #define TI12XX_DCR_IMODE_PCI_ONLY 0x00
130 #define TI12XX_DCR_IMODE_ALL_SERIAL 0x06
132 /* Buffer Control Register */
133 #define TI113X_BUFFER_CONTROL 0x0093 /* 8 bit */
134 #define TI113X_BCR_CB_READ_DEPTH 0x08
135 #define TI113X_BCR_CB_WRITE_DEPTH 0x04
136 #define TI113X_BCR_PCI_READ_DEPTH 0x02
137 #define TI113X_BCR_PCI_WRITE_DEPTH 0x01
139 /* Diagnostic Register */
140 #define TI1250_DIAGNOSTIC 0x0093 /* 8 bit */
141 #define TI1250_DIAG_TRUE_VALUE 0x80
142 #define TI1250_DIAG_PCI_IREQ 0x40
143 #define TI1250_DIAG_PCI_CSC 0x20
144 #define TI1250_DIAG_ASYNC_CSC 0x01
146 /* DMA Registers */
147 #define TI113X_DMA_0 0x0094 /* 32 bit */
148 #define TI113X_DMA_1 0x0098 /* 32 bit */
150 /* ExCA IO offset registers */
151 #define TI113X_IO_OFFSET(map) (0x36+((map)<<1))
153 /* EnE test register */
154 #define ENE_TEST_C9 0xc9 /* 8bit */
155 #define ENE_TEST_C9_TLTENABLE 0x02
157 #ifdef CONFIG_CARDBUS
160 * Texas Instruments CardBus controller overrides.
162 #define ti_sysctl(socket) ((socket)->private[0])
163 #define ti_cardctl(socket) ((socket)->private[1])
164 #define ti_devctl(socket) ((socket)->private[2])
165 #define ti_diag(socket) ((socket)->private[3])
166 #define ti_mfunc(socket) ((socket)->private[4])
167 #define ene_test_c9(socket) ((socket)->private[5])
170 * These are the TI specific power management handlers.
172 static void ti_save_state(struct yenta_socket *socket)
174 ti_sysctl(socket) = config_readl(socket, TI113X_SYSTEM_CONTROL);
175 ti_mfunc(socket) = config_readl(socket, TI122X_MFUNC);
176 ti_cardctl(socket) = config_readb(socket, TI113X_CARD_CONTROL);
177 ti_devctl(socket) = config_readb(socket, TI113X_DEVICE_CONTROL);
178 ti_diag(socket) = config_readb(socket, TI1250_DIAGNOSTIC);
180 if (socket->dev->vendor == PCI_VENDOR_ID_ENE)
181 ene_test_c9(socket) = config_readb(socket, ENE_TEST_C9);
184 static void ti_restore_state(struct yenta_socket *socket)
186 config_writel(socket, TI113X_SYSTEM_CONTROL, ti_sysctl(socket));
187 config_writel(socket, TI122X_MFUNC, ti_mfunc(socket));
188 config_writeb(socket, TI113X_CARD_CONTROL, ti_cardctl(socket));
189 config_writeb(socket, TI113X_DEVICE_CONTROL, ti_devctl(socket));
190 config_writeb(socket, TI1250_DIAGNOSTIC, ti_diag(socket));
192 if (socket->dev->vendor == PCI_VENDOR_ID_ENE)
193 config_writeb(socket, ENE_TEST_C9, ene_test_c9(socket));
197 * Zoom video control for TI122x/113x chips
200 static void ti_zoom_video(struct pcmcia_socket *sock, int onoff)
202 u8 reg;
203 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
205 /* If we don't have a Zoom Video switch this is harmless,
206 we just tristate the unused (ZV) lines */
207 reg = config_readb(socket, TI113X_CARD_CONTROL);
208 if (onoff)
209 /* Zoom zoom, we will all go together, zoom zoom, zoom zoom */
210 reg |= TI113X_CCR_ZVENABLE;
211 else
212 reg &= ~TI113X_CCR_ZVENABLE;
213 config_writeb(socket, TI113X_CARD_CONTROL, reg);
217 * The 145x series can also use this. They have an additional
218 * ZV autodetect mode we don't use but don't actually need.
219 * FIXME: manual says its in func0 and func1 but disagrees with
220 * itself about this - do we need to force func0, if so we need
221 * to know a lot more about socket pairings in pcmcia_socket than
222 * we do now.. uggh.
225 static void ti1250_zoom_video(struct pcmcia_socket *sock, int onoff)
227 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
228 int shift = 0;
229 u8 reg;
231 ti_zoom_video(sock, onoff);
233 reg = config_readb(socket, TI1250_MULTIMEDIA_CTL);
234 reg |= TI1250_MMC_ZVOUTEN; /* ZV bus enable */
236 if(PCI_FUNC(socket->dev->devfn)==1)
237 shift = 1;
239 if(onoff)
241 reg &= ~(1<<6); /* Clear select bit */
242 reg |= shift<<6; /* Favour our socket */
243 reg |= 1<<shift; /* Socket zoom video on */
245 else
247 reg &= ~(1<<6); /* Clear select bit */
248 reg |= (1^shift)<<6; /* Favour other socket */
249 reg &= ~(1<<shift); /* Socket zoon video off */
252 config_writeb(socket, TI1250_MULTIMEDIA_CTL, reg);
255 static void ti_set_zv(struct yenta_socket *socket)
257 if(socket->dev->vendor == PCI_VENDOR_ID_TI)
259 switch(socket->dev->device)
261 /* There may be more .. */
262 case PCI_DEVICE_ID_TI_1220:
263 case PCI_DEVICE_ID_TI_1221:
264 case PCI_DEVICE_ID_TI_1225:
265 case PCI_DEVICE_ID_TI_4510:
266 socket->socket.zoom_video = ti_zoom_video;
267 break;
268 case PCI_DEVICE_ID_TI_1250:
269 case PCI_DEVICE_ID_TI_1251A:
270 case PCI_DEVICE_ID_TI_1251B:
271 case PCI_DEVICE_ID_TI_1450:
272 socket->socket.zoom_video = ti1250_zoom_video;
279 * Generic TI init - TI has an extension for the
280 * INTCTL register that sets the PCI CSC interrupt.
281 * Make sure we set it correctly at open and init
282 * time
283 * - override: disable the PCI CSC interrupt. This makes
284 * it possible to use the CSC interrupt to probe the
285 * ISA interrupts.
286 * - init: set the interrupt to match our PCI state.
287 * This makes us correctly get PCI CSC interrupt
288 * events.
290 static int ti_init(struct yenta_socket *socket)
292 u8 new, reg = exca_readb(socket, I365_INTCTL);
294 new = reg & ~I365_INTR_ENA;
295 if (socket->cb_irq)
296 new |= I365_INTR_ENA;
297 if (new != reg)
298 exca_writeb(socket, I365_INTCTL, new);
299 return 0;
302 static int ti_override(struct yenta_socket *socket)
304 u8 new, reg = exca_readb(socket, I365_INTCTL);
306 new = reg & ~I365_INTR_ENA;
307 if (new != reg)
308 exca_writeb(socket, I365_INTCTL, new);
310 ti_set_zv(socket);
312 return 0;
315 static int ti113x_override(struct yenta_socket *socket)
317 u8 cardctl;
319 cardctl = config_readb(socket, TI113X_CARD_CONTROL);
320 cardctl &= ~(TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_IREQ | TI113X_CCR_PCI_CSC);
321 if (socket->cb_irq)
322 cardctl |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_CSC | TI113X_CCR_PCI_IREQ;
323 config_writeb(socket, TI113X_CARD_CONTROL, cardctl);
325 return ti_override(socket);
329 /* irqrouting for func0, probes PCI interrupt and ISA interrupts */
330 static void ti12xx_irqroute_func0(struct yenta_socket *socket)
332 u32 mfunc, mfunc_old, devctl;
333 u8 gpio3, gpio3_old;
334 int pci_irq_status;
336 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC);
337 devctl = config_readb(socket, TI113X_DEVICE_CONTROL);
338 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n",
339 pci_name(socket->dev), mfunc, devctl);
341 /* make sure PCI interrupts are enabled before probing */
342 ti_init(socket);
344 /* test PCI interrupts first. only try fixing if return value is 0! */
345 pci_irq_status = yenta_probe_cb_irq(socket);
346 if (pci_irq_status)
347 goto out;
350 * We're here which means PCI interrupts are _not_ delivered. try to
351 * find the right setting (all serial or parallel)
353 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n",
354 pci_name(socket->dev));
356 /* for serial PCI make sure MFUNC3 is set to IRQSER */
357 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) {
358 switch (socket->dev->device) {
359 case PCI_DEVICE_ID_TI_1250:
360 case PCI_DEVICE_ID_TI_1251A:
361 case PCI_DEVICE_ID_TI_1251B:
362 case PCI_DEVICE_ID_TI_1450:
363 case PCI_DEVICE_ID_TI_1451A:
364 case PCI_DEVICE_ID_TI_4450:
365 case PCI_DEVICE_ID_TI_4451:
366 /* these chips have no IRQSER setting in MFUNC3 */
367 break;
369 default:
370 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER;
372 /* write down if changed, probe */
373 if (mfunc != mfunc_old) {
374 config_writel(socket, TI122X_MFUNC, mfunc);
376 pci_irq_status = yenta_probe_cb_irq(socket);
377 if (pci_irq_status == 1) {
378 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts ok\n",
379 pci_name(socket->dev));
380 mfunc_old = mfunc;
381 goto out;
384 /* not working, back to old value */
385 mfunc = mfunc_old;
386 config_writel(socket, TI122X_MFUNC, mfunc);
388 if (pci_irq_status == -1)
389 goto out;
393 /* serial PCI interrupts not working fall back to parallel */
394 printk(KERN_INFO "Yenta TI: socket %s falling back to parallel PCI interrupts\n",
395 pci_name(socket->dev));
396 devctl &= ~TI113X_DCR_IMODE_MASK;
397 devctl |= TI113X_DCR_IMODE_SERIAL; /* serial ISA could be right */
398 config_writeb(socket, TI113X_DEVICE_CONTROL, devctl);
401 /* parallel PCI interrupts: route INTA */
402 switch (socket->dev->device) {
403 case PCI_DEVICE_ID_TI_1250:
404 case PCI_DEVICE_ID_TI_1251A:
405 case PCI_DEVICE_ID_TI_1251B:
406 case PCI_DEVICE_ID_TI_1450:
407 /* make sure GPIO3 is set to INTA */
408 gpio3 = gpio3_old = config_readb(socket, TI1250_GPIO3_CONTROL);
409 gpio3 &= ~TI1250_GPIO_MODE_MASK;
410 if (gpio3 != gpio3_old)
411 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3);
412 break;
414 default:
415 gpio3 = gpio3_old = 0;
417 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI122X_MFUNC0_INTA;
418 if (mfunc != mfunc_old)
419 config_writel(socket, TI122X_MFUNC, mfunc);
422 /* time to probe again */
423 pci_irq_status = yenta_probe_cb_irq(socket);
424 if (pci_irq_status == 1) {
425 mfunc_old = mfunc;
426 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n",
427 pci_name(socket->dev));
428 } else {
429 /* not working, back to old value */
430 mfunc = mfunc_old;
431 config_writel(socket, TI122X_MFUNC, mfunc);
432 if (gpio3 != gpio3_old)
433 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3_old);
436 out:
437 if (pci_irq_status < 1) {
438 socket->cb_irq = 0;
439 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n",
440 pci_name(socket->dev));
445 /* changes the irq of func1 to match that of func0 */
446 static int ti12xx_align_irqs(struct yenta_socket *socket, int *old_irq)
448 struct pci_dev *func0;
450 /* find func0 device */
451 func0 = pci_get_slot(socket->dev->bus, socket->dev->devfn & ~0x07);
452 if (!func0)
453 return 0;
455 if (old_irq)
456 *old_irq = socket->cb_irq;
457 socket->cb_irq = socket->dev->irq = func0->irq;
459 pci_dev_put(func0);
461 return 1;
465 * ties INTA and INTB together. also changes the devices irq to that of
466 * the function 0 device. call from func1 only.
467 * returns 1 if INTRTIE changed, 0 otherwise.
469 static int ti12xx_tie_interrupts(struct yenta_socket *socket, int *old_irq)
471 u32 sysctl;
472 int ret;
474 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL);
475 if (sysctl & TI122X_SCR_INTRTIE)
476 return 0;
478 /* align */
479 ret = ti12xx_align_irqs(socket, old_irq);
480 if (!ret)
481 return 0;
483 /* tie */
484 sysctl |= TI122X_SCR_INTRTIE;
485 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl);
487 return 1;
490 /* undo what ti12xx_tie_interrupts() did */
491 static void ti12xx_untie_interrupts(struct yenta_socket *socket, int old_irq)
493 u32 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL);
494 sysctl &= ~TI122X_SCR_INTRTIE;
495 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl);
497 socket->cb_irq = socket->dev->irq = old_irq;
501 * irqrouting for func1, plays with INTB routing
502 * only touches MFUNC for INTB routing. all other bits are taken
503 * care of in func0 already.
505 static void ti12xx_irqroute_func1(struct yenta_socket *socket)
507 u32 mfunc, mfunc_old, devctl, sysctl;
508 int pci_irq_status;
510 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC);
511 devctl = config_readb(socket, TI113X_DEVICE_CONTROL);
512 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n",
513 pci_name(socket->dev), mfunc, devctl);
515 /* if IRQs are configured as tied, align irq of func1 with func0 */
516 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL);
517 if (sysctl & TI122X_SCR_INTRTIE)
518 ti12xx_align_irqs(socket, NULL);
520 /* make sure PCI interrupts are enabled before probing */
521 ti_init(socket);
523 /* test PCI interrupts first. only try fixing if return value is 0! */
524 pci_irq_status = yenta_probe_cb_irq(socket);
525 if (pci_irq_status)
526 goto out;
529 * We're here which means PCI interrupts are _not_ delivered. try to
530 * find the right setting
532 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n",
533 pci_name(socket->dev));
536 /* if all serial: set INTRTIE, probe again */
537 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) {
538 int old_irq;
540 if (ti12xx_tie_interrupts(socket, &old_irq)) {
541 pci_irq_status = yenta_probe_cb_irq(socket);
542 if (pci_irq_status == 1) {
543 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts, tied ok\n",
544 pci_name(socket->dev));
545 goto out;
548 ti12xx_untie_interrupts(socket, old_irq);
551 /* parallel PCI: route INTB, probe again */
552 else {
553 int old_irq;
555 switch (socket->dev->device) {
556 case PCI_DEVICE_ID_TI_1250:
557 /* the 1250 has one pin for IRQSER/INTB depending on devctl */
558 break;
560 case PCI_DEVICE_ID_TI_1251A:
561 case PCI_DEVICE_ID_TI_1251B:
562 case PCI_DEVICE_ID_TI_1450:
564 * those have a pin for IRQSER/INTB plus INTB in MFUNC0
565 * we alread probed the shared pin, now go for MFUNC0
567 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI125X_MFUNC0_INTB;
568 break;
570 default:
571 mfunc = (mfunc & ~TI122X_MFUNC1_MASK) | TI122X_MFUNC1_INTB;
572 break;
575 /* write, probe */
576 if (mfunc != mfunc_old) {
577 config_writel(socket, TI122X_MFUNC, mfunc);
579 pci_irq_status = yenta_probe_cb_irq(socket);
580 if (pci_irq_status == 1) {
581 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n",
582 pci_name(socket->dev));
583 goto out;
586 mfunc = mfunc_old;
587 config_writel(socket, TI122X_MFUNC, mfunc);
589 if (pci_irq_status == -1)
590 goto out;
593 /* still nothing: set INTRTIE */
594 if (ti12xx_tie_interrupts(socket, &old_irq)) {
595 pci_irq_status = yenta_probe_cb_irq(socket);
596 if (pci_irq_status == 1) {
597 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts, tied ok\n",
598 pci_name(socket->dev));
599 goto out;
602 ti12xx_untie_interrupts(socket, old_irq);
606 out:
607 if (pci_irq_status < 1) {
608 socket->cb_irq = 0;
609 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n",
610 pci_name(socket->dev));
614 static int ti12xx_override(struct yenta_socket *socket)
616 u32 val, val_orig;
618 /* make sure that memory burst is active */
619 val_orig = val = config_readl(socket, TI113X_SYSTEM_CONTROL);
620 if (disable_clkrun && PCI_FUNC(socket->dev->devfn) == 0) {
621 printk(KERN_INFO "Yenta: Disabling CLKRUN feature\n");
622 val |= TI113X_SCR_KEEPCLK;
624 if (!(val & TI122X_SCR_MRBURSTUP)) {
625 printk(KERN_INFO "Yenta: Enabling burst memory read transactions\n");
626 val |= TI122X_SCR_MRBURSTUP;
628 if (val_orig != val)
629 config_writel(socket, TI113X_SYSTEM_CONTROL, val);
632 * for EnE bridges only: clear testbit TLTEnable. this makes the
633 * RME Hammerfall DSP sound card working.
635 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) {
636 u8 test_c9 = config_readb(socket, ENE_TEST_C9);
637 test_c9 &= ~ENE_TEST_C9_TLTENABLE;
638 config_writeb(socket, ENE_TEST_C9, test_c9);
642 * Yenta expects controllers to use CSCINT to route
643 * CSC interrupts to PCI rather than INTVAL.
645 val = config_readb(socket, TI1250_DIAGNOSTIC);
646 printk(KERN_INFO "Yenta: Using %s to route CSC interrupts to PCI\n",
647 (val & TI1250_DIAG_PCI_CSC) ? "CSCINT" : "INTVAL");
648 printk(KERN_INFO "Yenta: Routing CardBus interrupts to %s\n",
649 (val & TI1250_DIAG_PCI_IREQ) ? "PCI" : "ISA");
651 /* do irqrouting, depending on function */
652 if (PCI_FUNC(socket->dev->devfn) == 0)
653 ti12xx_irqroute_func0(socket);
654 else
655 ti12xx_irqroute_func1(socket);
657 return ti_override(socket);
661 static int ti1250_override(struct yenta_socket *socket)
663 u8 old, diag;
665 old = config_readb(socket, TI1250_DIAGNOSTIC);
666 diag = old & ~(TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ);
667 if (socket->cb_irq)
668 diag |= TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ;
670 if (diag != old) {
671 printk(KERN_INFO "Yenta: adjusting diagnostic: %02x -> %02x\n",
672 old, diag);
673 config_writeb(socket, TI1250_DIAGNOSTIC, diag);
676 return ti12xx_override(socket);
679 #endif /* CONFIG_CARDBUS */
681 #endif /* _LINUX_TI113X_H */