drivers/scsi/megaraid/megaraid_mbox.h

   1 /*
   2  *
   3  *                      Linux MegaRAID device driver
   4  *
   5  * Copyright (c) 2003-2004  LSI Logic Corporation.
   6  *
   7  *         This program is free software; you can redistribute it and/or
   8  *         modify it under the terms of the GNU General Public License
   9  *         as published by the Free Software Foundation; either version
  10  *         2 of the License, or (at your option) any later version.
  11  *
  12  * FILE         : megaraid_mbox.h
  13  */
  14
  15 #ifndef _MEGARAID_H_
  16 #define _MEGARAID_H_
  17
  18
  19 #include "mega_common.h"
  20 #include "mbox_defs.h"
  21 #include "megaraid_ioctl.h"
  22
  23
  24 #define MEGARAID_VERSION        "2.20.4.5"
  25 #define MEGARAID_EXT_VERSION    "(Release Date: Thu Feb 03 12:27:22 EST 2005)"
  26
  27
  28 /*
  29  * Define some PCI values here until they are put in the kernel
  30  */
  31 #define PCI_DEVICE_ID_PERC4_DI_DISCOVERY                0x000E
  32 #define PCI_SUBSYS_ID_PERC4_DI_DISCOVERY                0x0123
  33
  34 #define PCI_DEVICE_ID_PERC4_SC                          0x1960
  35 #define PCI_SUBSYS_ID_PERC4_SC                          0x0520
  36
  37 #define PCI_DEVICE_ID_PERC4_DC                          0x1960
  38 #define PCI_SUBSYS_ID_PERC4_DC                          0x0518
  39
  40 #define PCI_DEVICE_ID_PERC4_QC                          0x0407
  41 #define PCI_SUBSYS_ID_PERC4_QC                          0x0531
  42
  43 #define PCI_DEVICE_ID_PERC4_DI_EVERGLADES               0x000F
  44 #define PCI_SUBSYS_ID_PERC4_DI_EVERGLADES               0x014A
  45
  46 #define PCI_DEVICE_ID_PERC4E_SI_BIGBEND                 0x0013
  47 #define PCI_SUBSYS_ID_PERC4E_SI_BIGBEND                 0x016c
  48
  49 #define PCI_DEVICE_ID_PERC4E_DI_KOBUK                   0x0013
  50 #define PCI_SUBSYS_ID_PERC4E_DI_KOBUK                   0x016d
  51
  52 #define PCI_DEVICE_ID_PERC4E_DI_CORVETTE                0x0013
  53 #define PCI_SUBSYS_ID_PERC4E_DI_CORVETTE                0x016e
  54
  55 #define PCI_DEVICE_ID_PERC4E_DI_EXPEDITION              0x0013
  56 #define PCI_SUBSYS_ID_PERC4E_DI_EXPEDITION              0x016f
  57
  58 #define PCI_DEVICE_ID_PERC4E_DI_GUADALUPE               0x0013
  59 #define PCI_SUBSYS_ID_PERC4E_DI_GUADALUPE               0x0170
  60
  61 #define PCI_DEVICE_ID_PERC4E_DC_320_2E                  0x0408
  62 #define PCI_SUBSYS_ID_PERC4E_DC_320_2E                  0x0002
  63
  64 #define PCI_DEVICE_ID_PERC4E_SC_320_1E                  0x0408
  65 #define PCI_SUBSYS_ID_PERC4E_SC_320_1E                  0x0001
  66
  67 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_0               0x1960
  68 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0               0xA520
  69
  70 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_1               0x1960
  71 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1               0x0520
  72
  73 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_2               0x1960
  74 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2               0x0518
  75
  76 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_0x              0x0407
  77 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0x              0x0530
  78
  79 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_2x              0x0407
  80 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2x              0x0532
  81
  82 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_4x              0x0407
  83 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_4x              0x0531
  84
  85 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_1E              0x0408
  86 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1E              0x0001
  87
  88 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_2E              0x0408
  89 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2E              0x0002
  90
  91 #define PCI_DEVICE_ID_MEGARAID_I4_133_RAID              0x1960
  92 #define PCI_SUBSYS_ID_MEGARAID_I4_133_RAID              0x0522
  93
  94 #define PCI_DEVICE_ID_MEGARAID_SATA_150_4               0x1960
  95 #define PCI_SUBSYS_ID_MEGARAID_SATA_150_4               0x4523
  96
  97 #define PCI_DEVICE_ID_MEGARAID_SATA_150_6               0x1960
  98 #define PCI_SUBSYS_ID_MEGARAID_SATA_150_6               0x0523
  99
 100 #define PCI_DEVICE_ID_MEGARAID_SATA_300_4x              0x0409
 101 #define PCI_SUBSYS_ID_MEGARAID_SATA_300_4x              0x3004
 102
 103 #define PCI_DEVICE_ID_MEGARAID_SATA_300_8x              0x0409
 104 #define PCI_SUBSYS_ID_MEGARAID_SATA_300_8x              0x3008
 105
 106 #define PCI_DEVICE_ID_INTEL_RAID_SRCU42X                0x0407
 107 #define PCI_SUBSYS_ID_INTEL_RAID_SRCU42X                0x0532
 108
 109 #define PCI_DEVICE_ID_INTEL_RAID_SRCS16                 0x1960
 110 #define PCI_SUBSYS_ID_INTEL_RAID_SRCS16                 0x0523
 111
 112 #define PCI_DEVICE_ID_INTEL_RAID_SRCU42E                0x0408
 113 #define PCI_SUBSYS_ID_INTEL_RAID_SRCU42E                0x0002
 114
 115 #define PCI_DEVICE_ID_INTEL_RAID_SRCZCRX                0x0407
 116 #define PCI_SUBSYS_ID_INTEL_RAID_SRCZCRX                0x0530
 117
 118 #define PCI_DEVICE_ID_INTEL_RAID_SRCS28X                0x0409
 119 #define PCI_SUBSYS_ID_INTEL_RAID_SRCS28X                0x3008
 120
 121 #define PCI_DEVICE_ID_INTEL_RAID_SROMBU42E_ALIEF        0x0408
 122 #define PCI_SUBSYS_ID_INTEL_RAID_SROMBU42E_ALIEF        0x3431
 123
 124 #define PCI_DEVICE_ID_INTEL_RAID_SROMBU42E_HARWICH      0x0408
 125 #define PCI_SUBSYS_ID_INTEL_RAID_SROMBU42E_HARWICH      0x3499
 126
 127 #define PCI_DEVICE_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK    0x1960
 128 #define PCI_SUBSYS_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK    0x0520
 129
 130 #define PCI_DEVICE_ID_FSC_MEGARAID_PCI_EXPRESS_ROMB     0x0408
 131 #define PCI_SUBSYS_ID_FSC_MEGARAID_PCI_EXPRESS_ROMB     0x1065
 132
 133 #define PCI_DEVICE_ID_MEGARAID_ACER_ROMB_2E             0x0408
 134 #define PCI_SUBSYS_ID_MEGARAID_ACER_ROMB_2E             0x004D
 135
 136 #define PCI_SUBSYS_ID_PERC3_QC                          0x0471
 137 #define PCI_SUBSYS_ID_PERC3_DC                          0x0493
 138 #define PCI_SUBSYS_ID_PERC3_SC                          0x0475
 139
 140 #define PCI_DEVICE_ID_MEGARAID_NEC_ROMB_2E              0x0408
 141 #define PCI_SUBSYS_ID_MEGARAID_NEC_ROMB_2E              0x8287
 142
 143 #ifndef PCI_SUBSYS_ID_FSC
 144 #define PCI_SUBSYS_ID_FSC                               0x1734
 145 #endif
 146
 147 #define MBOX_MAX_SCSI_CMDS      128     // number of cmds reserved for kernel
 148 #define MBOX_MAX_USER_CMDS      32      // number of cmds for applications
 149 #define MBOX_DEF_CMD_PER_LUN    64      // default commands per lun
 150 #define MBOX_DEFAULT_SG_SIZE    26      // default sg size supported by all fw
 151 #define MBOX_MAX_SG_SIZE        32      // maximum scatter-gather list size
 152 #define MBOX_MAX_SECTORS        128     // maximum sectors per IO
 153 #define MBOX_TIMEOUT            30      // timeout value for internal cmds
 154 #define MBOX_BUSY_WAIT          10      // max usec to wait for busy mailbox
 155 #define MBOX_RESET_WAIT         180     // wait these many seconds in reset
 156 #define MBOX_RESET_EXT_WAIT     120     // extended wait reset
 157
 158 /*
 159  * maximum transfer that can happen through the firmware commands issued
 160  * internnaly from the driver.
 161  */
 162 #define MBOX_IBUF_SIZE          4096
 163
 164
 165 /**
 166  * mbox_ccb_t - command control block specific to mailbox based controllers
 167  * @raw_mbox            : raw mailbox pointer
 168  * @mbox                : mailbox
 169  * @mbox64              : extended mailbox
 170  * @mbox_dma_h          : maibox dma address
 171  * @sgl64               : 64-bit scatter-gather list
 172  * @sgl32               : 32-bit scatter-gather list
 173  * @sgl_dma_h           : dma handle for the scatter-gather list
 174  * @pthru               : passthru structure
 175  * @pthru_dma_h         : dma handle for the passthru structure
 176  * @epthru              : extended passthru structure
 177  * @epthru_dma_h        : dma handle for extended passthru structure
 178  * @buf_dma_h           : dma handle for buffers w/o sg list
 179  *
 180  * command control block specific to the mailbox based controllers
 181  */
 182 typedef struct {
 183         uint8_t                 *raw_mbox;
 184         mbox_t                  *mbox;
 185         mbox64_t                *mbox64;
 186         dma_addr_t              mbox_dma_h;
 187         mbox_sgl64              *sgl64;
 188         mbox_sgl32              *sgl32;
 189         dma_addr_t              sgl_dma_h;
 190         mraid_passthru_t        *pthru;
 191         dma_addr_t              pthru_dma_h;
 192         mraid_epassthru_t       *epthru;
 193         dma_addr_t              epthru_dma_h;
 194         dma_addr_t              buf_dma_h;
 195 } mbox_ccb_t;
 196
 197
 198 /**
 199  * mraid_device_t - adapter soft state structure for mailbox controllers
 200  * @param una_mbox64            : 64-bit mbox - unaligned
 201  * @param una_mbox64_dma        : mbox dma addr - unaligned
 202  * @param mbox                  : 32-bit mbox - aligned
 203  * @param mbox64                : 64-bit mbox - aligned
 204  * @param mbox_dma              : mbox dma addr - aligned
 205  * @param mailbox_lock          : exclusion lock for the mailbox
 206  * @param baseport              : base port of hba memory
 207  * @param baseaddr              : mapped addr of hba memory
 208  * @param mbox_pool             : pool of mailboxes
 209  * @param mbox_pool_handle      : handle for the mailbox pool memory
 210  * @param epthru_pool           : a pool for extended passthru commands
 211  * @param epthru_pool_handle    : handle to the pool above
 212  * @param sg_pool               : pool of scatter-gather lists for this driver
 213  * @param sg_pool_handle        : handle to the pool above
 214  * @param ccb_list              : list of our command control blocks
 215  * @param uccb_list             : list of cmd control blocks for mgmt module
 216  * @param umbox64               : array of mailbox for user commands (cmm)
 217  * @param pdrv_state            : array for state of each physical drive.
 218  * @param last_disp             : flag used to show device scanning
 219  * @param hw_error              : set if FW not responding
 220  * @param fast_load             : If set, skip physical device scanning
 221  * @channel_class               : channel class, RAID or SCSI
 222  * @sysfs_sem                   : semaphore to serialize access to sysfs res.
 223  * @sysfs_uioc                  : management packet to issue FW calls from sysfs
 224  * @sysfs_mbox64                : mailbox packet to issue FW calls from sysfs
 225  * @sysfs_buffer                : data buffer for FW commands issued from sysfs
 226  * @sysfs_buffer_dma            : DMA buffer for FW commands issued from sysfs
 227  * @sysfs_wait_q                : wait queue for sysfs operations
 228  * @random_del_supported        : set if the random deletion is supported
 229  * @curr_ldmap                  : current LDID map
 230  *
 231  * Initialization structure for mailbox controllers: memory based and IO based
 232  * All the fields in this structure are LLD specific and may be discovered at
 233  * init() or start() time.
 234  *
 235  * NOTE: The fields of this structures are placed to minimize cache misses
 236  */
 237 #define MAX_LD_EXTENDED64       64
 238 typedef struct {
 239         mbox64_t                        *una_mbox64;
 240         dma_addr_t                      una_mbox64_dma;
 241         mbox_t                          *mbox;
 242         mbox64_t                        *mbox64;
 243         dma_addr_t                      mbox_dma;
 244         spinlock_t                      mailbox_lock;
 245         unsigned long                   baseport;
 246         void __iomem *                  baseaddr;
 247         struct mraid_pci_blk            mbox_pool[MBOX_MAX_SCSI_CMDS];
 248         struct dma_pool                 *mbox_pool_handle;
 249         struct mraid_pci_blk            epthru_pool[MBOX_MAX_SCSI_CMDS];
 250         struct dma_pool                 *epthru_pool_handle;
 251         struct mraid_pci_blk            sg_pool[MBOX_MAX_SCSI_CMDS];
 252         struct dma_pool                 *sg_pool_handle;
 253         mbox_ccb_t                      ccb_list[MBOX_MAX_SCSI_CMDS];
 254         mbox_ccb_t                      uccb_list[MBOX_MAX_USER_CMDS];
 255         mbox64_t                        umbox64[MBOX_MAX_USER_CMDS];
 256
 257         uint8_t                         pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];
 258         uint32_t                        last_disp;
 259         int                             hw_error;
 260         int                             fast_load;
 261         uint8_t                         channel_class;
 262         struct semaphore                sysfs_sem;
 263         uioc_t                          *sysfs_uioc;
 264         mbox64_t                        *sysfs_mbox64;
 265         caddr_t                         sysfs_buffer;
 266         dma_addr_t                      sysfs_buffer_dma;
 267         wait_queue_head_t               sysfs_wait_q;
 268         int                             random_del_supported;
 269         uint16_t                        curr_ldmap[MAX_LD_EXTENDED64];
 270 } mraid_device_t;
 271
 272 // route to raid device from adapter
 273 #define ADAP2RAIDDEV(adp)       ((mraid_device_t *)((adp)->raid_device))
 274
 275 #define MAILBOX_LOCK(rdev)      (&(rdev)->mailbox_lock)
 276
 277 // Find out if this channel is a RAID or SCSI
 278 #define IS_RAID_CH(rdev, ch)    (((rdev)->channel_class >> (ch)) & 0x01)
 279
 280
 281 #define RDINDOOR(rdev)          readl((rdev)->baseaddr + 0x20)
 282 #define RDOUTDOOR(rdev)         readl((rdev)->baseaddr + 0x2C)
 283 #define WRINDOOR(rdev, value)   writel(value, (rdev)->baseaddr + 0x20)
 284 #define WROUTDOOR(rdev, value)  writel(value, (rdev)->baseaddr + 0x2C)
 285
 286 #endif // _MEGARAID_H_
 287
 288 // vim: set ts=8 sw=8 tw=78: