2 * sata_uli.c - ULi Electronics SATA
4 * The contents of this file are subject to the Open
5 * Software License version 1.1 that can be found at
6 * http://www.opensource.org/licenses/osl-1.1.txt and is included herein
9 * Alternatively, the contents of this file may be used under the terms
10 * of the GNU General Public License version 2 (the "GPL") as distributed
11 * in the kernel source COPYING file, in which case the provisions of
12 * the GPL are applicable instead of the above. If you wish to allow
13 * the use of your version of this file only under the terms of the
14 * GPL and not to allow others to use your version of this file under
15 * the OSL, indicate your decision by deleting the provisions above and
16 * replace them with the notice and other provisions required by the GPL.
17 * If you do not delete the provisions above, a recipient may use your
18 * version of this file under either the OSL or the GPL.
22 #include <linux/config.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/blkdev.h>
28 #include <linux/delay.h>
29 #include <linux/interrupt.h>
31 #include <scsi/scsi_host.h>
32 #include <linux/libata.h>
34 #define DRV_NAME "sata_uli"
35 #define DRV_VERSION "0.5"
42 /* PCI configuration registers */
43 ULI5287_BASE
= 0x90, /* sata0 phy SCR registers */
44 ULI5287_OFFS
= 0x10, /* offset from sata0->sata1 phy regs */
45 ULI5281_BASE
= 0x60, /* sata0 phy SCR registers */
46 ULI5281_OFFS
= 0x60, /* offset from sata0->sata1 phy regs */
49 static int uli_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
);
50 static u32
uli_scr_read (struct ata_port
*ap
, unsigned int sc_reg
);
51 static void uli_scr_write (struct ata_port
*ap
, unsigned int sc_reg
, u32 val
);
53 static struct pci_device_id uli_pci_tbl
[] = {
54 { PCI_VENDOR_ID_AL
, 0x5289, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, uli_5289
},
55 { PCI_VENDOR_ID_AL
, 0x5287, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, uli_5287
},
56 { PCI_VENDOR_ID_AL
, 0x5281, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, uli_5281
},
57 { } /* terminate list */
61 static struct pci_driver uli_pci_driver
= {
63 .id_table
= uli_pci_tbl
,
64 .probe
= uli_init_one
,
65 .remove
= ata_pci_remove_one
,
68 static Scsi_Host_Template uli_sht
= {
69 .module
= THIS_MODULE
,
71 .ioctl
= ata_scsi_ioctl
,
72 .queuecommand
= ata_scsi_queuecmd
,
73 .eh_strategy_handler
= ata_scsi_error
,
74 .can_queue
= ATA_DEF_QUEUE
,
75 .this_id
= ATA_SHT_THIS_ID
,
76 .sg_tablesize
= LIBATA_MAX_PRD
,
77 .max_sectors
= ATA_MAX_SECTORS
,
78 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
79 .emulated
= ATA_SHT_EMULATED
,
80 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
81 .proc_name
= DRV_NAME
,
82 .dma_boundary
= ATA_DMA_BOUNDARY
,
83 .slave_configure
= ata_scsi_slave_config
,
84 .bios_param
= ata_std_bios_param
,
88 static struct ata_port_operations uli_ops
= {
89 .port_disable
= ata_port_disable
,
91 .tf_load
= ata_tf_load
,
92 .tf_read
= ata_tf_read
,
93 .check_status
= ata_check_status
,
94 .exec_command
= ata_exec_command
,
95 .dev_select
= ata_std_dev_select
,
97 .phy_reset
= sata_phy_reset
,
99 .bmdma_setup
= ata_bmdma_setup
,
100 .bmdma_start
= ata_bmdma_start
,
101 .bmdma_stop
= ata_bmdma_stop
,
102 .bmdma_status
= ata_bmdma_status
,
103 .qc_prep
= ata_qc_prep
,
104 .qc_issue
= ata_qc_issue_prot
,
106 .eng_timeout
= ata_eng_timeout
,
108 .irq_handler
= ata_interrupt
,
109 .irq_clear
= ata_bmdma_irq_clear
,
111 .scr_read
= uli_scr_read
,
112 .scr_write
= uli_scr_write
,
114 .port_start
= ata_port_start
,
115 .port_stop
= ata_port_stop
,
118 static struct ata_port_info uli_port_info
= {
120 .host_flags
= ATA_FLAG_SATA
| ATA_FLAG_SATA_RESET
|
122 .pio_mask
= 0x03, //support pio mode 4 (FIXME)
123 .udma_mask
= 0x7f, //support udma mode 6
124 .port_ops
= &uli_ops
,
128 MODULE_AUTHOR("Peer Chen");
129 MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
130 MODULE_LICENSE("GPL");
131 MODULE_DEVICE_TABLE(pci
, uli_pci_tbl
);
132 MODULE_VERSION(DRV_VERSION
);
134 static unsigned int get_scr_cfg_addr(struct ata_port
*ap
, unsigned int sc_reg
)
136 return ap
->ioaddr
.scr_addr
+ (4 * sc_reg
);
139 static u32
uli_scr_cfg_read (struct ata_port
*ap
, unsigned int sc_reg
)
141 struct pci_dev
*pdev
= to_pci_dev(ap
->host_set
->dev
);
142 unsigned int cfg_addr
= get_scr_cfg_addr(ap
, sc_reg
);
145 pci_read_config_dword(pdev
, cfg_addr
, &val
);
149 static void uli_scr_cfg_write (struct ata_port
*ap
, unsigned int scr
, u32 val
)
151 struct pci_dev
*pdev
= to_pci_dev(ap
->host_set
->dev
);
152 unsigned int cfg_addr
= get_scr_cfg_addr(ap
, scr
);
154 pci_write_config_dword(pdev
, cfg_addr
, val
);
157 static u32
uli_scr_read (struct ata_port
*ap
, unsigned int sc_reg
)
159 if (sc_reg
> SCR_CONTROL
)
162 return uli_scr_cfg_read(ap
, sc_reg
);
165 static void uli_scr_write (struct ata_port
*ap
, unsigned int sc_reg
, u32 val
)
167 if (sc_reg
> SCR_CONTROL
) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
170 uli_scr_cfg_write(ap
, sc_reg
, val
);
173 /* move to PCI layer, integrate w/ MSI stuff */
174 static void pci_enable_intx(struct pci_dev
*pdev
)
178 pci_read_config_word(pdev
, PCI_COMMAND
, &pci_command
);
179 if (pci_command
& PCI_COMMAND_INTX_DISABLE
) {
180 pci_command
&= ~PCI_COMMAND_INTX_DISABLE
;
181 pci_write_config_word(pdev
, PCI_COMMAND
, pci_command
);
185 static int uli_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
187 struct ata_probe_ent
*probe_ent
;
188 struct ata_port_info
*ppi
;
190 unsigned int board_idx
= (unsigned int) ent
->driver_data
;
191 int pci_dev_busy
= 0;
193 rc
= pci_enable_device(pdev
);
197 rc
= pci_request_regions(pdev
, DRV_NAME
);
203 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
205 goto err_out_regions
;
206 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
208 goto err_out_regions
;
210 ppi
= &uli_port_info
;
211 probe_ent
= ata_pci_init_native_mode(pdev
, &ppi
);
214 goto err_out_regions
;
219 probe_ent
->port
[0].scr_addr
= ULI5287_BASE
;
220 probe_ent
->port
[1].scr_addr
= ULI5287_BASE
+ ULI5287_OFFS
;
221 probe_ent
->n_ports
= 4;
223 probe_ent
->port
[2].cmd_addr
= pci_resource_start(pdev
, 0) + 8;
224 probe_ent
->port
[2].altstatus_addr
=
225 probe_ent
->port
[2].ctl_addr
=
226 (pci_resource_start(pdev
, 1) | ATA_PCI_CTL_OFS
) + 4;
227 probe_ent
->port
[2].bmdma_addr
= pci_resource_start(pdev
, 4) + 16;
228 probe_ent
->port
[2].scr_addr
= ULI5287_BASE
+ ULI5287_OFFS
*4;
230 probe_ent
->port
[3].cmd_addr
= pci_resource_start(pdev
, 2) + 8;
231 probe_ent
->port
[3].altstatus_addr
=
232 probe_ent
->port
[3].ctl_addr
=
233 (pci_resource_start(pdev
, 3) | ATA_PCI_CTL_OFS
) + 4;
234 probe_ent
->port
[3].bmdma_addr
= pci_resource_start(pdev
, 4) + 24;
235 probe_ent
->port
[3].scr_addr
= ULI5287_BASE
+ ULI5287_OFFS
*5;
237 ata_std_ports(&probe_ent
->port
[2]);
238 ata_std_ports(&probe_ent
->port
[3]);
242 probe_ent
->port
[0].scr_addr
= ULI5287_BASE
;
243 probe_ent
->port
[1].scr_addr
= ULI5287_BASE
+ ULI5287_OFFS
;
247 probe_ent
->port
[0].scr_addr
= ULI5281_BASE
;
248 probe_ent
->port
[1].scr_addr
= ULI5281_BASE
+ ULI5281_OFFS
;
256 pci_set_master(pdev
);
257 pci_enable_intx(pdev
);
259 /* FIXME: check ata_device_add return value */
260 ata_device_add(probe_ent
);
266 pci_release_regions(pdev
);
270 pci_disable_device(pdev
);
275 static int __init
uli_init(void)
277 return pci_module_init(&uli_pci_driver
);
280 static void __exit
uli_exit(void)
282 pci_unregister_driver(&uli_pci_driver
);
286 module_init(uli_init
);
287 module_exit(uli_exit
);