drivers/serial/21285.c

   1 /*
   2  * linux/drivers/char/21285.c
   3  *
   4  * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
   5  *
   6  * Based on drivers/char/serial.c
   7  *
   8  *  $Id: 21285.c,v 1.37 2002/07/28 10:03:27 rmk Exp $
   9  */
  10 #include <linux/config.h>
  11 #include <linux/module.h>
  12 #include <linux/tty.h>
  13 #include <linux/ioport.h>
  14 #include <linux/init.h>
  15 #include <linux/console.h>
  16 #include <linux/device.h>
  17 #include <linux/tty_flip.h>
  18 #include <linux/serial_core.h>
  19 #include <linux/serial.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/irq.h>
  23 #include <asm/mach-types.h>
  24 #include <asm/hardware/dec21285.h>
  25 #include <asm/hardware.h>
  26
  27 #define BAUD_BASE               (mem_fclk_21285/64)
  28
  29 #define SERIAL_21285_NAME       "ttyFB"
  30 #define SERIAL_21285_MAJOR      204
  31 #define SERIAL_21285_MINOR      4
  32
  33 #define RXSTAT_DUMMY_READ       0x80000000
  34 #define RXSTAT_FRAME            (1 << 0)
  35 #define RXSTAT_PARITY           (1 << 1)
  36 #define RXSTAT_OVERRUN          (1 << 2)
  37 #define RXSTAT_ANYERR           (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
  38
  39 #define H_UBRLCR_BREAK          (1 << 0)
  40 #define H_UBRLCR_PARENB         (1 << 1)
  41 #define H_UBRLCR_PAREVN         (1 << 2)
  42 #define H_UBRLCR_STOPB          (1 << 3)
  43 #define H_UBRLCR_FIFO           (1 << 4)
  44
  45 static const char serial21285_name[] = "Footbridge UART";
  46
  47 #define tx_enabled(port)        ((port)->unused[0])
  48 #define rx_enabled(port)        ((port)->unused[1])
  49
  50 /*
  51  * The documented expression for selecting the divisor is:
  52  *  BAUD_BASE / baud - 1
  53  * However, typically BAUD_BASE is not divisible by baud, so
  54  * we want to select the divisor that gives us the minimum
  55  * error.  Therefore, we want:
  56  *  int(BAUD_BASE / baud - 0.5) ->
  57  *  int(BAUD_BASE / baud - (baud >> 1) / baud) ->
  58  *  int((BAUD_BASE - (baud >> 1)) / baud)
  59  */
  60
  61 static void
  62 serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop)
  63 {
  64         if (tx_enabled(port)) {
  65                 disable_irq(IRQ_CONTX);
  66                 tx_enabled(port) = 0;
  67         }
  68 }
  69
  70 static void
  71 serial21285_start_tx(struct uart_port *port, unsigned int tty_start)
  72 {
  73         if (!tx_enabled(port)) {
  74                 enable_irq(IRQ_CONTX);
  75                 tx_enabled(port) = 1;
  76         }
  77 }
  78
  79 static void serial21285_stop_rx(struct uart_port *port)
  80 {
  81         if (rx_enabled(port)) {
  82                 disable_irq(IRQ_CONRX);
  83                 rx_enabled(port) = 0;
  84         }
  85 }
  86
  87 static void serial21285_enable_ms(struct uart_port *port)
  88 {
  89 }
  90
  91 static irqreturn_t serial21285_rx_chars(int irq, void *dev_id, struct pt_regs *regs)
  92 {
  93         struct uart_port *port = dev_id;
  94         struct tty_struct *tty = port->info->tty;
  95         unsigned int status, ch, flag, rxs, max_count = 256;
  96
  97         status = *CSR_UARTFLG;
  98         while (!(status & 0x10) && max_count--) {
  99                 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
 100                         if (tty->low_latency)
 101                                 tty_flip_buffer_push(tty);
 102                         /*
 103                          * If this failed then we will throw away the
 104                          * bytes but must do so to clear interrupts
 105                          */
 106                 }
 107
 108                 ch = *CSR_UARTDR;
 109                 flag = TTY_NORMAL;
 110                 port->icount.rx++;
 111
 112                 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
 113                 if (unlikely(rxs & RXSTAT_ANYERR)) {
 114                         if (rxs & RXSTAT_PARITY)
 115                                 port->icount.parity++;
 116                         else if (rxs & RXSTAT_FRAME)
 117                                 port->icount.frame++;
 118                         if (rxs & RXSTAT_OVERRUN)
 119                                 port->icount.overrun++;
 120
 121                         rxs &= port->read_status_mask;
 122
 123                         if (rxs & RXSTAT_PARITY)
 124                                 flag = TTY_PARITY;
 125                         else if (rxs & RXSTAT_FRAME)
 126                                 flag = TTY_FRAME;
 127                 }
 128
 129                 uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
 130
 131                 status = *CSR_UARTFLG;
 132         }
 133         tty_flip_buffer_push(tty);
 134
 135         return IRQ_HANDLED;
 136 }
 137
 138 static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *regs)
 139 {
 140         struct uart_port *port = dev_id;
 141         struct circ_buf *xmit = &port->info->xmit;
 142         int count = 256;
 143
 144         if (port->x_char) {
 145                 *CSR_UARTDR = port->x_char;
 146                 port->icount.tx++;
 147                 port->x_char = 0;
 148                 goto out;
 149         }
 150         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 151                 serial21285_stop_tx(port, 0);
 152                 goto out;
 153         }
 154
 155         do {
 156                 *CSR_UARTDR = xmit->buf[xmit->tail];
 157                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 158                 port->icount.tx++;
 159                 if (uart_circ_empty(xmit))
 160                         break;
 161         } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
 162
 163         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 164                 uart_write_wakeup(port);
 165
 166         if (uart_circ_empty(xmit))
 167                 serial21285_stop_tx(port, 0);
 168
 169  out:
 170         return IRQ_HANDLED;
 171 }
 172
 173 static unsigned int serial21285_tx_empty(struct uart_port *port)
 174 {
 175         return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
 176 }
 177
 178 /* no modem control lines */
 179 static unsigned int serial21285_get_mctrl(struct uart_port *port)
 180 {
 181         return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
 182 }
 183
 184 static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
 185 {
 186 }
 187
 188 static void serial21285_break_ctl(struct uart_port *port, int break_state)
 189 {
 190         unsigned long flags;
 191         unsigned int h_lcr;
 192
 193         spin_lock_irqsave(&port->lock, flags);
 194         h_lcr = *CSR_H_UBRLCR;
 195         if (break_state)
 196                 h_lcr |= H_UBRLCR_BREAK;
 197         else
 198                 h_lcr &= ~H_UBRLCR_BREAK;
 199         *CSR_H_UBRLCR = h_lcr;
 200         spin_unlock_irqrestore(&port->lock, flags);
 201 }
 202
 203 static int serial21285_startup(struct uart_port *port)
 204 {
 205         int ret;
 206
 207         tx_enabled(port) = 1;
 208         rx_enabled(port) = 1;
 209
 210         ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
 211                           serial21285_name, port);
 212         if (ret == 0) {
 213                 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
 214                                   serial21285_name, port);
 215                 if (ret)
 216                         free_irq(IRQ_CONRX, port);
 217         }
 218
 219         return ret;
 220 }
 221
 222 static void serial21285_shutdown(struct uart_port *port)
 223 {
 224         free_irq(IRQ_CONTX, port);
 225         free_irq(IRQ_CONRX, port);
 226 }
 227
 228 static void
 229 serial21285_set_termios(struct uart_port *port, struct termios *termios,
 230                         struct termios *old)
 231 {
 232         unsigned long flags;
 233         unsigned int baud, quot, h_lcr;
 234
 235         /*
 236          * We don't support modem control lines.
 237          */
 238         termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
 239         termios->c_cflag |= CLOCAL;
 240
 241         /*
 242          * We don't support BREAK character recognition.
 243          */
 244         termios->c_iflag &= ~(IGNBRK | BRKINT);
 245
 246         /*
 247          * Ask the core to calculate the divisor for us.
 248          */
 249         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 250         quot = uart_get_divisor(port, baud);
 251
 252         switch (termios->c_cflag & CSIZE) {
 253         case CS5:
 254                 h_lcr = 0x00;
 255                 break;
 256         case CS6:
 257                 h_lcr = 0x20;
 258                 break;
 259         case CS7:
 260                 h_lcr = 0x40;
 261                 break;
 262         default: /* CS8 */
 263                 h_lcr = 0x60;
 264                 break;
 265         }
 266
 267         if (termios->c_cflag & CSTOPB)
 268                 h_lcr |= H_UBRLCR_STOPB;
 269         if (termios->c_cflag & PARENB) {
 270                 h_lcr |= H_UBRLCR_PARENB;
 271                 if (!(termios->c_cflag & PARODD))
 272                         h_lcr |= H_UBRLCR_PAREVN;
 273         }
 274
 275         if (port->fifosize)
 276                 h_lcr |= H_UBRLCR_FIFO;
 277
 278         spin_lock_irqsave(&port->lock, flags);
 279
 280         /*
 281          * Update the per-port timeout.
 282          */
 283         uart_update_timeout(port, termios->c_cflag, baud);
 284
 285         /*
 286          * Which character status flags are we interested in?
 287          */
 288         port->read_status_mask = RXSTAT_OVERRUN;
 289         if (termios->c_iflag & INPCK)
 290                 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
 291
 292         /*
 293          * Which character status flags should we ignore?
 294          */
 295         port->ignore_status_mask = 0;
 296         if (termios->c_iflag & IGNPAR)
 297                 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
 298         if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
 299                 port->ignore_status_mask |= RXSTAT_OVERRUN;
 300
 301         /*
 302          * Ignore all characters if CREAD is not set.
 303          */
 304         if ((termios->c_cflag & CREAD) == 0)
 305                 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
 306
 307         quot -= 1;
 308
 309         *CSR_UARTCON = 0;
 310         *CSR_L_UBRLCR = quot & 0xff;
 311         *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
 312         *CSR_H_UBRLCR = h_lcr;
 313         *CSR_UARTCON = 1;
 314
 315         spin_unlock_irqrestore(&port->lock, flags);
 316 }
 317
 318 static const char *serial21285_type(struct uart_port *port)
 319 {
 320         return port->type == PORT_21285 ? "DC21285" : NULL;
 321 }
 322
 323 static void serial21285_release_port(struct uart_port *port)
 324 {
 325         release_mem_region(port->mapbase, 32);
 326 }
 327
 328 static int serial21285_request_port(struct uart_port *port)
 329 {
 330         return request_mem_region(port->mapbase, 32, serial21285_name)
 331                          != NULL ? 0 : -EBUSY;
 332 }
 333
 334 static void serial21285_config_port(struct uart_port *port, int flags)
 335 {
 336         if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
 337                 port->type = PORT_21285;
 338 }
 339
 340 /*
 341  * verify the new serial_struct (for TIOCSSERIAL).
 342  */
 343 static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
 344 {
 345         int ret = 0;
 346         if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
 347                 ret = -EINVAL;
 348         if (ser->irq != NO_IRQ)
 349                 ret = -EINVAL;
 350         if (ser->baud_base != port->uartclk / 16)
 351                 ret = -EINVAL;
 352         return ret;
 353 }
 354
 355 static struct uart_ops serial21285_ops = {
 356         .tx_empty       = serial21285_tx_empty,
 357         .get_mctrl      = serial21285_get_mctrl,
 358         .set_mctrl      = serial21285_set_mctrl,
 359         .stop_tx        = serial21285_stop_tx,
 360         .start_tx       = serial21285_start_tx,
 361         .stop_rx        = serial21285_stop_rx,
 362         .enable_ms      = serial21285_enable_ms,
 363         .break_ctl      = serial21285_break_ctl,
 364         .startup        = serial21285_startup,
 365         .shutdown       = serial21285_shutdown,
 366         .set_termios    = serial21285_set_termios,
 367         .type           = serial21285_type,
 368         .release_port   = serial21285_release_port,
 369         .request_port   = serial21285_request_port,
 370         .config_port    = serial21285_config_port,
 371         .verify_port    = serial21285_verify_port,
 372 };
 373
 374 static struct uart_port serial21285_port = {
 375         .mapbase        = 0x42000160,
 376         .iotype         = SERIAL_IO_MEM,
 377         .irq            = NO_IRQ,
 378         .fifosize       = 16,
 379         .ops            = &serial21285_ops,
 380         .flags          = ASYNC_BOOT_AUTOCONF,
 381 };
 382
 383 static void serial21285_setup_ports(void)
 384 {
 385         serial21285_port.uartclk = mem_fclk_21285 / 4;
 386 }
 387
 388 #ifdef CONFIG_SERIAL_21285_CONSOLE
 389
 390 static void
 391 serial21285_console_write(struct console *co, const char *s,
 392                           unsigned int count)
 393 {
 394         int i;
 395
 396         for (i = 0; i < count; i++) {
 397                 while (*CSR_UARTFLG & 0x20)
 398                         barrier();
 399                 *CSR_UARTDR = s[i];
 400                 if (s[i] == '\n') {
 401                         while (*CSR_UARTFLG & 0x20)
 402                                 barrier();
 403                         *CSR_UARTDR = '\r';
 404                 }
 405         }
 406 }
 407
 408 static void __init
 409 serial21285_get_options(struct uart_port *port, int *baud,
 410                         int *parity, int *bits)
 411 {
 412         if (*CSR_UARTCON == 1) {
 413                 unsigned int tmp;
 414
 415                 tmp = *CSR_H_UBRLCR;
 416                 switch (tmp & 0x60) {
 417                 case 0x00:
 418                         *bits = 5;
 419                         break;
 420                 case 0x20:
 421                         *bits = 6;
 422                         break;
 423                 case 0x40:
 424                         *bits = 7;
 425                         break;
 426                 default:
 427                 case 0x60:
 428                         *bits = 8;
 429                         break;
 430                 }
 431
 432                 if (tmp & H_UBRLCR_PARENB) {
 433                         *parity = 'o';
 434                         if (tmp & H_UBRLCR_PAREVN)
 435                                 *parity = 'e';
 436                 }
 437
 438                 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
 439
 440                 *baud = port->uartclk / (16 * (tmp + 1));
 441         }
 442 }
 443
 444 static int __init serial21285_console_setup(struct console *co, char *options)
 445 {
 446         struct uart_port *port = &serial21285_port;
 447         int baud = 9600;
 448         int bits = 8;
 449         int parity = 'n';
 450         int flow = 'n';
 451
 452         if (machine_is_personal_server())
 453                 baud = 57600;
 454
 455         /*
 456          * Check whether an invalid uart number has been specified, and
 457          * if so, search for the first available port that does have
 458          * console support.
 459          */
 460         if (options)
 461                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 462         else
 463                 serial21285_get_options(port, &baud, &parity, &bits);
 464
 465         return uart_set_options(port, co, baud, parity, bits, flow);
 466 }
 467
 468 extern struct uart_driver serial21285_reg;
 469
 470 static struct console serial21285_console =
 471 {
 472         .name           = SERIAL_21285_NAME,
 473         .write          = serial21285_console_write,
 474         .device         = uart_console_device,
 475         .setup          = serial21285_console_setup,
 476         .flags          = CON_PRINTBUFFER,
 477         .index          = -1,
 478         .data           = &serial21285_reg,
 479 };
 480
 481 static int __init rs285_console_init(void)
 482 {
 483         serial21285_setup_ports();
 484         register_console(&serial21285_console);
 485         return 0;
 486 }
 487 console_initcall(rs285_console_init);
 488
 489 #define SERIAL_21285_CONSOLE    &serial21285_console
 490 #else
 491 #define SERIAL_21285_CONSOLE    NULL
 492 #endif
 493
 494 static struct uart_driver serial21285_reg = {
 495         .owner                  = THIS_MODULE,
 496         .driver_name            = "ttyFB",
 497         .dev_name               = "ttyFB",
 498         .devfs_name             = "ttyFB",
 499         .major                  = SERIAL_21285_MAJOR,
 500         .minor                  = SERIAL_21285_MINOR,
 501         .nr                     = 1,
 502         .cons                   = SERIAL_21285_CONSOLE,
 503 };
 504
 505 static int __init serial21285_init(void)
 506 {
 507         int ret;
 508
 509         printk(KERN_INFO "Serial: 21285 driver $Revision: 1.37 $\n");
 510
 511         serial21285_setup_ports();
 512
 513         ret = uart_register_driver(&serial21285_reg);
 514         if (ret == 0)
 515                 uart_add_one_port(&serial21285_reg, &serial21285_port);
 516
 517         return ret;
 518 }
 519
 520 static void __exit serial21285_exit(void)
 521 {
 522         uart_remove_one_port(&serial21285_reg, &serial21285_port);
 523         uart_unregister_driver(&serial21285_reg);
 524 }
 525
 526 module_init(serial21285_init);
 527 module_exit(serial21285_exit);
 528
 529 MODULE_LICENSE("GPL");
 530 MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver $Revision: 1.37 $");
 531 MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);