[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / video / sis / initdef.h
blob55a82d6dc4cfddc2a2dbf3fa347bb3d3b8ce44f4
1 /* $XFree86$ */
2 /* $XdotOrg$ */
3 /*
4 * Global definitions for init.c and init301.c
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
8 * If distributed as part of the Linux kernel, the following license terms
9 * apply:
11 * * This program is free software; you can redistribute it and/or modify
12 * * it under the terms of the GNU General Public License as published by
13 * * the Free Software Foundation; either version 2 of the named License,
14 * * or any later version.
15 * *
16 * * This program is distributed in the hope that it will be useful,
17 * * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * * GNU General Public License for more details.
20 * *
21 * * You should have received a copy of the GNU General Public License
22 * * along with this program; if not, write to the Free Software
23 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
25 * Otherwise, the following license terms apply:
27 * * Redistribution and use in source and binary forms, with or without
28 * * modification, are permitted provided that the following conditions
29 * * are met:
30 * * 1) Redistributions of source code must retain the above copyright
31 * * notice, this list of conditions and the following disclaimer.
32 * * 2) Redistributions in binary form must reproduce the above copyright
33 * * notice, this list of conditions and the following disclaimer in the
34 * * documentation and/or other materials provided with the distribution.
35 * * 3) The name of the author may not be used to endorse or promote products
36 * * derived from this software without specific prior written permission.
37 * *
38 * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
39 * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
40 * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
41 * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
42 * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
43 * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
47 * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49 * Author: Thomas Winischhofer <thomas@winischhofer.net>
53 #ifndef _INITDEF_
54 #define _INITDEF_
56 #define IS_SIS330 (HwInfo->jChipType == SIS_330)
57 #define IS_SIS550 (HwInfo->jChipType == SIS_550)
58 #define IS_SIS650 (HwInfo->jChipType == SIS_650) /* All versions, incl 651, M65x */
59 #define IS_SIS740 (HwInfo->jChipType == SIS_740)
60 #define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
61 #define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
62 #define IS_SIS65x (IS_SIS651 || IS_SISM650) /* Only special versions of 65x */
63 #define IS_SIS661 (HwInfo->jChipType == SIS_661)
64 #define IS_SIS741 (HwInfo->jChipType == SIS_741)
65 #define IS_SIS660 (HwInfo->jChipType == SIS_660)
66 #define IS_SIS760 (HwInfo->jChipType == SIS_760)
67 #define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760)
68 #define IS_SIS650740 ((HwInfo->jChipType >= SIS_650) && (HwInfo->jChipType < SIS_330))
69 #define IS_SIS550650740 (IS_SIS550 || IS_SIS650740)
70 #define IS_SIS650740660 (IS_SIS650 || IS_SIS740 || IS_SIS661741660760)
71 #define IS_SIS550650740660 (IS_SIS550 || IS_SIS650740660)
73 #define SISGETROMW(x) (ROMAddr[(x)] | (ROMAddr[(x)+1] << 8))
75 /* SiS_VBType */
76 #define VB_SIS301 0x0001
77 #define VB_SIS301B 0x0002
78 #define VB_SIS302B 0x0004
79 #define VB_SIS301LV 0x0008
80 #define VB_SIS302LV 0x0010
81 #define VB_SIS302ELV 0x0020
82 #define VB_SIS301C 0x0040
83 #define VB_UMC 0x4000
84 #define VB_NoLCD 0x8000
85 #define VB_SIS301BLV302BLV (VB_SIS301B|VB_SIS301C|VB_SIS302B|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
86 #define VB_SIS301B302B (VB_SIS301B|VB_SIS301C|VB_SIS302B)
87 #define VB_SIS301LV302LV (VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
88 #define VB_SISVB (VB_SIS301 | VB_SIS301BLV302BLV)
89 #define VB_SISTMDS (VB_SIS301 | VB_SIS301B302B)
90 #define VB_SISLVDS VB_SIS301LV302LV
91 #define VB_SISLCDA (VB_SIS302B|VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
92 #define VB_SISYPBPR (VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)
93 #define VB_SISHIVISION (VB_SIS301|VB_SIS301B|VB_SIS302B)
95 /* VBInfo */
96 #define SetSimuScanMode 0x0001 /* CR 30 */
97 #define SwitchCRT2 0x0002
98 #define SetCRT2ToAVIDEO 0x0004
99 #define SetCRT2ToSVIDEO 0x0008
100 #define SetCRT2ToSCART 0x0010
101 #define SetCRT2ToLCD 0x0020
102 #define SetCRT2ToRAMDAC 0x0040
103 #define SetCRT2ToHiVision 0x0080 /* for SiS bridge */
104 #define SetCRT2ToCHYPbPr SetCRT2ToHiVision /* for Chrontel */
105 #define SetNTSCTV 0x0000 /* CR 31 */
106 #define SetPALTV 0x0100 /* Deprecated here, now in TVMode */
107 #define SetInSlaveMode 0x0200
108 #define SetNotSimuMode 0x0400
109 #define SetNotSimuTVMode SetNotSimuMode
110 #define SetDispDevSwitch 0x0800
111 #define SetCRT2ToYPbPr525750 0x0800
112 #define LoadDACFlag 0x1000
113 #define DisableCRT2Display 0x2000
114 #define DriverMode 0x4000
115 #define HotKeySwitch 0x8000
116 #define SetCRT2ToLCDA 0x8000
118 /* v-- Needs change in sis_vga.c if changed (GPIO) --v */
119 #define SetCRT2ToTV (SetCRT2ToYPbPr525750|SetCRT2ToHiVision|SetCRT2ToSCART|SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)
120 #define SetCRT2ToTVNoYPbPrHiVision (SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
121 #define SetCRT2ToTVNoHiVision (SetCRT2ToYPbPr525750 | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
123 /* SiS_ModeType */
124 #define ModeText 0x00
125 #define ModeCGA 0x01
126 #define ModeEGA 0x02
127 #define ModeVGA 0x03
128 #define Mode15Bpp 0x04
129 #define Mode16Bpp 0x05
130 #define Mode24Bpp 0x06
131 #define Mode32Bpp 0x07
133 #define ModeTypeMask 0x07
134 #define IsTextMode 0x07
136 #define DACInfoFlag 0x0018
137 #define MemoryInfoFlag 0x01E0
138 #define MemorySizeShift 5
140 /* modeflag */
141 #define Charx8Dot 0x0200
142 #define LineCompareOff 0x0400
143 #define CRT2Mode 0x0800
144 #define HalfDCLK 0x1000
145 #define NoSupportSimuTV 0x2000
146 #define NoSupportLCDScale 0x4000 /* SiS bridge: No scaling possible (no matter what panel) */
147 #define DoubleScanMode 0x8000
149 /* Infoflag */
150 #define SupportTV 0x0008
151 #define SupportTV1024 0x0800
152 #define SupportCHTV 0x0800
153 #define Support64048060Hz 0x0800 /* Special for 640x480 LCD */
154 #define SupportHiVision 0x0010
155 #define SupportYPbPr750p 0x1000
156 #define SupportLCD 0x0020
157 #define SupportRAMDAC2 0x0040 /* All (<= 100Mhz) */
158 #define SupportRAMDAC2_135 0x0100 /* All except DH (<= 135Mhz) */
159 #define SupportRAMDAC2_162 0x0200 /* B, C (<= 162Mhz) */
160 #define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */
161 #define InterlaceMode 0x0080
162 #define SyncPP 0x0000
163 #define SyncPN 0x4000
164 #define SyncNP 0x8000
165 #define SyncNN 0xc000
167 /* SetFlag */
168 #define ProgrammingCRT2 0x0001
169 #define LowModeTests 0x0002
170 /* #define TVSimuMode 0x0002 - deprecated */
171 /* #define RPLLDIV2XO 0x0004 - deprecated */
172 #define LCDVESATiming 0x0008
173 #define EnableLVDSDDA 0x0010
174 #define SetDispDevSwitchFlag 0x0020
175 #define CheckWinDos 0x0040
176 #define SetDOSMode 0x0080
178 /* TVMode flag */
179 #define TVSetPAL 0x0001
180 #define TVSetNTSCJ 0x0002
181 #define TVSetPALM 0x0004
182 #define TVSetPALN 0x0008
183 #define TVSetCHOverScan 0x0010
184 #define TVSetYPbPr525i 0x0020 /* new 0x10 */
185 #define TVSetYPbPr525p 0x0040 /* new 0x20 */
186 #define TVSetYPbPr750p 0x0080 /* new 0x40 */
187 #define TVSetHiVision 0x0100 /* new 0x80; = 1080i, software-wise identical */
188 #define TVSetTVSimuMode 0x0200 /* new 0x200, prev. 0x800 */
189 #define TVRPLLDIV2XO 0x0400 /* prev 0x1000 */
190 #define TVSetNTSC1024 0x0800 /* new 0x100, prev. 0x2000 */
191 #define TVAspect43 0x2000
192 #define TVAspect169 0x4000
193 #define TVAspect43LB 0x8000
195 /* YPbPr flag (>=315, <661; converted to TVMode) */
196 #define YPbPr525p 0x0001
197 #define YPbPr750p 0x0002
198 #define YPbPr525i 0x0004
199 #define YPbPrHiVision 0x0008
200 #define YPbPrModeMask (YPbPr750p | YPbPr525p | YPbPr525i | YPbPrHiVision)
202 /* SysFlags (to identify special versions) */
203 #define SF_Is651 0x0001
204 #define SF_IsM650 0x0002
205 #define SF_Is652 0x0004
206 #define SF_IsM652 0x0008
207 #define SF_IsM653 0x0010
208 #define SF_IsM661 0x0020
209 #define SF_IsM741 0x0040
210 #define SF_IsM760 0x0080
211 #define SF_760LFB 0x8000 /* 760: We have LFB */
213 /* CR32 (Newer 630, and 315 series)
215 [0] VB connected with CVBS
216 [1] VB connected with SVHS
217 [2] VB connected with SCART
218 [3] VB connected with LCD
219 [4] VB connected with CRT2 (secondary VGA)
220 [5] CRT1 monitor is connected
221 [6] VB connected with Hi-Vision TV
222 [7] <= 330: VB connected with DVI combo connector
223 >= 661: VB connected to YPbPr
226 /* CR35 (300 series only) */
227 #define TVOverScan 0x10
228 #define TVOverScanShift 4
230 /* CR35 (661 series only)
232 [0] 1 = PAL, 0 = NTSC
233 [1] 1 = NTSC-J (if D0 = 0)
234 [2] 1 = PALM (if D0 = 1)
235 [3] 1 = PALN (if D0 = 1)
236 [4] 1 = Overscan (Chrontel only)
237 [7:5] (only if D2 in CR38 is set)
238 000 525i
239 001 525p
240 010 750p
241 011 1080i (or HiVision on 301, 301B)
243 These bits are being translated to TVMode flag.
248 CR37
250 [0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
251 [3:1] External chip
252 300 series:
253 001 SiS301 (never seen)
254 010 LVDS
255 011 LVDS + Tumpion Zurac
256 100 LVDS + Chrontel 7005
257 110 Chrontel 7005
258 315/330 series
259 001 SiS30x (never seen)
260 010 LVDS
261 011 LVDS + Chrontel 7019
262 660 series [2:1] only:
263 reserved (now in CR38)
264 All other combinations reserved
265 [3] 661 only: Pass 1:1 data
266 [4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
267 30x: 0: Bridge scales / 1: Bridge does not scale = Panel scales (if possible)
268 [5] LCD polarity select
269 0: VESA DMT Standard
270 1: EDID 2.x defined
271 [6] LCD horizontal polarity select
272 0: High active
273 1: Low active
274 [7] LCD vertical polarity select
275 0: High active
276 1: Low active
279 /* CR37: LCDInfo */
280 #define LCDRGB18Bit 0x0001
281 #define LCDNonExpanding 0x0010
282 #define LCDSync 0x0020
283 #define LCDPass11 0x0100 /* 0: center screen, 1: Pass 1:1 data */
284 #define LCDDualLink 0x0200
286 #define DontExpandLCD LCDNonExpanding
287 #define LCDNonExpandingShift 4
288 #define DontExpandLCDShift LCDNonExpandingShift
289 #define LCDSyncBit 0x00e0
290 #define LCDSyncShift 6
292 /* CR38 (315 series) */
293 #define EnableDualEdge 0x01
294 #define SetToLCDA 0x02 /* LCD channel A (301C/302B/30x(E)LV and 650+LVDS only) */
295 #define EnableCHScart 0x04 /* Scart on Ch7019 (unofficial definition - TW) */
296 #define EnableCHYPbPr 0x08 /* YPbPr on Ch7019 (480i HDTV); only on 650/Ch7019 systems */
297 #define EnableSiSYPbPr 0x08 /* Enable YPbPr mode (30xLV/301C only) */
298 #define EnableYPbPr525i 0x00 /* Enable 525i YPbPr mode (30xLV/301C only) (mask 0x30) */
299 #define EnableYPbPr525p 0x10 /* Enable 525p YPbPr mode (30xLV/301C only) (mask 0x30) */
300 #define EnableYPbPr750p 0x20 /* Enable 750p YPbPr mode (30xLV/301C only) (mask 0x30) */
301 #define EnableYPbPr1080i 0x30 /* Enable 1080i YPbPr mode (30xLV/301C only) (mask 0x30) */
302 #define EnablePALM 0x40 /* 1 = Set PALM */
303 #define EnablePALN 0x80 /* 1 = Set PALN */
304 #define EnableNTSCJ EnablePALM /* Not BIOS */
306 /* CR38 (661 and later)
307 D[7:5] 000 No VB
308 001 301 series VB
309 010 LVDS
310 011 Chrontel 7019
311 100 Conexant
312 D2 Enable YPbPr output (see CR35)
313 D[1:0] LCDA (like before)
316 #define EnablePALMN 0x40 /* Romflag: 1 = Allow PALM/PALN */
318 /* CR39 (650 only) */
319 #define LCDPass1_1 0x01 /* 0: center screen, 1: pass 1:1 data output */
320 #define Enable302LV_DualLink 0x04 /* 302LV only; enable dual link */
322 /* CR39 (661 and later)
323 D[1:0] YPbPr Aspect Ratio
324 00 4:3 letterbox
325 01 4:3
326 10 16:9
327 11 4:3
330 /* CR3B (651+301C)
331 D[1:0] YPbPr Aspect Ratio
335 /* CR79 (315/330 series only; not 661 and later)
336 [3-0] Notify driver
337 0001 Mode Switch event (set by BIOS)
338 0010 Epansion On/Off event
339 0011 TV UnderScan/OverScan event
340 0100 Set Brightness event
341 0101 Set Contrast event
342 0110 Set Mute event
343 0111 Set Volume Up/Down event
344 [4] Enable Backlight Control by BIOS/driver
345 (set by driver; set means that the BIOS should
346 not touch the backlight registers because eg.
347 the driver already switched off the backlight)
348 [5] PAL/NTSC (set by BIOS)
349 [6] Expansion On/Off (set by BIOS; copied to CR32[4])
350 [7] TV UnderScan/OverScan (set by BIOS)
353 /* LCDResInfo */
354 #define Panel300_800x600 0x01 /* CR36 */
355 #define Panel300_1024x768 0x02
356 #define Panel300_1280x1024 0x03
357 #define Panel300_1280x960 0x04
358 #define Panel300_640x480 0x05
359 #define Panel300_1024x600 0x06
360 #define Panel300_1152x768 0x07
361 #define Panel300_1280x768 0x0a
362 #define Panel300_320x480 0x0e /* fstn - This is fake, can be any */
363 #define Panel300_Custom 0x0f
364 #define Panel300_Barco1366 0x10
366 #define Panel310_800x600 0x01
367 #define Panel310_1024x768 0x02
368 #define Panel310_1280x1024 0x03
369 #define Panel310_640x480 0x04
370 #define Panel310_1024x600 0x05
371 #define Panel310_1152x864 0x06
372 #define Panel310_1280x960 0x07
373 #define Panel310_1152x768 0x08 /* LVDS only */
374 #define Panel310_1400x1050 0x09
375 #define Panel310_1280x768 0x0a
376 #define Panel310_1600x1200 0x0b
377 #define Panel310_640x480_2 0x0c
378 #define Panel310_640x480_3 0x0d
379 #define Panel310_320x480 0x0e /* fstn - TW: This is fake, can be any */
380 #define Panel310_Custom 0x0f
382 #define Panel661_800x600 0x01
383 #define Panel661_1024x768 0x02
384 #define Panel661_1280x1024 0x03
385 #define Panel661_640x480 0x04
386 #define Panel661_1024x600 0x05
387 #define Panel661_1152x864 0x06
388 #define Panel661_1280x960 0x07
389 #define Panel661_1152x768 0x08
390 #define Panel661_1400x1050 0x09
391 #define Panel661_1280x768 0x0a
392 #define Panel661_1600x1200 0x0b
393 #define Panel661_1280x800 0x0c
394 #define Panel661_1680x1050 0x0d
395 #define Panel661_1280x720 0x0e
396 #define Panel661_Custom 0x0f
398 #define Panel_800x600 0x01 /* Unified values */
399 #define Panel_1024x768 0x02 /* MUST match BIOS values from 0-e */
400 #define Panel_1280x1024 0x03
401 #define Panel_640x480 0x04
402 #define Panel_1024x600 0x05
403 #define Panel_1152x864 0x06
404 #define Panel_1280x960 0x07
405 #define Panel_1152x768 0x08 /* LVDS only */
406 #define Panel_1400x1050 0x09
407 #define Panel_1280x768 0x0a /* 30xB/C and LVDS only (BIOS: all) */
408 #define Panel_1600x1200 0x0b
409 #define Panel_1280x800 0x0c /* 661etc (TMDS) */
410 #define Panel_1680x1050 0x0d /* 661etc */
411 #define Panel_1280x720 0x0e /* 661etc */
412 #define Panel_Custom 0x0f /* MUST BE 0x0f (for DVI DDC detection) */
413 #define Panel_320x480 0x10 /* SiS 550 fstn - TW: This is fake, can be any */
414 #define Panel_Barco1366 0x11
415 #define Panel_848x480 0x12
416 #define Panel_640x480_2 0x13 /* SiS 550 */
417 #define Panel_640x480_3 0x14 /* SiS 550 */
418 #define Panel_1280x768_2 0x15 /* 30xLV */
419 #define Panel_1280x768_3 0x16 /* (unused) */
420 #define Panel_1280x800_2 0x17 /* 30xLV */
422 /* Index in ModeResInfo table */
423 #define SIS_RI_320x200 0
424 #define SIS_RI_320x240 1
425 #define SIS_RI_320x400 2
426 #define SIS_RI_400x300 3
427 #define SIS_RI_512x384 4
428 #define SIS_RI_640x400 5
429 #define SIS_RI_640x480 6
430 #define SIS_RI_800x600 7
431 #define SIS_RI_1024x768 8
432 #define SIS_RI_1280x1024 9
433 #define SIS_RI_1600x1200 10
434 #define SIS_RI_1920x1440 11
435 #define SIS_RI_2048x1536 12
436 #define SIS_RI_720x480 13
437 #define SIS_RI_720x576 14
438 #define SIS_RI_1280x960 15
439 #define SIS_RI_800x480 16
440 #define SIS_RI_1024x576 17
441 #define SIS_RI_1280x720 18
442 #define SIS_RI_856x480 19
443 #define SIS_RI_1280x768 20
444 #define SIS_RI_1400x1050 21
445 #define SIS_RI_1152x864 22 /* Up to here SiS conforming */
446 #define SIS_RI_848x480 23
447 #define SIS_RI_1360x768 24
448 #define SIS_RI_1024x600 25
449 #define SIS_RI_1152x768 26
450 #define SIS_RI_768x576 27
451 #define SIS_RI_1360x1024 28
452 #define SIS_RI_1680x1050 29
453 #define SIS_RI_1280x800 30
454 #define SIS_RI_1920x1080 31
455 #define SIS_RI_960x540 32
456 #define SIS_RI_960x600 33
458 /* CR5F */
459 #define IsM650 0x80
461 /* Timing data */
462 #define NTSCHT 1716
463 #define NTSC2HT 1920
464 #define NTSCVT 525
465 #define PALHT 1728
466 #define PALVT 625
467 #define StHiTVHT 892
468 #define StHiTVVT 1126
469 #define StHiTextTVHT 1000
470 #define StHiTextTVVT 1126
471 #define ExtHiTVHT 2100
472 #define ExtHiTVVT 1125
474 /* Indices in (VB)VCLKData tables */
476 #define VCLK28 0x00 /* Index in VCLKData table (300 and 315) */
477 #define VCLK40 0x04 /* Index in VCLKData table (300 and 315) */
478 #define VCLK65_300 0x09 /* Index in VCLKData table (300) */
479 #define VCLK108_2_300 0x14 /* Index in VCLKData table (300) */
480 #define VCLK81_300 0x3f /* Index in VCLKData table (300) */
481 #define VCLK108_3_300 0x42 /* Index in VCLKData table (300) */
482 #define VCLK100_300 0x43 /* Index in VCLKData table (300) */
483 #define VCLK34_300 0x3d /* Index in VCLKData table (300) */
484 #define VCLK_CUSTOM_300 0x47
485 #define VCLK65_315 0x0b /* Index in (VB)VCLKData table (315) */
486 #define VCLK108_2_315 0x19 /* Index in (VB)VCLKData table (315) */
487 #define VCLK81_315 0x5b /* Index in (VB)VCLKData table (315) */
488 #define VCLK162_315 0x5e /* Index in (VB)VCLKData table (315) */
489 #define VCLK108_3_315 0x45 /* Index in VBVCLKData table (315) */
490 #define VCLK100_315 0x46 /* Index in VBVCLKData table (315) */
491 #define VCLK34_315 0x55
492 #define VCLK68_315 0x0d
493 #define VCLK_1280x800_315_2 0x5c /* Index in VBVCLKData table (315) */
494 #define VCLK121_315 0x5d /* Index in VBVCLKData table (315) */
495 #define VCLK_1280x720 0x5f
496 #define VCLK_1280x768_2 0x60
497 #define VCLK_1280x768_3 0x61 /* (unused?) */
498 #define VCLK_CUSTOM_315 0x62
499 #define VCLK_1280x720_2 0x63
500 #define VCLK_720x480 0x67
501 #define VCLK_720x576 0x68
502 #define VCLK_768x576 0x68
503 #define VCLK_848x480 0x65
504 #define VCLK_856x480 0x66
505 #define VCLK_800x480 0x65
506 #define VCLK_1024x576 0x51
507 #define VCLK_1152x864 0x64
508 #define VCLK_1360x768 0x58
509 #define VCLK_1280x800_315 0x6c
511 #define TVCLKBASE_300 0x21 /* Indices on TV clocks in VCLKData table (300) */
512 #define TVCLKBASE_315 0x3a /* Indices on TV clocks in (VB)VCLKData table (315) */
513 #define TVVCLKDIV2 0x00 /* Index relative to TVCLKBASE */
514 #define TVVCLK 0x01 /* Index relative to TVCLKBASE */
515 #define HiTVVCLKDIV2 0x02 /* Index relative to TVCLKBASE */
516 #define HiTVVCLK 0x03 /* Index relative to TVCLKBASE */
517 #define HiTVSimuVCLK 0x04 /* Index relative to TVCLKBASE */
518 #define HiTVTextVCLK 0x05 /* Index relative to TVCLKBASE */
519 #define YPbPr750pVCLK 0x25 /* Index relative to TVCLKBASE; was 0x0f NOT relative */
521 /* ------------------------------ */
523 #define SetSCARTOutput 0x01
525 #define HotPlugFunction 0x08
527 #define StStructSize 0x06
529 #define SIS_VIDEO_CAPTURE 0x00 - 0x30
530 #define SIS_VIDEO_PLAYBACK 0x02 - 0x30
531 #define SIS_CRT2_PORT_04 0x04 - 0x30
532 #define SIS_CRT2_PORT_10 0x10 - 0x30
533 #define SIS_CRT2_PORT_12 0x12 - 0x30
534 #define SIS_CRT2_PORT_14 0x14 - 0x30
536 #define ADR_CRT2PtrData 0x20E
537 #define offset_Zurac 0x210 /* TW: Trumpion Zurac data pointer */
538 #define ADR_LVDSDesPtrData 0x212
539 #define ADR_LVDSCRT1DataPtr 0x214
540 #define ADR_CHTVVCLKPtr 0x216
541 #define ADR_CHTVRegDataPtr 0x218
543 #define LCDDataLen 8
544 #define HiTVDataLen 12
545 #define TVDataLen 16
547 #define LVDSDataLen 6
548 #define LVDSDesDataLen 3
549 #define ActiveNonExpanding 0x40
550 #define ActiveNonExpandingShift 6
551 #define ActivePAL 0x20
552 #define ActivePALShift 5
553 #define ModeSwitchStatus 0x0F
554 #define SoftTVType 0x40
555 #define SoftSettingAddr 0x52
556 #define ModeSettingAddr 0x53
558 #define _PanelType00 0x00
559 #define _PanelType01 0x08
560 #define _PanelType02 0x10
561 #define _PanelType03 0x18
562 #define _PanelType04 0x20
563 #define _PanelType05 0x28
564 #define _PanelType06 0x30
565 #define _PanelType07 0x38
566 #define _PanelType08 0x40
567 #define _PanelType09 0x48
568 #define _PanelType0A 0x50
569 #define _PanelType0B 0x58
570 #define _PanelType0C 0x60
571 #define _PanelType0D 0x68
572 #define _PanelType0E 0x70
573 #define _PanelType0F 0x78
575 #define PRIMARY_VGA 0 /* 1: SiS is primary vga 0:SiS is secondary vga */
577 #define BIOSIDCodeAddr 0x235 /* Offsets to ptrs in BIOS image */
578 #define OEMUtilIDCodeAddr 0x237
579 #define VBModeIDTableAddr 0x239
580 #define OEMTVPtrAddr 0x241
581 #define PhaseTableAddr 0x243
582 #define NTSCFilterTableAddr 0x245
583 #define PALFilterTableAddr 0x247
584 #define OEMLCDPtr_1Addr 0x249
585 #define OEMLCDPtr_2Addr 0x24B
586 #define LCDHPosTable_1Addr 0x24D
587 #define LCDHPosTable_2Addr 0x24F
588 #define LCDVPosTable_1Addr 0x251
589 #define LCDVPosTable_2Addr 0x253
590 #define OEMLCDPIDTableAddr 0x255
592 #define VBModeStructSize 5
593 #define PhaseTableSize 4
594 #define FilterTableSize 4
595 #define LCDHPosTableSize 7
596 #define LCDVPosTableSize 5
597 #define OEMLVDSPIDTableSize 4
598 #define LVDSHPosTableSize 4
599 #define LVDSVPosTableSize 6
601 #define VB_ModeID 0
602 #define VB_TVTableIndex 1
603 #define VB_LCDTableIndex 2
604 #define VB_LCDHIndex 3
605 #define VB_LCDVIndex 4
607 #define OEMLCDEnable 0x0001
608 #define OEMLCDDelayEnable 0x0002
609 #define OEMLCDPOSEnable 0x0004
610 #define OEMTVEnable 0x0100
611 #define OEMTVDelayEnable 0x0200
612 #define OEMTVFlickerEnable 0x0400
613 #define OEMTVPhaseEnable 0x0800
614 #define OEMTVFilterEnable 0x1000
616 #define OEMLCDPanelIDSupport 0x0080
619 =============================================================
620 for 315 series (old data layout)
621 =============================================================
623 #define SoftDRAMType 0x80
624 #define SoftSetting_OFFSET 0x52
625 #define SR07_OFFSET 0x7C
626 #define SR15_OFFSET 0x7D
627 #define SR16_OFFSET 0x81
628 #define SR17_OFFSET 0x85
629 #define SR19_OFFSET 0x8D
630 #define SR1F_OFFSET 0x99
631 #define SR21_OFFSET 0x9A
632 #define SR22_OFFSET 0x9B
633 #define SR23_OFFSET 0x9C
634 #define SR24_OFFSET 0x9D
635 #define SR25_OFFSET 0x9E
636 #define SR31_OFFSET 0x9F
637 #define SR32_OFFSET 0xA0
638 #define SR33_OFFSET 0xA1
640 #define CR40_OFFSET 0xA2
641 #define SR25_1_OFFSET 0xF6
642 #define CR49_OFFSET 0xF7
644 #define VB310Data_1_2_Offset 0xB6
645 #define VB310Data_4_D_Offset 0xB7
646 #define VB310Data_4_E_Offset 0xB8
647 #define VB310Data_4_10_Offset 0xBB
649 #define RGBSenseDataOffset 0xBD
650 #define YCSenseDataOffset 0xBF
651 #define VideoSenseDataOffset 0xC1
652 #define OutputSelectOffset 0xF3
654 #define ECLK_MCLK_DISTANCE 0x14
655 #define VBIOSTablePointerStart 0x100
656 #define StandTablePtrOffset VBIOSTablePointerStart+0x02
657 #define EModeIDTablePtrOffset VBIOSTablePointerStart+0x04
658 #define CRT1TablePtrOffset VBIOSTablePointerStart+0x06
659 #define ScreenOffsetPtrOffset VBIOSTablePointerStart+0x08
660 #define VCLKDataPtrOffset VBIOSTablePointerStart+0x0A
661 #define MCLKDataPtrOffset VBIOSTablePointerStart+0x0E
662 #define CRT2PtrDataPtrOffset VBIOSTablePointerStart+0x10
663 #define TVAntiFlickPtrOffset VBIOSTablePointerStart+0x12
664 #define TVDelayPtr1Offset VBIOSTablePointerStart+0x14
665 #define TVPhaseIncrPtr1Offset VBIOSTablePointerStart+0x16
666 #define TVYFilterPtr1Offset VBIOSTablePointerStart+0x18
667 #define LCDDelayPtr1Offset VBIOSTablePointerStart+0x20
668 #define TVEdgePtr1Offset VBIOSTablePointerStart+0x24
669 #define CRT2Delay1Offset VBIOSTablePointerStart+0x28
671 #endif