[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / sound / oss / cs46xxpm.h
blob2932b6e0e0bbd3cce3aad92cc1d82a9c068c6225
1 /*******************************************************************************
3 * "cs46xxpm.h" -- Cirrus Logic-Crystal CS46XX linux audio driver.
5 * Copyright (C) 2000,2001 Cirrus Logic Corp.
6 * -- tom woller (twoller@crystal.cirrus.com) or
7 * (pcaudio@crystal.cirrus.com).
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * 12/22/00 trw - new file.
25 *******************************************************************************/
26 #ifndef __CS46XXPM_H
27 #define __CS46XXPM_H
29 #define CS46XX_AC97_HIGHESTREGTORESTORE 0x26
30 #define CS46XX_AC97_NUMBER_RESTORE_REGS (CS46XX_AC97_HIGHESTREGTORESTORE/2-1)
32 /* PM state defintions */
33 #define CS46XX_PM_NOT_REGISTERED 0x1000
34 #define CS46XX_PM_IDLE 0x0001
35 #define CS46XX_PM_SUSPENDING 0x0002
36 #define CS46XX_PM_SUSPENDED 0x0004
37 #define CS46XX_PM_RESUMING 0x0008
38 #define CS46XX_PM_RESUMED 0x0010
40 #define CS_POWER_DAC 0x0001
41 #define CS_POWER_ADC 0x0002
42 #define CS_POWER_MIXVON 0x0004
43 #define CS_POWER_MIXVOFF 0x0008
44 #define CS_AC97_POWER_CONTROL_ON 0xf000 /* always on bits (inverted) */
45 #define CS_AC97_POWER_CONTROL_ADC 0x0100
46 #define CS_AC97_POWER_CONTROL_DAC 0x0200
47 #define CS_AC97_POWER_CONTROL_MIXVON 0x0400
48 #define CS_AC97_POWER_CONTROL_MIXVOFF 0x0800
49 #define CS_AC97_POWER_CONTROL_ADC_ON 0x0001
50 #define CS_AC97_POWER_CONTROL_DAC_ON 0x0002
51 #define CS_AC97_POWER_CONTROL_MIXVON_ON 0x0004
52 #define CS_AC97_POWER_CONTROL_MIXVOFF_ON 0x0008
54 struct cs46xx_pm {
55 unsigned long flags;
56 u32 u32CLKCR1_SAVE,u32SSPMValue,u32PPLVCvalue,u32PPRVCvalue;
57 u32 u32FMLVCvalue,u32FMRVCvalue,u32GPIORvalue,u32JSCTLvalue,u32SSCR;
58 u32 u32SRCSA,u32DacASR,u32AdcASR,u32DacSR,u32AdcSR,u32MIDCR_Save;
59 u32 u32SSPM_BITS;
60 u32 ac97[CS46XX_AC97_NUMBER_RESTORE_REGS];
61 u32 u32AC97_master_volume, u32AC97_headphone_volume, u32AC97_master_volume_mono;
62 u32 u32AC97_pcm_out_volume, u32AC97_powerdown, u32AC97_general_purpose;
63 u32 u32hwptr_playback,u32hwptr_capture;
64 unsigned dmabuf_swptr_play;
65 int dmabuf_count_play;
66 unsigned dmabuf_swptr_capture;
67 int dmabuf_count_capture;
70 #endif