[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / sound / oss / gus_hw.h
blobf97a0b8670e3ff93727cd03b7a01e6ef71ed588b
2 /*
3 * I/O addresses
4 */
6 #define u_Base (gus_base + 0x000)
7 #define u_Mixer u_Base
8 #define u_Status (gus_base + 0x006)
9 #define u_TimerControl (gus_base + 0x008)
10 #define u_TimerData (gus_base + 0x009)
11 #define u_IRQDMAControl (gus_base + 0x00b)
12 #define u_MidiControl (gus_base + 0x100)
13 #define MIDI_RESET 0x03
14 #define MIDI_ENABLE_XMIT 0x20
15 #define MIDI_ENABLE_RCV 0x80
16 #define u_MidiStatus u_MidiControl
17 #define MIDI_RCV_FULL 0x01
18 #define MIDI_XMIT_EMPTY 0x02
19 #define MIDI_FRAME_ERR 0x10
20 #define MIDI_OVERRUN 0x20
21 #define MIDI_IRQ_PEND 0x80
22 #define u_MidiData (gus_base + 0x101)
23 #define u_Voice (gus_base + 0x102)
24 #define u_Command (gus_base + 0x103)
25 #define u_DataLo (gus_base + 0x104)
26 #define u_DataHi (gus_base + 0x105)
27 #define u_MixData (gus_base + 0x106) /* Rev. 3.7+ mixing */
28 #define u_MixSelect (gus_base + 0x506) /* registers. */
29 #define u_IrqStatus u_Status
30 # define MIDI_TX_IRQ 0x01 /* pending MIDI xmit IRQ */
31 # define MIDI_RX_IRQ 0x02 /* pending MIDI recv IRQ */
32 # define GF1_TIMER1_IRQ 0x04 /* general purpose timer */
33 # define GF1_TIMER2_IRQ 0x08 /* general purpose timer */
34 # define WAVETABLE_IRQ 0x20 /* pending wavetable IRQ */
35 # define ENVELOPE_IRQ 0x40 /* pending volume envelope IRQ */
36 # define DMA_TC_IRQ 0x80 /* pending dma tc IRQ */
38 #define ICS2101 1
39 # define ICS_MIXDEVS 6
40 # define DEV_MIC 0
41 # define DEV_LINE 1
42 # define DEV_CD 2
43 # define DEV_GF1 3
44 # define DEV_UNUSED 4
45 # define DEV_VOL 5
47 # define CHN_LEFT 0
48 # define CHN_RIGHT 1
49 #define CS4231 2
50 #define u_DRAMIO (gus_base + 0x107)