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[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / sound / pci / atiixp_modem.c
blobfb7cecea846d069334d0b83e84401790ec6e78fc
1 /*
2 * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #include <sound/driver.h>
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
36
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP MC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
41
42 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
43 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
44 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
45 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
46
47 module_param_array(index, int, NULL, 0444);
48 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
49 module_param_array(id, charp, NULL, 0444);
50 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
51 module_param_array(enable, bool, NULL, 0444);
52 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
53 module_param_array(ac97_clock, int, NULL, 0444);
54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
55
56
57 /*
58 */
59
60 #define ATI_REG_ISR 0x00 /* interrupt source */
61 #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
62 #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
63 #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
64 #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
65 #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
66 #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
67 #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
68 #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
69 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
70 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
71 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
72 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
73 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
74 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
75 #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
76
77 #define ATI_REG_IER 0x04 /* interrupt enable */
78 #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
79 #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
80 #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
81 #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
82 #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
83 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
84 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
85 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
86 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
87 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
88 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
89 #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
90 #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
91
92 #define ATI_REG_CMD 0x08 /* command */
93 #define ATI_REG_CMD_POWERDOWN (1U<<0)
94 #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
95 #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
96 #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
97 #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
98 #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
99 #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
100 #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
101 #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
102 #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
103 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
104 #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
105 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
106 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
107 #define ATI_REG_CMD_BURST_EN (1U<<25)
108 #define ATI_REG_CMD_PANIC_EN (1U<<26)
109 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
110 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
111 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
112 #define ATI_REG_CMD_AC_SYNC (1U<<30)
113 #define ATI_REG_CMD_AC_RESET (1U<<31)
114
115 #define ATI_REG_PHYS_OUT_ADDR 0x0c
116 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
117 #define ATI_REG_PHYS_OUT_RW (1U<<2)
118 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
119 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
120 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
121
122 #define ATI_REG_PHYS_IN_ADDR 0x10
123 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
124 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
125 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
126
127 #define ATI_REG_SLOTREQ 0x14
128
129 #define ATI_REG_COUNTER 0x18
130 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
131 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
132
133 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
134
135 #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
136 #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
137 #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
138 #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
139 #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
140 #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
141 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
142 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
143 #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
144 #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
145 #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
146 #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
147 #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
148 #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
149 #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
150 #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
151 #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
152 #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
153 #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
154 #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
155 #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
156 #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
157 #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
158 #define ATI_REG_MODEM_OUT_GPIO 0x74
159 #define ATI_REG_MODEM_OUT_GPIO_EN 1
160 #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
161 #define ATI_REG_MODEM_IN_GPIO 0x78
162
163 #define ATI_REG_MODEM_MIRROR 0x7c
164 #define ATI_REG_AUDIO_MIRROR 0x80
165
166 #define ATI_REG_MODEM_FIFO_FLUSH 0x88
167 #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
168 #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
169 #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
170 #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
171
172 /* LINKPTR */
173 #define ATI_REG_LINKPTR_EN (1U<<0)
174
175 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
176
177
178 /*
179 */
180
181 typedef struct snd_atiixp atiixp_t;
182 typedef struct snd_atiixp_dma atiixp_dma_t;
183 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
184
185
186 /*
187 * DMA packate descriptor
188 */
189
190 typedef struct atiixp_dma_desc {
191 u32 addr; /* DMA buffer address */
192 u16 status; /* status bits */
193 u16 size; /* size of the packet in dwords */
194 u32 next; /* address of the next packet descriptor */
195 } atiixp_dma_desc_t;
196
197 /*
198 * stream enum
199 */
200 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
201 enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
202 enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
203
204 #define NUM_ATI_CODECS 3
205
206
207 /*
208 * constants and callbacks for each DMA type
209 */
210 struct snd_atiixp_dma_ops {
211 int type; /* ATI_DMA_XXX */
212 unsigned int llp_offset; /* LINKPTR offset */
213 unsigned int dt_cur; /* DT_CUR offset */
214 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
215 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
216 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
217 };
218
219 /*
220 * DMA stream
221 */
222 struct snd_atiixp_dma {
223 const atiixp_dma_ops_t *ops;
224 struct snd_dma_buffer desc_buf;
225 snd_pcm_substream_t *substream; /* assigned PCM substream */
226 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
227 unsigned int period_bytes, periods;
228 int opened;
229 int running;
230 int pcm_open_flag;
231 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
232 };
233
234 /*
235 * ATI IXP chip
236 */
237 struct snd_atiixp {
238 snd_card_t *card;
239 struct pci_dev *pci;
240
241 struct resource *res; /* memory i/o */
242 unsigned long addr;
243 void __iomem *remap_addr;
244 int irq;
245
246 ac97_bus_t *ac97_bus;
247 ac97_t *ac97[NUM_ATI_CODECS];
248
249 spinlock_t reg_lock;
250
251 atiixp_dma_t dmas[NUM_ATI_DMAS];
252 struct ac97_pcm *pcms[NUM_ATI_PCMS];
253 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
254
255 int max_channels; /* max. channels for PCM out */
256
257 unsigned int codec_not_ready_bits; /* for codec detection */
258
259 int spdif_over_aclink; /* passed from the module option */
260 struct semaphore open_mutex; /* playback open mutex */
261 };
262
263
264 /*
265 */
266 static struct pci_device_id snd_atiixp_ids[] = {
267 { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
268 { 0, }
269 };
270
271 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
272
273
274 /*
275 * lowlevel functions
276 */
277
278 /*
279 * update the bits of the given register.
280 * return 1 if the bits changed.
281 */
282 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
283 unsigned int mask, unsigned int value)
284 {
285 void __iomem *addr = chip->remap_addr + reg;
286 unsigned int data, old_data;
287 old_data = data = readl(addr);
288 data &= ~mask;
289 data |= value;
290 if (old_data == data)
291 return 0;
292 writel(data, addr);
293 return 1;
294 }
295
296 /*
297 * macros for easy use
298 */
299 #define atiixp_write(chip,reg,value) \
300 writel(value, chip->remap_addr + ATI_REG_##reg)
301 #define atiixp_read(chip,reg) \
302 readl(chip->remap_addr + ATI_REG_##reg)
303 #define atiixp_update(chip,reg,mask,val) \
304 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
305
306 /* delay for one tick */
307 #define do_delay() do { \
308 set_current_state(TASK_UNINTERRUPTIBLE); \
309 schedule_timeout(1); \
310 } while (0)
311
312
313 /*
314 * handling DMA packets
315 *
316 * we allocate a linear buffer for the DMA, and split it to each packet.
317 * in a future version, a scatter-gather buffer should be implemented.
318 */
319
320 #define ATI_DESC_LIST_SIZE \
321 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
322
323 /*
324 * build packets ring for the given buffer size.
325 *
326 * IXP handles the buffer descriptors, which are connected as a linked
327 * list. although we can change the list dynamically, in this version,
328 * a static RING of buffer descriptors is used.
329 *
330 * the ring is built in this function, and is set up to the hardware.
331 */
332 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
333 snd_pcm_substream_t *substream,
334 unsigned int periods,
335 unsigned int period_bytes)
336 {
337 unsigned int i;
338 u32 addr, desc_addr;
339 unsigned long flags;
340
341 if (periods > ATI_MAX_DESCRIPTORS)
342 return -ENOMEM;
343
344 if (dma->desc_buf.area == NULL) {
345 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
346 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
347 return -ENOMEM;
348 dma->period_bytes = dma->periods = 0; /* clear */
349 }
350
351 if (dma->periods == periods && dma->period_bytes == period_bytes)
352 return 0;
353
354 /* reset DMA before changing the descriptor table */
355 spin_lock_irqsave(&chip->reg_lock, flags);
356 writel(0, chip->remap_addr + dma->ops->llp_offset);
357 dma->ops->enable_dma(chip, 0);
358 dma->ops->enable_dma(chip, 1);
359 spin_unlock_irqrestore(&chip->reg_lock, flags);
360
361 /* fill the entries */
362 addr = (u32)substream->runtime->dma_addr;
363 desc_addr = (u32)dma->desc_buf.addr;
364 for (i = 0; i < periods; i++) {
365 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
366 desc->addr = cpu_to_le32(addr);
367 desc->status = 0;
368 desc->size = period_bytes >> 2; /* in dwords */
369 desc_addr += sizeof(atiixp_dma_desc_t);
370 if (i == periods - 1)
371 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
372 else
373 desc->next = cpu_to_le32(desc_addr);
374 addr += period_bytes;
375 }
376
377 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
378 chip->remap_addr + dma->ops->llp_offset);
379
380 dma->period_bytes = period_bytes;
381 dma->periods = periods;
382
383 return 0;
384 }
385
386 /*
387 * remove the ring buffer and release it if assigned
388 */
389 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
390 {
391 if (dma->desc_buf.area) {
392 writel(0, chip->remap_addr + dma->ops->llp_offset);
393 snd_dma_free_pages(&dma->desc_buf);
394 dma->desc_buf.area = NULL;
395 }
396 }
397
398 /*
399 * AC97 interface
400 */
401 static int snd_atiixp_acquire_codec(atiixp_t *chip)
402 {
403 int timeout = 1000;
404
405 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
406 if (! timeout--) {
407 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
408 return -EBUSY;
409 }
410 udelay(1);
411 }
412 return 0;
413 }
414
415 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
416 {
417 unsigned int data;
418 int timeout;
419
420 if (snd_atiixp_acquire_codec(chip) < 0)
421 return 0xffff;
422 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
423 ATI_REG_PHYS_OUT_ADDR_EN |
424 ATI_REG_PHYS_OUT_RW |
425 codec;
426 atiixp_write(chip, PHYS_OUT_ADDR, data);
427 if (snd_atiixp_acquire_codec(chip) < 0)
428 return 0xffff;
429 timeout = 1000;
430 do {
431 data = atiixp_read(chip, PHYS_IN_ADDR);
432 if (data & ATI_REG_PHYS_IN_READ_FLAG)
433 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
434 udelay(1);
435 } while (--timeout);
436 /* time out may happen during reset */
437 if (reg < 0x7c)
438 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
439 return 0xffff;
440 }
441
442
443 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
444 {
445 unsigned int data;
446
447 if (snd_atiixp_acquire_codec(chip) < 0)
448 return;
449 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
450 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
451 ATI_REG_PHYS_OUT_ADDR_EN | codec;
452 atiixp_write(chip, PHYS_OUT_ADDR, data);
453 }
454
455
456 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
457 {
458 atiixp_t *chip = ac97->private_data;
459 return snd_atiixp_codec_read(chip, ac97->num, reg);
460
461 }
462
463 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
464 {
465 atiixp_t *chip = ac97->private_data;
466 snd_atiixp_codec_write(chip, ac97->num, reg, val);
467 }
468
469 /*
470 * reset AC link
471 */
472 static int snd_atiixp_aclink_reset(atiixp_t *chip)
473 {
474 int timeout;
475
476 /* reset powerdoewn */
477 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
478 udelay(10);
479
480 /* perform a software reset */
481 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
482 atiixp_read(chip, CMD);
483 udelay(10);
484 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
485
486 timeout = 10;
487 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
488 /* do a hard reset */
489 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
490 ATI_REG_CMD_AC_SYNC);
491 atiixp_read(chip, CMD);
492 do_delay();
493 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
494 if (--timeout) {
495 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
496 break;
497 }
498 }
499
500 /* deassert RESET and assert SYNC to make sure */
501 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
502 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
503
504 return 0;
505 }
506
507 #ifdef CONFIG_PM
508 static int snd_atiixp_aclink_down(atiixp_t *chip)
509 {
510 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
511 // return -EBUSY;
512 atiixp_update(chip, CMD,
513 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
514 ATI_REG_CMD_POWERDOWN);
515 return 0;
516 }
517 #endif
518
519 /*
520 * auto-detection of codecs
521 *
522 * the IXP chip can generate interrupts for the non-existing codecs.
523 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
524 * even if all three codecs are connected.
525 */
526
527 #define ALL_CODEC_NOT_READY \
528 (ATI_REG_ISR_CODEC0_NOT_READY |\
529 ATI_REG_ISR_CODEC1_NOT_READY |\
530 ATI_REG_ISR_CODEC2_NOT_READY)
531 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
532
533 static int snd_atiixp_codec_detect(atiixp_t *chip)
534 {
535 int timeout;
536
537 chip->codec_not_ready_bits = 0;
538 atiixp_write(chip, IER, CODEC_CHECK_BITS);
539 /* wait for the interrupts */
540 timeout = HZ / 10;
541 while (timeout-- > 0) {
542 do_delay();
543 if (chip->codec_not_ready_bits)
544 break;
545 }
546 atiixp_write(chip, IER, 0); /* disable irqs */
547
548 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
549 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
550 return -ENXIO;
551 }
552 return 0;
553 }
554
555
556 /*
557 * enable DMA and irqs
558 */
559 static int snd_atiixp_chip_start(atiixp_t *chip)
560 {
561 unsigned int reg;
562
563 /* set up spdif, enable burst mode */
564 reg = atiixp_read(chip, CMD);
565 reg |= ATI_REG_CMD_BURST_EN;
566 if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
567 reg |= ATI_REG_CMD_MODEM_PRESENT;
568 atiixp_write(chip, CMD, reg);
569
570 /* clear all interrupt source */
571 atiixp_write(chip, ISR, 0xffffffff);
572 /* enable irqs */
573 atiixp_write(chip, IER,
574 ATI_REG_IER_MODEM_STATUS_EN |
575 ATI_REG_IER_MODEM_IN_XRUN_EN |
576 ATI_REG_IER_MODEM_OUT1_XRUN_EN);
577 return 0;
578 }
579
580
581 /*
582 * disable DMA and IRQs
583 */
584 static int snd_atiixp_chip_stop(atiixp_t *chip)
585 {
586 /* clear interrupt source */
587 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
588 /* disable irqs */
589 atiixp_write(chip, IER, 0);
590 return 0;
591 }
592
593
594 /*
595 * PCM section
596 */
597
598 /*
599 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
600 * position. when SG-buffer is implemented, the offset must be calculated
601 * correctly...
602 */
603 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
604 {
605 atiixp_t *chip = snd_pcm_substream_chip(substream);
606 snd_pcm_runtime_t *runtime = substream->runtime;
607 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
608 unsigned int curptr;
609 int timeout = 1000;
610
611 while (timeout--) {
612 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
613 if (curptr < dma->buf_addr)
614 continue;
615 curptr -= dma->buf_addr;
616 if (curptr >= dma->buf_bytes)
617 continue;
618 return bytes_to_frames(runtime, curptr);
619 }
620 snd_printd("atiixp-modem: invalid DMA pointer read 0x%x (buf=%x)\n",
621 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
622 return 0;
623 }
624
625 /*
626 * XRUN detected, and stop the PCM substream
627 */
628 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
629 {
630 if (! dma->substream || ! dma->running)
631 return;
632 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
633 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
634 }
635
636 /*
637 * the period ack. update the substream.
638 */
639 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
640 {
641 if (! dma->substream || ! dma->running)
642 return;
643 snd_pcm_period_elapsed(dma->substream);
644 }
645
646 /* set BUS_BUSY interrupt bit if any DMA is running */
647 /* call with spinlock held */
648 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
649 {
650 unsigned int bus_busy;
651 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
652 ATI_REG_CMD_MODEM_RECEIVE_EN))
653 bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
654 else
655 bus_busy = 0;
656 atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
657 }
658
659 /* common trigger callback
660 * calling the lowlevel callbacks in it
661 */
662 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
663 {
664 atiixp_t *chip = snd_pcm_substream_chip(substream);
665 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
666 unsigned int reg = 0;
667 int i;
668
669 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
670
671 if (cmd != SNDRV_PCM_TRIGGER_START && cmd != SNDRV_PCM_TRIGGER_STOP)
672 return -EINVAL;
673
674 spin_lock(&chip->reg_lock);
675
676 /* hook off/on: via GPIO_OUT */
677 for (i = 0; i < NUM_ATI_CODECS; i++) {
678 if (chip->ac97[i]) {
679 reg = snd_ac97_read(chip->ac97[i], AC97_GPIO_STATUS);
680 break;
681 }
682 }
683 if(cmd == SNDRV_PCM_TRIGGER_START)
684 reg |= AC97_GPIO_LINE1_OH;
685 else
686 reg &= ~AC97_GPIO_LINE1_OH;
687 reg = (reg << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN ;
688 atiixp_write(chip, MODEM_OUT_GPIO, reg);
689
690 if (cmd == SNDRV_PCM_TRIGGER_START) {
691 dma->ops->enable_transfer(chip, 1);
692 dma->running = 1;
693 } else {
694 dma->ops->enable_transfer(chip, 0);
695 dma->running = 0;
696 }
697 snd_atiixp_check_bus_busy(chip);
698 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
699 dma->ops->flush_dma(chip);
700 snd_atiixp_check_bus_busy(chip);
701 }
702 spin_unlock(&chip->reg_lock);
703 return 0;
704 }
705
706
707 /*
708 * lowlevel callbacks for each DMA type
709 *
710 * every callback is supposed to be called in chip->reg_lock spinlock
711 */
712
713 /* flush FIFO of analog OUT DMA */
714 static void atiixp_out_flush_dma(atiixp_t *chip)
715 {
716 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
717 }
718
719 /* enable/disable analog OUT DMA */
720 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
721 {
722 unsigned int data;
723 data = atiixp_read(chip, CMD);
724 if (on) {
725 if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
726 return;
727 atiixp_out_flush_dma(chip);
728 data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
729 } else
730 data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
731 atiixp_write(chip, CMD, data);
732 }
733
734 /* start/stop transfer over OUT DMA */
735 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
736 {
737 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
738 on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
739 }
740
741 /* enable/disable analog IN DMA */
742 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
743 {
744 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
745 on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
746 }
747
748 /* start/stop analog IN DMA */
749 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
750 {
751 if (on) {
752 unsigned int data = atiixp_read(chip, CMD);
753 if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
754 data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
755 atiixp_write(chip, CMD, data);
756 }
757 } else
758 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
759 }
760
761 /* flush FIFO of analog IN DMA */
762 static void atiixp_in_flush_dma(atiixp_t *chip)
763 {
764 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
765 }
766
767 /* set up slots and formats for analog OUT */
768 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
769 {
770 atiixp_t *chip = snd_pcm_substream_chip(substream);
771 unsigned int data;
772
773 spin_lock_irq(&chip->reg_lock);
774 /* set output threshold */
775 data = atiixp_read(chip, MODEM_OUT_FIFO);
776 data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
777 data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
778 atiixp_write(chip, MODEM_OUT_FIFO, data);
779 spin_unlock_irq(&chip->reg_lock);
780 return 0;
781 }
782
783 /* set up slots and formats for analog IN */
784 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
785 {
786 return 0;
787 }
788
789 /*
790 * hw_params - allocate the buffer and set up buffer descriptors
791 */
792 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
793 snd_pcm_hw_params_t *hw_params)
794 {
795 atiixp_t *chip = snd_pcm_substream_chip(substream);
796 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
797 int err;
798 int i;
799
800 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
801 if (err < 0)
802 return err;
803 dma->buf_addr = substream->runtime->dma_addr;
804 dma->buf_bytes = params_buffer_bytes(hw_params);
805
806 err = atiixp_build_dma_packets(chip, dma, substream,
807 params_periods(hw_params),
808 params_period_bytes(hw_params));
809 if (err < 0)
810 return err;
811
812 /* set up modem rate */
813 for (i = 0; i < NUM_ATI_CODECS; i++) {
814 if (! chip->ac97[i])
815 continue;
816 snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
817 snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
818 }
819
820 return err;
821 }
822
823 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
824 {
825 atiixp_t *chip = snd_pcm_substream_chip(substream);
826 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
827
828 atiixp_clear_dma_packets(chip, dma, substream);
829 snd_pcm_lib_free_pages(substream);
830 return 0;
831 }
832
833
834 /*
835 * pcm hardware definition, identical for all DMA types
836 */
837 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
838 {
839 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
840 SNDRV_PCM_INFO_BLOCK_TRANSFER |
841 SNDRV_PCM_INFO_MMAP_VALID),
842 .formats = SNDRV_PCM_FMTBIT_S16_LE,
843 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_KNOT,
844 .rate_min = 8000,
845 .rate_max = 16000,
846 .channels_min = 2,
847 .channels_max = 2,
848 .buffer_bytes_max = 256 * 1024,
849 .period_bytes_min = 32,
850 .period_bytes_max = 128 * 1024,
851 .periods_min = 2,
852 .periods_max = ATI_MAX_DESCRIPTORS,
853 };
854
855 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
856 {
857 atiixp_t *chip = snd_pcm_substream_chip(substream);
858 snd_pcm_runtime_t *runtime = substream->runtime;
859 int err;
860 static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
861 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
862 .count = ARRAY_SIZE(rates),
863 .list = rates,
864 .mask = 0,
865 };
866
867 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
868
869 if (dma->opened)
870 return -EBUSY;
871 dma->substream = substream;
872 runtime->hw = snd_atiixp_pcm_hw;
873 dma->ac97_pcm_type = pcm_type;
874 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
875 return err;
876 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
877 return err;
878 runtime->private_data = dma;
879
880 /* enable DMA bits */
881 spin_lock_irq(&chip->reg_lock);
882 dma->ops->enable_dma(chip, 1);
883 spin_unlock_irq(&chip->reg_lock);
884 dma->opened = 1;
885
886 return 0;
887 }
888
889 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
890 {
891 atiixp_t *chip = snd_pcm_substream_chip(substream);
892 /* disable DMA bits */
893 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
894 spin_lock_irq(&chip->reg_lock);
895 dma->ops->enable_dma(chip, 0);
896 spin_unlock_irq(&chip->reg_lock);
897 dma->substream = NULL;
898 dma->opened = 0;
899 return 0;
900 }
901
902 /*
903 */
904 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
905 {
906 atiixp_t *chip = snd_pcm_substream_chip(substream);
907 int err;
908
909 down(&chip->open_mutex);
910 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
911 up(&chip->open_mutex);
912 if (err < 0)
913 return err;
914 return 0;
915 }
916
917 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
918 {
919 atiixp_t *chip = snd_pcm_substream_chip(substream);
920 int err;
921 down(&chip->open_mutex);
922 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
923 up(&chip->open_mutex);
924 return err;
925 }
926
927 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
928 {
929 atiixp_t *chip = snd_pcm_substream_chip(substream);
930 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
931 }
932
933 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
934 {
935 atiixp_t *chip = snd_pcm_substream_chip(substream);
936 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
937 }
938
939
940 /* AC97 playback */
941 static snd_pcm_ops_t snd_atiixp_playback_ops = {
942 .open = snd_atiixp_playback_open,
943 .close = snd_atiixp_playback_close,
944 .ioctl = snd_pcm_lib_ioctl,
945 .hw_params = snd_atiixp_pcm_hw_params,
946 .hw_free = snd_atiixp_pcm_hw_free,
947 .prepare = snd_atiixp_playback_prepare,
948 .trigger = snd_atiixp_pcm_trigger,
949 .pointer = snd_atiixp_pcm_pointer,
950 };
951
952 /* AC97 capture */
953 static snd_pcm_ops_t snd_atiixp_capture_ops = {
954 .open = snd_atiixp_capture_open,
955 .close = snd_atiixp_capture_close,
956 .ioctl = snd_pcm_lib_ioctl,
957 .hw_params = snd_atiixp_pcm_hw_params,
958 .hw_free = snd_atiixp_pcm_hw_free,
959 .prepare = snd_atiixp_capture_prepare,
960 .trigger = snd_atiixp_pcm_trigger,
961 .pointer = snd_atiixp_pcm_pointer,
962 };
963
964 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
965 .type = ATI_DMA_PLAYBACK,
966 .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
967 .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
968 .enable_dma = atiixp_out_enable_dma,
969 .enable_transfer = atiixp_out_enable_transfer,
970 .flush_dma = atiixp_out_flush_dma,
971 };
972
973 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
974 .type = ATI_DMA_CAPTURE,
975 .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
976 .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
977 .enable_dma = atiixp_in_enable_dma,
978 .enable_transfer = atiixp_in_enable_transfer,
979 .flush_dma = atiixp_in_flush_dma,
980 };
981
982 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
983 {
984 snd_pcm_t *pcm;
985 int err;
986
987 /* initialize constants */
988 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
989 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
990
991 /* PCM #0: analog I/O */
992 err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
993 if (err < 0)
994 return err;
995 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
996 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
997 pcm->private_data = chip;
998 strcpy(pcm->name, "ATI IXP MC97");
999 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1000
1001 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1002 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1003
1004 return 0;
1005 }
1006
1007
1008
1009 /*
1010 * interrupt handler
1011 */
1012 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1013 {
1014 atiixp_t *chip = dev_id;
1015 unsigned int status;
1016
1017 status = atiixp_read(chip, ISR);
1018
1019 if (! status)
1020 return IRQ_NONE;
1021
1022 /* process audio DMA */
1023 if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
1024 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1025 else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
1026 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1027 if (status & ATI_REG_ISR_MODEM_IN_XRUN)
1028 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1029 else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
1030 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1031
1032 /* for codec detection */
1033 if (status & CODEC_CHECK_BITS) {
1034 unsigned int detected;
1035 detected = status & CODEC_CHECK_BITS;
1036 spin_lock(&chip->reg_lock);
1037 chip->codec_not_ready_bits |= detected;
1038 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1039 spin_unlock(&chip->reg_lock);
1040 }
1041
1042 /* ack */
1043 atiixp_write(chip, ISR, status);
1044
1045 return IRQ_HANDLED;
1046 }
1047
1048
1049 /*
1050 * ac97 mixer section
1051 */
1052
1053 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1054 {
1055 ac97_bus_t *pbus;
1056 ac97_template_t ac97;
1057 int i, err;
1058 int codec_count;
1059 static ac97_bus_ops_t ops = {
1060 .write = snd_atiixp_ac97_write,
1061 .read = snd_atiixp_ac97_read,
1062 };
1063 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1064 ATI_REG_ISR_CODEC0_NOT_READY,
1065 ATI_REG_ISR_CODEC1_NOT_READY,
1066 ATI_REG_ISR_CODEC2_NOT_READY,
1067 };
1068
1069 if (snd_atiixp_codec_detect(chip) < 0)
1070 return -ENXIO;
1071
1072 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1073 return err;
1074 pbus->clock = clock;
1075 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with audio driver */
1076 chip->ac97_bus = pbus;
1077
1078 codec_count = 0;
1079 for (i = 0; i < NUM_ATI_CODECS; i++) {
1080 if (chip->codec_not_ready_bits & codec_skip[i])
1081 continue;
1082 memset(&ac97, 0, sizeof(ac97));
1083 ac97.private_data = chip;
1084 ac97.pci = chip->pci;
1085 ac97.num = i;
1086 ac97.scaps = AC97_SCAP_SKIP_AUDIO;
1087 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1088 chip->ac97[i] = NULL; /* to be sure */
1089 snd_printdd("atiixp: codec %d not available for modem\n", i);
1090 continue;
1091 }
1092 codec_count++;
1093 }
1094
1095 if (! codec_count) {
1096 snd_printk(KERN_ERR "atiixp: no codec available\n");
1097 return -ENODEV;
1098 }
1099
1100 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1101
1102 return 0;
1103 }
1104
1105
1106 #ifdef CONFIG_PM
1107 /*
1108 * power management
1109 */
1110 static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
1111 {
1112 atiixp_t *chip = card->pm_private_data;
1113 int i;
1114
1115 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1116 if (chip->pcmdevs[i])
1117 snd_pcm_suspend_all(chip->pcmdevs[i]);
1118 for (i = 0; i < NUM_ATI_CODECS; i++)
1119 if (chip->ac97[i])
1120 snd_ac97_suspend(chip->ac97[i]);
1121 snd_atiixp_aclink_down(chip);
1122 snd_atiixp_chip_stop(chip);
1123
1124 pci_set_power_state(chip->pci, PCI_D3hot);
1125 pci_disable_device(chip->pci);
1126 return 0;
1127 }
1128
1129 static int snd_atiixp_resume(snd_card_t *card)
1130 {
1131 atiixp_t *chip = card->pm_private_data;
1132 int i;
1133
1134 pci_enable_device(chip->pci);
1135 pci_set_power_state(chip->pci, PCI_D0);
1136 pci_set_master(chip->pci);
1137
1138 snd_atiixp_aclink_reset(chip);
1139 snd_atiixp_chip_start(chip);
1140
1141 for (i = 0; i < NUM_ATI_CODECS; i++)
1142 if (chip->ac97[i])
1143 snd_ac97_resume(chip->ac97[i]);
1144
1145 return 0;
1146 }
1147 #endif /* CONFIG_PM */
1148
1149
1150 /*
1151 * proc interface for register dump
1152 */
1153
1154 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1155 {
1156 atiixp_t *chip = entry->private_data;
1157 int i;
1158
1159 for (i = 0; i < 256; i += 4)
1160 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1161 }
1162
1163 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1164 {
1165 snd_info_entry_t *entry;
1166
1167 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1168 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1169 }
1170
1171
1172
1173 /*
1174 * destructor
1175 */
1176
1177 static int snd_atiixp_free(atiixp_t *chip)
1178 {
1179 if (chip->irq < 0)
1180 goto __hw_end;
1181 snd_atiixp_chip_stop(chip);
1182 synchronize_irq(chip->irq);
1183 __hw_end:
1184 if (chip->irq >= 0)
1185 free_irq(chip->irq, (void *)chip);
1186 if (chip->remap_addr)
1187 iounmap(chip->remap_addr);
1188 pci_release_regions(chip->pci);
1189 pci_disable_device(chip->pci);
1190 kfree(chip);
1191 return 0;
1192 }
1193
1194 static int snd_atiixp_dev_free(snd_device_t *device)
1195 {
1196 atiixp_t *chip = device->device_data;
1197 return snd_atiixp_free(chip);
1198 }
1199
1200 /*
1201 * constructor for chip instance
1202 */
1203 static int __devinit snd_atiixp_create(snd_card_t *card,
1204 struct pci_dev *pci,
1205 atiixp_t **r_chip)
1206 {
1207 static snd_device_ops_t ops = {
1208 .dev_free = snd_atiixp_dev_free,
1209 };
1210 atiixp_t *chip;
1211 int err;
1212
1213 if ((err = pci_enable_device(pci)) < 0)
1214 return err;
1215
1216 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1217 if (chip == NULL) {
1218 pci_disable_device(pci);
1219 return -ENOMEM;
1220 }
1221
1222 spin_lock_init(&chip->reg_lock);
1223 init_MUTEX(&chip->open_mutex);
1224 chip->card = card;
1225 chip->pci = pci;
1226 chip->irq = -1;
1227 if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
1228 kfree(chip);
1229 pci_disable_device(pci);
1230 return err;
1231 }
1232 chip->addr = pci_resource_start(pci, 0);
1233 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1234 if (chip->remap_addr == NULL) {
1235 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1236 snd_atiixp_free(chip);
1237 return -EIO;
1238 }
1239
1240 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1241 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1242 snd_atiixp_free(chip);
1243 return -EBUSY;
1244 }
1245 chip->irq = pci->irq;
1246 pci_set_master(pci);
1247 synchronize_irq(chip->irq);
1248
1249 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1250 snd_atiixp_free(chip);
1251 return err;
1252 }
1253
1254 snd_card_set_dev(card, &pci->dev);
1255
1256 *r_chip = chip;
1257 return 0;
1258 }
1259
1260
1261 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1262 const struct pci_device_id *pci_id)
1263 {
1264 static int dev;
1265 snd_card_t *card;
1266 atiixp_t *chip;
1267 unsigned char revision;
1268 int err;
1269
1270 if (dev >= SNDRV_CARDS)
1271 return -ENODEV;
1272 if (!enable[dev]) {
1273 dev++;
1274 return -ENOENT;
1275 }
1276
1277 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1278 if (card == NULL)
1279 return -ENOMEM;
1280
1281 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1282
1283 strcpy(card->driver, "ATIIXP-MODEM");
1284 strcpy(card->shortname, "ATI IXP Modem");
1285 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1286 goto __error;
1287
1288 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1289 goto __error;
1290
1291 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
1292 goto __error;
1293
1294 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1295 goto __error;
1296
1297 snd_atiixp_proc_init(chip);
1298
1299 snd_atiixp_chip_start(chip);
1300
1301 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1302 card->shortname, revision, chip->addr, chip->irq);
1303
1304 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1305
1306 if ((err = snd_card_register(card)) < 0)
1307 goto __error;
1308
1309 pci_set_drvdata(pci, card);
1310 dev++;
1311 return 0;
1312
1313 __error:
1314 snd_card_free(card);
1315 return err;
1316 }
1317
1318 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1319 {
1320 snd_card_free(pci_get_drvdata(pci));
1321 pci_set_drvdata(pci, NULL);
1322 }
1323
1324 static struct pci_driver driver = {
1325 .name = "ATI IXP MC97 controller",
1326 .id_table = snd_atiixp_ids,
1327 .probe = snd_atiixp_probe,
1328 .remove = __devexit_p(snd_atiixp_remove),
1329 SND_PCI_PM_CALLBACKS
1330 };
1331
1332
1333 static int __init alsa_card_atiixp_init(void)
1334 {
1335 return pci_module_init(&driver);
1336 }
1337
1338 static void __exit alsa_card_atiixp_exit(void)
1339 {
1340 pci_unregister_driver(&driver);
1341 }
1342
1343 module_init(alsa_card_atiixp_init)
1344 module_exit(alsa_card_atiixp_exit)
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