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[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / sound / pci / azt3328.c
blobb8ae534125c1ecf9812a4570b11dc9530d88ef91
1 /*
2 * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
3 * Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
4 *
5 * Framework borrowed from Bart Hartgers's als4000.c.
6 * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
7 * found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
8 * Other versions are:
9 * PCI168 A(W), sub ID 1800
10 * PCI168 A/AP, sub ID 8000
11 * Please give me feedback in case you try my driver with one of these!!
12 *
13 * GPL LICENSE
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 *
28 * NOTES
29 * Since Aztech does not provide any chipset documentation,
30 * even on repeated request to various addresses,
31 * and the answer that was finally given was negative
32 * (and I was stupid enough to manage to get hold of a PCI168 soundcard
33 * in the first place >:-P}),
34 * I was forced to base this driver on reverse engineering
35 * (3 weeks' worth of evenings filled with driver work).
36 * (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
37 *
38 * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
39 * for compatibility reasons) has the following features:
40 *
41 * - builtin AC97 conformant codec (SNR over 80dB)
42 * (really AC97 compliant?? I really doubt it when looking
43 * at the mixer register layout)
44 * - builtin genuine OPL3
45 * - full duplex 16bit playback/record at independent sampling rate
46 * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
47 * - game port (legacy address support)
48 * - built-in General DirectX timer having a 20 bits counter
49 * with 1us resolution (FIXME: where is it?)
50 * - I2S serial port for external DAC
51 * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
52 * - supports hardware volume control
53 * - single chip low cost solution (128 pin QFP)
54 * - supports programmable Sub-vendor and Sub-system ID
55 * required for Microsoft's logo compliance (FIXME: where?)
56 * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
57 *
58 * Certain PCI versions of this card are susceptible to DMA traffic underruns
59 * in some systems (resulting in sound crackling/clicking/popping),
60 * probably because they don't have a DMA FIFO buffer or so.
61 * Overview (PCI ID/PCI subID/PCI rev.):
62 * - no DMA crackling on SiS735: 0x50DC/0x1801/16
63 * - unknown performance: 0x50DC/0x1801/10
64 *
65 * Crackling happens with VIA chipsets or, in my case, an SiS735, which is
66 * supposed to be very fast and supposed to get rid of crackling much
67 * better than a VIA, yet ironically I still get crackling, like many other
68 * people with the same chipset.
69 * Possible remedies:
70 * - plug card into a different PCI slot, preferrably one that isn't shared
71 * too much (this helps a lot, but not completely!)
72 * - get rid of PCI VGA card, use AGP instead
73 * - upgrade or downgrade BIOS
74 * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
75 * Not too helpful.
76 * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
77 *
78 * BUGS
79 * - when Ctrl-C'ing mpg321, the playback loops a bit
80 * (premature DMA playback reset?)
81 * - full-duplex sometimes breaks (IRQ management issues?).
82 * Once even a spontaneous REBOOT happened!!!
83 *
84 * TODO
85 * - test MPU401 MIDI playback etc.
86 * - power management (CONFIG_PM). See e.g. intel8x0 or cs4281.
87 * This would be nice since the chip runs a bit hot, and it's *required*
88 * anyway for proper ACPI power management. In other words: rest
89 * assured that I *will* implement this very soon; as soon as Linux 2.5.x
90 * has power management that's bugfree enough to work properly on my desktop.
91 * - figure out what all unknown port bits are responsible for
92 */
93
94 #include <sound/driver.h>
95 #include <asm/io.h>
96 #include <linux/init.h>
97 #include <linux/pci.h>
98 #include <linux/delay.h>
99 #include <linux/slab.h>
100 #include <linux/gameport.h>
101 #include <linux/moduleparam.h>
102 #include <sound/core.h>
103 #include <sound/control.h>
104 #include <sound/pcm.h>
105 #include <sound/rawmidi.h>
106 #include <sound/mpu401.h>
107 #include <sound/opl3.h>
108 #include <sound/initval.h>
109 #include "azt3328.h"
110
111 MODULE_AUTHOR("Andreas Mohr <hw7oshyuv3001@sneakemail.com>");
112 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
113 MODULE_LICENSE("GPL");
114 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
115
116 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
117 #define SUPPORT_JOYSTICK 1
118 #endif
119
120 #define DEBUG_MISC 0
121 #define DEBUG_CALLS 0
122 #define DEBUG_MIXER 0
123 #define DEBUG_PLAY_REC 0
124 #define DEBUG_IO 0
125 #define MIXER_TESTING 0
126
127 #if DEBUG_MISC
128 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
129 #else
130 #define snd_azf3328_dbgmisc(format, args...)
131 #endif
132
133 #if DEBUG_CALLS
134 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
135 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "entering %s\n", __FUNCTION__)
136 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "leaving %s\n", __FUNCTION__)
137 #else
138 #define snd_azf3328_dbgcalls(format, args...)
139 #define snd_azf3328_dbgcallenter()
140 #define snd_azf3328_dbgcallleave()
141 #endif
142
143 #if DEBUG_MIXER
144 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
145 #else
146 #define snd_azf3328_dbgmixer(format, args...)
147 #endif
148
149 #if DEBUG_PLAY_REC
150 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
151 #else
152 #define snd_azf3328_dbgplay(format, args...)
153 #endif
154
155 #if DEBUG_IO
156 #define snd_azf3328_dbgio(chip, where) \
157 printk(KERN_ERR "%s: IDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", where, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS))
158 #else
159 #define snd_azf3328_dbgio(chip, where)
160 #endif
161
162 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
163 module_param_array(index, int, NULL, 0444);
164 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
165
166 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
167 module_param_array(id, charp, NULL, 0444);
168 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
169
170 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
171 module_param_array(enable, bool, NULL, 0444);
172 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
173
174 #ifdef SUPPORT_JOYSTICK
175 static int joystick[SNDRV_CARDS];
176 module_param_array(joystick, bool, NULL, 0444);
177 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
178 #endif
179
180 typedef struct _snd_azf3328 azf3328_t;
181
182 struct _snd_azf3328 {
183 int irq;
184
185 unsigned long codec_port;
186 unsigned long io2_port;
187 unsigned long mpu_port;
188 unsigned long synth_port;
189 unsigned long mixer_port;
190
191 #ifdef SUPPORT_JOYSTICK
192 struct gameport *gameport;
193 #endif
194
195 struct pci_dev *pci;
196 snd_card_t *card;
197
198 snd_pcm_t *pcm;
199 snd_rawmidi_t *rmidi;
200 snd_pcm_substream_t *playback_substream;
201 snd_pcm_substream_t *capture_substream;
202 unsigned int is_playing;
203 unsigned int is_recording;
204
205 spinlock_t reg_lock;
206 };
207
208 static struct pci_device_id snd_azf3328_ids[] = {
209 { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */
210 { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */
211 { 0, }
212 };
213
214 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
215
216 static inline void snd_azf3328_io2_write(azf3328_t *chip, int reg, unsigned char value)
217 {
218 outb(value, chip->io2_port + reg);
219 }
220
221 static inline unsigned char snd_azf3328_io2_read(azf3328_t *chip, int reg)
222 {
223 return inb(chip->io2_port + reg);
224 }
225
226 static void snd_azf3328_mixer_write(azf3328_t *chip, int reg, unsigned long value, int type)
227 {
228 switch(type) {
229 case WORD_VALUE:
230 outw(value, chip->mixer_port + reg);
231 break;
232 case DWORD_VALUE:
233 outl(value, chip->mixer_port + reg);
234 break;
235 case BYTE_VALUE:
236 outb(value, chip->mixer_port + reg);
237 break;
238 }
239 }
240
241 static void snd_azf3328_mixer_set_mute(azf3328_t *chip, int reg, int do_mute)
242 {
243 unsigned char oldval;
244
245 /* the mute bit is on the *second* (i.e. right) register of a
246 * left/right channel setting */
247 oldval = inb(chip->mixer_port + reg + 1);
248 if (do_mute)
249 oldval |= 0x80;
250 else
251 oldval &= ~0x80;
252 outb(oldval, chip->mixer_port + reg + 1);
253 }
254
255 static void snd_azf3328_mixer_write_volume_gradually(azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
256 {
257 unsigned char curr_vol_left = 0, curr_vol_right = 0;
258 int left_done = 0, right_done = 0;
259
260 snd_azf3328_dbgcallenter();
261 if (chan_sel & SET_CHAN_LEFT)
262 curr_vol_left = inb(chip->mixer_port + reg + 1);
263 else
264 left_done = 1;
265 if (chan_sel & SET_CHAN_RIGHT)
266 curr_vol_right = inb(chip->mixer_port + reg + 0);
267 else
268 right_done = 1;
269
270 /* take care of muting flag (0x80) contained in left channel */
271 if (curr_vol_left & 0x80)
272 dst_vol_left |= 0x80;
273 else
274 dst_vol_left &= ~0x80;
275
276 do
277 {
278 if (!left_done)
279 {
280 if (curr_vol_left > dst_vol_left)
281 curr_vol_left--;
282 else
283 if (curr_vol_left < dst_vol_left)
284 curr_vol_left++;
285 else
286 left_done = 1;
287 outb(curr_vol_left, chip->mixer_port + reg + 1);
288 }
289 if (!right_done)
290 {
291 if (curr_vol_right > dst_vol_right)
292 curr_vol_right--;
293 else
294 if (curr_vol_right < dst_vol_right)
295 curr_vol_right++;
296 else
297 right_done = 1;
298 /* during volume change, the right channel is crackling
299 * somewhat more than the left channel, unfortunately.
300 * This seems to be a hardware issue. */
301 outb(curr_vol_right, chip->mixer_port + reg + 0);
302 }
303 if (delay)
304 mdelay(delay);
305 }
306 while ((!left_done) || (!right_done));
307 snd_azf3328_dbgcallleave();
308 }
309
310 /*
311 * general mixer element
312 */
313 typedef struct azf3328_mixer_reg {
314 unsigned int reg;
315 unsigned int lchan_shift, rchan_shift;
316 unsigned int mask;
317 unsigned int invert: 1;
318 unsigned int stereo: 1;
319 unsigned int enum_c: 4;
320 } azf3328_mixer_reg_t;
321
322 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
323 ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | (mask << 16) | (invert << 24) | (stereo << 25) | (enum_c << 26))
324
325 static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
326 {
327 r->reg = val & 0xff;
328 r->lchan_shift = (val >> 8) & 0x0f;
329 r->rchan_shift = (val >> 12) & 0x0f;
330 r->mask = (val >> 16) & 0xff;
331 r->invert = (val >> 24) & 1;
332 r->stereo = (val >> 25) & 1;
333 r->enum_c = (val >> 26) & 0x0f;
334 }
335
336 /*
337 * mixer switches/volumes
338 */
339
340 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
341 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
342 .info = snd_azf3328_info_mixer, \
343 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
344 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
345 }
346
347 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
348 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
349 .info = snd_azf3328_info_mixer, \
350 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
351 .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
352 }
353
354 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
355 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
356 .info = snd_azf3328_info_mixer, \
357 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
358 .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
359 }
360
361 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
362 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
363 .info = snd_azf3328_info_mixer, \
364 .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
365 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
366 }
367
368 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
369 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
370 .info = snd_azf3328_info_mixer_enum, \
371 .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
372 .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
373 }
374
375 static int snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
376 {
377 azf3328_mixer_reg_t reg;
378
379 snd_azf3328_dbgcallenter();
380 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
381 uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
382 uinfo->count = reg.stereo + 1;
383 uinfo->value.integer.min = 0;
384 uinfo->value.integer.max = reg.mask;
385 snd_azf3328_dbgcallleave();
386 return 0;
387 }
388
389 static int snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
390 {
391 azf3328_t *chip = snd_kcontrol_chip(kcontrol);
392 azf3328_mixer_reg_t reg;
393 unsigned int oreg, val;
394
395 snd_azf3328_dbgcallenter();
396 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
397
398 oreg = inw(chip->mixer_port + reg.reg);
399 val = (oreg >> reg.lchan_shift) & reg.mask;
400 if (reg.invert)
401 val = reg.mask - val;
402 ucontrol->value.integer.value[0] = val;
403 if (reg.stereo) {
404 val = (oreg >> reg.rchan_shift) & reg.mask;
405 if (reg.invert)
406 val = reg.mask - val;
407 ucontrol->value.integer.value[1] = val;
408 }
409 snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx (shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", reg.reg, oreg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
410 snd_azf3328_dbgcallleave();
411 return 0;
412 }
413
414 static int snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
415 {
416 azf3328_t *chip = snd_kcontrol_chip(kcontrol);
417 azf3328_mixer_reg_t reg;
418 unsigned int oreg, nreg, val;
419
420 snd_azf3328_dbgcallenter();
421 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
422 oreg = inw(chip->mixer_port + reg.reg);
423 val = ucontrol->value.integer.value[0] & reg.mask;
424 if (reg.invert)
425 val = reg.mask - val;
426 nreg = oreg & ~(reg.mask << reg.lchan_shift);
427 nreg |= (val << reg.lchan_shift);
428 if (reg.stereo) {
429 val = ucontrol->value.integer.value[1] & reg.mask;
430 if (reg.invert)
431 val = reg.mask - val;
432 nreg &= ~(reg.mask << reg.rchan_shift);
433 nreg |= (val << reg.rchan_shift);
434 }
435 if (reg.mask >= 0x07) /* it's a volume control, so better take care */
436 snd_azf3328_mixer_write_volume_gradually(chip, reg.reg, nreg >> 8, nreg & 0xff, SET_CHAN_LEFT|SET_CHAN_RIGHT, 0); /* just set both channels, doesn't matter */
437 else
438 outw(nreg, chip->mixer_port + reg.reg);
439
440 snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], oreg, reg.lchan_shift, reg.rchan_shift, nreg, inw(chip->mixer_port + reg.reg));
441 snd_azf3328_dbgcallleave();
442 return (nreg != oreg);
443 }
444
445 static int snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
446 {
447 azf3328_mixer_reg_t reg;
448 static char *texts1[2] = { "ModemOut1", "ModemOut2" };
449 static char *texts2[2] = { "MonoSelectSource1", "MonoSelectSource2" };
450 static char *texts3[8] = {
451 "Mic", "CD", "Video", "Aux", "Line",
452 "Mix", "Mix Mono", "Phone"
453 };
454
455 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
456 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
457 uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
458 uinfo->value.enumerated.items = reg.enum_c;
459 if (uinfo->value.enumerated.item > reg.enum_c - 1U)
460 uinfo->value.enumerated.item = reg.enum_c - 1U;
461 if (reg.reg == IDX_MIXER_ADVCTL2)
462 {
463 if (reg.lchan_shift == 8) /* modem out sel */
464 strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
465 else /* mono sel source */
466 strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
467 }
468 else
469 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
470 );
471 return 0;
472 }
473
474 static int snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
475 {
476 azf3328_mixer_reg_t reg;
477 azf3328_t *chip = snd_kcontrol_chip(kcontrol);
478 unsigned short val;
479
480 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
481 val = inw(chip->mixer_port + reg.reg);
482 if (reg.reg == IDX_MIXER_REC_SELECT)
483 {
484 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
485 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
486 }
487 else
488 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
489 snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], reg.lchan_shift, reg.enum_c);
490 return 0;
491 }
492
493 static int snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
494 {
495 azf3328_mixer_reg_t reg;
496 azf3328_t *chip = snd_kcontrol_chip(kcontrol);
497 unsigned int oreg, nreg, val;
498
499 snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
500 oreg = inw(chip->mixer_port + reg.reg);
501 val = oreg;
502 if (reg.reg == IDX_MIXER_REC_SELECT)
503 {
504 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
505 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
506 return -EINVAL;
507 val = (ucontrol->value.enumerated.item[0] << 8) |
508 (ucontrol->value.enumerated.item[1] << 0);
509 }
510 else
511 {
512 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
513 return -EINVAL;
514 val &= ~((reg.enum_c - 1) << reg.lchan_shift);
515 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
516 }
517 outw(val, chip->mixer_port + reg.reg);
518 nreg = val;
519
520 snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
521 return (nreg != oreg);
522 }
523
524 static snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
525 AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
526 AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
527 AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
528 AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
529 AZF3328_MIXER_SWITCH("Wave Playback 3D Bypass", IDX_MIXER_ADVCTL2, 7, 1),
530 AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
531 AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
532 AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
533 AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
534 AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
535 AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
536 AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
537 AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
538 AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
539 AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
540 AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
541 AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
542 AZF3328_MIXER_SWITCH("PCBeep Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
543 AZF3328_MIXER_VOL_SPECIAL("PCBeep Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
544 AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
545 AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
546 AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
547 AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
548 AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
549 AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
550 AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
551 AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
552 AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
553 AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
554 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
555 AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
556 AZF3328_MIXER_SWITCH("3D Control - Toggle", IDX_MIXER_ADVCTL2, 13, 0),
557 AZF3328_MIXER_VOL_SPECIAL("3D Control - Volume", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
558 AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
559 #if MIXER_TESTING
560 AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
561 AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
562 AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
563 AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
564 AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
565 AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
566 AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
567 AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
568 AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
569 AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
570 AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
571 AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
572 AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
573 AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
574 AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
575 AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
576 #endif
577 };
578
579 #define AZF3328_INIT_VALUES (sizeof(snd_azf3328_init_values)/sizeof(unsigned int)/2)
580
581 static unsigned int snd_azf3328_init_values[][2] = {
582 { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f },
583 { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f },
584 { IDX_MIXER_BASSTREBLE, 0x0000 },
585 { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f },
586 { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f },
587 { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f },
588 { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f },
589 { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f },
590 { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f },
591 { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f },
592 { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f },
593 { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f },
594 { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 },
595 };
596
597 static int __devinit snd_azf3328_mixer_new(azf3328_t *chip)
598 {
599 snd_card_t *card;
600 snd_kcontrol_new_t *sw;
601 unsigned int idx;
602 int err;
603
604 snd_azf3328_dbgcallenter();
605 snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
606
607 card = chip->card;
608
609 /* mixer reset */
610 snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
611
612 /* mute and zero volume channels */
613 for (idx = 0; idx < AZF3328_INIT_VALUES; idx++) {
614 snd_azf3328_mixer_write(chip, snd_azf3328_init_values[idx][0], snd_azf3328_init_values[idx][1], WORD_VALUE);
615 }
616
617 /* add mixer controls */
618 sw = snd_azf3328_mixer_controls;
619 for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
620 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
621 return err;
622 }
623 snd_component_add(card, "AZF3328 mixer");
624 strcpy(card->mixername, "AZF3328 mixer");
625
626 snd_azf3328_dbgcallleave();
627 return 0;
628 }
629
630 static int snd_azf3328_hw_params(snd_pcm_substream_t * substream,
631 snd_pcm_hw_params_t * hw_params)
632 {
633 int res;
634 snd_azf3328_dbgcallenter();
635 res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
636 snd_azf3328_dbgcallleave();
637 return res;
638 }
639
640 static int snd_azf3328_hw_free(snd_pcm_substream_t * substream)
641 {
642 snd_azf3328_dbgcallenter();
643 snd_pcm_lib_free_pages(substream);
644 snd_azf3328_dbgcallleave();
645 return 0;
646 }
647
648 static void snd_azf3328_setfmt(azf3328_t *chip,
649 unsigned int reg,
650 unsigned int bitrate,
651 unsigned int format_width,
652 unsigned int channels
653 )
654 {
655 unsigned int val = 0xff00;
656 unsigned long flags;
657
658 snd_azf3328_dbgcallenter();
659 switch (bitrate) {
660 case 5512: val |= 0x0d; break; /* the AZF3328 names it "5510" for some strange reason */
661 case 6620: val |= 0x0b; break;
662 case 8000: val |= 0x00; break;
663 case 9600: val |= 0x08; break;
664 case 11025: val |= 0x01; break;
665 case 16000: val |= 0x02; break;
666 case 22050: val |= 0x03; break;
667 case 32000: val |= 0x04; break;
668 case 44100: val |= 0x05; break;
669 case 48000: val |= 0x06; break;
670 case 64000: val |= 0x07; break;
671 default:
672 snd_printk("unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
673 val |= 0x05; /* 44100 */
674 break;
675 }
676 /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) */
677 /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) */
678 /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) */
679 /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) */
680 /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
681 /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
682 /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
683 /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
684 /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
685 if (channels == 2)
686 val |= SOUNDFORMAT_FLAG_2CHANNELS;
687
688 if (format_width == 16)
689 val |= SOUNDFORMAT_FLAG_16BIT;
690
691 spin_lock_irqsave(&chip->reg_lock, flags);
692
693 /* set bitrate/format */
694 outw(val, chip->codec_port+reg);
695
696 /* changing the bitrate/format settings switches off the
697 * audio output with an annoying click in case of 8/16bit format change
698 * (maybe shutting down DAC/ADC?), thus immediately
699 * do some tweaking to reenable it and get rid of the clicking
700 * (FIXME: yes, it works, but what exactly am I doing here?? :)
701 * FIXME: does this have some side effects for full-duplex
702 * or other dramatic side effects? */
703 if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
704 outw(inw(chip->codec_port + IDX_IO_PLAY_FLAGS)|DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
705
706 spin_unlock_irqrestore(&chip->reg_lock, flags);
707 snd_azf3328_dbgcallleave();
708 }
709
710 static void snd_azf3328_setdmaa(azf3328_t *chip,
711 long unsigned int addr,
712 unsigned int count,
713 unsigned int size,
714 int do_recording)
715 {
716 long unsigned int addr1;
717 long unsigned int addr2;
718 unsigned int count1;
719 unsigned int count2;
720 unsigned long flags;
721 int reg_offs = do_recording ? 0x20 : 0x00;
722
723 snd_azf3328_dbgcallenter();
724 /* AZF3328 uses a two buffer pointer DMA playback approach */
725 if (!chip->is_playing)
726 {
727 addr1 = addr;
728 addr2 = addr+(size/2);
729 count1 = (size/2)-1;
730 count2 = (size/2)-1;
731 #if DEBUG_PLAY_REC
732 snd_azf3328_dbgplay("setting dma: buf1 %08lx[%d], buf2 %08lx[%d]\n", addr1, count1, addr2, count2);
733 #endif
734 spin_lock_irqsave(&chip->reg_lock, flags);
735 outl(addr1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_1);
736 outl(addr2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_2);
737 outw(count1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_1);
738 outw(count2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_2);
739 spin_unlock_irqrestore(&chip->reg_lock, flags);
740 }
741 snd_azf3328_dbgcallleave();
742 }
743
744 static int snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
745 {
746 #if 0
747 azf3328_t *chip = snd_pcm_substream_chip(substream);
748 snd_pcm_runtime_t *runtime = substream->runtime;
749 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
750 unsigned int count = snd_pcm_lib_period_bytes(substream);
751 #endif
752
753 snd_azf3328_dbgcallenter();
754 #if 0
755 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
756 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
757 #endif
758 snd_azf3328_dbgcallleave();
759 return 0;
760 }
761
762 static int snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
763 {
764 #if 0
765 azf3328_t *chip = snd_pcm_substream_chip(substream);
766 snd_pcm_runtime_t *runtime = substream->runtime;
767 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
768 unsigned int count = snd_pcm_lib_period_bytes(substream);
769 #endif
770
771 snd_azf3328_dbgcallenter();
772 #if 0
773 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
774 snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
775 #endif
776 snd_azf3328_dbgcallleave();
777 return 0;
778 }
779
780 static int snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
781 {
782 azf3328_t *chip = snd_pcm_substream_chip(substream);
783 snd_pcm_runtime_t *runtime = substream->runtime;
784 int result = 0;
785 unsigned int status1;
786
787 snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
788 switch (cmd) {
789 case SNDRV_PCM_TRIGGER_START:
790
791 snd_azf3328_dbgio(chip, "trigger1");
792
793 /* mute WaveOut */
794 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
795
796 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
797
798 spin_lock(&chip->reg_lock);
799 /* stop playback */
800 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
801 status1 &= ~DMA_RESUME;
802 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
803
804 /* FIXME: clear interrupts or what??? */
805 outw(0xffff, chip->codec_port+IDX_IO_PLAY_IRQMASK);
806 spin_unlock(&chip->reg_lock);
807
808 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 0);
809
810 spin_lock(&chip->reg_lock);
811 #ifdef WIN9X
812 /* FIXME: enable playback/recording??? */
813 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
814 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
815
816 /* start playback again */
817 /* FIXME: what is this value (0x0010)??? */
818 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
819 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
820 #else /* NT4 */
821 outw(0x00, chip->codec_port+IDX_IO_PLAY_FLAGS);
822 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_PLAY_FLAGS);
823 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_PLAY_FLAGS);
824 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_PLAY_FLAGS);
825 #endif
826 spin_unlock(&chip->reg_lock);
827
828 /* now unmute WaveOut */
829 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
830
831 snd_azf3328_dbgio(chip, "trigger2");
832 chip->is_playing = 1;
833 break;
834 case SNDRV_PCM_TRIGGER_STOP:
835 /* mute WaveOut */
836 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
837
838 spin_lock(&chip->reg_lock);
839 /* stop playback */
840 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
841
842 status1 &= ~DMA_RESUME;
843 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
844
845 status1 |= DMA_PLAY_SOMETHING1;
846 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
847
848 status1 &= ~DMA_PLAY_SOMETHING1;
849 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
850 spin_unlock(&chip->reg_lock);
851
852 /* now unmute WaveOut */
853 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
854 chip->is_playing = 0;
855 break;
856 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
857 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
858 break;
859 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
860 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
861 break;
862 default:
863 return -EINVAL;
864 }
865
866 snd_azf3328_dbgcallleave();
867 return result;
868 }
869
870 /* this is just analogous to playback; I'm not quite sure whether recording
871 * should actually be triggered like that */
872 static int snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
873 {
874 azf3328_t *chip = snd_pcm_substream_chip(substream);
875 snd_pcm_runtime_t *runtime = substream->runtime;
876 int result = 0;
877 unsigned int status1;
878
879 snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
880 switch (cmd) {
881 case SNDRV_PCM_TRIGGER_START:
882
883 snd_azf3328_dbgio(chip, "trigger1");
884
885 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
886
887 spin_lock(&chip->reg_lock);
888 /* stop recording */
889 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
890 status1 &= ~DMA_RESUME;
891 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
892
893 /* FIXME: clear interrupts or what??? */
894 outw(0xffff, chip->codec_port+IDX_IO_REC_IRQMASK);
895 spin_unlock(&chip->reg_lock);
896
897 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 1);
898
899 spin_lock(&chip->reg_lock);
900 #ifdef WIN9X
901 /* FIXME: enable playback/recording??? */
902 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
903 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
904
905 /* start playback again */
906 /* FIXME: what is this value (0x0010)??? */
907 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
908 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
909 #else
910 outw(0x00, chip->codec_port+IDX_IO_REC_FLAGS);
911 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_REC_FLAGS);
912 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_REC_FLAGS);
913 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_REC_FLAGS);
914 #endif
915 spin_unlock(&chip->reg_lock);
916
917 snd_azf3328_dbgio(chip, "trigger2");
918 chip->is_playing = 1;
919 break;
920 case SNDRV_PCM_TRIGGER_STOP:
921 spin_lock(&chip->reg_lock);
922 /* stop recording */
923 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
924
925 status1 &= ~DMA_RESUME;
926 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
927
928 status1 |= DMA_PLAY_SOMETHING1;
929 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
930
931 status1 &= ~DMA_PLAY_SOMETHING1;
932 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
933 spin_unlock(&chip->reg_lock);
934
935 chip->is_playing = 0;
936 break;
937 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
938 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
939 break;
940 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
941 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
942 break;
943 default:
944 return -EINVAL;
945 }
946
947 snd_azf3328_dbgcallleave();
948 return result;
949 }
950
951 static snd_pcm_uframes_t snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
952 {
953 azf3328_t *chip = snd_pcm_substream_chip(substream);
954 unsigned long bufptr, playptr;
955 unsigned long result;
956 snd_pcm_uframes_t frmres;
957
958 #ifdef QUERY_HARDWARE
959 bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
960 #else
961 bufptr = substream->runtime->dma_addr;
962 #endif
963 playptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
964
965 result = playptr - bufptr;
966 frmres = bytes_to_frames( substream->runtime, result );
967 snd_azf3328_dbgplay("result %lx, playptr %lx (base %x), frames %ld\n", result, playptr, substream->runtime->dma_addr, frmres);
968 return frmres;
969 }
970
971 static snd_pcm_uframes_t snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
972 {
973 azf3328_t *chip = snd_pcm_substream_chip(substream);
974 unsigned long bufptr, recptr;
975 unsigned long result;
976 snd_pcm_uframes_t frmres;
977
978 #ifdef QUERY_HARDWARE
979 bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
980 #else
981 bufptr = substream->runtime->dma_addr;
982 #endif
983 recptr = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
984
985 result = recptr - bufptr;
986 frmres = bytes_to_frames( substream->runtime, result );
987 snd_azf3328_dbgplay("result %lx, rec ptr %lx (base %x), frames %ld\n", result, recptr, substream->runtime->dma_addr, frmres);
988 return frmres;
989 }
990
991 static irqreturn_t snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
992 {
993 azf3328_t *chip = dev_id;
994 unsigned int status, which;
995 static unsigned long count;
996
997 status = inw(chip->codec_port+IDX_IO_IRQSTATUS);
998
999 /* fast path out, to ease interrupt sharing */
1000 if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_SOMEIRQ)))
1001 return IRQ_NONE; /* must be interrupt for another device */
1002
1003 snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", count, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS));
1004
1005 if (status & IRQ_PLAYBACK)
1006 {
1007 spin_lock(&chip->reg_lock);
1008 which = inw(chip->codec_port+IDX_IO_PLAY_IRQMASK);
1009 if (which & IRQ_FINISHED_PLAYBUF_1)
1010 /* ack IRQ */
1011 outw(which | IRQ_FINISHED_PLAYBUF_1, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1012 if (which & IRQ_FINISHED_PLAYBUF_2)
1013 /* ack IRQ */
1014 outw(which | IRQ_FINISHED_PLAYBUF_2, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1015 if (which & IRQ_PLAY_SOMETHING)
1016 {
1017 snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1018 }
1019 if (chip->pcm && chip->playback_substream)
1020 {
1021 snd_azf3328_dbgplay("which %x, playptr %lx\n", which, inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1022 snd_pcm_period_elapsed(chip->playback_substream);
1023 snd_azf3328_dbgplay("period done, playptr %lx.\n", inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1024 }
1025 else
1026 snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1027 spin_unlock(&chip->reg_lock);
1028 }
1029 if (status & IRQ_RECORDING)
1030 {
1031 spin_lock(&chip->reg_lock);
1032 which = inw(chip->codec_port+IDX_IO_REC_IRQMASK);
1033 if (which & IRQ_FINISHED_RECBUF_1)
1034 /* ack interrupt */
1035 outw(which | IRQ_FINISHED_RECBUF_1, chip->codec_port+IDX_IO_REC_IRQMASK);
1036 if (which & IRQ_FINISHED_RECBUF_2)
1037 /* ack interrupt */
1038 outw(which | IRQ_FINISHED_RECBUF_2, chip->codec_port+IDX_IO_REC_IRQMASK);
1039 if (which & IRQ_REC_SOMETHING)
1040 {
1041 snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1042 }
1043 if (chip->pcm && chip->capture_substream)
1044 {
1045 snd_azf3328_dbgplay("which %x, recptr %lx\n", which, inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1046 spin_unlock(&chip->reg_lock);
1047 snd_pcm_period_elapsed(chip->capture_substream);
1048 spin_lock(&chip->reg_lock);
1049 snd_azf3328_dbgplay("period done, recptr %lx.\n", inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1050 }
1051 spin_unlock(&chip->reg_lock);
1052 }
1053 if (status & IRQ_MPU401)
1054 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
1055 if (status & IRQ_SOMEIRQ)
1056 snd_azf3328_dbgplay("azt3328: unknown IRQ type occurred, please report!\n");
1057 count++;
1058 return IRQ_HANDLED;
1059 }
1060
1061 /*****************************************************************/
1062
1063 static snd_pcm_hardware_t snd_azf3328_playback =
1064 {
1065 /* FIXME!! Correct? */
1066 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1067 SNDRV_PCM_INFO_MMAP_VALID),
1068 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1069 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1070 .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1071 .rate_min = 5512,
1072 .rate_max = 64000,
1073 .channels_min = 1,
1074 .channels_max = 2,
1075 .buffer_bytes_max = 65536,
1076 .period_bytes_min = 64,
1077 .period_bytes_max = 65536,
1078 .periods_min = 1,
1079 .periods_max = 1024,
1080 /* FIXME: maybe that card actually has a FIFO?
1081 * Hmm, it seems newer revisions do have one, but we still don't know
1082 * its size... */
1083 .fifo_size = 0,
1084 };
1085
1086 static snd_pcm_hardware_t snd_azf3328_capture =
1087 {
1088 /* FIXME */
1089 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1090 SNDRV_PCM_INFO_MMAP_VALID),
1091 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1092 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1093 .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1094 .rate_min = 5512,
1095 .rate_max = 64000,
1096 .channels_min = 1,
1097 .channels_max = 2,
1098 .buffer_bytes_max = 65536,
1099 .period_bytes_min = 64,
1100 .period_bytes_max = 65536,
1101 .periods_min = 1,
1102 .periods_max = 1024,
1103 .fifo_size = 0,
1104 };
1105
1106
1107 static unsigned int snd_azf3328_fixed_rates[] = {
1108 5512, 6620, 8000, 9600, 11025, 16000, 22050, 32000, 44100, 48000, 64000
1109 };
1110 static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
1111 .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
1112 .list = snd_azf3328_fixed_rates,
1113 .mask = 0,
1114 };
1115
1116 /*****************************************************************/
1117
1118 static int snd_azf3328_playback_open(snd_pcm_substream_t * substream)
1119 {
1120 azf3328_t *chip = snd_pcm_substream_chip(substream);
1121 snd_pcm_runtime_t *runtime = substream->runtime;
1122
1123 snd_azf3328_dbgcallenter();
1124 chip->playback_substream = substream;
1125 runtime->hw = snd_azf3328_playback;
1126 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1127 &snd_azf3328_hw_constraints_rates);
1128 snd_azf3328_dbgcallleave();
1129 return 0;
1130 }
1131
1132 static int snd_azf3328_capture_open(snd_pcm_substream_t * substream)
1133 {
1134 azf3328_t *chip = snd_pcm_substream_chip(substream);
1135 snd_pcm_runtime_t *runtime = substream->runtime;
1136
1137 snd_azf3328_dbgcallenter();
1138 chip->capture_substream = substream;
1139 runtime->hw = snd_azf3328_capture;
1140 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1141 &snd_azf3328_hw_constraints_rates);
1142 snd_azf3328_dbgcallleave();
1143 return 0;
1144 }
1145
1146 static int snd_azf3328_playback_close(snd_pcm_substream_t * substream)
1147 {
1148 azf3328_t *chip = snd_pcm_substream_chip(substream);
1149
1150 snd_azf3328_dbgcallenter();
1151
1152 chip->playback_substream = NULL;
1153 snd_azf3328_dbgcallleave();
1154 return 0;
1155 }
1156
1157 static int snd_azf3328_capture_close(snd_pcm_substream_t * substream)
1158 {
1159 azf3328_t *chip = snd_pcm_substream_chip(substream);
1160
1161 snd_azf3328_dbgcallenter();
1162 chip->capture_substream = NULL;
1163 snd_azf3328_dbgcallleave();
1164 return 0;
1165 }
1166
1167 /******************************************************************/
1168
1169 static snd_pcm_ops_t snd_azf3328_playback_ops = {
1170 .open = snd_azf3328_playback_open,
1171 .close = snd_azf3328_playback_close,
1172 .ioctl = snd_pcm_lib_ioctl,
1173 .hw_params = snd_azf3328_hw_params,
1174 .hw_free = snd_azf3328_hw_free,
1175 .prepare = snd_azf3328_playback_prepare,
1176 .trigger = snd_azf3328_playback_trigger,
1177 .pointer = snd_azf3328_playback_pointer
1178 };
1179
1180 static snd_pcm_ops_t snd_azf3328_capture_ops = {
1181 .open = snd_azf3328_capture_open,
1182 .close = snd_azf3328_capture_close,
1183 .ioctl = snd_pcm_lib_ioctl,
1184 .hw_params = snd_azf3328_hw_params,
1185 .hw_free = snd_azf3328_hw_free,
1186 .prepare = snd_azf3328_capture_prepare,
1187 .trigger = snd_azf3328_capture_trigger,
1188 .pointer = snd_azf3328_capture_pointer
1189 };
1190
1191 static void snd_azf3328_pcm_free(snd_pcm_t *pcm)
1192 {
1193 azf3328_t *chip = pcm->private_data;
1194 chip->pcm = NULL;
1195 snd_pcm_lib_preallocate_free_for_all(pcm);
1196 }
1197
1198 static int __devinit snd_azf3328_pcm(azf3328_t *chip, int device)
1199 {
1200 snd_pcm_t *pcm;
1201 int err;
1202
1203 snd_azf3328_dbgcallenter();
1204 if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1205 return err;
1206 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1207 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1208
1209 pcm->private_data = chip;
1210 pcm->private_free = snd_azf3328_pcm_free;
1211 pcm->info_flags = 0;
1212 strcpy(pcm->name, chip->card->shortname);
1213 chip->pcm = pcm;
1214
1215 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1216 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1217
1218 snd_azf3328_dbgcallleave();
1219 return 0;
1220 }
1221
1222 /******************************************************************/
1223
1224 #ifdef SUPPORT_JOYSTICK
1225 static int __devinit snd_azf3328_config_joystick(azf3328_t *chip, int dev)
1226 {
1227 struct gameport *gp;
1228 struct resource *r;
1229
1230 if (!joystick[dev])
1231 return -ENODEV;
1232
1233 if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) {
1234 printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n");
1235 return -EBUSY;
1236 }
1237
1238 chip->gameport = gp = gameport_allocate_port();
1239 if (!gp) {
1240 printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n");
1241 release_resource(r);
1242 kfree_nocheck(r);
1243 return -ENOMEM;
1244 }
1245
1246 gameport_set_name(gp, "AZF3328 Gameport");
1247 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1248 gameport_set_dev_parent(gp, &chip->pci->dev);
1249 gp->io = 0x200;
1250 gameport_set_port_data(gp, r);
1251
1252 snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
1253 snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY);
1254
1255 gameport_register_port(chip->gameport);
1256
1257 return 0;
1258 }
1259
1260 static void snd_azf3328_free_joystick(azf3328_t *chip)
1261 {
1262 if (chip->gameport) {
1263 struct resource *r = gameport_get_port_data(chip->gameport);
1264
1265 gameport_unregister_port(chip->gameport);
1266 chip->gameport = NULL;
1267 /* disable gameport */
1268 snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
1269 snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1270 release_resource(r);
1271 kfree_nocheck(r);
1272 }
1273 }
1274 #else
1275 static inline int snd_azf3328_config_joystick(azf3328_t *chip, int dev) { return -ENOSYS; }
1276 static inline void snd_azf3328_free_joystick(azf3328_t *chip) { }
1277 #endif
1278
1279 /******************************************************************/
1280
1281 static int snd_azf3328_free(azf3328_t *chip)
1282 {
1283 if (chip->irq < 0)
1284 goto __end_hw;
1285
1286 /* reset (close) mixer */
1287 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1288 snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
1289
1290 /* interrupt setup - mask everything */
1291 /* FIXME */
1292
1293 synchronize_irq(chip->irq);
1294 __end_hw:
1295 snd_azf3328_free_joystick(chip);
1296 if (chip->irq >= 0)
1297 free_irq(chip->irq, (void *)chip);
1298 pci_release_regions(chip->pci);
1299 pci_disable_device(chip->pci);
1300
1301 kfree(chip);
1302 return 0;
1303 }
1304
1305 static int snd_azf3328_dev_free(snd_device_t *device)
1306 {
1307 azf3328_t *chip = device->device_data;
1308 return snd_azf3328_free(chip);
1309 }
1310
1311 #if 0
1312 /* check whether a bit can be modified */
1313 static void snd_azf3328_test_bit(unsigned int reg, int bit)
1314 {
1315 unsigned char val, valoff, valon;
1316
1317 val = inb(reg);
1318
1319 outb(val & ~(1 << bit), reg);
1320 valoff = inb(reg);
1321
1322 outb(val|(1 << bit), reg);
1323 valon = inb(reg);
1324
1325 outb(val, reg);
1326
1327 printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1328 }
1329 #endif
1330
1331 static int __devinit snd_azf3328_create(snd_card_t * card,
1332 struct pci_dev *pci,
1333 unsigned long device_type,
1334 azf3328_t ** rchip)
1335 {
1336 azf3328_t *chip;
1337 int err;
1338 static snd_device_ops_t ops = {
1339 .dev_free = snd_azf3328_dev_free,
1340 };
1341 u16 tmp;
1342
1343 *rchip = NULL;
1344
1345 if ((err = pci_enable_device(pci)) < 0)
1346 return err;
1347
1348 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1349 if (chip == NULL) {
1350 pci_disable_device(pci);
1351 return -ENOMEM;
1352 }
1353 spin_lock_init(&chip->reg_lock);
1354 chip->card = card;
1355 chip->pci = pci;
1356 chip->irq = -1;
1357
1358 /* check if we can restrict PCI DMA transfers to 24 bits */
1359 if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
1360 pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
1361 snd_printk("architecture does not support 24bit PCI busmaster DMA\n");
1362 pci_disable_device(pci);
1363 return -ENXIO;
1364 }
1365
1366 if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
1367 kfree(chip);
1368 pci_disable_device(pci);
1369 return err;
1370 }
1371
1372 chip->codec_port = pci_resource_start(pci, 0);
1373 chip->io2_port = pci_resource_start(pci, 1);
1374 chip->mpu_port = pci_resource_start(pci, 2);
1375 chip->synth_port = pci_resource_start(pci, 3);
1376 chip->mixer_port = pci_resource_start(pci, 4);
1377
1378 if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1379 snd_printk("unable to grab IRQ %d\n", pci->irq);
1380 snd_azf3328_free(chip);
1381 return -EBUSY;
1382 }
1383 chip->irq = pci->irq;
1384 pci_set_master(pci);
1385 synchronize_irq(chip->irq);
1386
1387 snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1388
1389 snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_read(chip, 0), snd_azf3328_io2_read(chip, 1), snd_azf3328_io2_read(chip, 2), snd_azf3328_io2_read(chip, 3), snd_azf3328_io2_read(chip, 4), snd_azf3328_io2_read(chip, 5));
1390
1391 for (tmp=0; tmp <= 0x01; tmp += 1)
1392 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1393
1394 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1395 snd_azf3328_free(chip);
1396 return err;
1397 }
1398
1399 /* create mixer interface & switches */
1400 if ((err = snd_azf3328_mixer_new(chip)) < 0)
1401 return err;
1402
1403 #if 0
1404 /* set very low bitrate to reduce noise and power consumption? */
1405 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1406 #endif
1407
1408 /* standard chip init stuff */
1409 spin_lock_irq(&chip->reg_lock);
1410 outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
1411 outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_SOMETHING_FLAGS);
1412 outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_REC_FLAGS);
1413 outb(0x0, chip->codec_port + IDX_IO_IRQ63H);
1414
1415 spin_unlock_irq(&chip->reg_lock);
1416
1417 snd_card_set_dev(card, &pci->dev);
1418
1419 *rchip = chip;
1420 return 0;
1421 }
1422
1423 static int __devinit snd_azf3328_probe(struct pci_dev *pci,
1424 const struct pci_device_id *pci_id)
1425 {
1426 static int dev;
1427 snd_card_t *card;
1428 azf3328_t *chip;
1429 opl3_t *opl3;
1430 int err;
1431
1432 snd_azf3328_dbgcallenter();
1433 if (dev >= SNDRV_CARDS)
1434 return -ENODEV;
1435 if (!enable[dev]) {
1436 dev++;
1437 return -ENOENT;
1438 }
1439
1440 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1441 if (card == NULL)
1442 return -ENOMEM;
1443
1444 strcpy(card->driver, "AZF3328");
1445 strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1446
1447 if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1448 snd_card_free(card);
1449 return err;
1450 }
1451
1452 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1453 chip->mpu_port, 1, pci->irq, 0,
1454 &chip->rmidi)) < 0) {
1455 snd_printk("azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1456 snd_card_free(card);
1457 return err;
1458 }
1459
1460 if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1461 snd_card_free(card);
1462 return err;
1463 }
1464
1465 if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1466 OPL3_HW_AUTO, 1, &opl3) < 0) {
1467 snd_printk("azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1468 chip->synth_port, chip->synth_port+2 );
1469 } else {
1470 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1471 snd_card_free(card);
1472 return err;
1473 }
1474 }
1475
1476 snd_azf3328_dbgio(chip, "create");
1477
1478 sprintf(card->longname, "%s at 0x%lx, irq %i",
1479 card->shortname, chip->codec_port, chip->irq);
1480
1481 if ((err = snd_card_register(card)) < 0) {
1482 snd_card_free(card);
1483 return err;
1484 }
1485
1486 #ifdef MODULE
1487 printk(
1488 "azt3328: Experimental driver for Aztech AZF3328-based soundcards such as PCI168.\n"
1489 "azt3328: ZERO support from Aztech: you might think hard about future purchase.\n"
1490 "azt3328: Feel free to contact hw7oshyuv3001@sneakemail.com for bug reports etc.!\n");
1491 #endif
1492
1493 if (snd_azf3328_config_joystick(chip, dev) < 0)
1494 snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
1495 snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1496
1497 pci_set_drvdata(pci, card);
1498 dev++;
1499
1500 snd_azf3328_dbgcallleave();
1501 return 0;
1502 }
1503
1504 static void __devexit snd_azf3328_remove(struct pci_dev *pci)
1505 {
1506 snd_azf3328_dbgcallenter();
1507 snd_card_free(pci_get_drvdata(pci));
1508 pci_set_drvdata(pci, NULL);
1509 snd_azf3328_dbgcallleave();
1510 }
1511
1512 static struct pci_driver driver = {
1513 .name = "AZF3328",
1514 .id_table = snd_azf3328_ids,
1515 .probe = snd_azf3328_probe,
1516 .remove = __devexit_p(snd_azf3328_remove),
1517 };
1518
1519 static int __init alsa_card_azf3328_init(void)
1520 {
1521 int err;
1522 snd_azf3328_dbgcallenter();
1523 err = pci_module_init(&driver);
1524 snd_azf3328_dbgcallleave();
1525 return err;
1526 }
1527
1528 static void __exit alsa_card_azf3328_exit(void)
1529 {
1530 snd_azf3328_dbgcallenter();
1531 pci_unregister_driver(&driver);
1532 snd_azf3328_dbgcallleave();
1533 }
1534
1535 module_init(alsa_card_azf3328_init)
1536 module_exit(alsa_card_azf3328_exit)
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