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[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / sound / pci / bt87x.c
blob89a7ffe5e7d7723a0a2317d95144c588c31dfc20
1 /*
2 * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
7 *
8 *
9 * This driver is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This driver is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24 #include <sound/driver.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <linux/bitops.h>
31 #include <asm/io.h>
32 #include <sound/core.h>
33 #include <sound/pcm.h>
34 #include <sound/pcm_params.h>
35 #include <sound/control.h>
36 #include <sound/initval.h>
37
38 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
39 MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
40 MODULE_LICENSE("GPL");
41 MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
42 "{Brooktree,Bt879}}");
43
44 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
45 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
46 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
47 static int digital_rate[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* digital input rate */
48 static int load_all; /* allow to load the non-whitelisted cards */
49
50 module_param_array(index, int, NULL, 0444);
51 MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
52 module_param_array(id, charp, NULL, 0444);
53 MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
54 module_param_array(enable, bool, NULL, 0444);
55 MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
56 module_param_array(digital_rate, int, NULL, 0444);
57 MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
58 module_param(load_all, bool, 0444);
59 MODULE_PARM_DESC(load_all, "Allow to load the non-whitelisted cards");
60
61
62 #ifndef PCI_VENDOR_ID_BROOKTREE
63 #define PCI_VENDOR_ID_BROOKTREE 0x109e
64 #endif
65 #ifndef PCI_DEVICE_ID_BROOKTREE_878
66 #define PCI_DEVICE_ID_BROOKTREE_878 0x0878
67 #endif
68 #ifndef PCI_DEVICE_ID_BROOKTREE_879
69 #define PCI_DEVICE_ID_BROOKTREE_879 0x0879
70 #endif
71
72 /* register offsets */
73 #define REG_INT_STAT 0x100 /* interrupt status */
74 #define REG_INT_MASK 0x104 /* interrupt mask */
75 #define REG_GPIO_DMA_CTL 0x10c /* audio control */
76 #define REG_PACKET_LEN 0x110 /* audio packet lengths */
77 #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */
78 #define REG_RISC_COUNT 0x120 /* RISC program counter */
79
80 /* interrupt bits */
81 #define INT_OFLOW (1 << 3) /* audio A/D overflow */
82 #define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */
83 #define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */
84 #define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */
85 #define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */
86 #define INT_PPERR (1 << 15) /* PCI parity error */
87 #define INT_RIPERR (1 << 16) /* RISC instruction parity error */
88 #define INT_PABORT (1 << 17) /* PCI master or target abort */
89 #define INT_OCERR (1 << 18) /* invalid opcode */
90 #define INT_SCERR (1 << 19) /* sync counter overflow */
91 #define INT_RISC_EN (1 << 27) /* DMA controller running */
92 #define INT_RISCS_SHIFT 28 /* RISC status bits */
93
94 /* audio control bits */
95 #define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */
96 #define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */
97 #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
98 #define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */
99 #define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */
100 #define CTL_ACAP_EN (1 << 4) /* enable audio capture */
101 #define CTL_DA_APP (1 << 5) /* GPIO input */
102 #define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */
103 #define CTL_DA_IOM_DA (1 << 6) /* digital audio input */
104 #define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */
105 #define CTL_DA_SDR_MASK (0xf<< 8)
106 #define CTL_DA_LMT (1 << 12) /* limit audio data values */
107 #define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */
108 #define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */
109 #define CTL_DA_DPM (1 << 15) /* data packet mode */
110 #define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */
111 #define CTL_DA_MLB (1 << 21) /* MSB/LSB format */
112 #define CTL_DA_LRI (1 << 22) /* left/right indication */
113 #define CTL_DA_SCE (1 << 23) /* sample clock edge */
114 #define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */
115 #define CTL_A_SEL_SFM (1 << 24) /* FM audio input */
116 #define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */
117 #define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */
118 #define CTL_A_SEL_SHIFT 24
119 #define CTL_A_SEL_MASK (3 << 24)
120 #define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
121 #define CTL_A_G2X (1 << 27) /* audio gain boost */
122 #define CTL_A_GAIN_SHIFT 28 /* audio input gain */
123 #define CTL_A_GAIN_MASK (0xf<<28)
124
125 /* RISC instruction opcodes */
126 #define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */
127 #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
128 #define RISC_SKIP (0x2 << 28) /* skip FIFO data */
129 #define RISC_JUMP (0x7 << 28) /* jump to address */
130 #define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */
131
132 /* RISC instruction bits */
133 #define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */
134 #define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */
135 #define RISC_SET_STATUS_SHIFT 16 /* set status bits */
136 #define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */
137 #define RISC_IRQ ( 1 << 24) /* interrupt */
138 #define RISC_EOL ( 1 << 26) /* end of line */
139 #define RISC_SOL ( 1 << 27) /* start of line */
140
141 /* SYNC status bits values */
142 #define RISC_SYNC_FM1 0x6
143 #define RISC_SYNC_VRO 0xc
144
145 #define ANALOG_CLOCK 1792000
146 #ifdef CONFIG_SND_BT87X_OVERCLOCK
147 #define CLOCK_DIV_MIN 1
148 #else
149 #define CLOCK_DIV_MIN 4
150 #endif
151 #define CLOCK_DIV_MAX 15
152
153 #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
154 INT_RIPERR | INT_PABORT | INT_OCERR)
155 #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
156
157 /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
158 #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
159
160 typedef struct snd_bt87x bt87x_t;
161 struct snd_bt87x {
162 snd_card_t *card;
163 struct pci_dev *pci;
164
165 void __iomem *mmio;
166 int irq;
167
168 int dig_rate;
169
170 spinlock_t reg_lock;
171 long opened;
172 snd_pcm_substream_t *substream;
173
174 struct snd_dma_buffer dma_risc;
175 unsigned int line_bytes;
176 unsigned int lines;
177
178 u32 reg_control;
179 u32 interrupt_mask;
180
181 int current_line;
182
183 int pci_parity_errors;
184 };
185
186 enum { DEVICE_DIGITAL, DEVICE_ANALOG };
187
188 static inline u32 snd_bt87x_readl(bt87x_t *chip, u32 reg)
189 {
190 return readl(chip->mmio + reg);
191 }
192
193 static inline void snd_bt87x_writel(bt87x_t *chip, u32 reg, u32 value)
194 {
195 writel(value, chip->mmio + reg);
196 }
197
198 static int snd_bt87x_create_risc(bt87x_t *chip, snd_pcm_substream_t *substream,
199 unsigned int periods, unsigned int period_bytes)
200 {
201 struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream);
202 unsigned int i, offset;
203 u32 *risc;
204
205 if (chip->dma_risc.area == NULL) {
206 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
207 PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
208 return -ENOMEM;
209 }
210 risc = (u32 *)chip->dma_risc.area;
211 offset = 0;
212 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
213 *risc++ = cpu_to_le32(0);
214 for (i = 0; i < periods; ++i) {
215 u32 rest;
216
217 rest = period_bytes;
218 do {
219 u32 cmd, len;
220
221 len = PAGE_SIZE - (offset % PAGE_SIZE);
222 if (len > rest)
223 len = rest;
224 cmd = RISC_WRITE | len;
225 if (rest == period_bytes) {
226 u32 block = i * 16 / periods;
227 cmd |= RISC_SOL;
228 cmd |= block << RISC_SET_STATUS_SHIFT;
229 cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
230 }
231 if (len == rest)
232 cmd |= RISC_EOL | RISC_IRQ;
233 *risc++ = cpu_to_le32(cmd);
234 *risc++ = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, offset));
235 offset += len;
236 rest -= len;
237 } while (rest > 0);
238 }
239 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
240 *risc++ = cpu_to_le32(0);
241 *risc++ = cpu_to_le32(RISC_JUMP);
242 *risc++ = cpu_to_le32(chip->dma_risc.addr);
243 chip->line_bytes = period_bytes;
244 chip->lines = periods;
245 return 0;
246 }
247
248 static void snd_bt87x_free_risc(bt87x_t *chip)
249 {
250 if (chip->dma_risc.area) {
251 snd_dma_free_pages(&chip->dma_risc);
252 chip->dma_risc.area = NULL;
253 }
254 }
255
256 static void snd_bt87x_pci_error(bt87x_t *chip, unsigned int status)
257 {
258 u16 pci_status;
259
260 pci_read_config_word(chip->pci, PCI_STATUS, &pci_status);
261 pci_status &= PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT |
262 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT |
263 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY;
264 pci_write_config_word(chip->pci, PCI_STATUS, pci_status);
265 if (pci_status != PCI_STATUS_DETECTED_PARITY)
266 snd_printk(KERN_ERR "Aieee - PCI error! status %#08x, PCI status %#04x\n",
267 status & ERROR_INTERRUPTS, pci_status);
268 else {
269 snd_printk(KERN_ERR "Aieee - PCI parity error detected!\n");
270 /* error 'handling' similar to aic7xxx_pci.c: */
271 chip->pci_parity_errors++;
272 if (chip->pci_parity_errors > 20) {
273 snd_printk(KERN_ERR "Too many PCI parity errors observed.\n");
274 snd_printk(KERN_ERR "Some device on this bus is generating bad parity.\n");
275 snd_printk(KERN_ERR "This is an error *observed by*, not *generated by*, this card.\n");
276 snd_printk(KERN_ERR "PCI parity error checking has been disabled.\n");
277 chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
278 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
279 }
280 }
281 }
282
283 static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
284 {
285 bt87x_t *chip = dev_id;
286 unsigned int status, irq_status;
287
288 status = snd_bt87x_readl(chip, REG_INT_STAT);
289 irq_status = status & chip->interrupt_mask;
290 if (!irq_status)
291 return IRQ_NONE;
292 snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
293
294 if (irq_status & ERROR_INTERRUPTS) {
295 if (irq_status & (INT_FBUS | INT_FTRGT))
296 snd_printk(KERN_WARNING "FIFO overrun, status %#08x\n", status);
297 if (irq_status & INT_OCERR)
298 snd_printk(KERN_ERR "internal RISC error, status %#08x\n", status);
299 if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
300 snd_bt87x_pci_error(chip, irq_status);
301 }
302 if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
303 int current_block, irq_block;
304
305 /* assume that exactly one line has been recorded */
306 chip->current_line = (chip->current_line + 1) % chip->lines;
307 /* but check if some interrupts have been skipped */
308 current_block = chip->current_line * 16 / chip->lines;
309 irq_block = status >> INT_RISCS_SHIFT;
310 if (current_block != irq_block)
311 chip->current_line = (irq_block * chip->lines + 15) / 16;
312
313 snd_pcm_period_elapsed(chip->substream);
314 }
315 return IRQ_HANDLED;
316 }
317
318 static snd_pcm_hardware_t snd_bt87x_digital_hw = {
319 .info = SNDRV_PCM_INFO_MMAP |
320 SNDRV_PCM_INFO_INTERLEAVED |
321 SNDRV_PCM_INFO_BLOCK_TRANSFER |
322 SNDRV_PCM_INFO_MMAP_VALID,
323 .formats = SNDRV_PCM_FMTBIT_S16_LE,
324 .rates = 0, /* set at runtime */
325 .channels_min = 2,
326 .channels_max = 2,
327 .buffer_bytes_max = 255 * 4092,
328 .period_bytes_min = 32,
329 .period_bytes_max = 4092,
330 .periods_min = 2,
331 .periods_max = 255,
332 };
333
334 static snd_pcm_hardware_t snd_bt87x_analog_hw = {
335 .info = SNDRV_PCM_INFO_MMAP |
336 SNDRV_PCM_INFO_INTERLEAVED |
337 SNDRV_PCM_INFO_BLOCK_TRANSFER |
338 SNDRV_PCM_INFO_MMAP_VALID,
339 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
340 .rates = SNDRV_PCM_RATE_KNOT,
341 .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
342 .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
343 .channels_min = 1,
344 .channels_max = 1,
345 .buffer_bytes_max = 255 * 4092,
346 .period_bytes_min = 32,
347 .period_bytes_max = 4092,
348 .periods_min = 2,
349 .periods_max = 255,
350 };
351
352 static int snd_bt87x_set_digital_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
353 {
354 static struct {
355 int rate;
356 unsigned int bit;
357 } ratebits[] = {
358 {8000, SNDRV_PCM_RATE_8000},
359 {11025, SNDRV_PCM_RATE_11025},
360 {16000, SNDRV_PCM_RATE_16000},
361 {22050, SNDRV_PCM_RATE_22050},
362 {32000, SNDRV_PCM_RATE_32000},
363 {44100, SNDRV_PCM_RATE_44100},
364 {48000, SNDRV_PCM_RATE_48000}
365 };
366 int i;
367
368 chip->reg_control |= CTL_DA_IOM_DA;
369 runtime->hw = snd_bt87x_digital_hw;
370 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
371 for (i = 0; i < ARRAY_SIZE(ratebits); ++i)
372 if (chip->dig_rate == ratebits[i].rate) {
373 runtime->hw.rates = ratebits[i].bit;
374 break;
375 }
376 runtime->hw.rate_min = chip->dig_rate;
377 runtime->hw.rate_max = chip->dig_rate;
378 return 0;
379 }
380
381 static int snd_bt87x_set_analog_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
382 {
383 static ratnum_t analog_clock = {
384 .num = ANALOG_CLOCK,
385 .den_min = CLOCK_DIV_MIN,
386 .den_max = CLOCK_DIV_MAX,
387 .den_step = 1
388 };
389 static snd_pcm_hw_constraint_ratnums_t constraint_rates = {
390 .nrats = 1,
391 .rats = &analog_clock
392 };
393
394 chip->reg_control &= ~CTL_DA_IOM_DA;
395 runtime->hw = snd_bt87x_analog_hw;
396 return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
397 &constraint_rates);
398 }
399
400 static int snd_bt87x_pcm_open(snd_pcm_substream_t *substream)
401 {
402 bt87x_t *chip = snd_pcm_substream_chip(substream);
403 snd_pcm_runtime_t *runtime = substream->runtime;
404 int err;
405
406 if (test_and_set_bit(0, &chip->opened))
407 return -EBUSY;
408
409 if (substream->pcm->device == DEVICE_DIGITAL)
410 err = snd_bt87x_set_digital_hw(chip, runtime);
411 else
412 err = snd_bt87x_set_analog_hw(chip, runtime);
413 if (err < 0)
414 goto _error;
415
416 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
417 if (err < 0)
418 goto _error;
419
420 chip->substream = substream;
421 return 0;
422
423 _error:
424 clear_bit(0, &chip->opened);
425 smp_mb__after_clear_bit();
426 return err;
427 }
428
429 static int snd_bt87x_close(snd_pcm_substream_t *substream)
430 {
431 bt87x_t *chip = snd_pcm_substream_chip(substream);
432
433 chip->substream = NULL;
434 clear_bit(0, &chip->opened);
435 smp_mb__after_clear_bit();
436 return 0;
437 }
438
439 static int snd_bt87x_hw_params(snd_pcm_substream_t *substream,
440 snd_pcm_hw_params_t *hw_params)
441 {
442 bt87x_t *chip = snd_pcm_substream_chip(substream);
443 int err;
444
445 err = snd_pcm_lib_malloc_pages(substream,
446 params_buffer_bytes(hw_params));
447 if (err < 0)
448 return err;
449 return snd_bt87x_create_risc(chip, substream,
450 params_periods(hw_params),
451 params_period_bytes(hw_params));
452 }
453
454 static int snd_bt87x_hw_free(snd_pcm_substream_t *substream)
455 {
456 bt87x_t *chip = snd_pcm_substream_chip(substream);
457
458 snd_bt87x_free_risc(chip);
459 snd_pcm_lib_free_pages(substream);
460 return 0;
461 }
462
463 static int snd_bt87x_prepare(snd_pcm_substream_t *substream)
464 {
465 bt87x_t *chip = snd_pcm_substream_chip(substream);
466 snd_pcm_runtime_t *runtime = substream->runtime;
467 int decimation;
468
469 spin_lock_irq(&chip->reg_lock);
470 chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
471 decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
472 chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
473 if (runtime->format == SNDRV_PCM_FORMAT_S8)
474 chip->reg_control |= CTL_DA_SBR;
475 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
476 spin_unlock_irq(&chip->reg_lock);
477 return 0;
478 }
479
480 static int snd_bt87x_start(bt87x_t *chip)
481 {
482 spin_lock(&chip->reg_lock);
483 chip->current_line = 0;
484 chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
485 snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
486 snd_bt87x_writel(chip, REG_PACKET_LEN,
487 chip->line_bytes | (chip->lines << 16));
488 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
489 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
490 spin_unlock(&chip->reg_lock);
491 return 0;
492 }
493
494 static int snd_bt87x_stop(bt87x_t *chip)
495 {
496 spin_lock(&chip->reg_lock);
497 chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
498 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
499 snd_bt87x_writel(chip, REG_INT_MASK, 0);
500 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
501 spin_unlock(&chip->reg_lock);
502 return 0;
503 }
504
505 static int snd_bt87x_trigger(snd_pcm_substream_t *substream, int cmd)
506 {
507 bt87x_t *chip = snd_pcm_substream_chip(substream);
508
509 switch (cmd) {
510 case SNDRV_PCM_TRIGGER_START:
511 return snd_bt87x_start(chip);
512 case SNDRV_PCM_TRIGGER_STOP:
513 return snd_bt87x_stop(chip);
514 default:
515 return -EINVAL;
516 }
517 }
518
519 static snd_pcm_uframes_t snd_bt87x_pointer(snd_pcm_substream_t *substream)
520 {
521 bt87x_t *chip = snd_pcm_substream_chip(substream);
522 snd_pcm_runtime_t *runtime = substream->runtime;
523
524 return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
525 }
526
527 static snd_pcm_ops_t snd_bt87x_pcm_ops = {
528 .open = snd_bt87x_pcm_open,
529 .close = snd_bt87x_close,
530 .ioctl = snd_pcm_lib_ioctl,
531 .hw_params = snd_bt87x_hw_params,
532 .hw_free = snd_bt87x_hw_free,
533 .prepare = snd_bt87x_prepare,
534 .trigger = snd_bt87x_trigger,
535 .pointer = snd_bt87x_pointer,
536 .page = snd_pcm_sgbuf_ops_page,
537 };
538
539 static int snd_bt87x_capture_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
540 {
541 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
542 info->count = 1;
543 info->value.integer.min = 0;
544 info->value.integer.max = 15;
545 return 0;
546 }
547
548 static int snd_bt87x_capture_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
549 {
550 bt87x_t *chip = snd_kcontrol_chip(kcontrol);
551
552 value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
553 return 0;
554 }
555
556 static int snd_bt87x_capture_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
557 {
558 bt87x_t *chip = snd_kcontrol_chip(kcontrol);
559 u32 old_control;
560 int changed;
561
562 spin_lock_irq(&chip->reg_lock);
563 old_control = chip->reg_control;
564 chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
565 | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
566 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
567 changed = old_control != chip->reg_control;
568 spin_unlock_irq(&chip->reg_lock);
569 return changed;
570 }
571
572 static snd_kcontrol_new_t snd_bt87x_capture_volume = {
573 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
574 .name = "Capture Volume",
575 .info = snd_bt87x_capture_volume_info,
576 .get = snd_bt87x_capture_volume_get,
577 .put = snd_bt87x_capture_volume_put,
578 };
579
580 static int snd_bt87x_capture_boost_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
581 {
582 info->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
583 info->count = 1;
584 info->value.integer.min = 0;
585 info->value.integer.max = 1;
586 return 0;
587 }
588
589 static int snd_bt87x_capture_boost_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
590 {
591 bt87x_t *chip = snd_kcontrol_chip(kcontrol);
592
593 value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
594 return 0;
595 }
596
597 static int snd_bt87x_capture_boost_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
598 {
599 bt87x_t *chip = snd_kcontrol_chip(kcontrol);
600 u32 old_control;
601 int changed;
602
603 spin_lock_irq(&chip->reg_lock);
604 old_control = chip->reg_control;
605 chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
606 | (value->value.integer.value[0] ? CTL_A_G2X : 0);
607 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
608 changed = chip->reg_control != old_control;
609 spin_unlock_irq(&chip->reg_lock);
610 return changed;
611 }
612
613 static snd_kcontrol_new_t snd_bt87x_capture_boost = {
614 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
615 .name = "Capture Boost",
616 .info = snd_bt87x_capture_boost_info,
617 .get = snd_bt87x_capture_boost_get,
618 .put = snd_bt87x_capture_boost_put,
619 };
620
621 static int snd_bt87x_capture_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
622 {
623 static char *texts[3] = {"TV Tuner", "FM", "Mic/Line"};
624
625 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
626 info->count = 1;
627 info->value.enumerated.items = 3;
628 if (info->value.enumerated.item > 2)
629 info->value.enumerated.item = 2;
630 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
631 return 0;
632 }
633
634 static int snd_bt87x_capture_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
635 {
636 bt87x_t *chip = snd_kcontrol_chip(kcontrol);
637
638 value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
639 return 0;
640 }
641
642 static int snd_bt87x_capture_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
643 {
644 bt87x_t *chip = snd_kcontrol_chip(kcontrol);
645 u32 old_control;
646 int changed;
647
648 spin_lock_irq(&chip->reg_lock);
649 old_control = chip->reg_control;
650 chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
651 | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
652 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
653 changed = chip->reg_control != old_control;
654 spin_unlock_irq(&chip->reg_lock);
655 return changed;
656 }
657
658 static snd_kcontrol_new_t snd_bt87x_capture_source = {
659 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
660 .name = "Capture Source",
661 .info = snd_bt87x_capture_source_info,
662 .get = snd_bt87x_capture_source_get,
663 .put = snd_bt87x_capture_source_put,
664 };
665
666 static int snd_bt87x_free(bt87x_t *chip)
667 {
668 if (chip->mmio) {
669 snd_bt87x_stop(chip);
670 if (chip->irq >= 0)
671 synchronize_irq(chip->irq);
672
673 iounmap(chip->mmio);
674 }
675 if (chip->irq >= 0)
676 free_irq(chip->irq, chip);
677 pci_release_regions(chip->pci);
678 pci_disable_device(chip->pci);
679 kfree(chip);
680 return 0;
681 }
682
683 static int snd_bt87x_dev_free(snd_device_t *device)
684 {
685 bt87x_t *chip = device->device_data;
686 return snd_bt87x_free(chip);
687 }
688
689 static int __devinit snd_bt87x_pcm(bt87x_t *chip, int device, char *name)
690 {
691 int err;
692 snd_pcm_t *pcm;
693
694 err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
695 if (err < 0)
696 return err;
697 pcm->private_data = chip;
698 strcpy(pcm->name, name);
699 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
700 return snd_pcm_lib_preallocate_pages_for_all(pcm,
701 SNDRV_DMA_TYPE_DEV_SG,
702 snd_dma_pci_data(chip->pci),
703 128 * 1024,
704 (255 * 4092 + 1023) & ~1023);
705 }
706
707 static int __devinit snd_bt87x_create(snd_card_t *card,
708 struct pci_dev *pci,
709 bt87x_t **rchip)
710 {
711 bt87x_t *chip;
712 int err;
713 static snd_device_ops_t ops = {
714 .dev_free = snd_bt87x_dev_free
715 };
716
717 *rchip = NULL;
718
719 err = pci_enable_device(pci);
720 if (err < 0)
721 return err;
722
723 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
724 if (!chip) {
725 pci_disable_device(pci);
726 return -ENOMEM;
727 }
728 chip->card = card;
729 chip->pci = pci;
730 chip->irq = -1;
731 spin_lock_init(&chip->reg_lock);
732
733 if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
734 kfree(chip);
735 pci_disable_device(pci);
736 return err;
737 }
738 chip->mmio = ioremap_nocache(pci_resource_start(pci, 0),
739 pci_resource_len(pci, 0));
740 if (!chip->mmio) {
741 snd_bt87x_free(chip);
742 snd_printk(KERN_ERR "cannot remap io memory\n");
743 return -ENOMEM;
744 }
745
746 chip->reg_control = CTL_DA_ES2 | CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
747 chip->interrupt_mask = MY_INTERRUPTS;
748 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
749 snd_bt87x_writel(chip, REG_INT_MASK, 0);
750 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
751
752 if (request_irq(pci->irq, snd_bt87x_interrupt, SA_INTERRUPT | SA_SHIRQ,
753 "Bt87x audio", chip)) {
754 snd_bt87x_free(chip);
755 snd_printk(KERN_ERR "cannot grab irq\n");
756 return -EBUSY;
757 }
758 chip->irq = pci->irq;
759 pci_set_master(pci);
760 synchronize_irq(chip->irq);
761
762 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
763 if (err < 0) {
764 snd_bt87x_free(chip);
765 return err;
766 }
767 snd_card_set_dev(card, &pci->dev);
768 *rchip = chip;
769 return 0;
770 }
771
772 #define BT_DEVICE(chip, subvend, subdev, rate) \
773 { .vendor = PCI_VENDOR_ID_BROOKTREE, \
774 .device = PCI_DEVICE_ID_BROOKTREE_##chip, \
775 .subvendor = subvend, .subdevice = subdev, \
776 .driver_data = rate }
777
778 /* driver_data is the default digital_rate value for that device */
779 static struct pci_device_id snd_bt87x_ids[] = {
780 BT_DEVICE(878, 0x0070, 0x13eb, 32000), /* Hauppauge WinTV series */
781 BT_DEVICE(879, 0x0070, 0x13eb, 32000), /* Hauppauge WinTV series */
782 BT_DEVICE(878, 0x0070, 0xff01, 44100), /* Viewcast Osprey 200 */
783 { }
784 };
785 MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
786
787 /* cards known not to have audio
788 * (DVB cards use the audio function to transfer MPEG data) */
789 static struct {
790 unsigned short subvendor, subdevice;
791 } blacklist[] __devinitdata = {
792 {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
793 {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
794 {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
795 {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
796 {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
797 {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
798 {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
799 };
800
801 /* return the rate of the card, or a negative value if it's blacklisted */
802 static int __devinit snd_bt87x_detect_card(struct pci_dev *pci)
803 {
804 int i;
805 const struct pci_device_id *supported;
806
807 supported = pci_match_device(snd_bt87x_ids, pci);
808 if (supported)
809 return supported->driver_data;
810
811 for (i = 0; i < ARRAY_SIZE(blacklist); ++i)
812 if (blacklist[i].subvendor == pci->subsystem_vendor &&
813 blacklist[i].subdevice == pci->subsystem_device) {
814 snd_printdd(KERN_INFO "card %#04x:%#04x has no audio\n",
815 pci->subsystem_vendor, pci->subsystem_device);
816 return -EBUSY;
817 }
818
819 snd_printk(KERN_INFO "unknown card %#04x:%#04x, using default rate 32000\n",
820 pci->subsystem_vendor, pci->subsystem_device);
821 snd_printk(KERN_DEBUG "please mail id, board name, and, "
822 "if it works, the correct digital_rate option to "
823 "<alsa-devel@lists.sf.net>\n");
824 return 32000; /* default rate */
825 }
826
827 static int __devinit snd_bt87x_probe(struct pci_dev *pci,
828 const struct pci_device_id *pci_id)
829 {
830 static int dev;
831 snd_card_t *card;
832 bt87x_t *chip;
833 int err, rate;
834
835 rate = pci_id->driver_data;
836 if (! rate)
837 if ((rate = snd_bt87x_detect_card(pci)) <= 0)
838 return -ENODEV;
839
840 if (dev >= SNDRV_CARDS)
841 return -ENODEV;
842 if (!enable[dev]) {
843 ++dev;
844 return -ENOENT;
845 }
846
847 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
848 if (!card)
849 return -ENOMEM;
850
851 err = snd_bt87x_create(card, pci, &chip);
852 if (err < 0)
853 goto _error;
854
855 if (digital_rate[dev] > 0)
856 chip->dig_rate = digital_rate[dev];
857 else
858 chip->dig_rate = rate;
859
860 err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
861 if (err < 0)
862 goto _error;
863 err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
864 if (err < 0)
865 goto _error;
866
867 err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_volume, chip));
868 if (err < 0)
869 goto _error;
870 err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_boost, chip));
871 if (err < 0)
872 goto _error;
873 err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_source, chip));
874 if (err < 0)
875 goto _error;
876
877 strcpy(card->driver, "Bt87x");
878 sprintf(card->shortname, "Brooktree Bt%x", pci->device);
879 sprintf(card->longname, "%s at %#lx, irq %i",
880 card->shortname, pci_resource_start(pci, 0), chip->irq);
881 strcpy(card->mixername, "Bt87x");
882
883 err = snd_card_register(card);
884 if (err < 0)
885 goto _error;
886
887 pci_set_drvdata(pci, card);
888 ++dev;
889 return 0;
890
891 _error:
892 snd_card_free(card);
893 return err;
894 }
895
896 static void __devexit snd_bt87x_remove(struct pci_dev *pci)
897 {
898 snd_card_free(pci_get_drvdata(pci));
899 pci_set_drvdata(pci, NULL);
900 }
901
902 /* default entries for all Bt87x cards - it's not exported */
903 /* driver_data is set to 0 to call detection */
904 static struct pci_device_id snd_bt87x_default_ids[] = {
905 BT_DEVICE(878, PCI_ANY_ID, PCI_ANY_ID, 0),
906 BT_DEVICE(879, PCI_ANY_ID, PCI_ANY_ID, 0),
907 { }
908 };
909
910 static struct pci_driver driver = {
911 .name = "Bt87x",
912 .id_table = snd_bt87x_ids,
913 .probe = snd_bt87x_probe,
914 .remove = __devexit_p(snd_bt87x_remove),
915 };
916
917 static int __init alsa_card_bt87x_init(void)
918 {
919 if (load_all)
920 driver.id_table = snd_bt87x_default_ids;
921 return pci_module_init(&driver);
922 }
923
924 static void __exit alsa_card_bt87x_exit(void)
925 {
926 pci_unregister_driver(&driver);
927 }
928
929 module_init(alsa_card_bt87x_init)
930 module_exit(alsa_card_bt87x_exit)
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