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[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / sound / pci / ice1712 / ice1724.c
blob95500f06f0c62375b391bd79615b2719dfc667f6
1 /*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
5 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25 #include <sound/driver.h>
26 #include <asm/io.h>
27 #include <linux/delay.h>
28 #include <linux/interrupt.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/slab.h>
32 #include <linux/moduleparam.h>
33 #include <sound/core.h>
34 #include <sound/info.h>
35 #include <sound/mpu401.h>
36 #include <sound/initval.h>
37
38 #include <sound/asoundef.h>
39
40 #include "ice1712.h"
41 #include "envy24ht.h"
42
43 /* lowlevel routines */
44 #include "amp.h"
45 #include "revo.h"
46 #include "aureon.h"
47 #include "vt1720_mobo.h"
48 #include "pontis.h"
49 #include "prodigy192.h"
50 #include "juli.h"
51 #include "phase.h"
52
53
54 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
55 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
56 MODULE_LICENSE("GPL");
57 MODULE_SUPPORTED_DEVICE("{"
58 REVO_DEVICE_DESC
59 AMP_AUDIO2000_DEVICE_DESC
60 AUREON_DEVICE_DESC
61 VT1720_MOBO_DEVICE_DESC
62 PONTIS_DEVICE_DESC
63 PRODIGY192_DEVICE_DESC
64 JULI_DEVICE_DESC
65 PHASE_DEVICE_DESC
66 "{VIA,VT1720},"
67 "{VIA,VT1724},"
68 "{ICEnsemble,Generic ICE1724},"
69 "{ICEnsemble,Generic Envy24HT}"
70 "{ICEnsemble,Generic Envy24PT}}");
71
72 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
73 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
74 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
75 static char *model[SNDRV_CARDS];
76
77 module_param_array(index, int, NULL, 0444);
78 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
79 module_param_array(id, charp, NULL, 0444);
80 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
81 module_param_array(enable, bool, NULL, 0444);
82 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
83 module_param_array(model, charp, NULL, 0444);
84 MODULE_PARM_DESC(model, "Use the given board model.");
85
86 #ifndef PCI_VENDOR_ID_ICE
87 #define PCI_VENDOR_ID_ICE 0x1412
88 #endif
89 #ifndef PCI_DEVICE_ID_VT1724
90 #define PCI_DEVICE_ID_VT1724 0x1724
91 #endif
92
93 /* Both VT1720 and VT1724 have the same PCI IDs */
94 static struct pci_device_id snd_vt1724_ids[] = {
95 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
96 { 0, }
97 };
98
99 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
100
101
102 static int PRO_RATE_LOCKED;
103 static int PRO_RATE_RESET = 1;
104 static unsigned int PRO_RATE_DEFAULT = 44100;
105
106 /*
107 * Basic I/O
108 */
109
110 /* check whether the clock mode is spdif-in */
111 static inline int is_spdif_master(ice1712_t *ice)
112 {
113 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
114 }
115
116 static inline int is_pro_rate_locked(ice1712_t *ice)
117 {
118 return is_spdif_master(ice) || PRO_RATE_LOCKED;
119 }
120
121 /*
122 * ac97 section
123 */
124
125 static unsigned char snd_vt1724_ac97_ready(ice1712_t *ice)
126 {
127 unsigned char old_cmd;
128 int tm;
129 for (tm = 0; tm < 0x10000; tm++) {
130 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
131 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
132 continue;
133 if (!(old_cmd & VT1724_AC97_READY))
134 continue;
135 return old_cmd;
136 }
137 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
138 return old_cmd;
139 }
140
141 static int snd_vt1724_ac97_wait_bit(ice1712_t *ice, unsigned char bit)
142 {
143 int tm;
144 for (tm = 0; tm < 0x10000; tm++)
145 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
146 return 0;
147 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
148 return -EIO;
149 }
150
151 static void snd_vt1724_ac97_write(ac97_t *ac97,
152 unsigned short reg,
153 unsigned short val)
154 {
155 ice1712_t *ice = (ice1712_t *)ac97->private_data;
156 unsigned char old_cmd;
157
158 old_cmd = snd_vt1724_ac97_ready(ice);
159 old_cmd &= ~VT1724_AC97_ID_MASK;
160 old_cmd |= ac97->num;
161 outb(reg, ICEMT1724(ice, AC97_INDEX));
162 outw(val, ICEMT1724(ice, AC97_DATA));
163 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
164 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
165 }
166
167 static unsigned short snd_vt1724_ac97_read(ac97_t *ac97, unsigned short reg)
168 {
169 ice1712_t *ice = (ice1712_t *)ac97->private_data;
170 unsigned char old_cmd;
171
172 old_cmd = snd_vt1724_ac97_ready(ice);
173 old_cmd &= ~VT1724_AC97_ID_MASK;
174 old_cmd |= ac97->num;
175 outb(reg, ICEMT1724(ice, AC97_INDEX));
176 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
177 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
178 return ~0;
179 return inw(ICEMT1724(ice, AC97_DATA));
180 }
181
182
183 /*
184 * GPIO operations
185 */
186
187 /* set gpio direction 0 = read, 1 = write */
188 static void snd_vt1724_set_gpio_dir(ice1712_t *ice, unsigned int data)
189 {
190 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
191 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
192 }
193
194 /* set the gpio mask (0 = writable) */
195 static void snd_vt1724_set_gpio_mask(ice1712_t *ice, unsigned int data)
196 {
197 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
198 if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
199 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
200 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
201 }
202
203 static void snd_vt1724_set_gpio_data(ice1712_t *ice, unsigned int data)
204 {
205 outw(data, ICEREG1724(ice, GPIO_DATA));
206 if (! ice->vt1720)
207 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
208 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
209 }
210
211 static unsigned int snd_vt1724_get_gpio_data(ice1712_t *ice)
212 {
213 unsigned int data;
214 if (! ice->vt1720)
215 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
216 else
217 data = 0;
218 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
219 return data;
220 }
221
222 /*
223 * Interrupt handler
224 */
225
226 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs)
227 {
228 ice1712_t *ice = dev_id;
229 unsigned char status;
230 int handled = 0;
231
232 while (1) {
233 status = inb(ICEREG1724(ice, IRQSTAT));
234 if (status == 0)
235 break;
236
237 handled = 1;
238 /* these should probably be separated at some point,
239 but as we don't currently have MPU support on the board I will leave it */
240 if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
241 if (ice->rmidi[0])
242 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
243 outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
244 status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
245 }
246 if (status & VT1724_IRQ_MTPCM) {
247 /*
248 * Multi-track PCM
249 * PCM assignment are:
250 * Playback DMA0 (M/C) = playback_pro_substream
251 * Playback DMA1 = playback_con_substream_ds[0]
252 * Playback DMA2 = playback_con_substream_ds[1]
253 * Playback DMA3 = playback_con_substream_ds[2]
254 * Playback DMA4 (SPDIF) = playback_con_substream
255 * Record DMA0 = capture_pro_substream
256 * Record DMA1 = capture_con_substream
257 */
258 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
259 if (mtstat & VT1724_MULTI_PDMA0) {
260 if (ice->playback_pro_substream)
261 snd_pcm_period_elapsed(ice->playback_pro_substream);
262 }
263 if (mtstat & VT1724_MULTI_RDMA0) {
264 if (ice->capture_pro_substream)
265 snd_pcm_period_elapsed(ice->capture_pro_substream);
266 }
267 if (mtstat & VT1724_MULTI_PDMA1) {
268 if (ice->playback_con_substream_ds[0])
269 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
270 }
271 if (mtstat & VT1724_MULTI_PDMA2) {
272 if (ice->playback_con_substream_ds[1])
273 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
274 }
275 if (mtstat & VT1724_MULTI_PDMA3) {
276 if (ice->playback_con_substream_ds[2])
277 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
278 }
279 if (mtstat & VT1724_MULTI_PDMA4) {
280 if (ice->playback_con_substream)
281 snd_pcm_period_elapsed(ice->playback_con_substream);
282 }
283 if (mtstat & VT1724_MULTI_RDMA1) {
284 if (ice->capture_con_substream)
285 snd_pcm_period_elapsed(ice->capture_con_substream);
286 }
287 /* ack anyway to avoid freeze */
288 outb(mtstat, ICEMT1724(ice, IRQ));
289 /* ought to really handle this properly */
290 if (mtstat & VT1724_MULTI_FIFO_ERR) {
291 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
292 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
293 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
294 /* If I don't do this, I get machine lockup due to continual interrupts */
295 }
296
297 }
298 }
299 return IRQ_RETVAL(handled);
300 }
301
302 /*
303 * PCM code - professional part (multitrack)
304 */
305
306 static unsigned int rates[] = {
307 8000, 9600, 11025, 12000, 16000, 22050, 24000,
308 32000, 44100, 48000, 64000, 88200, 96000,
309 176400, 192000,
310 };
311
312 static snd_pcm_hw_constraint_list_t hw_constraints_rates_96 = {
313 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
314 .list = rates,
315 .mask = 0,
316 };
317
318 static snd_pcm_hw_constraint_list_t hw_constraints_rates_48 = {
319 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
320 .list = rates,
321 .mask = 0,
322 };
323
324 static snd_pcm_hw_constraint_list_t hw_constraints_rates_192 = {
325 .count = ARRAY_SIZE(rates),
326 .list = rates,
327 .mask = 0,
328 };
329
330 struct vt1724_pcm_reg {
331 unsigned int addr; /* ADDR register offset */
332 unsigned int size; /* SIZE register offset */
333 unsigned int count; /* COUNT register offset */
334 unsigned int start; /* start & pause bit */
335 };
336
337 static int snd_vt1724_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
338 {
339 ice1712_t *ice = snd_pcm_substream_chip(substream);
340 unsigned char what;
341 unsigned char old;
342 struct list_head *pos;
343 snd_pcm_substream_t *s;
344
345 what = 0;
346 snd_pcm_group_for_each(pos, substream) {
347 struct vt1724_pcm_reg *reg;
348 s = snd_pcm_group_substream_entry(pos);
349 reg = s->runtime->private_data;
350 what |= reg->start;
351 snd_pcm_trigger_done(s, substream);
352 }
353
354 switch (cmd) {
355 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
356 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
357 spin_lock(&ice->reg_lock);
358 old = inb(ICEMT1724(ice, DMA_PAUSE));
359 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
360 old |= what;
361 else
362 old &= ~what;
363 outb(old, ICEMT1724(ice, DMA_PAUSE));
364 spin_unlock(&ice->reg_lock);
365 break;
366
367 case SNDRV_PCM_TRIGGER_START:
368 case SNDRV_PCM_TRIGGER_STOP:
369 spin_lock(&ice->reg_lock);
370 old = inb(ICEMT1724(ice, DMA_CONTROL));
371 if (cmd == SNDRV_PCM_TRIGGER_START)
372 old |= what;
373 else
374 old &= ~what;
375 outb(old, ICEMT1724(ice, DMA_CONTROL));
376 spin_unlock(&ice->reg_lock);
377 break;
378
379 default:
380 return -EINVAL;
381 }
382 return 0;
383 }
384
385 /*
386 */
387
388 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
389 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
390 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
391 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
392
393 static int get_max_rate(ice1712_t *ice)
394 {
395 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
396 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
397 return 192000;
398 else
399 return 96000;
400 } else
401 return 48000;
402 }
403
404 static void snd_vt1724_set_pro_rate(ice1712_t *ice, unsigned int rate, int force)
405 {
406 unsigned long flags;
407 unsigned char val, old;
408 unsigned int i, mclk_change;
409
410 if (rate > get_max_rate(ice))
411 return;
412
413 switch (rate) {
414 case 8000: val = 6; break;
415 case 9600: val = 3; break;
416 case 11025: val = 10; break;
417 case 12000: val = 2; break;
418 case 16000: val = 5; break;
419 case 22050: val = 9; break;
420 case 24000: val = 1; break;
421 case 32000: val = 4; break;
422 case 44100: val = 8; break;
423 case 48000: val = 0; break;
424 case 64000: val = 15; break;
425 case 88200: val = 11; break;
426 case 96000: val = 7; break;
427 case 176400: val = 12; break;
428 case 192000: val = 14; break;
429 default:
430 snd_BUG();
431 val = 0;
432 break;
433 }
434
435 spin_lock_irqsave(&ice->reg_lock, flags);
436 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
437 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
438 /* running? we cannot change the rate now... */
439 spin_unlock_irqrestore(&ice->reg_lock, flags);
440 return;
441 }
442 if (!force && is_pro_rate_locked(ice)) {
443 spin_unlock_irqrestore(&ice->reg_lock, flags);
444 return;
445 }
446
447 old = inb(ICEMT1724(ice, RATE));
448 if (force || old != val)
449 outb(val, ICEMT1724(ice, RATE));
450 else if (rate == ice->cur_rate) {
451 spin_unlock_irqrestore(&ice->reg_lock, flags);
452 return;
453 }
454
455 ice->cur_rate = rate;
456
457 /* check MT02 */
458 mclk_change = 0;
459 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
460 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
461 if (rate > 96000)
462 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
463 else
464 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
465 if (val != old) {
466 outb(val, ICEMT1724(ice, I2S_FORMAT));
467 mclk_change = 1;
468 }
469 }
470 spin_unlock_irqrestore(&ice->reg_lock, flags);
471
472 if (mclk_change && ice->gpio.i2s_mclk_changed)
473 ice->gpio.i2s_mclk_changed(ice);
474 if (ice->gpio.set_pro_rate)
475 ice->gpio.set_pro_rate(ice, rate);
476
477 /* set up codecs */
478 for (i = 0; i < ice->akm_codecs; i++) {
479 if (ice->akm[i].ops.set_rate_val)
480 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
481 }
482 if (ice->spdif.ops.setup_rate)
483 ice->spdif.ops.setup_rate(ice, rate);
484 }
485
486 static int snd_vt1724_pcm_hw_params(snd_pcm_substream_t * substream,
487 snd_pcm_hw_params_t * hw_params)
488 {
489 ice1712_t *ice = snd_pcm_substream_chip(substream);
490 int i, chs;
491
492 chs = params_channels(hw_params);
493 down(&ice->open_mutex);
494 /* mark surround channels */
495 if (substream == ice->playback_pro_substream) {
496 /* PDMA0 can be multi-channel up to 8 */
497 chs = chs / 2 - 1;
498 for (i = 0; i < chs; i++) {
499 if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
500 up(&ice->open_mutex);
501 return -EBUSY;
502 }
503 ice->pcm_reserved[i] = substream;
504 }
505 for (; i < 3; i++) {
506 if (ice->pcm_reserved[i] == substream)
507 ice->pcm_reserved[i] = NULL;
508 }
509 } else {
510 for (i = 0; i < 3; i++) {
511 /* check individual playback stream */
512 if (ice->playback_con_substream_ds[i] == substream) {
513 if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
514 up(&ice->open_mutex);
515 return -EBUSY;
516 }
517 ice->pcm_reserved[i] = substream;
518 break;
519 }
520 }
521 }
522 up(&ice->open_mutex);
523 snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
524 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
525 }
526
527 static int snd_vt1724_pcm_hw_free(snd_pcm_substream_t * substream)
528 {
529 ice1712_t *ice = snd_pcm_substream_chip(substream);
530 int i;
531
532 down(&ice->open_mutex);
533 /* unmark surround channels */
534 for (i = 0; i < 3; i++)
535 if (ice->pcm_reserved[i] == substream)
536 ice->pcm_reserved[i] = NULL;
537 up(&ice->open_mutex);
538 return snd_pcm_lib_free_pages(substream);
539 }
540
541 static int snd_vt1724_playback_pro_prepare(snd_pcm_substream_t * substream)
542 {
543 ice1712_t *ice = snd_pcm_substream_chip(substream);
544 unsigned char val;
545 unsigned int size;
546
547 spin_lock_irq(&ice->reg_lock);
548 val = (8 - substream->runtime->channels) >> 1;
549 outb(val, ICEMT1724(ice, BURST));
550
551 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
552
553 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
554 // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
555 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
556 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
557 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
558 // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
559 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
560 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
561
562 spin_unlock_irq(&ice->reg_lock);
563
564 // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
565 return 0;
566 }
567
568 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(snd_pcm_substream_t * substream)
569 {
570 ice1712_t *ice = snd_pcm_substream_chip(substream);
571 size_t ptr;
572
573 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
574 return 0;
575 #if 0 /* read PLAYBACK_ADDR */
576 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
577 if (ptr < substream->runtime->dma_addr) {
578 snd_printd("ice1724: invalid negative ptr\n");
579 return 0;
580 }
581 ptr -= substream->runtime->dma_addr;
582 ptr = bytes_to_frames(substream->runtime, ptr);
583 if (ptr >= substream->runtime->buffer_size) {
584 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->period_size);
585 return 0;
586 }
587 #else /* read PLAYBACK_SIZE */
588 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
589 ptr = (ptr + 1) << 2;
590 ptr = bytes_to_frames(substream->runtime, ptr);
591 if (! ptr)
592 ;
593 else if (ptr <= substream->runtime->buffer_size)
594 ptr = substream->runtime->buffer_size - ptr;
595 else {
596 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
597 ptr = 0;
598 }
599 #endif
600 return ptr;
601 }
602
603 static int snd_vt1724_pcm_prepare(snd_pcm_substream_t *substream)
604 {
605 ice1712_t *ice = snd_pcm_substream_chip(substream);
606 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
607
608 spin_lock_irq(&ice->reg_lock);
609 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
610 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, ice->profi_port + reg->size);
611 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ice->profi_port + reg->count);
612 spin_unlock_irq(&ice->reg_lock);
613 return 0;
614 }
615
616 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(snd_pcm_substream_t *substream)
617 {
618 ice1712_t *ice = snd_pcm_substream_chip(substream);
619 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
620 size_t ptr;
621
622 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
623 return 0;
624 #if 0 /* use ADDR register */
625 ptr = inl(ice->profi_port + reg->addr);
626 ptr -= substream->runtime->dma_addr;
627 return bytes_to_frames(substream->runtime, ptr);
628 #else /* use SIZE register */
629 ptr = inw(ice->profi_port + reg->size);
630 ptr = (ptr + 1) << 2;
631 ptr = bytes_to_frames(substream->runtime, ptr);
632 if (! ptr)
633 ;
634 else if (ptr <= substream->runtime->buffer_size)
635 ptr = substream->runtime->buffer_size - ptr;
636 else {
637 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
638 ptr = 0;
639 }
640 return ptr;
641 #endif
642 }
643
644 static struct vt1724_pcm_reg vt1724_playback_pro_reg = {
645 .addr = VT1724_MT_PLAYBACK_ADDR,
646 .size = VT1724_MT_PLAYBACK_SIZE,
647 .count = VT1724_MT_PLAYBACK_COUNT,
648 .start = VT1724_PDMA0_START,
649 };
650
651 static struct vt1724_pcm_reg vt1724_capture_pro_reg = {
652 .addr = VT1724_MT_CAPTURE_ADDR,
653 .size = VT1724_MT_CAPTURE_SIZE,
654 .count = VT1724_MT_CAPTURE_COUNT,
655 .start = VT1724_RDMA0_START,
656 };
657
658 static snd_pcm_hardware_t snd_vt1724_playback_pro =
659 {
660 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
661 SNDRV_PCM_INFO_BLOCK_TRANSFER |
662 SNDRV_PCM_INFO_MMAP_VALID |
663 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
664 .formats = SNDRV_PCM_FMTBIT_S32_LE,
665 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
666 .rate_min = 8000,
667 .rate_max = 192000,
668 .channels_min = 2,
669 .channels_max = 8,
670 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
671 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
672 .period_bytes_max = (1UL << 21),
673 .periods_min = 2,
674 .periods_max = 1024,
675 };
676
677 static snd_pcm_hardware_t snd_vt1724_spdif =
678 {
679 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
680 SNDRV_PCM_INFO_BLOCK_TRANSFER |
681 SNDRV_PCM_INFO_MMAP_VALID |
682 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
683 .formats = SNDRV_PCM_FMTBIT_S32_LE,
684 .rates = SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000,
685 .rate_min = 32000,
686 .rate_max = 48000,
687 .channels_min = 2,
688 .channels_max = 2,
689 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
690 .period_bytes_min = 2 * 4 * 2,
691 .period_bytes_max = (1UL << 18),
692 .periods_min = 2,
693 .periods_max = 1024,
694 };
695
696 static snd_pcm_hardware_t snd_vt1724_2ch_stereo =
697 {
698 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
699 SNDRV_PCM_INFO_BLOCK_TRANSFER |
700 SNDRV_PCM_INFO_MMAP_VALID |
701 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
702 .formats = SNDRV_PCM_FMTBIT_S32_LE,
703 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
704 .rate_min = 8000,
705 .rate_max = 192000,
706 .channels_min = 2,
707 .channels_max = 2,
708 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
709 .period_bytes_min = 2 * 4 * 2,
710 .period_bytes_max = (1UL << 18),
711 .periods_min = 2,
712 .periods_max = 1024,
713 };
714
715 /*
716 * set rate constraints
717 */
718 static int set_rate_constraints(ice1712_t *ice, snd_pcm_substream_t *substream)
719 {
720 snd_pcm_runtime_t *runtime = substream->runtime;
721 if (ice->hw_rates) {
722 /* hardware specific */
723 runtime->hw.rate_min = ice->hw_rates->list[0];
724 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
725 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
726 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, ice->hw_rates);
727 }
728 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
729 /* I2S */
730 /* VT1720 doesn't support more than 96kHz */
731 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
732 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_192);
733 else {
734 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000;
735 runtime->hw.rate_max = 96000;
736 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_96);
737 }
738 } else if (ice->ac97) {
739 /* ACLINK */
740 runtime->hw.rate_max = 48000;
741 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
742 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_48);
743 }
744 return 0;
745 }
746
747 /* multi-channel playback needs alignment 8x32bit regardless of the channels
748 * actually used
749 */
750 #define VT1724_BUFFER_ALIGN 0x20
751
752 static int snd_vt1724_playback_pro_open(snd_pcm_substream_t * substream)
753 {
754 snd_pcm_runtime_t *runtime = substream->runtime;
755 ice1712_t *ice = snd_pcm_substream_chip(substream);
756 int chs;
757
758 runtime->private_data = &vt1724_playback_pro_reg;
759 ice->playback_pro_substream = substream;
760 runtime->hw = snd_vt1724_playback_pro;
761 snd_pcm_set_sync(substream);
762 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
763 set_rate_constraints(ice, substream);
764 down(&ice->open_mutex);
765 /* calculate the currently available channels */
766 for (chs = 0; chs < 3; chs++) {
767 if (ice->pcm_reserved[chs])
768 break;
769 }
770 chs = (chs + 1) * 2;
771 runtime->hw.channels_max = chs;
772 if (chs > 2) /* channels must be even */
773 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
774 up(&ice->open_mutex);
775 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
776 VT1724_BUFFER_ALIGN);
777 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
778 VT1724_BUFFER_ALIGN);
779 return 0;
780 }
781
782 static int snd_vt1724_capture_pro_open(snd_pcm_substream_t * substream)
783 {
784 ice1712_t *ice = snd_pcm_substream_chip(substream);
785 snd_pcm_runtime_t *runtime = substream->runtime;
786
787 runtime->private_data = &vt1724_capture_pro_reg;
788 ice->capture_pro_substream = substream;
789 runtime->hw = snd_vt1724_2ch_stereo;
790 snd_pcm_set_sync(substream);
791 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
792 set_rate_constraints(ice, substream);
793 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
794 VT1724_BUFFER_ALIGN);
795 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
796 VT1724_BUFFER_ALIGN);
797 return 0;
798 }
799
800 static int snd_vt1724_playback_pro_close(snd_pcm_substream_t * substream)
801 {
802 ice1712_t *ice = snd_pcm_substream_chip(substream);
803
804 if (PRO_RATE_RESET)
805 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
806 ice->playback_pro_substream = NULL;
807
808 return 0;
809 }
810
811 static int snd_vt1724_capture_pro_close(snd_pcm_substream_t * substream)
812 {
813 ice1712_t *ice = snd_pcm_substream_chip(substream);
814
815 if (PRO_RATE_RESET)
816 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
817 ice->capture_pro_substream = NULL;
818 return 0;
819 }
820
821 static snd_pcm_ops_t snd_vt1724_playback_pro_ops = {
822 .open = snd_vt1724_playback_pro_open,
823 .close = snd_vt1724_playback_pro_close,
824 .ioctl = snd_pcm_lib_ioctl,
825 .hw_params = snd_vt1724_pcm_hw_params,
826 .hw_free = snd_vt1724_pcm_hw_free,
827 .prepare = snd_vt1724_playback_pro_prepare,
828 .trigger = snd_vt1724_pcm_trigger,
829 .pointer = snd_vt1724_playback_pro_pointer,
830 };
831
832 static snd_pcm_ops_t snd_vt1724_capture_pro_ops = {
833 .open = snd_vt1724_capture_pro_open,
834 .close = snd_vt1724_capture_pro_close,
835 .ioctl = snd_pcm_lib_ioctl,
836 .hw_params = snd_vt1724_pcm_hw_params,
837 .hw_free = snd_vt1724_pcm_hw_free,
838 .prepare = snd_vt1724_pcm_prepare,
839 .trigger = snd_vt1724_pcm_trigger,
840 .pointer = snd_vt1724_pcm_pointer,
841 };
842
843 static int __devinit snd_vt1724_pcm_profi(ice1712_t * ice, int device)
844 {
845 snd_pcm_t *pcm;
846 int err;
847
848 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
849 if (err < 0)
850 return err;
851
852 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
853 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
854
855 pcm->private_data = ice;
856 pcm->info_flags = 0;
857 strcpy(pcm->name, "ICE1724");
858
859 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
860 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
861
862 ice->pcm_pro = pcm;
863
864 return 0;
865 }
866
867
868 /*
869 * SPDIF PCM
870 */
871
872 static struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
873 .addr = VT1724_MT_PDMA4_ADDR,
874 .size = VT1724_MT_PDMA4_SIZE,
875 .count = VT1724_MT_PDMA4_COUNT,
876 .start = VT1724_PDMA4_START,
877 };
878
879 static struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
880 .addr = VT1724_MT_RDMA1_ADDR,
881 .size = VT1724_MT_RDMA1_SIZE,
882 .count = VT1724_MT_RDMA1_COUNT,
883 .start = VT1724_RDMA1_START,
884 };
885
886 /* update spdif control bits; call with reg_lock */
887 static void update_spdif_bits(ice1712_t *ice, unsigned int val)
888 {
889 unsigned char cbit, disabled;
890
891 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
892 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
893 if (cbit != disabled)
894 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
895 outw(val, ICEMT1724(ice, SPDIF_CTRL));
896 if (cbit != disabled)
897 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
898 outw(val, ICEMT1724(ice, SPDIF_CTRL));
899 }
900
901 /* update SPDIF control bits according to the given rate */
902 static void update_spdif_rate(ice1712_t *ice, unsigned int rate)
903 {
904 unsigned int val, nval;
905 unsigned long flags;
906
907 spin_lock_irqsave(&ice->reg_lock, flags);
908 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
909 nval &= ~(7 << 12);
910 switch (rate) {
911 case 44100: break;
912 case 48000: nval |= 2 << 12; break;
913 case 32000: nval |= 3 << 12; break;
914 }
915 if (val != nval)
916 update_spdif_bits(ice, nval);
917 spin_unlock_irqrestore(&ice->reg_lock, flags);
918 }
919
920 static int snd_vt1724_playback_spdif_prepare(snd_pcm_substream_t * substream)
921 {
922 ice1712_t *ice = snd_pcm_substream_chip(substream);
923 if (! ice->force_pdma4)
924 update_spdif_rate(ice, substream->runtime->rate);
925 return snd_vt1724_pcm_prepare(substream);
926 }
927
928 static int snd_vt1724_playback_spdif_open(snd_pcm_substream_t *substream)
929 {
930 ice1712_t *ice = snd_pcm_substream_chip(substream);
931 snd_pcm_runtime_t *runtime = substream->runtime;
932
933 runtime->private_data = &vt1724_playback_spdif_reg;
934 ice->playback_con_substream = substream;
935 if (ice->force_pdma4) {
936 runtime->hw = snd_vt1724_2ch_stereo;
937 set_rate_constraints(ice, substream);
938 } else
939 runtime->hw = snd_vt1724_spdif;
940 snd_pcm_set_sync(substream);
941 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
942 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
943 VT1724_BUFFER_ALIGN);
944 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
945 VT1724_BUFFER_ALIGN);
946 return 0;
947 }
948
949 static int snd_vt1724_playback_spdif_close(snd_pcm_substream_t * substream)
950 {
951 ice1712_t *ice = snd_pcm_substream_chip(substream);
952
953 if (PRO_RATE_RESET)
954 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
955 ice->playback_con_substream = NULL;
956
957 return 0;
958 }
959
960 static int snd_vt1724_capture_spdif_open(snd_pcm_substream_t *substream)
961 {
962 ice1712_t *ice = snd_pcm_substream_chip(substream);
963 snd_pcm_runtime_t *runtime = substream->runtime;
964
965 runtime->private_data = &vt1724_capture_spdif_reg;
966 ice->capture_con_substream = substream;
967 if (ice->force_rdma1) {
968 runtime->hw = snd_vt1724_2ch_stereo;
969 set_rate_constraints(ice, substream);
970 } else
971 runtime->hw = snd_vt1724_spdif;
972 snd_pcm_set_sync(substream);
973 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
974 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
975 VT1724_BUFFER_ALIGN);
976 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
977 VT1724_BUFFER_ALIGN);
978 return 0;
979 }
980
981 static int snd_vt1724_capture_spdif_close(snd_pcm_substream_t * substream)
982 {
983 ice1712_t *ice = snd_pcm_substream_chip(substream);
984
985 if (PRO_RATE_RESET)
986 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
987 ice->capture_con_substream = NULL;
988
989 return 0;
990 }
991
992 static snd_pcm_ops_t snd_vt1724_playback_spdif_ops = {
993 .open = snd_vt1724_playback_spdif_open,
994 .close = snd_vt1724_playback_spdif_close,
995 .ioctl = snd_pcm_lib_ioctl,
996 .hw_params = snd_vt1724_pcm_hw_params,
997 .hw_free = snd_vt1724_pcm_hw_free,
998 .prepare = snd_vt1724_playback_spdif_prepare,
999 .trigger = snd_vt1724_pcm_trigger,
1000 .pointer = snd_vt1724_pcm_pointer,
1001 };
1002
1003 static snd_pcm_ops_t snd_vt1724_capture_spdif_ops = {
1004 .open = snd_vt1724_capture_spdif_open,
1005 .close = snd_vt1724_capture_spdif_close,
1006 .ioctl = snd_pcm_lib_ioctl,
1007 .hw_params = snd_vt1724_pcm_hw_params,
1008 .hw_free = snd_vt1724_pcm_hw_free,
1009 .prepare = snd_vt1724_pcm_prepare,
1010 .trigger = snd_vt1724_pcm_trigger,
1011 .pointer = snd_vt1724_pcm_pointer,
1012 };
1013
1014
1015 static int __devinit snd_vt1724_pcm_spdif(ice1712_t * ice, int device)
1016 {
1017 char *name;
1018 snd_pcm_t *pcm;
1019 int play, capt;
1020 int err;
1021
1022 if (ice->force_pdma4 ||
1023 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1024 play = 1;
1025 ice->has_spdif = 1;
1026 } else
1027 play = 0;
1028 if (ice->force_rdma1 ||
1029 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1030 capt = 1;
1031 ice->has_spdif = 1;
1032 } else
1033 capt = 0;
1034 if (! play && ! capt)
1035 return 0; /* no spdif device */
1036
1037 if (ice->force_pdma4 || ice->force_rdma1)
1038 name = "ICE1724 Secondary";
1039 else
1040 name = "IEC1724 IEC958";
1041 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1042 if (err < 0)
1043 return err;
1044
1045 if (play)
1046 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1047 &snd_vt1724_playback_spdif_ops);
1048 if (capt)
1049 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1050 &snd_vt1724_capture_spdif_ops);
1051
1052 pcm->private_data = ice;
1053 pcm->info_flags = 0;
1054 strcpy(pcm->name, name);
1055
1056 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1057 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
1058
1059 ice->pcm = pcm;
1060
1061 return 0;
1062 }
1063
1064
1065 /*
1066 * independent surround PCMs
1067 */
1068
1069 static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1070 {
1071 .addr = VT1724_MT_PDMA1_ADDR,
1072 .size = VT1724_MT_PDMA1_SIZE,
1073 .count = VT1724_MT_PDMA1_COUNT,
1074 .start = VT1724_PDMA1_START,
1075 },
1076 {
1077 .addr = VT1724_MT_PDMA2_ADDR,
1078 .size = VT1724_MT_PDMA2_SIZE,
1079 .count = VT1724_MT_PDMA2_COUNT,
1080 .start = VT1724_PDMA2_START,
1081 },
1082 {
1083 .addr = VT1724_MT_PDMA3_ADDR,
1084 .size = VT1724_MT_PDMA3_SIZE,
1085 .count = VT1724_MT_PDMA3_COUNT,
1086 .start = VT1724_PDMA3_START,
1087 },
1088 };
1089
1090 static int snd_vt1724_playback_indep_prepare(snd_pcm_substream_t * substream)
1091 {
1092 ice1712_t *ice = snd_pcm_substream_chip(substream);
1093 unsigned char val;
1094
1095 spin_lock_irq(&ice->reg_lock);
1096 val = 3 - substream->number;
1097 if (inb(ICEMT1724(ice, BURST)) < val)
1098 outb(val, ICEMT1724(ice, BURST));
1099 spin_unlock_irq(&ice->reg_lock);
1100 return snd_vt1724_pcm_prepare(substream);
1101 }
1102
1103 static int snd_vt1724_playback_indep_open(snd_pcm_substream_t *substream)
1104 {
1105 ice1712_t *ice = snd_pcm_substream_chip(substream);
1106 snd_pcm_runtime_t *runtime = substream->runtime;
1107
1108 down(&ice->open_mutex);
1109 /* already used by PDMA0? */
1110 if (ice->pcm_reserved[substream->number]) {
1111 up(&ice->open_mutex);
1112 return -EBUSY; /* FIXME: should handle blocking mode properly */
1113 }
1114 up(&ice->open_mutex);
1115 runtime->private_data = &vt1724_playback_dma_regs[substream->number];
1116 ice->playback_con_substream_ds[substream->number] = substream;
1117 runtime->hw = snd_vt1724_2ch_stereo;
1118 snd_pcm_set_sync(substream);
1119 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1120 set_rate_constraints(ice, substream);
1121 return 0;
1122 }
1123
1124 static int snd_vt1724_playback_indep_close(snd_pcm_substream_t * substream)
1125 {
1126 ice1712_t *ice = snd_pcm_substream_chip(substream);
1127
1128 if (PRO_RATE_RESET)
1129 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1130 ice->playback_con_substream_ds[substream->number] = NULL;
1131 ice->pcm_reserved[substream->number] = NULL;
1132
1133 return 0;
1134 }
1135
1136 static snd_pcm_ops_t snd_vt1724_playback_indep_ops = {
1137 .open = snd_vt1724_playback_indep_open,
1138 .close = snd_vt1724_playback_indep_close,
1139 .ioctl = snd_pcm_lib_ioctl,
1140 .hw_params = snd_vt1724_pcm_hw_params,
1141 .hw_free = snd_vt1724_pcm_hw_free,
1142 .prepare = snd_vt1724_playback_indep_prepare,
1143 .trigger = snd_vt1724_pcm_trigger,
1144 .pointer = snd_vt1724_pcm_pointer,
1145 };
1146
1147
1148 static int __devinit snd_vt1724_pcm_indep(ice1712_t * ice, int device)
1149 {
1150 snd_pcm_t *pcm;
1151 int play;
1152 int err;
1153
1154 play = ice->num_total_dacs / 2 - 1;
1155 if (play <= 0)
1156 return 0;
1157
1158 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1159 if (err < 0)
1160 return err;
1161
1162 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1163 &snd_vt1724_playback_indep_ops);
1164
1165 pcm->private_data = ice;
1166 pcm->info_flags = 0;
1167 strcpy(pcm->name, "ICE1724 Surround PCM");
1168
1169 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1170 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
1171
1172 ice->pcm_ds = pcm;
1173
1174 return 0;
1175 }
1176
1177
1178 /*
1179 * Mixer section
1180 */
1181
1182 static int __devinit snd_vt1724_ac97_mixer(ice1712_t * ice)
1183 {
1184 int err;
1185
1186 if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1187 ac97_bus_t *pbus;
1188 ac97_template_t ac97;
1189 static ac97_bus_ops_t ops = {
1190 .write = snd_vt1724_ac97_write,
1191 .read = snd_vt1724_ac97_read,
1192 };
1193
1194 /* cold reset */
1195 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1196 mdelay(5); /* FIXME */
1197 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1198
1199 if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
1200 return err;
1201 memset(&ac97, 0, sizeof(ac97));
1202 ac97.private_data = ice;
1203 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1204 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1205 else
1206 return 0;
1207 }
1208 /* I2S mixer only */
1209 strcat(ice->card->mixername, "ICE1724 - multitrack");
1210 return 0;
1211 }
1212
1213 /*
1214 *
1215 */
1216
1217 static inline unsigned int eeprom_triple(ice1712_t *ice, int idx)
1218 {
1219 return (unsigned int)ice->eeprom.data[idx] | \
1220 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1221 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1222 }
1223
1224 static void snd_vt1724_proc_read(snd_info_entry_t *entry,
1225 snd_info_buffer_t * buffer)
1226 {
1227 ice1712_t *ice = entry->private_data;
1228 unsigned int idx;
1229
1230 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1231 snd_iprintf(buffer, "EEPROM:\n");
1232
1233 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1234 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1235 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1236 snd_iprintf(buffer, " System Config : 0x%x\n", ice->eeprom.data[ICE_EEP2_SYSCONF]);
1237 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP2_ACLINK]);
1238 snd_iprintf(buffer, " I2S : 0x%x\n", ice->eeprom.data[ICE_EEP2_I2S]);
1239 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP2_SPDIF]);
1240 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1241 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1242 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1243 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1244 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1245
1246 snd_iprintf(buffer, "\nRegisters:\n");
1247
1248 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1249 for (idx = 0x0; idx < 0x20 ; idx++)
1250 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", idx, inb(ice->port+idx));
1251 for (idx = 0x0; idx < 0x30 ; idx++)
1252 snd_iprintf(buffer, " MT%02x : 0x%02x\n", idx, inb(ice->profi_port+idx));
1253 }
1254
1255 static void __devinit snd_vt1724_proc_init(ice1712_t * ice)
1256 {
1257 snd_info_entry_t *entry;
1258
1259 if (! snd_card_proc_new(ice->card, "ice1724", &entry))
1260 snd_info_set_text_ops(entry, ice, 1024, snd_vt1724_proc_read);
1261 }
1262
1263 /*
1264 *
1265 */
1266
1267 static int snd_vt1724_eeprom_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1268 {
1269 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1270 uinfo->count = sizeof(ice1712_eeprom_t);
1271 return 0;
1272 }
1273
1274 static int snd_vt1724_eeprom_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1275 {
1276 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1277
1278 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1279 return 0;
1280 }
1281
1282 static snd_kcontrol_new_t snd_vt1724_eeprom __devinitdata = {
1283 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1284 .name = "ICE1724 EEPROM",
1285 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1286 .info = snd_vt1724_eeprom_info,
1287 .get = snd_vt1724_eeprom_get
1288 };
1289
1290 /*
1291 */
1292 static int snd_vt1724_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1293 {
1294 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1295 uinfo->count = 1;
1296 return 0;
1297 }
1298
1299 static unsigned int encode_spdif_bits(snd_aes_iec958_t *diga)
1300 {
1301 unsigned int val;
1302
1303 val = diga->status[0] & 0x03; /* professional, non-audio */
1304 if (val & 0x01) {
1305 /* professional */
1306 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == IEC958_AES0_PRO_EMPHASIS_5015)
1307 val |= 1U << 3;
1308 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1309 case IEC958_AES0_PRO_FS_44100:
1310 break;
1311 case IEC958_AES0_PRO_FS_32000:
1312 val |= 3U << 12;
1313 break;
1314 default:
1315 val |= 2U << 12;
1316 break;
1317 }
1318 } else {
1319 /* consumer */
1320 val |= diga->status[1] & 0x04; /* copyright */
1321 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS)== IEC958_AES0_CON_EMPHASIS_5015)
1322 val |= 1U << 3;
1323 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1324 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1325 }
1326 return val;
1327 }
1328
1329 static void decode_spdif_bits(snd_aes_iec958_t *diga, unsigned int val)
1330 {
1331 memset(diga->status, 0, sizeof(diga->status));
1332 diga->status[0] = val & 0x03; /* professional, non-audio */
1333 if (val & 0x01) {
1334 /* professional */
1335 if (val & (1U << 3))
1336 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1337 switch ((val >> 12) & 0x7) {
1338 case 0:
1339 break;
1340 case 2:
1341 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1342 break;
1343 default:
1344 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1345 break;
1346 }
1347 } else {
1348 /* consumer */
1349 diga->status[0] |= val & (1U << 2); /* copyright */
1350 if (val & (1U << 3))
1351 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1352 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1353 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1354 }
1355 }
1356
1357 static int snd_vt1724_spdif_default_get(snd_kcontrol_t * kcontrol,
1358 snd_ctl_elem_value_t * ucontrol)
1359 {
1360 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1361 unsigned int val;
1362 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1363 decode_spdif_bits(&ucontrol->value.iec958, val);
1364 return 0;
1365 }
1366
1367 static int snd_vt1724_spdif_default_put(snd_kcontrol_t * kcontrol,
1368 snd_ctl_elem_value_t * ucontrol)
1369 {
1370 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1371 unsigned int val, old;
1372
1373 val = encode_spdif_bits(&ucontrol->value.iec958);
1374 spin_lock_irq(&ice->reg_lock);
1375 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1376 if (val != old)
1377 update_spdif_bits(ice, val);
1378 spin_unlock_irq(&ice->reg_lock);
1379 return (val != old);
1380 }
1381
1382 static snd_kcontrol_new_t snd_vt1724_spdif_default __devinitdata =
1383 {
1384 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1385 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1386 .info = snd_vt1724_spdif_info,
1387 .get = snd_vt1724_spdif_default_get,
1388 .put = snd_vt1724_spdif_default_put
1389 };
1390
1391 static int snd_vt1724_spdif_maskc_get(snd_kcontrol_t * kcontrol,
1392 snd_ctl_elem_value_t * ucontrol)
1393 {
1394 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1395 IEC958_AES0_PROFESSIONAL |
1396 IEC958_AES0_CON_NOT_COPYRIGHT |
1397 IEC958_AES0_CON_EMPHASIS;
1398 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1399 IEC958_AES1_CON_CATEGORY;
1400 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1401 return 0;
1402 }
1403
1404 static int snd_vt1724_spdif_maskp_get(snd_kcontrol_t * kcontrol,
1405 snd_ctl_elem_value_t * ucontrol)
1406 {
1407 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1408 IEC958_AES0_PROFESSIONAL |
1409 IEC958_AES0_PRO_FS |
1410 IEC958_AES0_PRO_EMPHASIS;
1411 return 0;
1412 }
1413
1414 static snd_kcontrol_new_t snd_vt1724_spdif_maskc __devinitdata =
1415 {
1416 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1417 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1418 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1419 .info = snd_vt1724_spdif_info,
1420 .get = snd_vt1724_spdif_maskc_get,
1421 };
1422
1423 static snd_kcontrol_new_t snd_vt1724_spdif_maskp __devinitdata =
1424 {
1425 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1426 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1427 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1428 .info = snd_vt1724_spdif_info,
1429 .get = snd_vt1724_spdif_maskp_get,
1430 };
1431
1432 static int snd_vt1724_spdif_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1433 {
1434 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1435 uinfo->count = 1;
1436 uinfo->value.integer.min = 0;
1437 uinfo->value.integer.max = 1;
1438 return 0;
1439 }
1440
1441 static int snd_vt1724_spdif_sw_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1442 {
1443 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1444 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1445 return 0;
1446 }
1447
1448 static int snd_vt1724_spdif_sw_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1449 {
1450 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1451 unsigned char old, val;
1452
1453 spin_lock_irq(&ice->reg_lock);
1454 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1455 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1456 if (ucontrol->value.integer.value[0])
1457 val |= VT1724_CFG_SPDIF_OUT_EN;
1458 if (old != val)
1459 outb(val, ICEREG1724(ice, SPDIF_CFG));
1460 spin_unlock_irq(&ice->reg_lock);
1461 return old != val;
1462 }
1463
1464 static snd_kcontrol_new_t snd_vt1724_spdif_switch __devinitdata =
1465 {
1466 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1467 /* FIXME: the following conflict with IEC958 Playback Route */
1468 // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
1469 .name = "IEC958 Output Switch",
1470 .info = snd_vt1724_spdif_sw_info,
1471 .get = snd_vt1724_spdif_sw_get,
1472 .put = snd_vt1724_spdif_sw_put
1473 };
1474
1475
1476 #if 0 /* NOT USED YET */
1477 /*
1478 * GPIO access from extern
1479 */
1480
1481 int snd_vt1724_gpio_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1482 {
1483 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1484 uinfo->count = 1;
1485 uinfo->value.integer.min = 0;
1486 uinfo->value.integer.max = 1;
1487 return 0;
1488 }
1489
1490 int snd_vt1724_gpio_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1491 {
1492 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1493 int shift = kcontrol->private_value & 0xff;
1494 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1495
1496 snd_ice1712_save_gpio_status(ice);
1497 ucontrol->value.integer.value[0] = (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1498 snd_ice1712_restore_gpio_status(ice);
1499 return 0;
1500 }
1501
1502 int snd_ice1712_gpio_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1503 {
1504 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1505 int shift = kcontrol->private_value & 0xff;
1506 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1507 unsigned int val, nval;
1508
1509 if (kcontrol->private_value & (1 << 31))
1510 return -EPERM;
1511 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1512 snd_ice1712_save_gpio_status(ice);
1513 val = snd_ice1712_gpio_read(ice);
1514 nval |= val & ~(1 << shift);
1515 if (val != nval)
1516 snd_ice1712_gpio_write(ice, nval);
1517 snd_ice1712_restore_gpio_status(ice);
1518 return val != nval;
1519 }
1520 #endif /* NOT USED YET */
1521
1522 /*
1523 * rate
1524 */
1525 static int snd_vt1724_pro_internal_clock_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1526 {
1527 static char *texts_1724[] = {
1528 "8000", /* 0: 6 */
1529 "9600", /* 1: 3 */
1530 "11025", /* 2: 10 */
1531 "12000", /* 3: 2 */
1532 "16000", /* 4: 5 */
1533 "22050", /* 5: 9 */
1534 "24000", /* 6: 1 */
1535 "32000", /* 7: 4 */
1536 "44100", /* 8: 8 */
1537 "48000", /* 9: 0 */
1538 "64000", /* 10: 15 */
1539 "88200", /* 11: 11 */
1540 "96000", /* 12: 7 */
1541 "176400", /* 13: 12 */
1542 "192000", /* 14: 14 */
1543 "IEC958 Input", /* 15: -- */
1544 };
1545 static char *texts_1720[] = {
1546 "8000", /* 0: 6 */
1547 "9600", /* 1: 3 */
1548 "11025", /* 2: 10 */
1549 "12000", /* 3: 2 */
1550 "16000", /* 4: 5 */
1551 "22050", /* 5: 9 */
1552 "24000", /* 6: 1 */
1553 "32000", /* 7: 4 */
1554 "44100", /* 8: 8 */
1555 "48000", /* 9: 0 */
1556 "64000", /* 10: 15 */
1557 "88200", /* 11: 11 */
1558 "96000", /* 12: 7 */
1559 "IEC958 Input", /* 13: -- */
1560 };
1561 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1562
1563 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1564 uinfo->count = 1;
1565 uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
1566 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1567 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1568 strcpy(uinfo->value.enumerated.name,
1569 ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
1570 texts_1724[uinfo->value.enumerated.item]);
1571 return 0;
1572 }
1573
1574 static int snd_vt1724_pro_internal_clock_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1575 {
1576 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1577 static unsigned char xlate[16] = {
1578 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
1579 };
1580 unsigned char val;
1581
1582 spin_lock_irq(&ice->reg_lock);
1583 if (is_spdif_master(ice)) {
1584 ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
1585 } else {
1586 val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
1587 if (val == 255) {
1588 snd_BUG();
1589 val = 0;
1590 }
1591 ucontrol->value.enumerated.item[0] = val;
1592 }
1593 spin_unlock_irq(&ice->reg_lock);
1594 return 0;
1595 }
1596
1597 static int snd_vt1724_pro_internal_clock_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1598 {
1599 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1600 unsigned char oval;
1601 int rate;
1602 int change = 0;
1603 int spdif = ice->vt1720 ? 13 : 15;
1604
1605 spin_lock_irq(&ice->reg_lock);
1606 oval = inb(ICEMT1724(ice, RATE));
1607 if (ucontrol->value.enumerated.item[0] == spdif) {
1608 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1609 } else {
1610 rate = rates[ucontrol->value.integer.value[0] % 15];
1611 if (rate <= get_max_rate(ice)) {
1612 PRO_RATE_DEFAULT = rate;
1613 spin_unlock_irq(&ice->reg_lock);
1614 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1615 spin_lock_irq(&ice->reg_lock);
1616 }
1617 }
1618 change = inb(ICEMT1724(ice, RATE)) != oval;
1619 spin_unlock_irq(&ice->reg_lock);
1620
1621 if ((oval & VT1724_SPDIF_MASTER) != (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
1622 /* notify akm chips as well */
1623 if (is_spdif_master(ice)) {
1624 unsigned int i;
1625 for (i = 0; i < ice->akm_codecs; i++) {
1626 if (ice->akm[i].ops.set_rate_val)
1627 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1628 }
1629 }
1630 }
1631 return change;
1632 }
1633
1634 static snd_kcontrol_new_t snd_vt1724_pro_internal_clock __devinitdata = {
1635 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1636 .name = "Multi Track Internal Clock",
1637 .info = snd_vt1724_pro_internal_clock_info,
1638 .get = snd_vt1724_pro_internal_clock_get,
1639 .put = snd_vt1724_pro_internal_clock_put
1640 };
1641
1642 static int snd_vt1724_pro_rate_locking_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1643 {
1644 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1645 uinfo->count = 1;
1646 uinfo->value.integer.min = 0;
1647 uinfo->value.integer.max = 1;
1648 return 0;
1649 }
1650
1651 static int snd_vt1724_pro_rate_locking_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1652 {
1653 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1654 return 0;
1655 }
1656
1657 static int snd_vt1724_pro_rate_locking_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1658 {
1659 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1660 int change = 0, nval;
1661
1662 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1663 spin_lock_irq(&ice->reg_lock);
1664 change = PRO_RATE_LOCKED != nval;
1665 PRO_RATE_LOCKED = nval;
1666 spin_unlock_irq(&ice->reg_lock);
1667 return change;
1668 }
1669
1670 static snd_kcontrol_new_t snd_vt1724_pro_rate_locking __devinitdata = {
1671 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1672 .name = "Multi Track Rate Locking",
1673 .info = snd_vt1724_pro_rate_locking_info,
1674 .get = snd_vt1724_pro_rate_locking_get,
1675 .put = snd_vt1724_pro_rate_locking_put
1676 };
1677
1678 static int snd_vt1724_pro_rate_reset_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1679 {
1680 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1681 uinfo->count = 1;
1682 uinfo->value.integer.min = 0;
1683 uinfo->value.integer.max = 1;
1684 return 0;
1685 }
1686
1687 static int snd_vt1724_pro_rate_reset_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1688 {
1689 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1690 return 0;
1691 }
1692
1693 static int snd_vt1724_pro_rate_reset_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1694 {
1695 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1696 int change = 0, nval;
1697
1698 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1699 spin_lock_irq(&ice->reg_lock);
1700 change = PRO_RATE_RESET != nval;
1701 PRO_RATE_RESET = nval;
1702 spin_unlock_irq(&ice->reg_lock);
1703 return change;
1704 }
1705
1706 static snd_kcontrol_new_t snd_vt1724_pro_rate_reset __devinitdata = {
1707 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1708 .name = "Multi Track Rate Reset",
1709 .info = snd_vt1724_pro_rate_reset_info,
1710 .get = snd_vt1724_pro_rate_reset_get,
1711 .put = snd_vt1724_pro_rate_reset_put
1712 };
1713
1714
1715 /*
1716 * routing
1717 */
1718 static int snd_vt1724_pro_route_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1719 {
1720 static char *texts[] = {
1721 "PCM Out", /* 0 */
1722 "H/W In 0", "H/W In 1", /* 1-2 */
1723 "IEC958 In L", "IEC958 In R", /* 3-4 */
1724 };
1725
1726 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1727 uinfo->count = 1;
1728 uinfo->value.enumerated.items = 5;
1729 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1730 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1731 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1732 return 0;
1733 }
1734
1735 static inline int analog_route_shift(int idx)
1736 {
1737 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1738 }
1739
1740 static inline int digital_route_shift(int idx)
1741 {
1742 return idx * 3;
1743 }
1744
1745 static int get_route_val(ice1712_t *ice, int shift)
1746 {
1747 unsigned long val;
1748 unsigned char eitem;
1749 static unsigned char xlate[8] = {
1750 0, 255, 1, 2, 255, 255, 3, 4,
1751 };
1752
1753 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1754 val >>= shift;
1755 val &= 7; //we now have 3 bits per output
1756 eitem = xlate[val];
1757 if (eitem == 255) {
1758 snd_BUG();
1759 return 0;
1760 }
1761 return eitem;
1762 }
1763
1764 static int put_route_val(ice1712_t *ice, unsigned int val, int shift)
1765 {
1766 unsigned int old_val, nval;
1767 int change;
1768 static unsigned char xroute[8] = {
1769 0, /* PCM */
1770 2, /* PSDIN0 Left */
1771 3, /* PSDIN0 Right */
1772 6, /* SPDIN Left */
1773 7, /* SPDIN Right */
1774 };
1775
1776 nval = xroute[val % 5];
1777 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1778 val &= ~(0x07 << shift);
1779 val |= nval << shift;
1780 change = val != old_val;
1781 if (change)
1782 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
1783 return change;
1784 }
1785
1786 static int snd_vt1724_pro_route_analog_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1787 {
1788 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1789 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1790 ucontrol->value.enumerated.item[0] = get_route_val(ice, analog_route_shift(idx));
1791 return 0;
1792 }
1793
1794 static int snd_vt1724_pro_route_analog_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1795 {
1796 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1797 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1798 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1799 analog_route_shift(idx));
1800 }
1801
1802 static int snd_vt1724_pro_route_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1803 {
1804 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1805 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1806 ucontrol->value.enumerated.item[0] = get_route_val(ice, digital_route_shift(idx));
1807 return 0;
1808 }
1809
1810 static int snd_vt1724_pro_route_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1811 {
1812 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1813 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1814 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1815 digital_route_shift(idx));
1816 }
1817
1818 static snd_kcontrol_new_t snd_vt1724_mixer_pro_analog_route __devinitdata = {
1819 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1820 .name = "H/W Playback Route",
1821 .info = snd_vt1724_pro_route_info,
1822 .get = snd_vt1724_pro_route_analog_get,
1823 .put = snd_vt1724_pro_route_analog_put,
1824 };
1825
1826 static snd_kcontrol_new_t snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1827 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1828 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1829 .info = snd_vt1724_pro_route_info,
1830 .get = snd_vt1724_pro_route_spdif_get,
1831 .put = snd_vt1724_pro_route_spdif_put,
1832 .count = 2,
1833 };
1834
1835
1836 static int snd_vt1724_pro_peak_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1837 {
1838 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1839 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
1840 uinfo->value.integer.min = 0;
1841 uinfo->value.integer.max = 255;
1842 return 0;
1843 }
1844
1845 static int snd_vt1724_pro_peak_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1846 {
1847 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1848 int idx;
1849
1850 spin_lock_irq(&ice->reg_lock);
1851 for (idx = 0; idx < 22; idx++) {
1852 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
1853 ucontrol->value.integer.value[idx] = inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1854 }
1855 spin_unlock_irq(&ice->reg_lock);
1856 return 0;
1857 }
1858
1859 static snd_kcontrol_new_t snd_vt1724_mixer_pro_peak __devinitdata = {
1860 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1861 .name = "Multi Track Peak",
1862 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
1863 .info = snd_vt1724_pro_peak_info,
1864 .get = snd_vt1724_pro_peak_get
1865 };
1866
1867 /*
1868 *
1869 */
1870
1871 static struct snd_ice1712_card_info no_matched __devinitdata;
1872
1873 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1874 snd_vt1724_revo_cards,
1875 snd_vt1724_amp_cards,
1876 snd_vt1724_aureon_cards,
1877 snd_vt1720_mobo_cards,
1878 snd_vt1720_pontis_cards,
1879 snd_vt1724_prodigy192_cards,
1880 snd_vt1724_juli_cards,
1881 snd_vt1724_phase_cards,
1882 NULL,
1883 };
1884
1885
1886 /*
1887 */
1888
1889 static void wait_i2c_busy(ice1712_t *ice)
1890 {
1891 int t = 0x10000;
1892 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
1893 ;
1894 if (t == -1)
1895 printk(KERN_ERR "ice1724: i2c busy timeout\n");
1896 }
1897
1898 unsigned char snd_vt1724_read_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr)
1899 {
1900 unsigned char val;
1901
1902 down(&ice->i2c_mutex);
1903 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1904 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1905 wait_i2c_busy(ice);
1906 val = inb(ICEREG1724(ice, I2C_DATA));
1907 up(&ice->i2c_mutex);
1908 //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
1909 return val;
1910 }
1911
1912 void snd_vt1724_write_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr, unsigned char data)
1913 {
1914 down(&ice->i2c_mutex);
1915 wait_i2c_busy(ice);
1916 //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
1917 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1918 outb(data, ICEREG1724(ice, I2C_DATA));
1919 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1920 wait_i2c_busy(ice);
1921 up(&ice->i2c_mutex);
1922 }
1923
1924 static int __devinit snd_vt1724_read_eeprom(ice1712_t *ice, const char *modelname)
1925 {
1926 const int dev = 0xa0; /* EEPROM device address */
1927 unsigned int i, size;
1928 struct snd_ice1712_card_info **tbl, *c;
1929
1930 if (! modelname || ! *modelname) {
1931 ice->eeprom.subvendor = 0;
1932 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
1933 ice->eeprom.subvendor =
1934 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1935 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
1936 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1937 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
1938 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
1939 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
1940 u16 vendor, device;
1941 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
1942 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
1943 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
1944 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
1945 printk(KERN_ERR "ice1724: No valid ID is found\n");
1946 return -ENXIO;
1947 }
1948 }
1949 }
1950 for (tbl = card_tables; *tbl; tbl++) {
1951 for (c = *tbl; c->subvendor; c++) {
1952 if (modelname && c->model && ! strcmp(modelname, c->model)) {
1953 printk(KERN_INFO "ice1724: Using board model %s\n", c->name);
1954 ice->eeprom.subvendor = c->subvendor;
1955 } else if (c->subvendor != ice->eeprom.subvendor)
1956 continue;
1957 if (! c->eeprom_size || ! c->eeprom_data)
1958 goto found;
1959 /* if the EEPROM is given by the driver, use it */
1960 snd_printdd("using the defined eeprom..\n");
1961 ice->eeprom.version = 2;
1962 ice->eeprom.size = c->eeprom_size + 6;
1963 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
1964 goto read_skipped;
1965 }
1966 }
1967 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", ice->eeprom.subvendor);
1968
1969 found:
1970 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
1971 if (ice->eeprom.size < 6)
1972 ice->eeprom.size = 32;
1973 else if (ice->eeprom.size > 32) {
1974 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", ice->eeprom.size);
1975 return -EIO;
1976 }
1977 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
1978 if (ice->eeprom.version != 2)
1979 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", ice->eeprom.version);
1980 size = ice->eeprom.size - 6;
1981 for (i = 0; i < size; i++)
1982 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
1983
1984 read_skipped:
1985 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
1986 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
1987 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
1988
1989 return 0;
1990 }
1991
1992
1993
1994 static int __devinit snd_vt1724_chip_init(ice1712_t *ice)
1995 {
1996 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
1997 udelay(200);
1998 outb(0, ICEREG1724(ice, CONTROL));
1999 udelay(200);
2000 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2001 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2002 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2003 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2004
2005 ice->gpio.write_mask = ice->eeprom.gpiomask;
2006 ice->gpio.direction = ice->eeprom.gpiodir;
2007 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2008 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2009 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2010
2011 outb(0, ICEREG1724(ice, POWERDOWN));
2012
2013 return 0;
2014 }
2015
2016 static int __devinit snd_vt1724_spdif_build_controls(ice1712_t *ice)
2017 {
2018 int err;
2019 snd_kcontrol_t *kctl;
2020
2021 snd_assert(ice->pcm != NULL, return -EIO);
2022
2023 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2024 if (err < 0)
2025 return err;
2026
2027 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2028 if (err < 0)
2029 return err;
2030
2031 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2032 if (err < 0)
2033 return err;
2034 kctl->id.device = ice->pcm->device;
2035 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2036 if (err < 0)
2037 return err;
2038 kctl->id.device = ice->pcm->device;
2039 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2040 if (err < 0)
2041 return err;
2042 kctl->id.device = ice->pcm->device;
2043 #if 0 /* use default only */
2044 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2045 if (err < 0)
2046 return err;
2047 kctl->id.device = ice->pcm->device;
2048 ice->spdif.stream_ctl = kctl;
2049 #endif
2050 return 0;
2051 }
2052
2053
2054 static int __devinit snd_vt1724_build_controls(ice1712_t *ice)
2055 {
2056 int err;
2057
2058 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2059 if (err < 0)
2060 return err;
2061 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2062 if (err < 0)
2063 return err;
2064
2065 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2066 if (err < 0)
2067 return err;
2068 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2069 if (err < 0)
2070 return err;
2071
2072 if (ice->num_total_dacs > 0) {
2073 snd_kcontrol_new_t tmp = snd_vt1724_mixer_pro_analog_route;
2074 tmp.count = ice->num_total_dacs;
2075 if (ice->vt1720 && tmp.count > 2)
2076 tmp.count = 2;
2077 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2078 if (err < 0)
2079 return err;
2080 }
2081
2082 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2083 if (err < 0)
2084 return err;
2085
2086 return 0;
2087 }
2088
2089 static int snd_vt1724_free(ice1712_t *ice)
2090 {
2091 if (! ice->port)
2092 goto __hw_end;
2093 /* mask all interrupts */
2094 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2095 outb(0xff, ICEREG1724(ice, IRQMASK));
2096 /* --- */
2097 __hw_end:
2098 if (ice->irq >= 0) {
2099 synchronize_irq(ice->irq);
2100 free_irq(ice->irq, (void *) ice);
2101 }
2102 pci_release_regions(ice->pci);
2103 snd_ice1712_akm4xxx_free(ice);
2104 pci_disable_device(ice->pci);
2105 kfree(ice);
2106 return 0;
2107 }
2108
2109 static int snd_vt1724_dev_free(snd_device_t *device)
2110 {
2111 ice1712_t *ice = device->device_data;
2112 return snd_vt1724_free(ice);
2113 }
2114
2115 static int __devinit snd_vt1724_create(snd_card_t * card,
2116 struct pci_dev *pci,
2117 const char *modelname,
2118 ice1712_t ** r_ice1712)
2119 {
2120 ice1712_t *ice;
2121 int err;
2122 unsigned char mask;
2123 static snd_device_ops_t ops = {
2124 .dev_free = snd_vt1724_dev_free,
2125 };
2126
2127 *r_ice1712 = NULL;
2128
2129 /* enable PCI device */
2130 if ((err = pci_enable_device(pci)) < 0)
2131 return err;
2132
2133 ice = kcalloc(1, sizeof(*ice), GFP_KERNEL);
2134 if (ice == NULL) {
2135 pci_disable_device(pci);
2136 return -ENOMEM;
2137 }
2138 ice->vt1724 = 1;
2139 spin_lock_init(&ice->reg_lock);
2140 init_MUTEX(&ice->gpio_mutex);
2141 init_MUTEX(&ice->open_mutex);
2142 init_MUTEX(&ice->i2c_mutex);
2143 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2144 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2145 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2146 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2147 ice->card = card;
2148 ice->pci = pci;
2149 ice->irq = -1;
2150 pci_set_master(pci);
2151 snd_vt1724_proc_init(ice);
2152 synchronize_irq(pci->irq);
2153
2154 if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
2155 kfree(ice);
2156 pci_disable_device(pci);
2157 return err;
2158 }
2159 ice->port = pci_resource_start(pci, 0);
2160 ice->profi_port = pci_resource_start(pci, 1);
2161
2162 if (request_irq(pci->irq, snd_vt1724_interrupt, SA_INTERRUPT|SA_SHIRQ, "ICE1724", (void *) ice)) {
2163 snd_printk("unable to grab IRQ %d\n", pci->irq);
2164 snd_vt1724_free(ice);
2165 return -EIO;
2166 }
2167
2168 ice->irq = pci->irq;
2169
2170 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2171 snd_vt1724_free(ice);
2172 return -EIO;
2173 }
2174 if (snd_vt1724_chip_init(ice) < 0) {
2175 snd_vt1724_free(ice);
2176 return -EIO;
2177 }
2178
2179 /* unmask used interrupts */
2180 if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
2181 mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
2182 else
2183 mask = 0;
2184 outb(mask, ICEREG1724(ice, IRQMASK));
2185 /* don't handle FIFO overrun/underruns (just yet), since they cause machine lockups */
2186 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2187
2188 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2189 snd_vt1724_free(ice);
2190 return err;
2191 }
2192
2193 snd_card_set_dev(card, &pci->dev);
2194
2195 *r_ice1712 = ice;
2196 return 0;
2197 }
2198
2199
2200 /*
2201 *
2202 * Registration
2203 *
2204 */
2205
2206 static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2207 const struct pci_device_id *pci_id)
2208 {
2209 static int dev;
2210 snd_card_t *card;
2211 ice1712_t *ice;
2212 int pcm_dev = 0, err;
2213 struct snd_ice1712_card_info **tbl, *c;
2214
2215 if (dev >= SNDRV_CARDS)
2216 return -ENODEV;
2217 if (!enable[dev]) {
2218 dev++;
2219 return -ENOENT;
2220 }
2221
2222 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2223 if (card == NULL)
2224 return -ENOMEM;
2225
2226 strcpy(card->driver, "ICE1724");
2227 strcpy(card->shortname, "ICEnsemble ICE1724");
2228
2229 if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
2230 snd_card_free(card);
2231 return err;
2232 }
2233
2234 for (tbl = card_tables; *tbl; tbl++) {
2235 for (c = *tbl; c->subvendor; c++) {
2236 if (c->subvendor == ice->eeprom.subvendor) {
2237 strcpy(card->shortname, c->name);
2238 if (c->driver) /* specific driver? */
2239 strcpy(card->driver, c->driver);
2240 if (c->chip_init) {
2241 if ((err = c->chip_init(ice)) < 0) {
2242 snd_card_free(card);
2243 return err;
2244 }
2245 }
2246 goto __found;
2247 }
2248 }
2249 }
2250 c = &no_matched;
2251 __found:
2252
2253 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2254 snd_card_free(card);
2255 return err;
2256 }
2257
2258 if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
2259 snd_card_free(card);
2260 return err;
2261 }
2262
2263 if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
2264 snd_card_free(card);
2265 return err;
2266 }
2267
2268 if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
2269 snd_card_free(card);
2270 return err;
2271 }
2272
2273 if ((err = snd_vt1724_build_controls(ice)) < 0) {
2274 snd_card_free(card);
2275 return err;
2276 }
2277
2278 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2279 if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
2280 snd_card_free(card);
2281 return err;
2282 }
2283 }
2284
2285 if (c->build_controls) {
2286 if ((err = c->build_controls(ice)) < 0) {
2287 snd_card_free(card);
2288 return err;
2289 }
2290 }
2291
2292 if (! c->no_mpu401) {
2293 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2294 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2295 ICEREG1724(ice, MPU_CTRL), 1,
2296 ice->irq, 0,
2297 &ice->rmidi[0])) < 0) {
2298 snd_card_free(card);
2299 return err;
2300 }
2301 }
2302 }
2303
2304 sprintf(card->longname, "%s at 0x%lx, irq %i",
2305 card->shortname, ice->port, ice->irq);
2306
2307 if ((err = snd_card_register(card)) < 0) {
2308 snd_card_free(card);
2309 return err;
2310 }
2311 pci_set_drvdata(pci, card);
2312 dev++;
2313 return 0;
2314 }
2315
2316 static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2317 {
2318 snd_card_free(pci_get_drvdata(pci));
2319 pci_set_drvdata(pci, NULL);
2320 }
2321
2322 static struct pci_driver driver = {
2323 .name = "ICE1724",
2324 .id_table = snd_vt1724_ids,
2325 .probe = snd_vt1724_probe,
2326 .remove = __devexit_p(snd_vt1724_remove),
2327 };
2328
2329 static int __init alsa_card_ice1724_init(void)
2330 {
2331 return pci_module_init(&driver);
2332 }
2333
2334 static void __exit alsa_card_ice1724_exit(void)
2335 {
2336 pci_unregister_driver(&driver);
2337 }
2338
2339 module_init(alsa_card_ice1724_init)
2340 module_exit(alsa_card_ice1724_exit)
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