3 * Low-level SCSI driver for NCR53c406a chip.
4 * Copyright (C) 1994, 1995, 1996 Normunds Saumanis (normunds@fi.ibm.com)
6 * LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]
7 * Specify IRQ = 0 for non-interrupt driven mode.
8 * FASTPIO = 1 for fast pio mode, 0 for slow mode.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2, or (at your option) any
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
22 #define NCR53C406A_DEBUG 0
23 #define VERBOSE_NCR53C406A_DEBUG 0
25 /* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */
29 /* #define BIOS_ADDR 0xD8000 *//* define this if autoprobe fails */
30 /* #define PORT_BASE 0x330 *//* define this if autoprobe fails */
31 /* #define IRQ_LEV 0 *//* define this if autoprobe fails */
32 #define DMA_CHAN 5 /* this is ignored if DMA is disabled */
34 /* Set this to 0 if you encounter kernel lockups while transferring
36 #define USE_FAST_PIO 1
38 /* ============= End of user configurable parameters ============= */
40 #include <linux/module.h>
42 #include <linux/errno.h>
43 #include <linux/ioport.h>
44 #include <linux/sched.h>
45 #include <linux/interrupt.h>
46 #include <linux/proc_fs.h>
47 #include <linux/stat.h>
48 #include <linux/init.h>
49 #include <linux/bitops.h>
54 #include <linux/blkdev.h>
55 #include <linux/spinlock.h>
57 #include <scsi/scsi_host.h>
59 /* ============================================================= */
61 #define WATCHDOG 5000000
63 #define SYNC_MODE 0 /* Synchronous transfer mode */
66 #undef NCR53C406A_DEBUG
67 #define NCR53C406A_DEBUG 1
76 /* Default configuration */
77 #define C1_IMG 0x07 /* ID=7 */
78 #define C2_IMG 0x48 /* FE SCSI2 */
80 #define C3_IMG 0x21 /* CDB TE */
82 #define C3_IMG 0x20 /* CDB */
84 #define C4_IMG 0x04 /* ANE */
85 #define C5_IMG 0xb6 /* AA PI SIE POL */
87 #define REG0 (outb(C4_IMG, CONFIG4))
88 #define REG1 (outb(C5_IMG, CONFIG5))
96 #if VERBOSE_NCR53C406A_DEBUG
102 #define LOAD_DMA_COUNT(count) \
103 outb(count & 0xff, TC_LSB); \
104 outb((count >> 8) & 0xff, TC_MSB); \
105 outb((count >> 16) & 0xff, TC_HIGH);
110 #define SCSI_NOP 0x00
111 #define FLUSH_FIFO 0x01
112 #define CHIP_RESET 0x02
113 #define SCSI_RESET 0x03
114 #define RESELECT 0x40
115 #define SELECT_NO_ATN 0x41
116 #define SELECT_ATN 0x42
117 #define SELECT_ATN_STOP 0x43
118 #define ENABLE_SEL 0x44
119 #define DISABLE_SEL 0x45
120 #define SELECT_ATN3 0x46
121 #define RESELECT3 0x47
122 #define TRANSFER_INFO 0x10
123 #define INIT_CMD_COMPLETE 0x11
124 #define MSG_ACCEPT 0x12
125 #define TRANSFER_PAD 0x18
127 #define RESET_ATN 0x1b
128 #define SEND_MSG 0x20
129 #define SEND_STATUS 0x21
130 #define SEND_DATA 0x22
131 #define DISCONN_SEQ 0x23
132 #define TERMINATE_SEQ 0x24
133 #define TARG_CMD_COMPLETE 0x25
135 #define RECV_MSG 0x28
136 #define RECV_CMD 0x29
137 #define RECV_DATA 0x2a
138 #define RECV_CMD_SEQ 0x2b
139 #define TARGET_ABORT_DMA 0x04
141 /*----------------------------------------------------------------*/
142 /* the following will set the monitor border color (useful to find
143 where something crashed or gets stuck at */
154 #define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
158 /*----------------------------------------------------------------*/
170 /* Static function prototypes */
171 static void NCR53c406a_intr(void *);
172 static irqreturn_t
do_NCR53c406a_intr(int, void *);
173 static void chip_init(void);
174 static void calc_port_addr(void);
176 static int irq_probe(void);
179 /* ================================================================= */
182 static void *bios_base
;
186 static int port_base
= PORT_BASE
;
188 static int port_base
;
192 static int irq_level
= IRQ_LEV
;
194 static int irq_level
= -1; /* 0 is 'no irq', so use -1 for 'uninitialized' */
202 static int fast_pio
= USE_FAST_PIO
;
205 static Scsi_Cmnd
*current_SC
;
206 static char info_msg
[256];
208 /* ================================================================= */
210 /* possible BIOS locations */
212 static void *addresses
[] = {
216 #define ADDRESS_COUNT ARRAY_SIZE(addresses)
217 #endif /* USE_BIOS */
219 /* possible i/o port addresses */
220 static unsigned short ports
[] = { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
221 #define PORT_COUNT ARRAY_SIZE(ports)
224 /* possible interrupt channels */
225 static unsigned short intrs
[] = { 10, 11, 12, 15 };
226 #define INTR_COUNT ARRAY_SIZE(intrs)
229 /* signatures for NCR 53c406a based controllers */
235 } signatures
[] __initdata
= {
237 /* 123456789012345678901234567890123456789012345678901234567890 */
239 "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82},};
241 #define SIGNATURE_COUNT ARRAY_SIZE(signatures)
242 #endif /* USE_BIOS */
244 /* ============================================================ */
246 /* Control Register Set 0 */
247 static int TC_LSB
; /* transfer counter lsb */
248 static int TC_MSB
; /* transfer counter msb */
249 static int SCSI_FIFO
; /* scsi fifo register */
250 static int CMD_REG
; /* command register */
251 static int STAT_REG
; /* status register */
252 static int DEST_ID
; /* selection/reselection bus id */
253 static int INT_REG
; /* interrupt status register */
254 static int SRTIMOUT
; /* select/reselect timeout reg */
255 static int SEQ_REG
; /* sequence step register */
256 static int SYNCPRD
; /* synchronous transfer period */
257 static int FIFO_FLAGS
; /* indicates # of bytes in fifo */
258 static int SYNCOFF
; /* synchronous offset register */
259 static int CONFIG1
; /* configuration register */
260 static int CLKCONV
; /* clock conversion reg */
261 /*static int TESTREG;*//* test mode register */
262 static int CONFIG2
; /* Configuration 2 Register */
263 static int CONFIG3
; /* Configuration 3 Register */
264 static int CONFIG4
; /* Configuration 4 Register */
265 static int TC_HIGH
; /* Transfer Counter High */
266 /*static int FIFO_BOTTOM;*//* Reserve FIFO byte register */
268 /* Control Register Set 1 */
269 /*static int JUMPER_SENSE;*//* Jumper sense port reg (r/w) */
270 /*static int SRAM_PTR;*//* SRAM address pointer reg (r/w) */
271 /*static int SRAM_DATA;*//* SRAM data register (r/w) */
272 static int PIO_FIFO
; /* PIO FIFO registers (r/w) */
273 /*static int PIO_FIFO1;*//* */
274 /*static int PIO_FIFO2;*//* */
275 /*static int PIO_FIFO3;*//* */
276 static int PIO_STATUS
; /* PIO status (r/w) */
277 /*static int ATA_CMD;*//* ATA command/status reg (r/w) */
278 /*static int ATA_ERR;*//* ATA features/error register (r/w) */
279 static int PIO_FLAG
; /* PIO flag interrupt enable (r/w) */
280 static int CONFIG5
; /* Configuration 5 register (r/w) */
281 /*static int SIGNATURE;*//* Signature Register (r) */
282 /*static int CONFIG6;*//* Configuration 6 register (r) */
284 /* ============================================================== */
287 static __inline__
int NCR53c406a_dma_setup(unsigned char *ptr
, unsigned int count
, unsigned char mode
)
290 unsigned long flags
= 0;
292 VDEB(printk("dma: before count=%d ", count
));
296 limit
= 65536 - (((unsigned) ptr
) & 0xFFFF);
298 if (count
> (65536 << 1))
299 count
= (65536 << 1);
300 limit
= (65536 << 1) - (((unsigned) ptr
) & 0x1FFFF);
306 VDEB(printk("after count=%d\n", count
));
307 if ((count
& 1) || (((unsigned) ptr
) & 1))
308 panic("NCR53c406a: attempted unaligned DMA transfer\n");
310 flags
= claim_dma_lock();
311 disable_dma(dma_chan
);
312 clear_dma_ff(dma_chan
);
313 set_dma_addr(dma_chan
, (long) ptr
);
314 set_dma_count(dma_chan
, count
);
315 set_dma_mode(dma_chan
, mode
);
316 enable_dma(dma_chan
);
317 release_dma_lock(flags
);
322 static __inline__
int NCR53c406a_dma_write(unsigned char *src
, unsigned int count
)
324 return NCR53c406a_dma_setup(src
, count
, DMA_MODE_WRITE
);
327 static __inline__
int NCR53c406a_dma_read(unsigned char *src
, unsigned int count
)
329 return NCR53c406a_dma_setup(src
, count
, DMA_MODE_READ
);
332 static __inline__
int NCR53c406a_dma_residual(void)
337 flags
= claim_dma_lock();
338 clear_dma_ff(dma_chan
);
339 tmp
= get_dma_residue(dma_chan
);
340 release_dma_lock(flags
);
347 static __inline__
int NCR53c406a_pio_read(unsigned char *request
, unsigned int reqlen
)
350 int len
; /* current scsi fifo size */
355 /* VDEB(printk("pio_status=%x\n", i)); */
378 if ((i
& 0x40) && len
== 0) { /* fifo empty and interrupt occurred */
386 if (fast_pio
&& len
> 3) {
387 insl(PIO_FIFO
, request
, len
>> 2);
388 request
+= len
& 0xfc;
389 reqlen
-= len
& 0xfc;
392 *request
++ = inb(PIO_FIFO
);
401 static __inline__
int NCR53c406a_pio_write(unsigned char *request
, unsigned int reqlen
)
404 int len
; /* current scsi fifo size */
407 while (reqlen
&& !(i
& 0x40)) {
409 /* VDEB(printk("pio_status=%x\n", i)); */
410 if (i
& 0x80) /* error */
436 if (fast_pio
&& len
> 3) {
437 outsl(PIO_FIFO
, request
, len
>> 2);
438 request
+= len
& 0xfc;
439 reqlen
-= len
& 0xfc;
442 outb(*request
++, PIO_FIFO
);
452 static int __init
NCR53c406a_detect(struct scsi_host_template
* tpnt
)
455 struct Scsi_Host
*shpnt
= NULL
;
463 /* look for a valid signature */
464 for (ii
= 0; ii
< ADDRESS_COUNT
&& !bios_base
; ii
++)
465 for (jj
= 0; (jj
< SIGNATURE_COUNT
) && !bios_base
; jj
++)
466 if (!memcmp((void *) addresses
[ii
] + signatures
[jj
].sig_offset
, (void *) signatures
[jj
].signature
, (int) signatures
[jj
].sig_length
))
467 bios_base
= addresses
[ii
];
470 printk("NCR53c406a: BIOS signature not found\n");
474 DEB(printk("NCR53c406a BIOS found at 0x%x\n", (unsigned int) bios_base
);
476 #endif /* USE_BIOS */
479 if (!request_region(port_base
, 0x10, "NCR53c406a")) /* ports already snatched */
482 #else /* autodetect */
483 if (port_base
) { /* LILO override */
484 if (!request_region(port_base
, 0x10, "NCR53c406a"))
487 for (i
= 0; i
< PORT_COUNT
&& !port_base
; i
++) {
488 if (!request_region(ports
[i
], 0x10, "NCR53c406a")) {
489 DEB(printk("NCR53c406a: port 0x%x in use\n", ports
[i
]));
491 VDEB(printk("NCR53c406a: port 0x%x available\n", ports
[i
]));
492 outb(C5_IMG
, ports
[i
] + 0x0d); /* reg set 1 */
493 if ((inb(ports
[i
] + 0x0e) ^ inb(ports
[i
] + 0x0e)) == 7 && (inb(ports
[i
] + 0x0e) ^ inb(ports
[i
] + 0x0e)) == 7 && (inb(ports
[i
] + 0x0e) & 0xf8) == 0x58) {
494 port_base
= ports
[i
];
495 VDEB(printk("NCR53c406a: Sig register valid\n"));
496 VDEB(printk("port_base=0x%x\n", port_base
));
499 release_region(ports
[i
], 0x10);
503 #endif /* PORT_BASE */
505 if (!port_base
) { /* no ports found */
506 printk("NCR53c406a: no available ports found\n");
510 DEB(printk("NCR53c406a detected\n"));
516 if (irq_level
< 0) { /* LILO override if >= 0 */
517 irq_level
= irq_probe();
518 if (irq_level
< 0) { /* Trouble */
519 printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level
);
525 DEB(printk("NCR53c406a: using port_base 0x%x\n", port_base
));
528 tpnt
->proc_name
= "NCR53c406a";
530 shpnt
= scsi_register(tpnt
, 0);
532 printk("NCR53c406a: Unable to register host, giving up.\n");
537 if (request_irq(irq_level
, do_NCR53c406a_intr
, 0, "NCR53c406a", shpnt
)) {
538 printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level
);
542 DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level
));
543 } else if (irq_level
== 0) {
545 DEB(printk("NCR53c406a: No interrupts detected\n"));
546 printk("NCR53c406a driver no longer supports polling interface\n");
547 printk("Please email linux-scsi@vger.kernel.org\n");
550 printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
554 DEB(printk("NCR53c406a: Shouldn't get here!\n"));
560 if (request_dma(dma_chan
, "NCR53c406a") != 0) {
561 printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan
);
565 DEB(printk("Allocated DMA channel %d\n", dma_chan
));
568 shpnt
->irq
= irq_level
;
569 shpnt
->io_port
= port_base
;
570 shpnt
->n_io_port
= 0x10;
572 shpnt
->dma
= dma_chan
;
576 sprintf(info_msg
, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", port_base
, irq_level
, dma_chan
);
578 sprintf(info_msg
, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", port_base
, irq_level
, fast_pio
? "fast" : "slow");
586 free_irq(irq_level
, shpnt
);
589 scsi_unregister(shpnt
);
591 release_region(port_base
, 0x10);
595 static int NCR53c406a_release(struct Scsi_Host
*shost
)
598 free_irq(shost
->irq
, NULL
);
600 if (shost
->dma_channel
!= 0xff)
601 free_dma(shost
->dma_channel
);
603 if (shost
->io_port
&& shost
->n_io_port
)
604 release_region(shost
->io_port
, shost
->n_io_port
);
606 scsi_unregister(shost
);
611 /* called from init/main.c */
612 static int __init
NCR53c406a_setup(char *str
)
614 static size_t setup_idx
= 0;
618 DEB(printk("NCR53c406a: Setup called\n");
621 if (setup_idx
>= PORT_COUNT
- 1) {
622 printk("NCR53c406a: Setup called too many times. Bad LILO params?\n");
625 get_options(str
, 4, ints
);
626 if (ints
[0] < 1 || ints
[0] > 3) {
627 printk("NCR53c406a: Malformed command line\n");
628 printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
631 for (i
= 0; i
< PORT_COUNT
&& !port_base
; i
++)
632 if (ports
[i
] == ints
[1]) {
634 DEB(printk("NCR53c406a: Specified port_base 0x%x\n", port_base
);
638 printk("NCR53c406a: Invalid PORTBASE 0x%x specified\n", ints
[1]);
645 DEB(printk("NCR53c406a: Specified irq %d\n", irq_level
);
648 for (i
= 0; i
< INTR_COUNT
&& irq_level
< 0; i
++)
649 if (intrs
[i
] == ints
[2]) {
651 DEB(printk("NCR53c406a: Specified irq %d\n", port_base
);
655 printk("NCR53c406a: Invalid IRQ %d specified\n", ints
[2]);
661 DEB(printk("NCR53c406a: port_base=0x%x, irq=%d, fast_pio=%d\n", port_base
, irq_level
, fast_pio
);)
665 __setup("ncr53c406a=", NCR53c406a_setup
);
669 static const char *NCR53c406a_info(struct Scsi_Host
*SChost
)
671 DEB(printk("NCR53c406a_info called\n"));
676 static void wait_intr(void)
678 unsigned long i
= jiffies
+ WATCHDOG
;
680 while (time_after(i
, jiffies
) && !(inb(STAT_REG
) & 0xe0)) { /* wait for a pseudo-interrupt */
685 if (time_before_eq(i
, jiffies
)) { /* Timed out */
687 current_SC
->result
= DID_TIME_OUT
<< 16;
688 current_SC
->SCp
.phase
= idle
;
689 current_SC
->scsi_done(current_SC
);
693 NCR53c406a_intr(NULL
);
697 static int NCR53c406a_queue(Scsi_Cmnd
* SCpnt
, void (*done
) (Scsi_Cmnd
*))
701 VDEB(printk("NCR53c406a_queue called\n"));
702 DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n", SCpnt
->cmnd
[0], SCpnt
->cmd_len
, SCpnt
->target
, SCpnt
->lun
, SCpnt
->request_bufflen
));
705 VDEB(for (i
= 0; i
< SCpnt
->cmd_len
; i
++)
706 printk("cmd[%d]=%02x ", i
, SCpnt
->cmnd
[i
]));
711 current_SC
->scsi_done
= done
;
712 current_SC
->SCp
.phase
= command_ph
;
713 current_SC
->SCp
.Status
= 0;
714 current_SC
->SCp
.Message
= 0;
716 /* We are locked here already by the mid layer */
718 outb(scmd_id(SCpnt
), DEST_ID
); /* set destination */
719 outb(FLUSH_FIFO
, CMD_REG
); /* reset the fifos */
721 for (i
= 0; i
< SCpnt
->cmd_len
; i
++) {
722 outb(SCpnt
->cmnd
[i
], SCSI_FIFO
);
724 outb(SELECT_NO_ATN
, CMD_REG
);
730 static int NCR53c406a_host_reset(Scsi_Cmnd
* SCpnt
)
732 DEB(printk("NCR53c406a_reset called\n"));
734 spin_lock_irq(SCpnt
->device
->host
->host_lock
);
736 outb(C4_IMG
, CONFIG4
); /* Select reg set 0 */
737 outb(CHIP_RESET
, CMD_REG
);
738 outb(SCSI_NOP
, CMD_REG
); /* required after reset */
739 outb(SCSI_RESET
, CMD_REG
);
744 spin_unlock_irq(SCpnt
->device
->host
->host_lock
);
749 static int NCR53c406a_biosparm(struct scsi_device
*disk
,
750 struct block_device
*dev
,
751 sector_t capacity
, int *info_array
)
755 DEB(printk("NCR53c406a_biosparm called\n"));
758 info_array
[0] = 64; /* heads */
759 info_array
[1] = 32; /* sectors */
760 info_array
[2] = size
>> 11; /* cylinders */
761 if (info_array
[2] > 1024) { /* big disk */
764 info_array
[2] = size
/ (255 * 63);
769 static irqreturn_t
do_NCR53c406a_intr(int unused
, void *dev_id
)
772 struct Scsi_Host
*dev
= dev_id
;
774 spin_lock_irqsave(dev
->host_lock
, flags
);
775 NCR53c406a_intr(dev_id
);
776 spin_unlock_irqrestore(dev
->host_lock
, flags
);
780 static void NCR53c406a_intr(void *dev_id
)
782 DEB(unsigned char fifo_size
;
784 DEB(unsigned char seq_reg
;
786 unsigned char status
, int_reg
;
788 unsigned char pio_status
;
789 struct scatterlist
*sglist
;
790 unsigned int sgcount
;
793 VDEB(printk("NCR53c406a_intr called\n"));
797 pio_status
= inb(PIO_STATUS
);
800 status
= inb(STAT_REG
);
801 DEB(seq_reg
= inb(SEQ_REG
));
802 int_reg
= inb(INT_REG
);
803 DEB(fifo_size
= inb(FIFO_FLAGS
) & 0x1f);
806 printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x", status
, seq_reg
, int_reg
, fifo_size
);
810 printk(", pio=%02x\n", pio_status
);
812 #endif /* NCR53C406A_DEBUG */
814 if (int_reg
& 0x80) { /* SCSI reset intr */
816 DEB(printk("NCR53c406a: reset intr received\n"));
817 current_SC
->SCp
.phase
= idle
;
818 current_SC
->result
= DID_RESET
<< 16;
819 current_SC
->scsi_done(current_SC
);
823 if (pio_status
& 0x80) {
824 printk("NCR53C406A: Warning: PIO error!\n");
825 current_SC
->SCp
.phase
= idle
;
826 current_SC
->result
= DID_ERROR
<< 16;
827 current_SC
->scsi_done(current_SC
);
832 if (status
& 0x20) { /* Parity error */
833 printk("NCR53c406a: Warning: parity error!\n");
834 current_SC
->SCp
.phase
= idle
;
835 current_SC
->result
= DID_PARITY
<< 16;
836 current_SC
->scsi_done(current_SC
);
840 if (status
& 0x40) { /* Gross error */
841 printk("NCR53c406a: Warning: gross error!\n");
842 current_SC
->SCp
.phase
= idle
;
843 current_SC
->result
= DID_ERROR
<< 16;
844 current_SC
->scsi_done(current_SC
);
848 if (int_reg
& 0x20) { /* Disconnect */
849 DEB(printk("NCR53c406a: disconnect intr received\n"));
850 if (current_SC
->SCp
.phase
!= message_in
) { /* Unexpected disconnect */
851 current_SC
->result
= DID_NO_CONNECT
<< 16;
852 } else { /* Command complete, return status and message */
853 current_SC
->result
= (current_SC
->SCp
.Status
& 0xff)
854 | ((current_SC
->SCp
.Message
& 0xff) << 8) | (DID_OK
<< 16);
858 current_SC
->SCp
.phase
= idle
;
859 current_SC
->scsi_done(current_SC
);
863 switch (status
& 0x07) { /* scsi phase */
864 case 0x00: /* DATA-OUT */
865 if (int_reg
& 0x10) { /* Target requesting info transfer */
867 current_SC
->SCp
.phase
= data_out
;
868 VDEB(printk("NCR53c406a: Data-Out phase\n"));
869 outb(FLUSH_FIFO
, CMD_REG
);
870 LOAD_DMA_COUNT(current_SC
->request_bufflen
); /* Max transfer size */
871 #if USE_DMA /* No s/g support for DMA */
872 NCR53c406a_dma_write(current_SC
->request_buffer
, current_SC
->request_bufflen
);
874 outb(TRANSFER_INFO
| DMA_OP
, CMD_REG
);
876 if (!current_SC
->use_sg
) /* Don't use scatter-gather */
877 NCR53c406a_pio_write(current_SC
->request_buffer
, current_SC
->request_bufflen
);
878 else { /* use scatter-gather */
879 sgcount
= current_SC
->use_sg
;
880 sglist
= current_SC
->request_buffer
;
882 NCR53c406a_pio_write(page_address(sglist
->page
) + sglist
->offset
, sglist
->length
);
891 case 0x01: /* DATA-IN */
892 if (int_reg
& 0x10) { /* Target requesting info transfer */
894 current_SC
->SCp
.phase
= data_in
;
895 VDEB(printk("NCR53c406a: Data-In phase\n"));
896 outb(FLUSH_FIFO
, CMD_REG
);
897 LOAD_DMA_COUNT(current_SC
->request_bufflen
); /* Max transfer size */
898 #if USE_DMA /* No s/g support for DMA */
899 NCR53c406a_dma_read(current_SC
->request_buffer
, current_SC
->request_bufflen
);
901 outb(TRANSFER_INFO
| DMA_OP
, CMD_REG
);
903 if (!current_SC
->use_sg
) /* Don't use scatter-gather */
904 NCR53c406a_pio_read(current_SC
->request_buffer
, current_SC
->request_bufflen
);
905 else { /* Use scatter-gather */
906 sgcount
= current_SC
->use_sg
;
907 sglist
= current_SC
->request_buffer
;
909 NCR53c406a_pio_read(page_address(sglist
->page
) + sglist
->offset
, sglist
->length
);
918 case 0x02: /* COMMAND */
919 current_SC
->SCp
.phase
= command_ph
;
920 printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
923 case 0x03: /* STATUS */
925 current_SC
->SCp
.phase
= status_ph
;
926 VDEB(printk("NCR53c406a: Status phase\n"));
927 outb(FLUSH_FIFO
, CMD_REG
);
928 outb(INIT_CMD_COMPLETE
, CMD_REG
);
931 case 0x04: /* Reserved */
932 case 0x05: /* Reserved */
933 printk("NCR53c406a: WARNING: Reserved phase!!!\n");
936 case 0x06: /* MESSAGE-OUT */
937 DEB(printk("NCR53c406a: Message-Out phase\n"));
938 current_SC
->SCp
.phase
= message_out
;
939 outb(SET_ATN
, CMD_REG
); /* Reject the message */
940 outb(MSG_ACCEPT
, CMD_REG
);
943 case 0x07: /* MESSAGE-IN */
945 VDEB(printk("NCR53c406a: Message-In phase\n"));
946 current_SC
->SCp
.phase
= message_in
;
948 current_SC
->SCp
.Status
= inb(SCSI_FIFO
);
949 current_SC
->SCp
.Message
= inb(SCSI_FIFO
);
951 VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS
) & 0x1f));
952 DEB(printk("Status = %02x Message = %02x\n", current_SC
->SCp
.Status
, current_SC
->SCp
.Message
));
954 if (current_SC
->SCp
.Message
== SAVE_POINTERS
|| current_SC
->SCp
.Message
== DISCONNECT
) {
955 outb(SET_ATN
, CMD_REG
); /* Reject message */
956 DEB(printk("Discarding SAVE_POINTERS message\n"));
958 outb(MSG_ACCEPT
, CMD_REG
);
964 static int irq_probe(void)
969 inb(INT_REG
); /* clear the interrupt register */
970 irqs
= probe_irq_on();
972 /* Invalid command will cause an interrupt */
976 /* Wait for the interrupt to occur */
977 i
= jiffies
+ WATCHDOG
;
978 while (time_after(i
, jiffies
) && !(inb(STAT_REG
) & 0x80))
980 if (time_before_eq(i
, jiffies
)) { /* Timed out, must be hardware trouble */
985 irq
= probe_irq_off(irqs
);
988 outb(CHIP_RESET
, CMD_REG
);
989 outb(SCSI_NOP
, CMD_REG
);
996 static void chip_init(void)
1000 outb(0x00, PIO_STATUS
);
1002 outb(0x01, PIO_STATUS
);
1004 outb(0x00, PIO_FLAG
);
1006 outb(C4_IMG
, CONFIG4
); /* REG0; */
1007 outb(C3_IMG
, CONFIG3
);
1008 outb(C2_IMG
, CONFIG2
);
1009 outb(C1_IMG
, CONFIG1
);
1011 outb(0x05, CLKCONV
); /* clock conversion factor */
1012 outb(0x9C, SRTIMOUT
); /* Selection timeout */
1013 outb(0x05, SYNCPRD
); /* Synchronous transfer period */
1014 outb(SYNC_MODE
, SYNCOFF
); /* synchronous mode */
1017 static void __init
calc_port_addr(void)
1019 /* Control Register Set 0 */
1020 TC_LSB
= (port_base
+ 0x00);
1021 TC_MSB
= (port_base
+ 0x01);
1022 SCSI_FIFO
= (port_base
+ 0x02);
1023 CMD_REG
= (port_base
+ 0x03);
1024 STAT_REG
= (port_base
+ 0x04);
1025 DEST_ID
= (port_base
+ 0x04);
1026 INT_REG
= (port_base
+ 0x05);
1027 SRTIMOUT
= (port_base
+ 0x05);
1028 SEQ_REG
= (port_base
+ 0x06);
1029 SYNCPRD
= (port_base
+ 0x06);
1030 FIFO_FLAGS
= (port_base
+ 0x07);
1031 SYNCOFF
= (port_base
+ 0x07);
1032 CONFIG1
= (port_base
+ 0x08);
1033 CLKCONV
= (port_base
+ 0x09);
1034 /* TESTREG = (port_base+0x0A); */
1035 CONFIG2
= (port_base
+ 0x0B);
1036 CONFIG3
= (port_base
+ 0x0C);
1037 CONFIG4
= (port_base
+ 0x0D);
1038 TC_HIGH
= (port_base
+ 0x0E);
1039 /* FIFO_BOTTOM = (port_base+0x0F); */
1041 /* Control Register Set 1 */
1042 /* JUMPER_SENSE = (port_base+0x00); */
1043 /* SRAM_PTR = (port_base+0x01); */
1044 /* SRAM_DATA = (port_base+0x02); */
1045 PIO_FIFO
= (port_base
+ 0x04);
1046 /* PIO_FIFO1 = (port_base+0x05); */
1047 /* PIO_FIFO2 = (port_base+0x06); */
1048 /* PIO_FIFO3 = (port_base+0x07); */
1049 PIO_STATUS
= (port_base
+ 0x08);
1050 /* ATA_CMD = (port_base+0x09); */
1051 /* ATA_ERR = (port_base+0x0A); */
1052 PIO_FLAG
= (port_base
+ 0x0B);
1053 CONFIG5
= (port_base
+ 0x0D);
1054 /* SIGNATURE = (port_base+0x0E); */
1055 /* CONFIG6 = (port_base+0x0F); */
1058 MODULE_LICENSE("GPL");
1060 /* NOTE: scatter-gather support only works in PIO mode.
1061 * Use SG_NONE if DMA mode is enabled!
1064 static struct scsi_host_template driver_template
=
1066 .proc_name
= "NCR53c406a" /* proc_name */,
1067 .name
= "NCR53c406a" /* name */,
1068 .detect
= NCR53c406a_detect
/* detect */,
1069 .release
= NCR53c406a_release
,
1070 .info
= NCR53c406a_info
/* info */,
1071 .queuecommand
= NCR53c406a_queue
/* queuecommand */,
1072 .eh_host_reset_handler
= NCR53c406a_host_reset
/* reset */,
1073 .bios_param
= NCR53c406a_biosparm
/* biosparm */,
1074 .can_queue
= 1 /* can_queue */,
1075 .this_id
= 7 /* SCSI ID of the chip */,
1076 .sg_tablesize
= 32 /*SG_ALL*/ /*SG_NONE*/,
1077 .cmd_per_lun
= 1 /* commands per lun */,
1078 .unchecked_isa_dma
= 1 /* unchecked_isa_dma */,
1079 .use_clustering
= ENABLE_CLUSTERING
1082 #include "scsi_module.c"
1085 * Overrides for Emacs so that we get a uniform tabbing style.
1086 * Emacs will notice this stuff at the end of the file and automatically
1087 * adjust the settings for this buffer only. This must remain at the end
1089 * ---------------------------------------------------------------------------
1092 * c-brace-imaginary-offset: 0
1093 * c-brace-offset: -4
1094 * c-argdecl-indent: 4
1095 * c-label-offset: -4
1096 * c-continued-statement-offset: 4
1097 * c-continued-brace-offset: 0
1098 * indent-tabs-mode: nil