1 #ifndef __ASM_IO_APIC_H
2 #define __ASM_IO_APIC_H
5 #include <asm/mpspec.h>
8 * Intel IO-APIC support for SMP and UP systems.
10 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
13 #ifdef CONFIG_X86_IO_APIC
16 static inline int use_pci_vector(void) {return 1;}
17 static inline void disable_edge_ioapic_vector(unsigned int vector
) { }
18 static inline void mask_and_ack_level_ioapic_vector(unsigned int vector
) { }
19 static inline void end_edge_ioapic_vector (unsigned int vector
) { }
20 #define startup_level_ioapic startup_level_ioapic_vector
21 #define shutdown_level_ioapic mask_IO_APIC_vector
22 #define enable_level_ioapic unmask_IO_APIC_vector
23 #define disable_level_ioapic mask_IO_APIC_vector
24 #define mask_and_ack_level_ioapic mask_and_ack_level_ioapic_vector
25 #define end_level_ioapic end_level_ioapic_vector
26 #define set_ioapic_affinity set_ioapic_affinity_vector
28 #define startup_edge_ioapic startup_edge_ioapic_vector
29 #define shutdown_edge_ioapic disable_edge_ioapic_vector
30 #define enable_edge_ioapic unmask_IO_APIC_vector
31 #define disable_edge_ioapic disable_edge_ioapic_vector
32 #define ack_edge_ioapic ack_edge_ioapic_vector
33 #define end_edge_ioapic end_edge_ioapic_vector
35 static inline int use_pci_vector(void) {return 0;}
36 static inline void disable_edge_ioapic_irq(unsigned int irq
) { }
37 static inline void mask_and_ack_level_ioapic_irq(unsigned int irq
) { }
38 static inline void end_edge_ioapic_irq (unsigned int irq
) { }
39 #define startup_level_ioapic startup_level_ioapic_irq
40 #define shutdown_level_ioapic mask_IO_APIC_irq
41 #define enable_level_ioapic unmask_IO_APIC_irq
42 #define disable_level_ioapic mask_IO_APIC_irq
43 #define mask_and_ack_level_ioapic mask_and_ack_level_ioapic_irq
44 #define end_level_ioapic end_level_ioapic_irq
45 #define set_ioapic_affinity set_ioapic_affinity_irq
47 #define startup_edge_ioapic startup_edge_ioapic_irq
48 #define shutdown_edge_ioapic disable_edge_ioapic_irq
49 #define enable_edge_ioapic unmask_IO_APIC_irq
50 #define disable_edge_ioapic disable_edge_ioapic_irq
51 #define ack_edge_ioapic ack_edge_ioapic_irq
52 #define end_edge_ioapic end_edge_ioapic_irq
55 #define APIC_MISMATCH_DEBUG
57 #define IO_APIC_BASE(idx) \
58 ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \
59 + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
62 * The structure of the IO-APIC:
64 union IO_APIC_reg_00
{
67 u32 __reserved_2
: 14,
72 } __attribute__ ((packed
)) bits
;
75 union IO_APIC_reg_01
{
83 } __attribute__ ((packed
)) bits
;
86 union IO_APIC_reg_02
{
89 u32 __reserved_2
: 24,
92 } __attribute__ ((packed
)) bits
;
95 union IO_APIC_reg_03
{
100 } __attribute__ ((packed
)) bits
;
104 * # of IO-APICs and # of IRQ routing registers
106 extern int nr_ioapics
;
107 extern int nr_ioapic_registers
[MAX_IO_APICS
];
109 enum ioapic_irq_destination_types
{
113 dest__reserved_1
= 3,
116 dest__reserved_2
= 6,
120 struct IO_APIC_route_entry
{
122 delivery_mode
: 3, /* 000: FIXED
126 dest_mode
: 1, /* 0: physical, 1: logical */
130 trigger
: 1, /* 0: edge, 1: level */
131 mask
: 1, /* 0: enabled, 1: disabled */
134 union { struct { __u32
146 } __attribute__ ((packed
));
149 * MP-BIOS irq configuration table structures:
152 /* I/O APIC entries */
153 extern struct mpc_config_ioapic mp_ioapics
[MAX_IO_APICS
];
155 /* # of MP IRQ source entries */
156 extern int mp_irq_entries
;
158 /* MP IRQ source entries */
159 extern struct mpc_config_intsrc mp_irqs
[MAX_IRQ_SOURCES
];
161 /* non-0 if default (table-less) MP configuration */
162 extern int mpc_default_type
;
164 static inline unsigned int io_apic_read(unsigned int apic
, unsigned int reg
)
166 *IO_APIC_BASE(apic
) = reg
;
167 return *(IO_APIC_BASE(apic
)+4);
170 static inline void io_apic_write(unsigned int apic
, unsigned int reg
, unsigned int value
)
172 *IO_APIC_BASE(apic
) = reg
;
173 *(IO_APIC_BASE(apic
)+4) = value
;
177 * Re-write a value: to be used for read-modify-write
178 * cycles where the read already set up the index register.
180 static inline void io_apic_modify(unsigned int apic
, unsigned int value
)
182 *(IO_APIC_BASE(apic
)+4) = value
;
186 * Synchronize the IO-APIC and the CPU by doing
187 * a dummy read from the IO-APIC
189 static inline void io_apic_sync(unsigned int apic
)
191 (void) *(IO_APIC_BASE(apic
)+4);
194 /* 1 if "noapic" boot option passed */
195 extern int skip_ioapic_setup
;
198 * If we use the IO-APIC for IRQ routing, disable automatic
199 * assignment of PCI IRQ's.
201 #define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
204 extern int io_apic_get_version (int ioapic
);
205 extern int io_apic_get_redir_entries (int ioapic
);
206 extern int io_apic_set_pci_routing (int ioapic
, int pin
, int irq
, int, int);
207 extern int timer_uses_ioapic_pin_0
;
210 extern int sis_apic_bug
; /* dummy */
212 #else /* !CONFIG_X86_IO_APIC */
213 #define io_apic_assign_pci_irqs 0
216 extern int assign_irq_vector(int irq
);
218 void enable_NMI_through_LVT0 (void * dummy
);
220 extern spinlock_t i8259A_lock
;