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mac80211: Replace ieee80211_tx_control->key_idx with ieee80211_key_conf
[linux-2.6/verdex.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blob7bdffa9cfea6fe8608a84f34d4aa5ae3d5b9d1e5
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #include "iwl-3945-core.h"
50 #include "iwl-3945.h"
51 #include "iwl-helpers.h"
52
53 #ifdef CONFIG_IWL3945_DEBUG
54 u32 iwl3945_debug_level;
55 #endif
56
57 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
59
60 /******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66 /* module parameters */
67 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69 static int iwl3945_param_disable; /* def: 0 = enable radio */
70 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
71 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
73 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
74
75 /*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80 #define DRV_DESCRIPTION \
81 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82
83 #ifdef CONFIG_IWL3945_DEBUG
84 #define VD "d"
85 #else
86 #define VD
87 #endif
88
89 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
90 #define VS "s"
91 #else
92 #define VS
93 #endif
94
95 #define IWLWIFI_VERSION "1.2.26k" VD VS
96 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
97 #define DRV_VERSION IWLWIFI_VERSION
98
99
100 MODULE_DESCRIPTION(DRV_DESCRIPTION);
101 MODULE_VERSION(DRV_VERSION);
102 MODULE_AUTHOR(DRV_COPYRIGHT);
103 MODULE_LICENSE("GPL");
104
105 static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
106 {
107 u16 fc = le16_to_cpu(hdr->frame_control);
108 int hdr_len = ieee80211_get_hdrlen(fc);
109
110 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
111 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
112 return NULL;
113 }
114
115 static const struct ieee80211_supported_band *iwl3945_get_band(
116 struct iwl3945_priv *priv, enum ieee80211_band band)
117 {
118 return priv->hw->wiphy->bands[band];
119 }
120
121 static int iwl3945_is_empty_essid(const char *essid, int essid_len)
122 {
123 /* Single white space is for Linksys APs */
124 if (essid_len == 1 && essid[0] == ' ')
125 return 1;
126
127 /* Otherwise, if the entire essid is 0, we assume it is hidden */
128 while (essid_len) {
129 essid_len--;
130 if (essid[essid_len] != '\0')
131 return 0;
132 }
133
134 return 1;
135 }
136
137 static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
138 {
139 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
140 const char *s = essid;
141 char *d = escaped;
142
143 if (iwl3945_is_empty_essid(essid, essid_len)) {
144 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
145 return escaped;
146 }
147
148 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
149 while (essid_len--) {
150 if (*s == '\0') {
151 *d++ = '\\';
152 *d++ = '0';
153 s++;
154 } else
155 *d++ = *s++;
156 }
157 *d = '\0';
158 return escaped;
159 }
160
161 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
162 * DMA services
163 *
164 * Theory of operation
165 *
166 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
167 * of buffer descriptors, each of which points to one or more data buffers for
168 * the device to read from or fill. Driver and device exchange status of each
169 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
170 * entries in each circular buffer, to protect against confusing empty and full
171 * queue states.
172 *
173 * The device reads or writes the data in the queues via the device's several
174 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
175 *
176 * For Tx queue, there are low mark and high mark limits. If, after queuing
177 * the packet for Tx, free space become < low mark, Tx queue stopped. When
178 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
179 * Tx queue resumed.
180 *
181 * The 3945 operates with six queues: One receive queue, one transmit queue
182 * (#4) for sending commands to the device firmware, and four transmit queues
183 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
184 ***************************************************/
185
186 int iwl3945_queue_space(const struct iwl3945_queue *q)
187 {
188 int s = q->read_ptr - q->write_ptr;
189
190 if (q->read_ptr > q->write_ptr)
191 s -= q->n_bd;
192
193 if (s <= 0)
194 s += q->n_window;
195 /* keep some reserve to not confuse empty and full situations */
196 s -= 2;
197 if (s < 0)
198 s = 0;
199 return s;
200 }
201
202 int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
203 {
204 return q->write_ptr > q->read_ptr ?
205 (i >= q->read_ptr && i < q->write_ptr) :
206 !(i < q->read_ptr && i >= q->write_ptr);
207 }
208
209
210 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
211 {
212 /* This is for scan command, the big buffer at end of command array */
213 if (is_huge)
214 return q->n_window; /* must be power of 2 */
215
216 /* Otherwise, use normal size buffers */
217 return index & (q->n_window - 1);
218 }
219
220 /**
221 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
222 */
223 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
224 int count, int slots_num, u32 id)
225 {
226 q->n_bd = count;
227 q->n_window = slots_num;
228 q->id = id;
229
230 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
231 * and iwl_queue_dec_wrap are broken. */
232 BUG_ON(!is_power_of_2(count));
233
234 /* slots_num must be power-of-two size, otherwise
235 * get_cmd_index is broken. */
236 BUG_ON(!is_power_of_2(slots_num));
237
238 q->low_mark = q->n_window / 4;
239 if (q->low_mark < 4)
240 q->low_mark = 4;
241
242 q->high_mark = q->n_window / 8;
243 if (q->high_mark < 2)
244 q->high_mark = 2;
245
246 q->write_ptr = q->read_ptr = 0;
247
248 return 0;
249 }
250
251 /**
252 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
253 */
254 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
255 struct iwl3945_tx_queue *txq, u32 id)
256 {
257 struct pci_dev *dev = priv->pci_dev;
258
259 /* Driver private data, only for Tx (not command) queues,
260 * not shared with device. */
261 if (id != IWL_CMD_QUEUE_NUM) {
262 txq->txb = kmalloc(sizeof(txq->txb[0]) *
263 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
264 if (!txq->txb) {
265 IWL_ERROR("kmalloc for auxiliary BD "
266 "structures failed\n");
267 goto error;
268 }
269 } else
270 txq->txb = NULL;
271
272 /* Circular buffer of transmit frame descriptors (TFDs),
273 * shared with device */
274 txq->bd = pci_alloc_consistent(dev,
275 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
276 &txq->q.dma_addr);
277
278 if (!txq->bd) {
279 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
280 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
281 goto error;
282 }
283 txq->q.id = id;
284
285 return 0;
286
287 error:
288 if (txq->txb) {
289 kfree(txq->txb);
290 txq->txb = NULL;
291 }
292
293 return -ENOMEM;
294 }
295
296 /**
297 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
298 */
299 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
300 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
301 {
302 struct pci_dev *dev = priv->pci_dev;
303 int len;
304 int rc = 0;
305
306 /*
307 * Alloc buffer array for commands (Tx or other types of commands).
308 * For the command queue (#4), allocate command space + one big
309 * command for scan, since scan command is very huge; the system will
310 * not have two scans at the same time, so only one is needed.
311 * For data Tx queues (all other queues), no super-size command
312 * space is needed.
313 */
314 len = sizeof(struct iwl3945_cmd) * slots_num;
315 if (txq_id == IWL_CMD_QUEUE_NUM)
316 len += IWL_MAX_SCAN_SIZE;
317 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
318 if (!txq->cmd)
319 return -ENOMEM;
320
321 /* Alloc driver data array and TFD circular buffer */
322 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
323 if (rc) {
324 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
325
326 return -ENOMEM;
327 }
328 txq->need_update = 0;
329
330 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
331 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
332 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
333
334 /* Initialize queue high/low-water, head/tail indexes */
335 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
336
337 /* Tell device where to find queue, enable DMA channel. */
338 iwl3945_hw_tx_queue_init(priv, txq);
339
340 return 0;
341 }
342
343 /**
344 * iwl3945_tx_queue_free - Deallocate DMA queue.
345 * @txq: Transmit queue to deallocate.
346 *
347 * Empty queue by removing and destroying all BD's.
348 * Free all buffers.
349 * 0-fill, but do not free "txq" descriptor structure.
350 */
351 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
352 {
353 struct iwl3945_queue *q = &txq->q;
354 struct pci_dev *dev = priv->pci_dev;
355 int len;
356
357 if (q->n_bd == 0)
358 return;
359
360 /* first, empty all BD's */
361 for (; q->write_ptr != q->read_ptr;
362 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
363 iwl3945_hw_txq_free_tfd(priv, txq);
364
365 len = sizeof(struct iwl3945_cmd) * q->n_window;
366 if (q->id == IWL_CMD_QUEUE_NUM)
367 len += IWL_MAX_SCAN_SIZE;
368
369 /* De-alloc array of command/tx buffers */
370 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
371
372 /* De-alloc circular buffer of TFDs */
373 if (txq->q.n_bd)
374 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
375 txq->q.n_bd, txq->bd, txq->q.dma_addr);
376
377 /* De-alloc array of per-TFD driver data */
378 if (txq->txb) {
379 kfree(txq->txb);
380 txq->txb = NULL;
381 }
382
383 /* 0-fill queue descriptor structure */
384 memset(txq, 0, sizeof(*txq));
385 }
386
387 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
388
389 /*************** STATION TABLE MANAGEMENT ****
390 * mac80211 should be examined to determine if sta_info is duplicating
391 * the functionality provided here
392 */
393
394 /**************************************************************/
395 #if 0 /* temporary disable till we add real remove station */
396 /**
397 * iwl3945_remove_station - Remove driver's knowledge of station.
398 *
399 * NOTE: This does not remove station from device's station table.
400 */
401 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
402 {
403 int index = IWL_INVALID_STATION;
404 int i;
405 unsigned long flags;
406
407 spin_lock_irqsave(&priv->sta_lock, flags);
408
409 if (is_ap)
410 index = IWL_AP_ID;
411 else if (is_broadcast_ether_addr(addr))
412 index = priv->hw_setting.bcast_sta_id;
413 else
414 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
415 if (priv->stations[i].used &&
416 !compare_ether_addr(priv->stations[i].sta.sta.addr,
417 addr)) {
418 index = i;
419 break;
420 }
421
422 if (unlikely(index == IWL_INVALID_STATION))
423 goto out;
424
425 if (priv->stations[index].used) {
426 priv->stations[index].used = 0;
427 priv->num_stations--;
428 }
429
430 BUG_ON(priv->num_stations < 0);
431
432 out:
433 spin_unlock_irqrestore(&priv->sta_lock, flags);
434 return 0;
435 }
436 #endif
437
438 /**
439 * iwl3945_clear_stations_table - Clear the driver's station table
440 *
441 * NOTE: This does not clear or otherwise alter the device's station table.
442 */
443 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
444 {
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 priv->num_stations = 0;
450 memset(priv->stations, 0, sizeof(priv->stations));
451
452 spin_unlock_irqrestore(&priv->sta_lock, flags);
453 }
454
455 /**
456 * iwl3945_add_station - Add station to station tables in driver and device
457 */
458 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
459 {
460 int i;
461 int index = IWL_INVALID_STATION;
462 struct iwl3945_station_entry *station;
463 unsigned long flags_spin;
464 DECLARE_MAC_BUF(mac);
465 u8 rate;
466
467 spin_lock_irqsave(&priv->sta_lock, flags_spin);
468 if (is_ap)
469 index = IWL_AP_ID;
470 else if (is_broadcast_ether_addr(addr))
471 index = priv->hw_setting.bcast_sta_id;
472 else
473 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
474 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
475 addr)) {
476 index = i;
477 break;
478 }
479
480 if (!priv->stations[i].used &&
481 index == IWL_INVALID_STATION)
482 index = i;
483 }
484
485 /* These two conditions has the same outcome but keep them separate
486 since they have different meaning */
487 if (unlikely(index == IWL_INVALID_STATION)) {
488 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
489 return index;
490 }
491
492 if (priv->stations[index].used &&
493 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
494 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
495 return index;
496 }
497
498 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
499 station = &priv->stations[index];
500 station->used = 1;
501 priv->num_stations++;
502
503 /* Set up the REPLY_ADD_STA command to send to device */
504 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
505 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
506 station->sta.mode = 0;
507 station->sta.sta.sta_id = index;
508 station->sta.station_flags = 0;
509
510 if (priv->band == IEEE80211_BAND_5GHZ)
511 rate = IWL_RATE_6M_PLCP;
512 else
513 rate = IWL_RATE_1M_PLCP;
514
515 /* Turn on both antennas for the station... */
516 station->sta.rate_n_flags =
517 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
518 station->current_rate.rate_n_flags =
519 le16_to_cpu(station->sta.rate_n_flags);
520
521 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
522
523 /* Add station to device's station table */
524 iwl3945_send_add_station(priv, &station->sta, flags);
525 return index;
526
527 }
528
529 /*************** DRIVER STATUS FUNCTIONS *****/
530
531 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
532 {
533 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
534 * set but EXIT_PENDING is not */
535 return test_bit(STATUS_READY, &priv->status) &&
536 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
537 !test_bit(STATUS_EXIT_PENDING, &priv->status);
538 }
539
540 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
541 {
542 return test_bit(STATUS_ALIVE, &priv->status);
543 }
544
545 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
546 {
547 return test_bit(STATUS_INIT, &priv->status);
548 }
549
550 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
551 {
552 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
553 test_bit(STATUS_RF_KILL_SW, &priv->status);
554 }
555
556 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
557 {
558
559 if (iwl3945_is_rfkill(priv))
560 return 0;
561
562 return iwl3945_is_ready(priv);
563 }
564
565 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
566
567 #define IWL_CMD(x) case x : return #x
568
569 static const char *get_cmd_string(u8 cmd)
570 {
571 switch (cmd) {
572 IWL_CMD(REPLY_ALIVE);
573 IWL_CMD(REPLY_ERROR);
574 IWL_CMD(REPLY_RXON);
575 IWL_CMD(REPLY_RXON_ASSOC);
576 IWL_CMD(REPLY_QOS_PARAM);
577 IWL_CMD(REPLY_RXON_TIMING);
578 IWL_CMD(REPLY_ADD_STA);
579 IWL_CMD(REPLY_REMOVE_STA);
580 IWL_CMD(REPLY_REMOVE_ALL_STA);
581 IWL_CMD(REPLY_3945_RX);
582 IWL_CMD(REPLY_TX);
583 IWL_CMD(REPLY_RATE_SCALE);
584 IWL_CMD(REPLY_LEDS_CMD);
585 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
586 IWL_CMD(RADAR_NOTIFICATION);
587 IWL_CMD(REPLY_QUIET_CMD);
588 IWL_CMD(REPLY_CHANNEL_SWITCH);
589 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
590 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
591 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
592 IWL_CMD(POWER_TABLE_CMD);
593 IWL_CMD(PM_SLEEP_NOTIFICATION);
594 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
595 IWL_CMD(REPLY_SCAN_CMD);
596 IWL_CMD(REPLY_SCAN_ABORT_CMD);
597 IWL_CMD(SCAN_START_NOTIFICATION);
598 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
599 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
600 IWL_CMD(BEACON_NOTIFICATION);
601 IWL_CMD(REPLY_TX_BEACON);
602 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
603 IWL_CMD(QUIET_NOTIFICATION);
604 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
605 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
606 IWL_CMD(REPLY_BT_CONFIG);
607 IWL_CMD(REPLY_STATISTICS_CMD);
608 IWL_CMD(STATISTICS_NOTIFICATION);
609 IWL_CMD(REPLY_CARD_STATE_CMD);
610 IWL_CMD(CARD_STATE_NOTIFICATION);
611 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
612 default:
613 return "UNKNOWN";
614
615 }
616 }
617
618 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
619
620 /**
621 * iwl3945_enqueue_hcmd - enqueue a uCode command
622 * @priv: device private data point
623 * @cmd: a point to the ucode command structure
624 *
625 * The function returns < 0 values to indicate the operation is
626 * failed. On success, it turns the index (> 0) of command in the
627 * command queue.
628 */
629 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
630 {
631 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
632 struct iwl3945_queue *q = &txq->q;
633 struct iwl3945_tfd_frame *tfd;
634 u32 *control_flags;
635 struct iwl3945_cmd *out_cmd;
636 u32 idx;
637 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
638 dma_addr_t phys_addr;
639 int pad;
640 u16 count;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
650
651 if (iwl3945_is_rfkill(priv)) {
652 IWL_DEBUG_INFO("Not sending command - RF KILL");
653 return -EIO;
654 }
655
656 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
657 IWL_ERROR("No space for Tx\n");
658 return -ENOSPC;
659 }
660
661 spin_lock_irqsave(&priv->hcmd_lock, flags);
662
663 tfd = &txq->bd[q->write_ptr];
664 memset(tfd, 0, sizeof(*tfd));
665
666 control_flags = (u32 *) tfd;
667
668 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
669 out_cmd = &txq->cmd[idx];
670
671 out_cmd->hdr.cmd = cmd->id;
672 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
673 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
674
675 /* At this point, the out_cmd now has all of the incoming cmd
676 * information */
677
678 out_cmd->hdr.flags = 0;
679 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
680 INDEX_TO_SEQ(q->write_ptr));
681 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
682 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
683
684 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
685 offsetof(struct iwl3945_cmd, hdr);
686 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
687
688 pad = U32_PAD(cmd->len);
689 count = TFD_CTL_COUNT_GET(*control_flags);
690 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
691
692 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
693 "%d bytes at %d[%d]:%d\n",
694 get_cmd_string(out_cmd->hdr.cmd),
695 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
696 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
697
698 txq->need_update = 1;
699
700 /* Increment and update queue's write index */
701 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
702 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
703
704 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
705 return ret ? ret : idx;
706 }
707
708 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
709 {
710 int ret;
711
712 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
713
714 /* An asynchronous command can not expect an SKB to be set. */
715 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
716
717 /* An asynchronous command MUST have a callback. */
718 BUG_ON(!cmd->meta.u.callback);
719
720 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
721 return -EBUSY;
722
723 ret = iwl3945_enqueue_hcmd(priv, cmd);
724 if (ret < 0) {
725 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
726 get_cmd_string(cmd->id), ret);
727 return ret;
728 }
729 return 0;
730 }
731
732 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
733 {
734 int cmd_idx;
735 int ret;
736
737 BUG_ON(cmd->meta.flags & CMD_ASYNC);
738
739 /* A synchronous command can not have a callback set. */
740 BUG_ON(cmd->meta.u.callback != NULL);
741
742 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
743 IWL_ERROR("Error sending %s: Already sending a host command\n",
744 get_cmd_string(cmd->id));
745 ret = -EBUSY;
746 goto out;
747 }
748
749 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
750
751 if (cmd->meta.flags & CMD_WANT_SKB)
752 cmd->meta.source = &cmd->meta;
753
754 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
755 if (cmd_idx < 0) {
756 ret = cmd_idx;
757 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
758 get_cmd_string(cmd->id), ret);
759 goto out;
760 }
761
762 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
763 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
764 HOST_COMPLETE_TIMEOUT);
765 if (!ret) {
766 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
767 IWL_ERROR("Error sending %s: time out after %dms.\n",
768 get_cmd_string(cmd->id),
769 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
770
771 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
772 ret = -ETIMEDOUT;
773 goto cancel;
774 }
775 }
776
777 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
778 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
779 get_cmd_string(cmd->id));
780 ret = -ECANCELED;
781 goto fail;
782 }
783 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
784 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
785 get_cmd_string(cmd->id));
786 ret = -EIO;
787 goto fail;
788 }
789 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
790 IWL_ERROR("Error: Response NULL in '%s'\n",
791 get_cmd_string(cmd->id));
792 ret = -EIO;
793 goto out;
794 }
795
796 ret = 0;
797 goto out;
798
799 cancel:
800 if (cmd->meta.flags & CMD_WANT_SKB) {
801 struct iwl3945_cmd *qcmd;
802
803 /* Cancel the CMD_WANT_SKB flag for the cmd in the
804 * TX cmd queue. Otherwise in case the cmd comes
805 * in later, it will possibly set an invalid
806 * address (cmd->meta.source). */
807 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
808 qcmd->meta.flags &= ~CMD_WANT_SKB;
809 }
810 fail:
811 if (cmd->meta.u.skb) {
812 dev_kfree_skb_any(cmd->meta.u.skb);
813 cmd->meta.u.skb = NULL;
814 }
815 out:
816 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
817 return ret;
818 }
819
820 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
821 {
822 if (cmd->meta.flags & CMD_ASYNC)
823 return iwl3945_send_cmd_async(priv, cmd);
824
825 return iwl3945_send_cmd_sync(priv, cmd);
826 }
827
828 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
829 {
830 struct iwl3945_host_cmd cmd = {
831 .id = id,
832 .len = len,
833 .data = data,
834 };
835
836 return iwl3945_send_cmd_sync(priv, &cmd);
837 }
838
839 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
840 {
841 struct iwl3945_host_cmd cmd = {
842 .id = id,
843 .len = sizeof(val),
844 .data = &val,
845 };
846
847 return iwl3945_send_cmd_sync(priv, &cmd);
848 }
849
850 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
851 {
852 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
853 }
854
855 /**
856 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
857 * @band: 2.4 or 5 GHz band
858 * @channel: Any channel valid for the requested band
859
860 * In addition to setting the staging RXON, priv->band is also set.
861 *
862 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
863 * in the staging RXON flag structure based on the band
864 */
865 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
866 enum ieee80211_band band,
867 u16 channel)
868 {
869 if (!iwl3945_get_channel_info(priv, band, channel)) {
870 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
871 channel, band);
872 return -EINVAL;
873 }
874
875 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
876 (priv->band == band))
877 return 0;
878
879 priv->staging_rxon.channel = cpu_to_le16(channel);
880 if (band == IEEE80211_BAND_5GHZ)
881 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
882 else
883 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
884
885 priv->band = band;
886
887 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
888
889 return 0;
890 }
891
892 /**
893 * iwl3945_check_rxon_cmd - validate RXON structure is valid
894 *
895 * NOTE: This is really only useful during development and can eventually
896 * be #ifdef'd out once the driver is stable and folks aren't actively
897 * making changes
898 */
899 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
900 {
901 int error = 0;
902 int counter = 1;
903
904 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
905 error |= le32_to_cpu(rxon->flags &
906 (RXON_FLG_TGJ_NARROW_BAND_MSK |
907 RXON_FLG_RADAR_DETECT_MSK));
908 if (error)
909 IWL_WARNING("check 24G fields %d | %d\n",
910 counter++, error);
911 } else {
912 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
913 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
914 if (error)
915 IWL_WARNING("check 52 fields %d | %d\n",
916 counter++, error);
917 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
918 if (error)
919 IWL_WARNING("check 52 CCK %d | %d\n",
920 counter++, error);
921 }
922 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
923 if (error)
924 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
925
926 /* make sure basic rates 6Mbps and 1Mbps are supported */
927 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
928 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
929 if (error)
930 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
931
932 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
933 if (error)
934 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
935
936 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
937 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
938 if (error)
939 IWL_WARNING("check CCK and short slot %d | %d\n",
940 counter++, error);
941
942 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
943 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
944 if (error)
945 IWL_WARNING("check CCK & auto detect %d | %d\n",
946 counter++, error);
947
948 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
949 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
950 if (error)
951 IWL_WARNING("check TGG and auto detect %d | %d\n",
952 counter++, error);
953
954 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
955 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
956 RXON_FLG_ANT_A_MSK)) == 0);
957 if (error)
958 IWL_WARNING("check antenna %d %d\n", counter++, error);
959
960 if (error)
961 IWL_WARNING("Tuning to channel %d\n",
962 le16_to_cpu(rxon->channel));
963
964 if (error) {
965 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
966 return -1;
967 }
968 return 0;
969 }
970
971 /**
972 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
973 * @priv: staging_rxon is compared to active_rxon
974 *
975 * If the RXON structure is changing enough to require a new tune,
976 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
977 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
978 */
979 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
980 {
981
982 /* These items are only settable from the full RXON command */
983 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
984 compare_ether_addr(priv->staging_rxon.bssid_addr,
985 priv->active_rxon.bssid_addr) ||
986 compare_ether_addr(priv->staging_rxon.node_addr,
987 priv->active_rxon.node_addr) ||
988 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
989 priv->active_rxon.wlap_bssid_addr) ||
990 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
991 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
992 (priv->staging_rxon.air_propagation !=
993 priv->active_rxon.air_propagation) ||
994 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
995 return 1;
996
997 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
998 * be updated with the RXON_ASSOC command -- however only some
999 * flag transitions are allowed using RXON_ASSOC */
1000
1001 /* Check if we are not switching bands */
1002 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1003 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1004 return 1;
1005
1006 /* Check if we are switching association toggle */
1007 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1008 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1009 return 1;
1010
1011 return 0;
1012 }
1013
1014 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1015 {
1016 int rc = 0;
1017 struct iwl3945_rx_packet *res = NULL;
1018 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1019 struct iwl3945_host_cmd cmd = {
1020 .id = REPLY_RXON_ASSOC,
1021 .len = sizeof(rxon_assoc),
1022 .meta.flags = CMD_WANT_SKB,
1023 .data = &rxon_assoc,
1024 };
1025 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1026 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1027
1028 if ((rxon1->flags == rxon2->flags) &&
1029 (rxon1->filter_flags == rxon2->filter_flags) &&
1030 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1031 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1032 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1033 return 0;
1034 }
1035
1036 rxon_assoc.flags = priv->staging_rxon.flags;
1037 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1038 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1039 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1040 rxon_assoc.reserved = 0;
1041
1042 rc = iwl3945_send_cmd_sync(priv, &cmd);
1043 if (rc)
1044 return rc;
1045
1046 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1047 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1048 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1049 rc = -EIO;
1050 }
1051
1052 priv->alloc_rxb_skb--;
1053 dev_kfree_skb_any(cmd.meta.u.skb);
1054
1055 return rc;
1056 }
1057
1058 /**
1059 * iwl3945_commit_rxon - commit staging_rxon to hardware
1060 *
1061 * The RXON command in staging_rxon is committed to the hardware and
1062 * the active_rxon structure is updated with the new data. This
1063 * function correctly transitions out of the RXON_ASSOC_MSK state if
1064 * a HW tune is required based on the RXON structure changes.
1065 */
1066 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1067 {
1068 /* cast away the const for active_rxon in this function */
1069 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1070 int rc = 0;
1071 DECLARE_MAC_BUF(mac);
1072
1073 if (!iwl3945_is_alive(priv))
1074 return -1;
1075
1076 /* always get timestamp with Rx frame */
1077 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1078
1079 /* select antenna */
1080 priv->staging_rxon.flags &=
1081 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1082 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1083
1084 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1085 if (rc) {
1086 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1087 return -EINVAL;
1088 }
1089
1090 /* If we don't need to send a full RXON, we can use
1091 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1092 * and other flags for the current radio configuration. */
1093 if (!iwl3945_full_rxon_required(priv)) {
1094 rc = iwl3945_send_rxon_assoc(priv);
1095 if (rc) {
1096 IWL_ERROR("Error setting RXON_ASSOC "
1097 "configuration (%d).\n", rc);
1098 return rc;
1099 }
1100
1101 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1102
1103 return 0;
1104 }
1105
1106 /* If we are currently associated and the new config requires
1107 * an RXON_ASSOC and the new config wants the associated mask enabled,
1108 * we must clear the associated from the active configuration
1109 * before we apply the new config */
1110 if (iwl3945_is_associated(priv) &&
1111 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1112 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1113 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1114
1115 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1116 sizeof(struct iwl3945_rxon_cmd),
1117 &priv->active_rxon);
1118
1119 /* If the mask clearing failed then we set
1120 * active_rxon back to what it was previously */
1121 if (rc) {
1122 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1123 IWL_ERROR("Error clearing ASSOC_MSK on current "
1124 "configuration (%d).\n", rc);
1125 return rc;
1126 }
1127 }
1128
1129 IWL_DEBUG_INFO("Sending RXON\n"
1130 "* with%s RXON_FILTER_ASSOC_MSK\n"
1131 "* channel = %d\n"
1132 "* bssid = %s\n",
1133 ((priv->staging_rxon.filter_flags &
1134 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1135 le16_to_cpu(priv->staging_rxon.channel),
1136 print_mac(mac, priv->staging_rxon.bssid_addr));
1137
1138 /* Apply the new configuration */
1139 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1140 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1141 if (rc) {
1142 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1143 return rc;
1144 }
1145
1146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1147
1148 iwl3945_clear_stations_table(priv);
1149
1150 /* If we issue a new RXON command which required a tune then we must
1151 * send a new TXPOWER command or we won't be able to Tx any frames */
1152 rc = iwl3945_hw_reg_send_txpower(priv);
1153 if (rc) {
1154 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1155 return rc;
1156 }
1157
1158 /* Add the broadcast address so we can send broadcast frames */
1159 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1160 IWL_INVALID_STATION) {
1161 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1162 return -EIO;
1163 }
1164
1165 /* If we have set the ASSOC_MSK and we are in BSS mode then
1166 * add the IWL_AP_ID to the station rate table */
1167 if (iwl3945_is_associated(priv) &&
1168 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1169 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1170 == IWL_INVALID_STATION) {
1171 IWL_ERROR("Error adding AP address for transmit.\n");
1172 return -EIO;
1173 }
1174
1175 /* Init the hardware's rate fallback order based on the band */
1176 rc = iwl3945_init_hw_rate_table(priv);
1177 if (rc) {
1178 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1179 return -EIO;
1180 }
1181
1182 return 0;
1183 }
1184
1185 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1186 {
1187 struct iwl3945_bt_cmd bt_cmd = {
1188 .flags = 3,
1189 .lead_time = 0xAA,
1190 .max_kill = 1,
1191 .kill_ack_mask = 0,
1192 .kill_cts_mask = 0,
1193 };
1194
1195 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1196 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1197 }
1198
1199 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1200 {
1201 int rc = 0;
1202 struct iwl3945_rx_packet *res;
1203 struct iwl3945_host_cmd cmd = {
1204 .id = REPLY_SCAN_ABORT_CMD,
1205 .meta.flags = CMD_WANT_SKB,
1206 };
1207
1208 /* If there isn't a scan actively going on in the hardware
1209 * then we are in between scan bands and not actually
1210 * actively scanning, so don't send the abort command */
1211 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1212 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1213 return 0;
1214 }
1215
1216 rc = iwl3945_send_cmd_sync(priv, &cmd);
1217 if (rc) {
1218 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1219 return rc;
1220 }
1221
1222 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1223 if (res->u.status != CAN_ABORT_STATUS) {
1224 /* The scan abort will return 1 for success or
1225 * 2 for "failure". A failure condition can be
1226 * due to simply not being in an active scan which
1227 * can occur if we send the scan abort before we
1228 * the microcode has notified us that a scan is
1229 * completed. */
1230 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1231 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1232 clear_bit(STATUS_SCAN_HW, &priv->status);
1233 }
1234
1235 dev_kfree_skb_any(cmd.meta.u.skb);
1236
1237 return rc;
1238 }
1239
1240 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1241 struct iwl3945_cmd *cmd,
1242 struct sk_buff *skb)
1243 {
1244 return 1;
1245 }
1246
1247 /*
1248 * CARD_STATE_CMD
1249 *
1250 * Use: Sets the device's internal card state to enable, disable, or halt
1251 *
1252 * When in the 'enable' state the card operates as normal.
1253 * When in the 'disable' state, the card enters into a low power mode.
1254 * When in the 'halt' state, the card is shut down and must be fully
1255 * restarted to come back on.
1256 */
1257 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1258 {
1259 struct iwl3945_host_cmd cmd = {
1260 .id = REPLY_CARD_STATE_CMD,
1261 .len = sizeof(u32),
1262 .data = &flags,
1263 .meta.flags = meta_flag,
1264 };
1265
1266 if (meta_flag & CMD_ASYNC)
1267 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1268
1269 return iwl3945_send_cmd(priv, &cmd);
1270 }
1271
1272 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1273 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1274 {
1275 struct iwl3945_rx_packet *res = NULL;
1276
1277 if (!skb) {
1278 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1279 return 1;
1280 }
1281
1282 res = (struct iwl3945_rx_packet *)skb->data;
1283 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1284 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1285 res->hdr.flags);
1286 return 1;
1287 }
1288
1289 switch (res->u.add_sta.status) {
1290 case ADD_STA_SUCCESS_MSK:
1291 break;
1292 default:
1293 break;
1294 }
1295
1296 /* We didn't cache the SKB; let the caller free it */
1297 return 1;
1298 }
1299
1300 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1301 struct iwl3945_addsta_cmd *sta, u8 flags)
1302 {
1303 struct iwl3945_rx_packet *res = NULL;
1304 int rc = 0;
1305 struct iwl3945_host_cmd cmd = {
1306 .id = REPLY_ADD_STA,
1307 .len = sizeof(struct iwl3945_addsta_cmd),
1308 .meta.flags = flags,
1309 .data = sta,
1310 };
1311
1312 if (flags & CMD_ASYNC)
1313 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1314 else
1315 cmd.meta.flags |= CMD_WANT_SKB;
1316
1317 rc = iwl3945_send_cmd(priv, &cmd);
1318
1319 if (rc || (flags & CMD_ASYNC))
1320 return rc;
1321
1322 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1323 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1324 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1325 res->hdr.flags);
1326 rc = -EIO;
1327 }
1328
1329 if (rc == 0) {
1330 switch (res->u.add_sta.status) {
1331 case ADD_STA_SUCCESS_MSK:
1332 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1333 break;
1334 default:
1335 rc = -EIO;
1336 IWL_WARNING("REPLY_ADD_STA failed\n");
1337 break;
1338 }
1339 }
1340
1341 priv->alloc_rxb_skb--;
1342 dev_kfree_skb_any(cmd.meta.u.skb);
1343
1344 return rc;
1345 }
1346
1347 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1348 struct ieee80211_key_conf *keyconf,
1349 u8 sta_id)
1350 {
1351 unsigned long flags;
1352 __le16 key_flags = 0;
1353
1354 switch (keyconf->alg) {
1355 case ALG_CCMP:
1356 key_flags |= STA_KEY_FLG_CCMP;
1357 key_flags |= cpu_to_le16(
1358 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1359 key_flags &= ~STA_KEY_FLG_INVALID;
1360 break;
1361 case ALG_TKIP:
1362 case ALG_WEP:
1363 default:
1364 return -EINVAL;
1365 }
1366 spin_lock_irqsave(&priv->sta_lock, flags);
1367 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1368 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1369 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1370 keyconf->keylen);
1371
1372 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1373 keyconf->keylen);
1374 priv->stations[sta_id].sta.key.key_flags = key_flags;
1375 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1376 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1377
1378 spin_unlock_irqrestore(&priv->sta_lock, flags);
1379
1380 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1381 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1382 return 0;
1383 }
1384
1385 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1386 {
1387 unsigned long flags;
1388
1389 spin_lock_irqsave(&priv->sta_lock, flags);
1390 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1391 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1392 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1393 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1394 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1395 spin_unlock_irqrestore(&priv->sta_lock, flags);
1396
1397 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1398 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1399 return 0;
1400 }
1401
1402 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1403 {
1404 struct list_head *element;
1405
1406 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1407 priv->frames_count);
1408
1409 while (!list_empty(&priv->free_frames)) {
1410 element = priv->free_frames.next;
1411 list_del(element);
1412 kfree(list_entry(element, struct iwl3945_frame, list));
1413 priv->frames_count--;
1414 }
1415
1416 if (priv->frames_count) {
1417 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1418 priv->frames_count);
1419 priv->frames_count = 0;
1420 }
1421 }
1422
1423 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1424 {
1425 struct iwl3945_frame *frame;
1426 struct list_head *element;
1427 if (list_empty(&priv->free_frames)) {
1428 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1429 if (!frame) {
1430 IWL_ERROR("Could not allocate frame!\n");
1431 return NULL;
1432 }
1433
1434 priv->frames_count++;
1435 return frame;
1436 }
1437
1438 element = priv->free_frames.next;
1439 list_del(element);
1440 return list_entry(element, struct iwl3945_frame, list);
1441 }
1442
1443 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1444 {
1445 memset(frame, 0, sizeof(*frame));
1446 list_add(&frame->list, &priv->free_frames);
1447 }
1448
1449 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1450 struct ieee80211_hdr *hdr,
1451 const u8 *dest, int left)
1452 {
1453
1454 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1455 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1456 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1457 return 0;
1458
1459 if (priv->ibss_beacon->len > left)
1460 return 0;
1461
1462 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1463
1464 return priv->ibss_beacon->len;
1465 }
1466
1467 static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1468 {
1469 u8 i;
1470
1471 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1472 i = iwl3945_rates[i].next_ieee) {
1473 if (rate_mask & (1 << i))
1474 return iwl3945_rates[i].plcp;
1475 }
1476
1477 return IWL_RATE_INVALID;
1478 }
1479
1480 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1481 {
1482 struct iwl3945_frame *frame;
1483 unsigned int frame_size;
1484 int rc;
1485 u8 rate;
1486
1487 frame = iwl3945_get_free_frame(priv);
1488
1489 if (!frame) {
1490 IWL_ERROR("Could not obtain free frame buffer for beacon "
1491 "command.\n");
1492 return -ENOMEM;
1493 }
1494
1495 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1496 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1497 0xFF0);
1498 if (rate == IWL_INVALID_RATE)
1499 rate = IWL_RATE_6M_PLCP;
1500 } else {
1501 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1502 if (rate == IWL_INVALID_RATE)
1503 rate = IWL_RATE_1M_PLCP;
1504 }
1505
1506 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1507
1508 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1509 &frame->u.cmd[0]);
1510
1511 iwl3945_free_frame(priv, frame);
1512
1513 return rc;
1514 }
1515
1516 /******************************************************************************
1517 *
1518 * EEPROM related functions
1519 *
1520 ******************************************************************************/
1521
1522 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1523 {
1524 memcpy(mac, priv->eeprom.mac_address, 6);
1525 }
1526
1527 /*
1528 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1529 * embedded controller) as EEPROM reader; each read is a series of pulses
1530 * to/from the EEPROM chip, not a single event, so even reads could conflict
1531 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1532 * simply claims ownership, which should be safe when this function is called
1533 * (i.e. before loading uCode!).
1534 */
1535 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1536 {
1537 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1538 return 0;
1539 }
1540
1541 /**
1542 * iwl3945_eeprom_init - read EEPROM contents
1543 *
1544 * Load the EEPROM contents from adapter into priv->eeprom
1545 *
1546 * NOTE: This routine uses the non-debug IO access functions.
1547 */
1548 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1549 {
1550 u16 *e = (u16 *)&priv->eeprom;
1551 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1552 u32 r;
1553 int sz = sizeof(priv->eeprom);
1554 int rc;
1555 int i;
1556 u16 addr;
1557
1558 /* The EEPROM structure has several padding buffers within it
1559 * and when adding new EEPROM maps is subject to programmer errors
1560 * which may be very difficult to identify without explicitly
1561 * checking the resulting size of the eeprom map. */
1562 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1563
1564 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1565 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1566 return -ENOENT;
1567 }
1568
1569 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1570 rc = iwl3945_eeprom_acquire_semaphore(priv);
1571 if (rc < 0) {
1572 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1573 return -ENOENT;
1574 }
1575
1576 /* eeprom is an array of 16bit values */
1577 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1578 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1579 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1580
1581 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1582 i += IWL_EEPROM_ACCESS_DELAY) {
1583 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1584 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1585 break;
1586 udelay(IWL_EEPROM_ACCESS_DELAY);
1587 }
1588
1589 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1590 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1591 return -ETIMEDOUT;
1592 }
1593 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1594 }
1595
1596 return 0;
1597 }
1598
1599 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1600 {
1601 if (priv->hw_setting.shared_virt)
1602 pci_free_consistent(priv->pci_dev,
1603 sizeof(struct iwl3945_shared),
1604 priv->hw_setting.shared_virt,
1605 priv->hw_setting.shared_phys);
1606 }
1607
1608 /**
1609 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1610 *
1611 * return : set the bit for each supported rate insert in ie
1612 */
1613 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1614 u16 basic_rate, int *left)
1615 {
1616 u16 ret_rates = 0, bit;
1617 int i;
1618 u8 *cnt = ie;
1619 u8 *rates = ie + 1;
1620
1621 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1622 if (bit & supported_rate) {
1623 ret_rates |= bit;
1624 rates[*cnt] = iwl3945_rates[i].ieee |
1625 ((bit & basic_rate) ? 0x80 : 0x00);
1626 (*cnt)++;
1627 (*left)--;
1628 if ((*left <= 0) ||
1629 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1630 break;
1631 }
1632 }
1633
1634 return ret_rates;
1635 }
1636
1637 /**
1638 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1639 */
1640 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1641 struct ieee80211_mgmt *frame,
1642 int left, int is_direct)
1643 {
1644 int len = 0;
1645 u8 *pos = NULL;
1646 u16 active_rates, ret_rates, cck_rates;
1647
1648 /* Make sure there is enough space for the probe request,
1649 * two mandatory IEs and the data */
1650 left -= 24;
1651 if (left < 0)
1652 return 0;
1653 len += 24;
1654
1655 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1656 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1657 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1658 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1659 frame->seq_ctrl = 0;
1660
1661 /* fill in our indirect SSID IE */
1662 /* ...next IE... */
1663
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
1667 len += 2;
1668 pos = &(frame->u.probe_req.variable[0]);
1669 *pos++ = WLAN_EID_SSID;
1670 *pos++ = 0;
1671
1672 /* fill in our direct SSID IE... */
1673 if (is_direct) {
1674 /* ...next IE... */
1675 left -= 2 + priv->essid_len;
1676 if (left < 0)
1677 return 0;
1678 /* ... fill it in... */
1679 *pos++ = WLAN_EID_SSID;
1680 *pos++ = priv->essid_len;
1681 memcpy(pos, priv->essid, priv->essid_len);
1682 pos += priv->essid_len;
1683 len += 2 + priv->essid_len;
1684 }
1685
1686 /* fill in supported rate */
1687 /* ...next IE... */
1688 left -= 2;
1689 if (left < 0)
1690 return 0;
1691
1692 /* ... fill it in... */
1693 *pos++ = WLAN_EID_SUPP_RATES;
1694 *pos = 0;
1695
1696 priv->active_rate = priv->rates_mask;
1697 active_rates = priv->active_rate;
1698 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1699
1700 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1701 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1702 priv->active_rate_basic, &left);
1703 active_rates &= ~ret_rates;
1704
1705 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1706 priv->active_rate_basic, &left);
1707 active_rates &= ~ret_rates;
1708
1709 len += 2 + *pos;
1710 pos += (*pos) + 1;
1711 if (active_rates == 0)
1712 goto fill_end;
1713
1714 /* fill in supported extended rate */
1715 /* ...next IE... */
1716 left -= 2;
1717 if (left < 0)
1718 return 0;
1719 /* ... fill it in... */
1720 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1721 *pos = 0;
1722 iwl3945_supported_rate_to_ie(pos, active_rates,
1723 priv->active_rate_basic, &left);
1724 if (*pos > 0)
1725 len += 2 + *pos;
1726
1727 fill_end:
1728 return (u16)len;
1729 }
1730
1731 /*
1732 * QoS support
1733 */
1734 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1735 struct iwl3945_qosparam_cmd *qos)
1736 {
1737
1738 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1739 sizeof(struct iwl3945_qosparam_cmd), qos);
1740 }
1741
1742 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1743 {
1744 u16 cw_min = 15;
1745 u16 cw_max = 1023;
1746 u8 aifs = 2;
1747 u8 is_legacy = 0;
1748 unsigned long flags;
1749 int i;
1750
1751 spin_lock_irqsave(&priv->lock, flags);
1752 priv->qos_data.qos_active = 0;
1753
1754 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1755 if (priv->qos_data.qos_enable)
1756 priv->qos_data.qos_active = 1;
1757 if (!(priv->active_rate & 0xfff0)) {
1758 cw_min = 31;
1759 is_legacy = 1;
1760 }
1761 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1762 if (priv->qos_data.qos_enable)
1763 priv->qos_data.qos_active = 1;
1764 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1765 cw_min = 31;
1766 is_legacy = 1;
1767 }
1768
1769 if (priv->qos_data.qos_active)
1770 aifs = 3;
1771
1772 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1773 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1774 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1775 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1776 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1777
1778 if (priv->qos_data.qos_active) {
1779 i = 1;
1780 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1781 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1782 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1783 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1784 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1785
1786 i = 2;
1787 priv->qos_data.def_qos_parm.ac[i].cw_min =
1788 cpu_to_le16((cw_min + 1) / 2 - 1);
1789 priv->qos_data.def_qos_parm.ac[i].cw_max =
1790 cpu_to_le16(cw_max);
1791 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1792 if (is_legacy)
1793 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1794 cpu_to_le16(6016);
1795 else
1796 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1797 cpu_to_le16(3008);
1798 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1799
1800 i = 3;
1801 priv->qos_data.def_qos_parm.ac[i].cw_min =
1802 cpu_to_le16((cw_min + 1) / 4 - 1);
1803 priv->qos_data.def_qos_parm.ac[i].cw_max =
1804 cpu_to_le16((cw_max + 1) / 2 - 1);
1805 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1806 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1807 if (is_legacy)
1808 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1809 cpu_to_le16(3264);
1810 else
1811 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1812 cpu_to_le16(1504);
1813 } else {
1814 for (i = 1; i < 4; i++) {
1815 priv->qos_data.def_qos_parm.ac[i].cw_min =
1816 cpu_to_le16(cw_min);
1817 priv->qos_data.def_qos_parm.ac[i].cw_max =
1818 cpu_to_le16(cw_max);
1819 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1820 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1821 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1822 }
1823 }
1824 IWL_DEBUG_QOS("set QoS to default \n");
1825
1826 spin_unlock_irqrestore(&priv->lock, flags);
1827 }
1828
1829 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1830 {
1831 unsigned long flags;
1832
1833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1834 return;
1835
1836 if (!priv->qos_data.qos_enable)
1837 return;
1838
1839 spin_lock_irqsave(&priv->lock, flags);
1840 priv->qos_data.def_qos_parm.qos_flags = 0;
1841
1842 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1843 !priv->qos_data.qos_cap.q_AP.txop_request)
1844 priv->qos_data.def_qos_parm.qos_flags |=
1845 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1846
1847 if (priv->qos_data.qos_active)
1848 priv->qos_data.def_qos_parm.qos_flags |=
1849 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1850
1851 spin_unlock_irqrestore(&priv->lock, flags);
1852
1853 if (force || iwl3945_is_associated(priv)) {
1854 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1855 priv->qos_data.qos_active);
1856
1857 iwl3945_send_qos_params_command(priv,
1858 &(priv->qos_data.def_qos_parm));
1859 }
1860 }
1861
1862 /*
1863 * Power management (not Tx power!) functions
1864 */
1865 #define MSEC_TO_USEC 1024
1866
1867 #define NOSLP __constant_cpu_to_le32(0)
1868 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1869 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877 /* default power management (not Tx power) table values */
1878 /* for tim 0-10 */
1879 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
1880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886 };
1887
1888 /* for tim > 10 */
1889 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
1890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900 };
1901
1902 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
1903 {
1904 int rc = 0, i;
1905 struct iwl3945_power_mgr *pow_data;
1906 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
1907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
1925 struct iwl3945_powertable_cmd *cmd;
1926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939 }
1940
1941 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1942 struct iwl3945_powertable_cmd *cmd, u32 mode)
1943 {
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
1947 struct iwl3945_power_vec_entry *range;
1948 u8 period = 0;
1949 struct iwl3945_power_mgr *pow_data;
1950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
1962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1963
1964 #ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970 #endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003 }
2004
2005 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2006 {
2007 u32 uninitialized_var(final_mode);
2008 int rc;
2009 struct iwl3945_powertable_cmd cmd;
2010
2011 /* If on battery, set to 3,
2012 * if plugged into AC power, set to CAM ("continuously aware mode"),
2013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
2026 iwl3945_update_power_cmd(priv, &cmd, final_mode);
2027
2028 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2029
2030 if (final_mode == IWL_POWER_MODE_CAM)
2031 clear_bit(STATUS_POWER_PMI, &priv->status);
2032 else
2033 set_bit(STATUS_POWER_PMI, &priv->status);
2034
2035 return rc;
2036 }
2037
2038 int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2039 {
2040 /* Filter incoming packets to determine if they are targeted toward
2041 * this network, discarding packets coming from ourselves */
2042 switch (priv->iw_mode) {
2043 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2044 /* packets from our adapter are dropped (echo) */
2045 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2046 return 0;
2047 /* {broad,multi}cast packets to our IBSS go through */
2048 if (is_multicast_ether_addr(header->addr1))
2049 return !compare_ether_addr(header->addr3, priv->bssid);
2050 /* packets to our adapter go through */
2051 return !compare_ether_addr(header->addr1, priv->mac_addr);
2052 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2053 /* packets from our adapter are dropped (echo) */
2054 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2055 return 0;
2056 /* {broad,multi}cast packets to our BSS go through */
2057 if (is_multicast_ether_addr(header->addr1))
2058 return !compare_ether_addr(header->addr2, priv->bssid);
2059 /* packets to our adapter go through */
2060 return !compare_ether_addr(header->addr1, priv->mac_addr);
2061 default:
2062 return 1;
2063 }
2064
2065 return 1;
2066 }
2067
2068 /**
2069 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2070 *
2071 * NOTE: priv->mutex is not required before calling this function
2072 */
2073 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2074 {
2075 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2076 clear_bit(STATUS_SCANNING, &priv->status);
2077 return 0;
2078 }
2079
2080 if (test_bit(STATUS_SCANNING, &priv->status)) {
2081 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2082 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2083 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2084 queue_work(priv->workqueue, &priv->abort_scan);
2085
2086 } else
2087 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2088
2089 return test_bit(STATUS_SCANNING, &priv->status);
2090 }
2091
2092 return 0;
2093 }
2094
2095 /**
2096 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2097 * @ms: amount of time to wait (in milliseconds) for scan to abort
2098 *
2099 * NOTE: priv->mutex must be held before calling this function
2100 */
2101 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2102 {
2103 unsigned long now = jiffies;
2104 int ret;
2105
2106 ret = iwl3945_scan_cancel(priv);
2107 if (ret && ms) {
2108 mutex_unlock(&priv->mutex);
2109 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2110 test_bit(STATUS_SCANNING, &priv->status))
2111 msleep(1);
2112 mutex_lock(&priv->mutex);
2113
2114 return test_bit(STATUS_SCANNING, &priv->status);
2115 }
2116
2117 return ret;
2118 }
2119
2120 static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
2121 {
2122 /* Reset ieee stats */
2123
2124 /* We don't reset the net_device_stats (ieee->stats) on
2125 * re-association */
2126
2127 priv->last_seq_num = -1;
2128 priv->last_frag_num = -1;
2129 priv->last_packet_time = 0;
2130
2131 iwl3945_scan_cancel(priv);
2132 }
2133
2134 #define MAX_UCODE_BEACON_INTERVAL 1024
2135 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2136
2137 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2138 {
2139 u16 new_val = 0;
2140 u16 beacon_factor = 0;
2141
2142 beacon_factor =
2143 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2144 / MAX_UCODE_BEACON_INTERVAL;
2145 new_val = beacon_val / beacon_factor;
2146
2147 return cpu_to_le16(new_val);
2148 }
2149
2150 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2151 {
2152 u64 interval_tm_unit;
2153 u64 tsf, result;
2154 unsigned long flags;
2155 struct ieee80211_conf *conf = NULL;
2156 u16 beacon_int = 0;
2157
2158 conf = ieee80211_get_hw_conf(priv->hw);
2159
2160 spin_lock_irqsave(&priv->lock, flags);
2161 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2162 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2163
2164 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2165
2166 tsf = priv->timestamp1;
2167 tsf = ((tsf << 32) | priv->timestamp0);
2168
2169 beacon_int = priv->beacon_int;
2170 spin_unlock_irqrestore(&priv->lock, flags);
2171
2172 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2173 if (beacon_int == 0) {
2174 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2175 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2176 } else {
2177 priv->rxon_timing.beacon_interval =
2178 cpu_to_le16(beacon_int);
2179 priv->rxon_timing.beacon_interval =
2180 iwl3945_adjust_beacon_interval(
2181 le16_to_cpu(priv->rxon_timing.beacon_interval));
2182 }
2183
2184 priv->rxon_timing.atim_window = 0;
2185 } else {
2186 priv->rxon_timing.beacon_interval =
2187 iwl3945_adjust_beacon_interval(conf->beacon_int);
2188 /* TODO: we need to get atim_window from upper stack
2189 * for now we set to 0 */
2190 priv->rxon_timing.atim_window = 0;
2191 }
2192
2193 interval_tm_unit =
2194 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2195 result = do_div(tsf, interval_tm_unit);
2196 priv->rxon_timing.beacon_init_val =
2197 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2198
2199 IWL_DEBUG_ASSOC
2200 ("beacon interval %d beacon timer %d beacon tim %d\n",
2201 le16_to_cpu(priv->rxon_timing.beacon_interval),
2202 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2203 le16_to_cpu(priv->rxon_timing.atim_window));
2204 }
2205
2206 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2207 {
2208 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2209 IWL_ERROR("APs don't scan.\n");
2210 return 0;
2211 }
2212
2213 if (!iwl3945_is_ready_rf(priv)) {
2214 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2215 return -EIO;
2216 }
2217
2218 if (test_bit(STATUS_SCANNING, &priv->status)) {
2219 IWL_DEBUG_SCAN("Scan already in progress.\n");
2220 return -EAGAIN;
2221 }
2222
2223 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2224 IWL_DEBUG_SCAN("Scan request while abort pending. "
2225 "Queuing.\n");
2226 return -EAGAIN;
2227 }
2228
2229 IWL_DEBUG_INFO("Starting scan...\n");
2230 priv->scan_bands = 2;
2231 set_bit(STATUS_SCANNING, &priv->status);
2232 priv->scan_start = jiffies;
2233 priv->scan_pass_start = priv->scan_start;
2234
2235 queue_work(priv->workqueue, &priv->request_scan);
2236
2237 return 0;
2238 }
2239
2240 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2241 {
2242 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2243
2244 if (hw_decrypt)
2245 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2246 else
2247 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2248
2249 return 0;
2250 }
2251
2252 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2253 enum ieee80211_band band)
2254 {
2255 if (band == IEEE80211_BAND_5GHZ) {
2256 priv->staging_rxon.flags &=
2257 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2258 | RXON_FLG_CCK_MSK);
2259 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2260 } else {
2261 /* Copied from iwl3945_bg_post_associate() */
2262 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2263 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2264 else
2265 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2266
2267 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2268 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2269
2270 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2271 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2272 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2273 }
2274 }
2275
2276 /*
2277 * initialize rxon structure with default values from eeprom
2278 */
2279 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2280 {
2281 const struct iwl3945_channel_info *ch_info;
2282
2283 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2284
2285 switch (priv->iw_mode) {
2286 case IEEE80211_IF_TYPE_AP:
2287 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2288 break;
2289
2290 case IEEE80211_IF_TYPE_STA:
2291 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2292 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2293 break;
2294
2295 case IEEE80211_IF_TYPE_IBSS:
2296 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2297 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2298 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2299 RXON_FILTER_ACCEPT_GRP_MSK;
2300 break;
2301
2302 case IEEE80211_IF_TYPE_MNTR:
2303 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2304 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2305 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2306 break;
2307 default:
2308 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2309 break;
2310 }
2311
2312 #if 0
2313 /* TODO: Figure out when short_preamble would be set and cache from
2314 * that */
2315 if (!hw_to_local(priv->hw)->short_preamble)
2316 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2317 else
2318 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2319 #endif
2320
2321 ch_info = iwl3945_get_channel_info(priv, priv->band,
2322 le16_to_cpu(priv->staging_rxon.channel));
2323
2324 if (!ch_info)
2325 ch_info = &priv->channel_info[0];
2326
2327 /*
2328 * in some case A channels are all non IBSS
2329 * in this case force B/G channel
2330 */
2331 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2332 !(is_channel_ibss(ch_info)))
2333 ch_info = &priv->channel_info[0];
2334
2335 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2336 if (is_channel_a_band(ch_info))
2337 priv->band = IEEE80211_BAND_5GHZ;
2338 else
2339 priv->band = IEEE80211_BAND_2GHZ;
2340
2341 iwl3945_set_flags_for_phymode(priv, priv->band);
2342
2343 priv->staging_rxon.ofdm_basic_rates =
2344 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2345 priv->staging_rxon.cck_basic_rates =
2346 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2347 }
2348
2349 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2350 {
2351 if (mode == IEEE80211_IF_TYPE_IBSS) {
2352 const struct iwl3945_channel_info *ch_info;
2353
2354 ch_info = iwl3945_get_channel_info(priv,
2355 priv->band,
2356 le16_to_cpu(priv->staging_rxon.channel));
2357
2358 if (!ch_info || !is_channel_ibss(ch_info)) {
2359 IWL_ERROR("channel %d not IBSS channel\n",
2360 le16_to_cpu(priv->staging_rxon.channel));
2361 return -EINVAL;
2362 }
2363 }
2364
2365 priv->iw_mode = mode;
2366
2367 iwl3945_connection_init_rx_config(priv);
2368 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2369
2370 iwl3945_clear_stations_table(priv);
2371
2372 /* dont commit rxon if rf-kill is on*/
2373 if (!iwl3945_is_ready_rf(priv))
2374 return -EAGAIN;
2375
2376 cancel_delayed_work(&priv->scan_check);
2377 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2378 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2379 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2380 return -EAGAIN;
2381 }
2382
2383 iwl3945_commit_rxon(priv);
2384
2385 return 0;
2386 }
2387
2388 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2389 struct ieee80211_tx_control *ctl,
2390 struct iwl3945_cmd *cmd,
2391 struct sk_buff *skb_frag,
2392 int last_frag)
2393 {
2394 struct iwl3945_hw_key *keyinfo =
2395 &priv->stations[ctl->hw_key->hw_key_idx].keyinfo;
2396
2397 switch (keyinfo->alg) {
2398 case ALG_CCMP:
2399 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2400 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2401 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2402 break;
2403
2404 case ALG_TKIP:
2405 #if 0
2406 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2407
2408 if (last_frag)
2409 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2410 8);
2411 else
2412 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2413 #endif
2414 break;
2415
2416 case ALG_WEP:
2417 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2418 (ctl->hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2419
2420 if (keyinfo->keylen == 13)
2421 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2422
2423 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2424
2425 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2426 "with key %d\n", ctl->hw_key->hw_key_idx);
2427 break;
2428
2429 default:
2430 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2431 break;
2432 }
2433 }
2434
2435 /*
2436 * handle build REPLY_TX command notification.
2437 */
2438 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2439 struct iwl3945_cmd *cmd,
2440 struct ieee80211_tx_control *ctrl,
2441 struct ieee80211_hdr *hdr,
2442 int is_unicast, u8 std_id)
2443 {
2444 __le16 *qc;
2445 u16 fc = le16_to_cpu(hdr->frame_control);
2446 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2447
2448 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2449 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2450 tx_flags |= TX_CMD_FLG_ACK_MSK;
2451 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2452 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2453 if (ieee80211_is_probe_response(fc) &&
2454 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2455 tx_flags |= TX_CMD_FLG_TSF_MSK;
2456 } else {
2457 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2458 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2459 }
2460
2461 cmd->cmd.tx.sta_id = std_id;
2462 if (ieee80211_get_morefrag(hdr))
2463 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2464
2465 qc = ieee80211_get_qos_ctrl(hdr);
2466 if (qc) {
2467 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2468 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2469 } else
2470 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2471
2472 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2473 tx_flags |= TX_CMD_FLG_RTS_MSK;
2474 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2475 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2476 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2477 tx_flags |= TX_CMD_FLG_CTS_MSK;
2478 }
2479
2480 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2481 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2482
2483 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2484 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2485 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2486 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2487 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2488 else
2489 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2490 } else {
2491 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2492 #ifdef CONFIG_IWL3945_LEDS
2493 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2494 #endif
2495 }
2496
2497 cmd->cmd.tx.driver_txop = 0;
2498 cmd->cmd.tx.tx_flags = tx_flags;
2499 cmd->cmd.tx.next_frame_len = 0;
2500 }
2501
2502 /**
2503 * iwl3945_get_sta_id - Find station's index within station table
2504 */
2505 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2506 {
2507 int sta_id;
2508 u16 fc = le16_to_cpu(hdr->frame_control);
2509
2510 /* If this frame is broadcast or management, use broadcast station id */
2511 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2512 is_multicast_ether_addr(hdr->addr1))
2513 return priv->hw_setting.bcast_sta_id;
2514
2515 switch (priv->iw_mode) {
2516
2517 /* If we are a client station in a BSS network, use the special
2518 * AP station entry (that's the only station we communicate with) */
2519 case IEEE80211_IF_TYPE_STA:
2520 return IWL_AP_ID;
2521
2522 /* If we are an AP, then find the station, or use BCAST */
2523 case IEEE80211_IF_TYPE_AP:
2524 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2525 if (sta_id != IWL_INVALID_STATION)
2526 return sta_id;
2527 return priv->hw_setting.bcast_sta_id;
2528
2529 /* If this frame is going out to an IBSS network, find the station,
2530 * or create a new station table entry */
2531 case IEEE80211_IF_TYPE_IBSS: {
2532 DECLARE_MAC_BUF(mac);
2533
2534 /* Create new station table entry */
2535 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2536 if (sta_id != IWL_INVALID_STATION)
2537 return sta_id;
2538
2539 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2540
2541 if (sta_id != IWL_INVALID_STATION)
2542 return sta_id;
2543
2544 IWL_DEBUG_DROP("Station %s not in station map. "
2545 "Defaulting to broadcast...\n",
2546 print_mac(mac, hdr->addr1));
2547 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2548 return priv->hw_setting.bcast_sta_id;
2549 }
2550 default:
2551 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2552 return priv->hw_setting.bcast_sta_id;
2553 }
2554 }
2555
2556 /*
2557 * start REPLY_TX command process
2558 */
2559 static int iwl3945_tx_skb(struct iwl3945_priv *priv,
2560 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2561 {
2562 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2563 struct iwl3945_tfd_frame *tfd;
2564 u32 *control_flags;
2565 int txq_id = ctl->queue;
2566 struct iwl3945_tx_queue *txq = NULL;
2567 struct iwl3945_queue *q = NULL;
2568 dma_addr_t phys_addr;
2569 dma_addr_t txcmd_phys;
2570 struct iwl3945_cmd *out_cmd = NULL;
2571 u16 len, idx, len_org;
2572 u8 id, hdr_len, unicast;
2573 u8 sta_id;
2574 u16 seq_number = 0;
2575 u16 fc;
2576 __le16 *qc;
2577 u8 wait_write_ptr = 0;
2578 unsigned long flags;
2579 int rc;
2580
2581 spin_lock_irqsave(&priv->lock, flags);
2582 if (iwl3945_is_rfkill(priv)) {
2583 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2584 goto drop_unlock;
2585 }
2586
2587 if (!priv->vif) {
2588 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2589 goto drop_unlock;
2590 }
2591
2592 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
2593 IWL_ERROR("ERROR: No TX rate available.\n");
2594 goto drop_unlock;
2595 }
2596
2597 unicast = !is_multicast_ether_addr(hdr->addr1);
2598 id = 0;
2599
2600 fc = le16_to_cpu(hdr->frame_control);
2601
2602 #ifdef CONFIG_IWL3945_DEBUG
2603 if (ieee80211_is_auth(fc))
2604 IWL_DEBUG_TX("Sending AUTH frame\n");
2605 else if (ieee80211_is_assoc_request(fc))
2606 IWL_DEBUG_TX("Sending ASSOC frame\n");
2607 else if (ieee80211_is_reassoc_request(fc))
2608 IWL_DEBUG_TX("Sending REASSOC frame\n");
2609 #endif
2610
2611 /* drop all data frame if we are not associated */
2612 if ((!iwl3945_is_associated(priv) ||
2613 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
2614 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2615 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2616 goto drop_unlock;
2617 }
2618
2619 spin_unlock_irqrestore(&priv->lock, flags);
2620
2621 hdr_len = ieee80211_get_hdrlen(fc);
2622
2623 /* Find (or create) index into station table for destination station */
2624 sta_id = iwl3945_get_sta_id(priv, hdr);
2625 if (sta_id == IWL_INVALID_STATION) {
2626 DECLARE_MAC_BUF(mac);
2627
2628 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2629 print_mac(mac, hdr->addr1));
2630 goto drop;
2631 }
2632
2633 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2634
2635 qc = ieee80211_get_qos_ctrl(hdr);
2636 if (qc) {
2637 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2638 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2639 IEEE80211_SCTL_SEQ;
2640 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2641 (hdr->seq_ctrl &
2642 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2643 seq_number += 0x10;
2644 }
2645
2646 /* Descriptor for chosen Tx queue */
2647 txq = &priv->txq[txq_id];
2648 q = &txq->q;
2649
2650 spin_lock_irqsave(&priv->lock, flags);
2651
2652 /* Set up first empty TFD within this queue's circular TFD buffer */
2653 tfd = &txq->bd[q->write_ptr];
2654 memset(tfd, 0, sizeof(*tfd));
2655 control_flags = (u32 *) tfd;
2656 idx = get_cmd_index(q, q->write_ptr, 0);
2657
2658 /* Set up driver data for this TFD */
2659 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2660 txq->txb[q->write_ptr].skb[0] = skb;
2661 memcpy(&(txq->txb[q->write_ptr].status.control),
2662 ctl, sizeof(struct ieee80211_tx_control));
2663
2664 /* Init first empty entry in queue's array of Tx/cmd buffers */
2665 out_cmd = &txq->cmd[idx];
2666 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2667 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2668
2669 /*
2670 * Set up the Tx-command (not MAC!) header.
2671 * Store the chosen Tx queue and TFD index within the sequence field;
2672 * after Tx, uCode's Tx response will return this value so driver can
2673 * locate the frame within the tx queue and do post-tx processing.
2674 */
2675 out_cmd->hdr.cmd = REPLY_TX;
2676 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2677 INDEX_TO_SEQ(q->write_ptr)));
2678
2679 /* Copy MAC header from skb into command buffer */
2680 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2681
2682 /*
2683 * Use the first empty entry in this queue's command buffer array
2684 * to contain the Tx command and MAC header concatenated together
2685 * (payload data will be in another buffer).
2686 * Size of this varies, due to varying MAC header length.
2687 * If end is not dword aligned, we'll have 2 extra bytes at the end
2688 * of the MAC header (device reads on dword boundaries).
2689 * We'll tell device about this padding later.
2690 */
2691 len = priv->hw_setting.tx_cmd_len +
2692 sizeof(struct iwl3945_cmd_header) + hdr_len;
2693
2694 len_org = len;
2695 len = (len + 3) & ~3;
2696
2697 if (len_org != len)
2698 len_org = 1;
2699 else
2700 len_org = 0;
2701
2702 /* Physical address of this Tx command's header (not MAC header!),
2703 * within command buffer array. */
2704 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2705 offsetof(struct iwl3945_cmd, hdr);
2706
2707 /* Add buffer containing Tx command and MAC(!) header to TFD's
2708 * first entry */
2709 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2710
2711 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
2712 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2713
2714 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2715 * if any (802.11 null frames have no payload). */
2716 len = skb->len - hdr_len;
2717 if (len) {
2718 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2719 len, PCI_DMA_TODEVICE);
2720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2721 }
2722
2723 if (!len)
2724 /* If there is no payload, then we use only one Tx buffer */
2725 *control_flags = TFD_CTL_COUNT_SET(1);
2726 else
2727 /* Else use 2 buffers.
2728 * Tell 3945 about any padding after MAC header */
2729 *control_flags = TFD_CTL_COUNT_SET(2) |
2730 TFD_CTL_PAD_SET(U32_PAD(len));
2731
2732 /* Total # bytes to be transmitted */
2733 len = (u16)skb->len;
2734 out_cmd->cmd.tx.len = cpu_to_le16(len);
2735
2736 /* TODO need this for burst mode later on */
2737 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2738
2739 /* set is_hcca to 0; it probably will never be implemented */
2740 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
2741
2742 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2743 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2744
2745 if (!ieee80211_get_morefrag(hdr)) {
2746 txq->need_update = 1;
2747 if (qc) {
2748 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2749 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2750 }
2751 } else {
2752 wait_write_ptr = 1;
2753 txq->need_update = 0;
2754 }
2755
2756 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2757 sizeof(out_cmd->cmd.tx));
2758
2759 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2760 ieee80211_get_hdrlen(fc));
2761
2762 /* Tell device the write index *just past* this latest filled TFD */
2763 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2764 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2765 spin_unlock_irqrestore(&priv->lock, flags);
2766
2767 if (rc)
2768 return rc;
2769
2770 if ((iwl3945_queue_space(q) < q->high_mark)
2771 && priv->mac80211_registered) {
2772 if (wait_write_ptr) {
2773 spin_lock_irqsave(&priv->lock, flags);
2774 txq->need_update = 1;
2775 iwl3945_tx_queue_update_write_ptr(priv, txq);
2776 spin_unlock_irqrestore(&priv->lock, flags);
2777 }
2778
2779 ieee80211_stop_queue(priv->hw, ctl->queue);
2780 }
2781
2782 return 0;
2783
2784 drop_unlock:
2785 spin_unlock_irqrestore(&priv->lock, flags);
2786 drop:
2787 return -1;
2788 }
2789
2790 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2791 {
2792 const struct ieee80211_supported_band *sband = NULL;
2793 struct ieee80211_rate *rate;
2794 int i;
2795
2796 sband = iwl3945_get_band(priv, priv->band);
2797 if (!sband) {
2798 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2799 return;
2800 }
2801
2802 priv->active_rate = 0;
2803 priv->active_rate_basic = 0;
2804
2805 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2806 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2807
2808 for (i = 0; i < sband->n_bitrates; i++) {
2809 rate = &sband->bitrates[i];
2810 if ((rate->hw_value < IWL_RATE_COUNT) &&
2811 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2812 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2813 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2814 priv->active_rate |= (1 << rate->hw_value);
2815 }
2816 }
2817
2818 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2819 priv->active_rate, priv->active_rate_basic);
2820
2821 /*
2822 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2823 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2824 * OFDM
2825 */
2826 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2827 priv->staging_rxon.cck_basic_rates =
2828 ((priv->active_rate_basic &
2829 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2830 else
2831 priv->staging_rxon.cck_basic_rates =
2832 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2833
2834 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2835 priv->staging_rxon.ofdm_basic_rates =
2836 ((priv->active_rate_basic &
2837 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2838 IWL_FIRST_OFDM_RATE) & 0xFF;
2839 else
2840 priv->staging_rxon.ofdm_basic_rates =
2841 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2842 }
2843
2844 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2845 {
2846 unsigned long flags;
2847
2848 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2849 return;
2850
2851 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2852 disable_radio ? "OFF" : "ON");
2853
2854 if (disable_radio) {
2855 iwl3945_scan_cancel(priv);
2856 /* FIXME: This is a workaround for AP */
2857 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2858 spin_lock_irqsave(&priv->lock, flags);
2859 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2860 CSR_UCODE_SW_BIT_RFKILL);
2861 spin_unlock_irqrestore(&priv->lock, flags);
2862 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2863 set_bit(STATUS_RF_KILL_SW, &priv->status);
2864 }
2865 return;
2866 }
2867
2868 spin_lock_irqsave(&priv->lock, flags);
2869 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2870
2871 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2872 spin_unlock_irqrestore(&priv->lock, flags);
2873
2874 /* wake up ucode */
2875 msleep(10);
2876
2877 spin_lock_irqsave(&priv->lock, flags);
2878 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2879 if (!iwl3945_grab_nic_access(priv))
2880 iwl3945_release_nic_access(priv);
2881 spin_unlock_irqrestore(&priv->lock, flags);
2882
2883 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2884 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2885 "disabled by HW switch\n");
2886 return;
2887 }
2888
2889 queue_work(priv->workqueue, &priv->restart);
2890 return;
2891 }
2892
2893 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
2894 u32 decrypt_res, struct ieee80211_rx_status *stats)
2895 {
2896 u16 fc =
2897 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2898
2899 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2900 return;
2901
2902 if (!(fc & IEEE80211_FCTL_PROTECTED))
2903 return;
2904
2905 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2906 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2907 case RX_RES_STATUS_SEC_TYPE_TKIP:
2908 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2909 RX_RES_STATUS_BAD_ICV_MIC)
2910 stats->flag |= RX_FLAG_MMIC_ERROR;
2911 case RX_RES_STATUS_SEC_TYPE_WEP:
2912 case RX_RES_STATUS_SEC_TYPE_CCMP:
2913 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2914 RX_RES_STATUS_DECRYPT_OK) {
2915 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2916 stats->flag |= RX_FLAG_DECRYPTED;
2917 }
2918 break;
2919
2920 default:
2921 break;
2922 }
2923 }
2924
2925 #define IWL_PACKET_RETRY_TIME HZ
2926
2927 int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2928 {
2929 u16 sc = le16_to_cpu(header->seq_ctrl);
2930 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2931 u16 frag = sc & IEEE80211_SCTL_FRAG;
2932 u16 *last_seq, *last_frag;
2933 unsigned long *last_time;
2934
2935 switch (priv->iw_mode) {
2936 case IEEE80211_IF_TYPE_IBSS:{
2937 struct list_head *p;
2938 struct iwl3945_ibss_seq *entry = NULL;
2939 u8 *mac = header->addr2;
2940 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2941
2942 __list_for_each(p, &priv->ibss_mac_hash[index]) {
2943 entry = list_entry(p, struct iwl3945_ibss_seq, list);
2944 if (!compare_ether_addr(entry->mac, mac))
2945 break;
2946 }
2947 if (p == &priv->ibss_mac_hash[index]) {
2948 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2949 if (!entry) {
2950 IWL_ERROR("Cannot malloc new mac entry\n");
2951 return 0;
2952 }
2953 memcpy(entry->mac, mac, ETH_ALEN);
2954 entry->seq_num = seq;
2955 entry->frag_num = frag;
2956 entry->packet_time = jiffies;
2957 list_add(&entry->list, &priv->ibss_mac_hash[index]);
2958 return 0;
2959 }
2960 last_seq = &entry->seq_num;
2961 last_frag = &entry->frag_num;
2962 last_time = &entry->packet_time;
2963 break;
2964 }
2965 case IEEE80211_IF_TYPE_STA:
2966 last_seq = &priv->last_seq_num;
2967 last_frag = &priv->last_frag_num;
2968 last_time = &priv->last_packet_time;
2969 break;
2970 default:
2971 return 0;
2972 }
2973 if ((*last_seq == seq) &&
2974 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2975 if (*last_frag == frag)
2976 goto drop;
2977 if (*last_frag + 1 != frag)
2978 /* out-of-order fragment */
2979 goto drop;
2980 } else
2981 *last_seq = seq;
2982
2983 *last_frag = frag;
2984 *last_time = jiffies;
2985 return 0;
2986
2987 drop:
2988 return 1;
2989 }
2990
2991 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2992
2993 #include "iwl-spectrum.h"
2994
2995 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2996 #define BEACON_TIME_MASK_HIGH 0xFF000000
2997 #define TIME_UNIT 1024
2998
2999 /*
3000 * extended beacon time format
3001 * time in usec will be changed into a 32-bit value in 8:24 format
3002 * the high 1 byte is the beacon counts
3003 * the lower 3 bytes is the time in usec within one beacon interval
3004 */
3005
3006 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
3007 {
3008 u32 quot;
3009 u32 rem;
3010 u32 interval = beacon_interval * 1024;
3011
3012 if (!interval || !usec)
3013 return 0;
3014
3015 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3016 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3017
3018 return (quot << 24) + rem;
3019 }
3020
3021 /* base is usually what we get from ucode with each received frame,
3022 * the same as HW timer counter counting down
3023 */
3024
3025 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3026 {
3027 u32 base_low = base & BEACON_TIME_MASK_LOW;
3028 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3029 u32 interval = beacon_interval * TIME_UNIT;
3030 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3031 (addon & BEACON_TIME_MASK_HIGH);
3032
3033 if (base_low > addon_low)
3034 res += base_low - addon_low;
3035 else if (base_low < addon_low) {
3036 res += interval + base_low - addon_low;
3037 res += (1 << 24);
3038 } else
3039 res += (1 << 24);
3040
3041 return cpu_to_le32(res);
3042 }
3043
3044 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
3045 struct ieee80211_measurement_params *params,
3046 u8 type)
3047 {
3048 struct iwl3945_spectrum_cmd spectrum;
3049 struct iwl3945_rx_packet *res;
3050 struct iwl3945_host_cmd cmd = {
3051 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3052 .data = (void *)&spectrum,
3053 .meta.flags = CMD_WANT_SKB,
3054 };
3055 u32 add_time = le64_to_cpu(params->start_time);
3056 int rc;
3057 int spectrum_resp_status;
3058 int duration = le16_to_cpu(params->duration);
3059
3060 if (iwl3945_is_associated(priv))
3061 add_time =
3062 iwl3945_usecs_to_beacons(
3063 le64_to_cpu(params->start_time) - priv->last_tsf,
3064 le16_to_cpu(priv->rxon_timing.beacon_interval));
3065
3066 memset(&spectrum, 0, sizeof(spectrum));
3067
3068 spectrum.channel_count = cpu_to_le16(1);
3069 spectrum.flags =
3070 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3071 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3072 cmd.len = sizeof(spectrum);
3073 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3074
3075 if (iwl3945_is_associated(priv))
3076 spectrum.start_time =
3077 iwl3945_add_beacon_time(priv->last_beacon_time,
3078 add_time,
3079 le16_to_cpu(priv->rxon_timing.beacon_interval));
3080 else
3081 spectrum.start_time = 0;
3082
3083 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3084 spectrum.channels[0].channel = params->channel;
3085 spectrum.channels[0].type = type;
3086 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3087 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3088 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3089
3090 rc = iwl3945_send_cmd_sync(priv, &cmd);
3091 if (rc)
3092 return rc;
3093
3094 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
3095 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3096 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3097 rc = -EIO;
3098 }
3099
3100 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3101 switch (spectrum_resp_status) {
3102 case 0: /* Command will be handled */
3103 if (res->u.spectrum.id != 0xff) {
3104 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3105 res->u.spectrum.id);
3106 priv->measurement_status &= ~MEASUREMENT_READY;
3107 }
3108 priv->measurement_status |= MEASUREMENT_ACTIVE;
3109 rc = 0;
3110 break;
3111
3112 case 1: /* Command will not be handled */
3113 rc = -EAGAIN;
3114 break;
3115 }
3116
3117 dev_kfree_skb_any(cmd.meta.u.skb);
3118
3119 return rc;
3120 }
3121 #endif
3122
3123 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3124 struct iwl3945_rx_mem_buffer *rxb)
3125 {
3126 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3127 struct iwl3945_alive_resp *palive;
3128 struct delayed_work *pwork;
3129
3130 palive = &pkt->u.alive_frame;
3131
3132 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3133 "0x%01X 0x%01X\n",
3134 palive->is_valid, palive->ver_type,
3135 palive->ver_subtype);
3136
3137 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3138 IWL_DEBUG_INFO("Initialization Alive received.\n");
3139 memcpy(&priv->card_alive_init,
3140 &pkt->u.alive_frame,
3141 sizeof(struct iwl3945_init_alive_resp));
3142 pwork = &priv->init_alive_start;
3143 } else {
3144 IWL_DEBUG_INFO("Runtime Alive received.\n");
3145 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3146 sizeof(struct iwl3945_alive_resp));
3147 pwork = &priv->alive_start;
3148 iwl3945_disable_events(priv);
3149 }
3150
3151 /* We delay the ALIVE response by 5ms to
3152 * give the HW RF Kill time to activate... */
3153 if (palive->is_valid == UCODE_VALID_OK)
3154 queue_delayed_work(priv->workqueue, pwork,
3155 msecs_to_jiffies(5));
3156 else
3157 IWL_WARNING("uCode did not respond OK.\n");
3158 }
3159
3160 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3161 struct iwl3945_rx_mem_buffer *rxb)
3162 {
3163 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3164
3165 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3166 return;
3167 }
3168
3169 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3170 struct iwl3945_rx_mem_buffer *rxb)
3171 {
3172 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3173
3174 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3175 "seq 0x%04X ser 0x%08X\n",
3176 le32_to_cpu(pkt->u.err_resp.error_type),
3177 get_cmd_string(pkt->u.err_resp.cmd_id),
3178 pkt->u.err_resp.cmd_id,
3179 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3180 le32_to_cpu(pkt->u.err_resp.error_info));
3181 }
3182
3183 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3184
3185 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3186 {
3187 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3188 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3189 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3190 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3191 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3192 rxon->channel = csa->channel;
3193 priv->staging_rxon.channel = csa->channel;
3194 }
3195
3196 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3197 struct iwl3945_rx_mem_buffer *rxb)
3198 {
3199 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3200 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3201 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3202
3203 if (!report->state) {
3204 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3205 "Spectrum Measure Notification: Start\n");
3206 return;
3207 }
3208
3209 memcpy(&priv->measure_report, report, sizeof(*report));
3210 priv->measurement_status |= MEASUREMENT_READY;
3211 #endif
3212 }
3213
3214 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3215 struct iwl3945_rx_mem_buffer *rxb)
3216 {
3217 #ifdef CONFIG_IWL3945_DEBUG
3218 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3219 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3220 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3221 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3222 #endif
3223 }
3224
3225 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3226 struct iwl3945_rx_mem_buffer *rxb)
3227 {
3228 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3229 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3230 "notification for %s:\n",
3231 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3232 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3233 }
3234
3235 static void iwl3945_bg_beacon_update(struct work_struct *work)
3236 {
3237 struct iwl3945_priv *priv =
3238 container_of(work, struct iwl3945_priv, beacon_update);
3239 struct sk_buff *beacon;
3240
3241 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3242 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3243
3244 if (!beacon) {
3245 IWL_ERROR("update beacon failed\n");
3246 return;
3247 }
3248
3249 mutex_lock(&priv->mutex);
3250 /* new beacon skb is allocated every time; dispose previous.*/
3251 if (priv->ibss_beacon)
3252 dev_kfree_skb(priv->ibss_beacon);
3253
3254 priv->ibss_beacon = beacon;
3255 mutex_unlock(&priv->mutex);
3256
3257 iwl3945_send_beacon_cmd(priv);
3258 }
3259
3260 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3261 struct iwl3945_rx_mem_buffer *rxb)
3262 {
3263 #ifdef CONFIG_IWL3945_DEBUG
3264 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3265 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3266 u8 rate = beacon->beacon_notify_hdr.rate;
3267
3268 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3269 "tsf %d %d rate %d\n",
3270 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3271 beacon->beacon_notify_hdr.failure_frame,
3272 le32_to_cpu(beacon->ibss_mgr_status),
3273 le32_to_cpu(beacon->high_tsf),
3274 le32_to_cpu(beacon->low_tsf), rate);
3275 #endif
3276
3277 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3278 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3279 queue_work(priv->workqueue, &priv->beacon_update);
3280 }
3281
3282 /* Service response to REPLY_SCAN_CMD (0x80) */
3283 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3284 struct iwl3945_rx_mem_buffer *rxb)
3285 {
3286 #ifdef CONFIG_IWL3945_DEBUG
3287 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3288 struct iwl3945_scanreq_notification *notif =
3289 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3290
3291 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3292 #endif
3293 }
3294
3295 /* Service SCAN_START_NOTIFICATION (0x82) */
3296 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3297 struct iwl3945_rx_mem_buffer *rxb)
3298 {
3299 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3300 struct iwl3945_scanstart_notification *notif =
3301 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3302 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3303 IWL_DEBUG_SCAN("Scan start: "
3304 "%d [802.11%s] "
3305 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3306 notif->channel,
3307 notif->band ? "bg" : "a",
3308 notif->tsf_high,
3309 notif->tsf_low, notif->status, notif->beacon_timer);
3310 }
3311
3312 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3313 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3314 struct iwl3945_rx_mem_buffer *rxb)
3315 {
3316 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3317 struct iwl3945_scanresults_notification *notif =
3318 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3319
3320 IWL_DEBUG_SCAN("Scan ch.res: "
3321 "%d [802.11%s] "
3322 "(TSF: 0x%08X:%08X) - %d "
3323 "elapsed=%lu usec (%dms since last)\n",
3324 notif->channel,
3325 notif->band ? "bg" : "a",
3326 le32_to_cpu(notif->tsf_high),
3327 le32_to_cpu(notif->tsf_low),
3328 le32_to_cpu(notif->statistics[0]),
3329 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3330 jiffies_to_msecs(elapsed_jiffies
3331 (priv->last_scan_jiffies, jiffies)));
3332
3333 priv->last_scan_jiffies = jiffies;
3334 priv->next_scan_jiffies = 0;
3335 }
3336
3337 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3338 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3339 struct iwl3945_rx_mem_buffer *rxb)
3340 {
3341 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3342 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3343
3344 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3345 scan_notif->scanned_channels,
3346 scan_notif->tsf_low,
3347 scan_notif->tsf_high, scan_notif->status);
3348
3349 /* The HW is no longer scanning */
3350 clear_bit(STATUS_SCAN_HW, &priv->status);
3351
3352 /* The scan completion notification came in, so kill that timer... */
3353 cancel_delayed_work(&priv->scan_check);
3354
3355 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3356 (priv->scan_bands == 2) ? "2.4" : "5.2",
3357 jiffies_to_msecs(elapsed_jiffies
3358 (priv->scan_pass_start, jiffies)));
3359
3360 /* Remove this scanned band from the list
3361 * of pending bands to scan */
3362 priv->scan_bands--;
3363
3364 /* If a request to abort was given, or the scan did not succeed
3365 * then we reset the scan state machine and terminate,
3366 * re-queuing another scan if one has been requested */
3367 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3368 IWL_DEBUG_INFO("Aborted scan completed.\n");
3369 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3370 } else {
3371 /* If there are more bands on this scan pass reschedule */
3372 if (priv->scan_bands > 0)
3373 goto reschedule;
3374 }
3375
3376 priv->last_scan_jiffies = jiffies;
3377 priv->next_scan_jiffies = 0;
3378 IWL_DEBUG_INFO("Setting scan to off\n");
3379
3380 clear_bit(STATUS_SCANNING, &priv->status);
3381
3382 IWL_DEBUG_INFO("Scan took %dms\n",
3383 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3384
3385 queue_work(priv->workqueue, &priv->scan_completed);
3386
3387 return;
3388
3389 reschedule:
3390 priv->scan_pass_start = jiffies;
3391 queue_work(priv->workqueue, &priv->request_scan);
3392 }
3393
3394 /* Handle notification from uCode that card's power state is changing
3395 * due to software, hardware, or critical temperature RFKILL */
3396 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3397 struct iwl3945_rx_mem_buffer *rxb)
3398 {
3399 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3400 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3401 unsigned long status = priv->status;
3402
3403 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3404 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3405 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3406
3407 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3408 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3409
3410 if (flags & HW_CARD_DISABLED)
3411 set_bit(STATUS_RF_KILL_HW, &priv->status);
3412 else
3413 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3414
3415
3416 if (flags & SW_CARD_DISABLED)
3417 set_bit(STATUS_RF_KILL_SW, &priv->status);
3418 else
3419 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3420
3421 iwl3945_scan_cancel(priv);
3422
3423 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3424 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3425 (test_bit(STATUS_RF_KILL_SW, &status) !=
3426 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3427 queue_work(priv->workqueue, &priv->rf_kill);
3428 else
3429 wake_up_interruptible(&priv->wait_command_queue);
3430 }
3431
3432 /**
3433 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3434 *
3435 * Setup the RX handlers for each of the reply types sent from the uCode
3436 * to the host.
3437 *
3438 * This function chains into the hardware specific files for them to setup
3439 * any hardware specific handlers as well.
3440 */
3441 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3442 {
3443 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3444 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3445 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3446 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3447 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3448 iwl3945_rx_spectrum_measure_notif;
3449 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3450 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3451 iwl3945_rx_pm_debug_statistics_notif;
3452 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3453
3454 /*
3455 * The same handler is used for both the REPLY to a discrete
3456 * statistics request from the host as well as for the periodic
3457 * statistics notifications (after received beacons) from the uCode.
3458 */
3459 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3460 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3461
3462 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3463 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3464 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3465 iwl3945_rx_scan_results_notif;
3466 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3467 iwl3945_rx_scan_complete_notif;
3468 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3469
3470 /* Set up hardware specific Rx handlers */
3471 iwl3945_hw_rx_handler_setup(priv);
3472 }
3473
3474 /**
3475 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3476 * When FW advances 'R' index, all entries between old and new 'R' index
3477 * need to be reclaimed.
3478 */
3479 static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3480 int txq_id, int index)
3481 {
3482 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3483 struct iwl3945_queue *q = &txq->q;
3484 int nfreed = 0;
3485
3486 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3487 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3488 "is out of range [0-%d] %d %d.\n", txq_id,
3489 index, q->n_bd, q->write_ptr, q->read_ptr);
3490 return;
3491 }
3492
3493 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3494 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3495 if (nfreed > 1) {
3496 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3497 q->write_ptr, q->read_ptr);
3498 queue_work(priv->workqueue, &priv->restart);
3499 break;
3500 }
3501 nfreed++;
3502 }
3503 }
3504
3505
3506 /**
3507 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3508 * @rxb: Rx buffer to reclaim
3509 *
3510 * If an Rx buffer has an async callback associated with it the callback
3511 * will be executed. The attached skb (if present) will only be freed
3512 * if the callback returns 1
3513 */
3514 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3515 struct iwl3945_rx_mem_buffer *rxb)
3516 {
3517 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3518 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3519 int txq_id = SEQ_TO_QUEUE(sequence);
3520 int index = SEQ_TO_INDEX(sequence);
3521 int huge = sequence & SEQ_HUGE_FRAME;
3522 int cmd_index;
3523 struct iwl3945_cmd *cmd;
3524
3525 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3526
3527 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3528 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3529
3530 /* Input error checking is done when commands are added to queue. */
3531 if (cmd->meta.flags & CMD_WANT_SKB) {
3532 cmd->meta.source->u.skb = rxb->skb;
3533 rxb->skb = NULL;
3534 } else if (cmd->meta.u.callback &&
3535 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3536 rxb->skb = NULL;
3537
3538 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3539
3540 if (!(cmd->meta.flags & CMD_ASYNC)) {
3541 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3542 wake_up_interruptible(&priv->wait_command_queue);
3543 }
3544 }
3545
3546 /************************** RX-FUNCTIONS ****************************/
3547 /*
3548 * Rx theory of operation
3549 *
3550 * The host allocates 32 DMA target addresses and passes the host address
3551 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3552 * 0 to 31
3553 *
3554 * Rx Queue Indexes
3555 * The host/firmware share two index registers for managing the Rx buffers.
3556 *
3557 * The READ index maps to the first position that the firmware may be writing
3558 * to -- the driver can read up to (but not including) this position and get
3559 * good data.
3560 * The READ index is managed by the firmware once the card is enabled.
3561 *
3562 * The WRITE index maps to the last position the driver has read from -- the
3563 * position preceding WRITE is the last slot the firmware can place a packet.
3564 *
3565 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3566 * WRITE = READ.
3567 *
3568 * During initialization, the host sets up the READ queue position to the first
3569 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3570 *
3571 * When the firmware places a packet in a buffer, it will advance the READ index
3572 * and fire the RX interrupt. The driver can then query the READ index and
3573 * process as many packets as possible, moving the WRITE index forward as it
3574 * resets the Rx queue buffers with new memory.
3575 *
3576 * The management in the driver is as follows:
3577 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3578 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3579 * to replenish the iwl->rxq->rx_free.
3580 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3581 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3582 * 'processed' and 'read' driver indexes as well)
3583 * + A received packet is processed and handed to the kernel network stack,
3584 * detached from the iwl->rxq. The driver 'processed' index is updated.
3585 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3586 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3587 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3588 * were enough free buffers and RX_STALLED is set it is cleared.
3589 *
3590 *
3591 * Driver sequence:
3592 *
3593 * iwl3945_rx_queue_alloc() Allocates rx_free
3594 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3595 * iwl3945_rx_queue_restock
3596 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3597 * queue, updates firmware pointers, and updates
3598 * the WRITE index. If insufficient rx_free buffers
3599 * are available, schedules iwl3945_rx_replenish
3600 *
3601 * -- enable interrupts --
3602 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3603 * READ INDEX, detaching the SKB from the pool.
3604 * Moves the packet buffer from queue to rx_used.
3605 * Calls iwl3945_rx_queue_restock to refill any empty
3606 * slots.
3607 * ...
3608 *
3609 */
3610
3611 /**
3612 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3613 */
3614 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3615 {
3616 int s = q->read - q->write;
3617 if (s <= 0)
3618 s += RX_QUEUE_SIZE;
3619 /* keep some buffer to not confuse full and empty queue */
3620 s -= 2;
3621 if (s < 0)
3622 s = 0;
3623 return s;
3624 }
3625
3626 /**
3627 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3628 */
3629 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3630 {
3631 u32 reg = 0;
3632 int rc = 0;
3633 unsigned long flags;
3634
3635 spin_lock_irqsave(&q->lock, flags);
3636
3637 if (q->need_update == 0)
3638 goto exit_unlock;
3639
3640 /* If power-saving is in use, make sure device is awake */
3641 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3642 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3643
3644 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3645 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3646 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3647 goto exit_unlock;
3648 }
3649
3650 rc = iwl3945_grab_nic_access(priv);
3651 if (rc)
3652 goto exit_unlock;
3653
3654 /* Device expects a multiple of 8 */
3655 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3656 q->write & ~0x7);
3657 iwl3945_release_nic_access(priv);
3658
3659 /* Else device is assumed to be awake */
3660 } else
3661 /* Device expects a multiple of 8 */
3662 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3663
3664
3665 q->need_update = 0;
3666
3667 exit_unlock:
3668 spin_unlock_irqrestore(&q->lock, flags);
3669 return rc;
3670 }
3671
3672 /**
3673 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3674 */
3675 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3676 dma_addr_t dma_addr)
3677 {
3678 return cpu_to_le32((u32)dma_addr);
3679 }
3680
3681 /**
3682 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3683 *
3684 * If there are slots in the RX queue that need to be restocked,
3685 * and we have free pre-allocated buffers, fill the ranks as much
3686 * as we can, pulling from rx_free.
3687 *
3688 * This moves the 'write' index forward to catch up with 'processed', and
3689 * also updates the memory address in the firmware to reference the new
3690 * target buffer.
3691 */
3692 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3693 {
3694 struct iwl3945_rx_queue *rxq = &priv->rxq;
3695 struct list_head *element;
3696 struct iwl3945_rx_mem_buffer *rxb;
3697 unsigned long flags;
3698 int write, rc;
3699
3700 spin_lock_irqsave(&rxq->lock, flags);
3701 write = rxq->write & ~0x7;
3702 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3703 /* Get next free Rx buffer, remove from free list */
3704 element = rxq->rx_free.next;
3705 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3706 list_del(element);
3707
3708 /* Point to Rx buffer via next RBD in circular buffer */
3709 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3710 rxq->queue[rxq->write] = rxb;
3711 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3712 rxq->free_count--;
3713 }
3714 spin_unlock_irqrestore(&rxq->lock, flags);
3715 /* If the pre-allocated buffer pool is dropping low, schedule to
3716 * refill it */
3717 if (rxq->free_count <= RX_LOW_WATERMARK)
3718 queue_work(priv->workqueue, &priv->rx_replenish);
3719
3720
3721 /* If we've added more space for the firmware to place data, tell it.
3722 * Increment device's write pointer in multiples of 8. */
3723 if ((write != (rxq->write & ~0x7))
3724 || (abs(rxq->write - rxq->read) > 7)) {
3725 spin_lock_irqsave(&rxq->lock, flags);
3726 rxq->need_update = 1;
3727 spin_unlock_irqrestore(&rxq->lock, flags);
3728 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3729 if (rc)
3730 return rc;
3731 }
3732
3733 return 0;
3734 }
3735
3736 /**
3737 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3738 *
3739 * When moving to rx_free an SKB is allocated for the slot.
3740 *
3741 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3742 * This is called as a scheduled work item (except for during initialization)
3743 */
3744 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
3745 {
3746 struct iwl3945_rx_queue *rxq = &priv->rxq;
3747 struct list_head *element;
3748 struct iwl3945_rx_mem_buffer *rxb;
3749 unsigned long flags;
3750 spin_lock_irqsave(&rxq->lock, flags);
3751 while (!list_empty(&rxq->rx_used)) {
3752 element = rxq->rx_used.next;
3753 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3754
3755 /* Alloc a new receive buffer */
3756 rxb->skb =
3757 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3758 if (!rxb->skb) {
3759 if (net_ratelimit())
3760 printk(KERN_CRIT DRV_NAME
3761 ": Can not allocate SKB buffers\n");
3762 /* We don't reschedule replenish work here -- we will
3763 * call the restock method and if it still needs
3764 * more buffers it will schedule replenish */
3765 break;
3766 }
3767
3768 /* If radiotap head is required, reserve some headroom here.
3769 * The physical head count is a variable rx_stats->phy_count.
3770 * We reserve 4 bytes here. Plus these extra bytes, the
3771 * headroom of the physical head should be enough for the
3772 * radiotap head that iwl3945 supported. See iwl3945_rt.
3773 */
3774 skb_reserve(rxb->skb, 4);
3775
3776 priv->alloc_rxb_skb++;
3777 list_del(element);
3778
3779 /* Get physical address of RB/SKB */
3780 rxb->dma_addr =
3781 pci_map_single(priv->pci_dev, rxb->skb->data,
3782 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3783 list_add_tail(&rxb->list, &rxq->rx_free);
3784 rxq->free_count++;
3785 }
3786 spin_unlock_irqrestore(&rxq->lock, flags);
3787 }
3788
3789 /*
3790 * this should be called while priv->lock is locked
3791 */
3792 static void __iwl3945_rx_replenish(void *data)
3793 {
3794 struct iwl3945_priv *priv = data;
3795
3796 iwl3945_rx_allocate(priv);
3797 iwl3945_rx_queue_restock(priv);
3798 }
3799
3800
3801 void iwl3945_rx_replenish(void *data)
3802 {
3803 struct iwl3945_priv *priv = data;
3804 unsigned long flags;
3805
3806 iwl3945_rx_allocate(priv);
3807
3808 spin_lock_irqsave(&priv->lock, flags);
3809 iwl3945_rx_queue_restock(priv);
3810 spin_unlock_irqrestore(&priv->lock, flags);
3811 }
3812
3813 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3814 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3815 * This free routine walks the list of POOL entries and if SKB is set to
3816 * non NULL it is unmapped and freed
3817 */
3818 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3819 {
3820 int i;
3821 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3822 if (rxq->pool[i].skb != NULL) {
3823 pci_unmap_single(priv->pci_dev,
3824 rxq->pool[i].dma_addr,
3825 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3826 dev_kfree_skb(rxq->pool[i].skb);
3827 }
3828 }
3829
3830 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3831 rxq->dma_addr);
3832 rxq->bd = NULL;
3833 }
3834
3835 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
3836 {
3837 struct iwl3945_rx_queue *rxq = &priv->rxq;
3838 struct pci_dev *dev = priv->pci_dev;
3839 int i;
3840
3841 spin_lock_init(&rxq->lock);
3842 INIT_LIST_HEAD(&rxq->rx_free);
3843 INIT_LIST_HEAD(&rxq->rx_used);
3844
3845 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3846 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3847 if (!rxq->bd)
3848 return -ENOMEM;
3849
3850 /* Fill the rx_used queue with _all_ of the Rx buffers */
3851 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3852 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3853
3854 /* Set us so that we have processed and used all buffers, but have
3855 * not restocked the Rx queue with fresh buffers */
3856 rxq->read = rxq->write = 0;
3857 rxq->free_count = 0;
3858 rxq->need_update = 0;
3859 return 0;
3860 }
3861
3862 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3863 {
3864 unsigned long flags;
3865 int i;
3866 spin_lock_irqsave(&rxq->lock, flags);
3867 INIT_LIST_HEAD(&rxq->rx_free);
3868 INIT_LIST_HEAD(&rxq->rx_used);
3869 /* Fill the rx_used queue with _all_ of the Rx buffers */
3870 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3871 /* In the reset function, these buffers may have been allocated
3872 * to an SKB, so we need to unmap and free potential storage */
3873 if (rxq->pool[i].skb != NULL) {
3874 pci_unmap_single(priv->pci_dev,
3875 rxq->pool[i].dma_addr,
3876 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3877 priv->alloc_rxb_skb--;
3878 dev_kfree_skb(rxq->pool[i].skb);
3879 rxq->pool[i].skb = NULL;
3880 }
3881 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3882 }
3883
3884 /* Set us so that we have processed and used all buffers, but have
3885 * not restocked the Rx queue with fresh buffers */
3886 rxq->read = rxq->write = 0;
3887 rxq->free_count = 0;
3888 spin_unlock_irqrestore(&rxq->lock, flags);
3889 }
3890
3891 /* Convert linear signal-to-noise ratio into dB */
3892 static u8 ratio2dB[100] = {
3893 /* 0 1 2 3 4 5 6 7 8 9 */
3894 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3895 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3896 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3897 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3898 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3899 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3900 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3901 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3902 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3903 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3904 };
3905
3906 /* Calculates a relative dB value from a ratio of linear
3907 * (i.e. not dB) signal levels.
3908 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3909 int iwl3945_calc_db_from_ratio(int sig_ratio)
3910 {
3911 /* 1000:1 or higher just report as 60 dB */
3912 if (sig_ratio >= 1000)
3913 return 60;
3914
3915 /* 100:1 or higher, divide by 10 and use table,
3916 * add 20 dB to make up for divide by 10 */
3917 if (sig_ratio >= 100)
3918 return (20 + (int)ratio2dB[sig_ratio/10]);
3919
3920 /* We shouldn't see this */
3921 if (sig_ratio < 1)
3922 return 0;
3923
3924 /* Use table for ratios 1:1 - 99:1 */
3925 return (int)ratio2dB[sig_ratio];
3926 }
3927
3928 #define PERFECT_RSSI (-20) /* dBm */
3929 #define WORST_RSSI (-95) /* dBm */
3930 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3931
3932 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3933 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3934 * about formulas used below. */
3935 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3936 {
3937 int sig_qual;
3938 int degradation = PERFECT_RSSI - rssi_dbm;
3939
3940 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3941 * as indicator; formula is (signal dbm - noise dbm).
3942 * SNR at or above 40 is a great signal (100%).
3943 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3944 * Weakest usable signal is usually 10 - 15 dB SNR. */
3945 if (noise_dbm) {
3946 if (rssi_dbm - noise_dbm >= 40)
3947 return 100;
3948 else if (rssi_dbm < noise_dbm)
3949 return 0;
3950 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3951
3952 /* Else use just the signal level.
3953 * This formula is a least squares fit of data points collected and
3954 * compared with a reference system that had a percentage (%) display
3955 * for signal quality. */
3956 } else
3957 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3958 (15 * RSSI_RANGE + 62 * degradation)) /
3959 (RSSI_RANGE * RSSI_RANGE);
3960
3961 if (sig_qual > 100)
3962 sig_qual = 100;
3963 else if (sig_qual < 1)
3964 sig_qual = 0;
3965
3966 return sig_qual;
3967 }
3968
3969 /**
3970 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3971 *
3972 * Uses the priv->rx_handlers callback function array to invoke
3973 * the appropriate handlers, including command responses,
3974 * frame-received notifications, and other notifications.
3975 */
3976 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
3977 {
3978 struct iwl3945_rx_mem_buffer *rxb;
3979 struct iwl3945_rx_packet *pkt;
3980 struct iwl3945_rx_queue *rxq = &priv->rxq;
3981 u32 r, i;
3982 int reclaim;
3983 unsigned long flags;
3984 u8 fill_rx = 0;
3985 u32 count = 8;
3986
3987 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3988 * buffer that the driver may process (last buffer filled by ucode). */
3989 r = iwl3945_hw_get_rx_read(priv);
3990 i = rxq->read;
3991
3992 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3993 fill_rx = 1;
3994 /* Rx interrupt, but nothing sent from uCode */
3995 if (i == r)
3996 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3997
3998 while (i != r) {
3999 rxb = rxq->queue[i];
4000
4001 /* If an RXB doesn't have a Rx queue slot associated with it,
4002 * then a bug has been introduced in the queue refilling
4003 * routines -- catch it here */
4004 BUG_ON(rxb == NULL);
4005
4006 rxq->queue[i] = NULL;
4007
4008 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4009 IWL_RX_BUF_SIZE,
4010 PCI_DMA_FROMDEVICE);
4011 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
4012
4013 /* Reclaim a command buffer only if this packet is a response
4014 * to a (driver-originated) command.
4015 * If the packet (e.g. Rx frame) originated from uCode,
4016 * there is no command buffer to reclaim.
4017 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4018 * but apparently a few don't get set; catch them here. */
4019 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4020 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4021 (pkt->hdr.cmd != REPLY_TX);
4022
4023 /* Based on type of command response or notification,
4024 * handle those that need handling via function in
4025 * rx_handlers table. See iwl3945_setup_rx_handlers() */
4026 if (priv->rx_handlers[pkt->hdr.cmd]) {
4027 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4028 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4029 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4030 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4031 } else {
4032 /* No handling needed */
4033 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4034 "r %d i %d No handler needed for %s, 0x%02x\n",
4035 r, i, get_cmd_string(pkt->hdr.cmd),
4036 pkt->hdr.cmd);
4037 }
4038
4039 if (reclaim) {
4040 /* Invoke any callbacks, transfer the skb to caller, and
4041 * fire off the (possibly) blocking iwl3945_send_cmd()
4042 * as we reclaim the driver command queue */
4043 if (rxb && rxb->skb)
4044 iwl3945_tx_cmd_complete(priv, rxb);
4045 else
4046 IWL_WARNING("Claim null rxb?\n");
4047 }
4048
4049 /* For now we just don't re-use anything. We can tweak this
4050 * later to try and re-use notification packets and SKBs that
4051 * fail to Rx correctly */
4052 if (rxb->skb != NULL) {
4053 priv->alloc_rxb_skb--;
4054 dev_kfree_skb_any(rxb->skb);
4055 rxb->skb = NULL;
4056 }
4057
4058 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4059 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4060 spin_lock_irqsave(&rxq->lock, flags);
4061 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4062 spin_unlock_irqrestore(&rxq->lock, flags);
4063 i = (i + 1) & RX_QUEUE_MASK;
4064 /* If there are a lot of unused frames,
4065 * restock the Rx queue so ucode won't assert. */
4066 if (fill_rx) {
4067 count++;
4068 if (count >= 8) {
4069 priv->rxq.read = i;
4070 __iwl3945_rx_replenish(priv);
4071 count = 0;
4072 }
4073 }
4074 }
4075
4076 /* Backtrack one entry */
4077 priv->rxq.read = i;
4078 iwl3945_rx_queue_restock(priv);
4079 }
4080
4081 /**
4082 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4083 */
4084 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4085 struct iwl3945_tx_queue *txq)
4086 {
4087 u32 reg = 0;
4088 int rc = 0;
4089 int txq_id = txq->q.id;
4090
4091 if (txq->need_update == 0)
4092 return rc;
4093
4094 /* if we're trying to save power */
4095 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4096 /* wake up nic if it's powered down ...
4097 * uCode will wake up, and interrupt us again, so next
4098 * time we'll skip this part. */
4099 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4100
4101 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4102 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4103 iwl3945_set_bit(priv, CSR_GP_CNTRL,
4104 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4105 return rc;
4106 }
4107
4108 /* restore this queue's parameters in nic hardware. */
4109 rc = iwl3945_grab_nic_access(priv);
4110 if (rc)
4111 return rc;
4112 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4113 txq->q.write_ptr | (txq_id << 8));
4114 iwl3945_release_nic_access(priv);
4115
4116 /* else not in power-save mode, uCode will never sleep when we're
4117 * trying to tx (during RFKILL, we're not trying to tx). */
4118 } else
4119 iwl3945_write32(priv, HBUS_TARG_WRPTR,
4120 txq->q.write_ptr | (txq_id << 8));
4121
4122 txq->need_update = 0;
4123
4124 return rc;
4125 }
4126
4127 #ifdef CONFIG_IWL3945_DEBUG
4128 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4129 {
4130 DECLARE_MAC_BUF(mac);
4131
4132 IWL_DEBUG_RADIO("RX CONFIG:\n");
4133 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4134 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4135 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4136 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4137 le32_to_cpu(rxon->filter_flags));
4138 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4139 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4140 rxon->ofdm_basic_rates);
4141 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4142 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4143 print_mac(mac, rxon->node_addr));
4144 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4145 print_mac(mac, rxon->bssid_addr));
4146 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4147 }
4148 #endif
4149
4150 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4151 {
4152 IWL_DEBUG_ISR("Enabling interrupts\n");
4153 set_bit(STATUS_INT_ENABLED, &priv->status);
4154 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4155 }
4156
4157
4158 /* call this function to flush any scheduled tasklet */
4159 static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
4160 {
4161 /* wait to make sure we flush pedding tasklet*/
4162 synchronize_irq(priv->pci_dev->irq);
4163 tasklet_kill(&priv->irq_tasklet);
4164 }
4165
4166
4167 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4168 {
4169 clear_bit(STATUS_INT_ENABLED, &priv->status);
4170
4171 /* disable interrupts from uCode/NIC to host */
4172 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4173
4174 /* acknowledge/clear/reset any interrupts still pending
4175 * from uCode or flow handler (Rx/Tx DMA) */
4176 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4177 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4178 IWL_DEBUG_ISR("Disabled interrupts\n");
4179 }
4180
4181 static const char *desc_lookup(int i)
4182 {
4183 switch (i) {
4184 case 1:
4185 return "FAIL";
4186 case 2:
4187 return "BAD_PARAM";
4188 case 3:
4189 return "BAD_CHECKSUM";
4190 case 4:
4191 return "NMI_INTERRUPT";
4192 case 5:
4193 return "SYSASSERT";
4194 case 6:
4195 return "FATAL_ERROR";
4196 }
4197
4198 return "UNKNOWN";
4199 }
4200
4201 #define ERROR_START_OFFSET (1 * sizeof(u32))
4202 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4203
4204 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4205 {
4206 u32 i;
4207 u32 desc, time, count, base, data1;
4208 u32 blink1, blink2, ilink1, ilink2;
4209 int rc;
4210
4211 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4212
4213 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4214 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4215 return;
4216 }
4217
4218 rc = iwl3945_grab_nic_access(priv);
4219 if (rc) {
4220 IWL_WARNING("Can not read from adapter at this time.\n");
4221 return;
4222 }
4223
4224 count = iwl3945_read_targ_mem(priv, base);
4225
4226 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4227 IWL_ERROR("Start IWL Error Log Dump:\n");
4228 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4229 }
4230
4231 IWL_ERROR("Desc Time asrtPC blink2 "
4232 "ilink1 nmiPC Line\n");
4233 for (i = ERROR_START_OFFSET;
4234 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4235 i += ERROR_ELEM_SIZE) {
4236 desc = iwl3945_read_targ_mem(priv, base + i);
4237 time =
4238 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4239 blink1 =
4240 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4241 blink2 =
4242 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4243 ilink1 =
4244 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4245 ilink2 =
4246 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4247 data1 =
4248 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4249
4250 IWL_ERROR
4251 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4252 desc_lookup(desc), desc, time, blink1, blink2,
4253 ilink1, ilink2, data1);
4254 }
4255
4256 iwl3945_release_nic_access(priv);
4257
4258 }
4259
4260 #define EVENT_START_OFFSET (6 * sizeof(u32))
4261
4262 /**
4263 * iwl3945_print_event_log - Dump error event log to syslog
4264 *
4265 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4266 */
4267 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4268 u32 num_events, u32 mode)
4269 {
4270 u32 i;
4271 u32 base; /* SRAM byte address of event log header */
4272 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4273 u32 ptr; /* SRAM byte address of log data */
4274 u32 ev, time, data; /* event log data */
4275
4276 if (num_events == 0)
4277 return;
4278
4279 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4280
4281 if (mode == 0)
4282 event_size = 2 * sizeof(u32);
4283 else
4284 event_size = 3 * sizeof(u32);
4285
4286 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4287
4288 /* "time" is actually "data" for mode 0 (no timestamp).
4289 * place event id # at far right for easier visual parsing. */
4290 for (i = 0; i < num_events; i++) {
4291 ev = iwl3945_read_targ_mem(priv, ptr);
4292 ptr += sizeof(u32);
4293 time = iwl3945_read_targ_mem(priv, ptr);
4294 ptr += sizeof(u32);
4295 if (mode == 0)
4296 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4297 else {
4298 data = iwl3945_read_targ_mem(priv, ptr);
4299 ptr += sizeof(u32);
4300 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4301 }
4302 }
4303 }
4304
4305 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4306 {
4307 int rc;
4308 u32 base; /* SRAM byte address of event log header */
4309 u32 capacity; /* event log capacity in # entries */
4310 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4311 u32 num_wraps; /* # times uCode wrapped to top of log */
4312 u32 next_entry; /* index of next entry to be written by uCode */
4313 u32 size; /* # entries that we'll print */
4314
4315 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4316 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4317 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4318 return;
4319 }
4320
4321 rc = iwl3945_grab_nic_access(priv);
4322 if (rc) {
4323 IWL_WARNING("Can not read from adapter at this time.\n");
4324 return;
4325 }
4326
4327 /* event log header */
4328 capacity = iwl3945_read_targ_mem(priv, base);
4329 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4330 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4331 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4332
4333 size = num_wraps ? capacity : next_entry;
4334
4335 /* bail out if nothing in log */
4336 if (size == 0) {
4337 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4338 iwl3945_release_nic_access(priv);
4339 return;
4340 }
4341
4342 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4343 size, num_wraps);
4344
4345 /* if uCode has wrapped back to top of log, start at the oldest entry,
4346 * i.e the next one that uCode would fill. */
4347 if (num_wraps)
4348 iwl3945_print_event_log(priv, next_entry,
4349 capacity - next_entry, mode);
4350
4351 /* (then/else) start at top of log */
4352 iwl3945_print_event_log(priv, 0, next_entry, mode);
4353
4354 iwl3945_release_nic_access(priv);
4355 }
4356
4357 /**
4358 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4359 */
4360 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4361 {
4362 /* Set the FW error flag -- cleared on iwl3945_down */
4363 set_bit(STATUS_FW_ERROR, &priv->status);
4364
4365 /* Cancel currently queued command. */
4366 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4367
4368 #ifdef CONFIG_IWL3945_DEBUG
4369 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4370 iwl3945_dump_nic_error_log(priv);
4371 iwl3945_dump_nic_event_log(priv);
4372 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4373 }
4374 #endif
4375
4376 wake_up_interruptible(&priv->wait_command_queue);
4377
4378 /* Keep the restart process from trying to send host
4379 * commands by clearing the INIT status bit */
4380 clear_bit(STATUS_READY, &priv->status);
4381
4382 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4383 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4384 "Restarting adapter due to uCode error.\n");
4385
4386 if (iwl3945_is_associated(priv)) {
4387 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4388 sizeof(priv->recovery_rxon));
4389 priv->error_recovering = 1;
4390 }
4391 queue_work(priv->workqueue, &priv->restart);
4392 }
4393 }
4394
4395 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4396 {
4397 unsigned long flags;
4398
4399 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4400 sizeof(priv->staging_rxon));
4401 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4402 iwl3945_commit_rxon(priv);
4403
4404 iwl3945_add_station(priv, priv->bssid, 1, 0);
4405
4406 spin_lock_irqsave(&priv->lock, flags);
4407 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4408 priv->error_recovering = 0;
4409 spin_unlock_irqrestore(&priv->lock, flags);
4410 }
4411
4412 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4413 {
4414 u32 inta, handled = 0;
4415 u32 inta_fh;
4416 unsigned long flags;
4417 #ifdef CONFIG_IWL3945_DEBUG
4418 u32 inta_mask;
4419 #endif
4420
4421 spin_lock_irqsave(&priv->lock, flags);
4422
4423 /* Ack/clear/reset pending uCode interrupts.
4424 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4425 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4426 inta = iwl3945_read32(priv, CSR_INT);
4427 iwl3945_write32(priv, CSR_INT, inta);
4428
4429 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4430 * Any new interrupts that happen after this, either while we're
4431 * in this tasklet, or later, will show up in next ISR/tasklet. */
4432 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4433 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4434
4435 #ifdef CONFIG_IWL3945_DEBUG
4436 if (iwl3945_debug_level & IWL_DL_ISR) {
4437 /* just for debug */
4438 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4439 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4440 inta, inta_mask, inta_fh);
4441 }
4442 #endif
4443
4444 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4445 * atomic, make sure that inta covers all the interrupts that
4446 * we've discovered, even if FH interrupt came in just after
4447 * reading CSR_INT. */
4448 if (inta_fh & CSR39_FH_INT_RX_MASK)
4449 inta |= CSR_INT_BIT_FH_RX;
4450 if (inta_fh & CSR39_FH_INT_TX_MASK)
4451 inta |= CSR_INT_BIT_FH_TX;
4452
4453 /* Now service all interrupt bits discovered above. */
4454 if (inta & CSR_INT_BIT_HW_ERR) {
4455 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4456
4457 /* Tell the device to stop sending interrupts */
4458 iwl3945_disable_interrupts(priv);
4459
4460 iwl3945_irq_handle_error(priv);
4461
4462 handled |= CSR_INT_BIT_HW_ERR;
4463
4464 spin_unlock_irqrestore(&priv->lock, flags);
4465
4466 return;
4467 }
4468
4469 #ifdef CONFIG_IWL3945_DEBUG
4470 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4471 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4472 if (inta & CSR_INT_BIT_SCD)
4473 IWL_DEBUG_ISR("Scheduler finished to transmit "
4474 "the frame/frames.\n");
4475
4476 /* Alive notification via Rx interrupt will do the real work */
4477 if (inta & CSR_INT_BIT_ALIVE)
4478 IWL_DEBUG_ISR("Alive interrupt\n");
4479 }
4480 #endif
4481 /* Safely ignore these bits for debug checks below */
4482 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4483
4484 /* HW RF KILL switch toggled (4965 only) */
4485 if (inta & CSR_INT_BIT_RF_KILL) {
4486 int hw_rf_kill = 0;
4487 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4488 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4489 hw_rf_kill = 1;
4490
4491 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4492 "RF_KILL bit toggled to %s.\n",
4493 hw_rf_kill ? "disable radio":"enable radio");
4494
4495 /* Queue restart only if RF_KILL switch was set to "kill"
4496 * when we loaded driver, and is now set to "enable".
4497 * After we're Alive, RF_KILL gets handled by
4498 * iwl3945_rx_card_state_notif() */
4499 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4500 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4501 queue_work(priv->workqueue, &priv->restart);
4502 }
4503
4504 handled |= CSR_INT_BIT_RF_KILL;
4505 }
4506
4507 /* Chip got too hot and stopped itself (4965 only) */
4508 if (inta & CSR_INT_BIT_CT_KILL) {
4509 IWL_ERROR("Microcode CT kill error detected.\n");
4510 handled |= CSR_INT_BIT_CT_KILL;
4511 }
4512
4513 /* Error detected by uCode */
4514 if (inta & CSR_INT_BIT_SW_ERR) {
4515 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4516 inta);
4517 iwl3945_irq_handle_error(priv);
4518 handled |= CSR_INT_BIT_SW_ERR;
4519 }
4520
4521 /* uCode wakes up after power-down sleep */
4522 if (inta & CSR_INT_BIT_WAKEUP) {
4523 IWL_DEBUG_ISR("Wakeup interrupt\n");
4524 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4525 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4526 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4527 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4528 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4529 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4530 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4531
4532 handled |= CSR_INT_BIT_WAKEUP;
4533 }
4534
4535 /* All uCode command responses, including Tx command responses,
4536 * Rx "responses" (frame-received notification), and other
4537 * notifications from uCode come through here*/
4538 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4539 iwl3945_rx_handle(priv);
4540 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4541 }
4542
4543 if (inta & CSR_INT_BIT_FH_TX) {
4544 IWL_DEBUG_ISR("Tx interrupt\n");
4545
4546 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4547 if (!iwl3945_grab_nic_access(priv)) {
4548 iwl3945_write_direct32(priv,
4549 FH_TCSR_CREDIT
4550 (ALM_FH_SRVC_CHNL), 0x0);
4551 iwl3945_release_nic_access(priv);
4552 }
4553 handled |= CSR_INT_BIT_FH_TX;
4554 }
4555
4556 if (inta & ~handled)
4557 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4558
4559 if (inta & ~CSR_INI_SET_MASK) {
4560 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4561 inta & ~CSR_INI_SET_MASK);
4562 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4563 }
4564
4565 /* Re-enable all interrupts */
4566 /* only Re-enable if disabled by irq */
4567 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4568 iwl3945_enable_interrupts(priv);
4569
4570 #ifdef CONFIG_IWL3945_DEBUG
4571 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4572 inta = iwl3945_read32(priv, CSR_INT);
4573 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4574 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4575 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4576 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4577 }
4578 #endif
4579 spin_unlock_irqrestore(&priv->lock, flags);
4580 }
4581
4582 static irqreturn_t iwl3945_isr(int irq, void *data)
4583 {
4584 struct iwl3945_priv *priv = data;
4585 u32 inta, inta_mask;
4586 u32 inta_fh;
4587 if (!priv)
4588 return IRQ_NONE;
4589
4590 spin_lock(&priv->lock);
4591
4592 /* Disable (but don't clear!) interrupts here to avoid
4593 * back-to-back ISRs and sporadic interrupts from our NIC.
4594 * If we have something to service, the tasklet will re-enable ints.
4595 * If we *don't* have something, we'll re-enable before leaving here. */
4596 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4597 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4598
4599 /* Discover which interrupts are active/pending */
4600 inta = iwl3945_read32(priv, CSR_INT);
4601 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4602
4603 /* Ignore interrupt if there's nothing in NIC to service.
4604 * This may be due to IRQ shared with another device,
4605 * or due to sporadic interrupts thrown from our NIC. */
4606 if (!inta && !inta_fh) {
4607 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4608 goto none;
4609 }
4610
4611 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4612 /* Hardware disappeared */
4613 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4614 goto unplugged;
4615 }
4616
4617 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4618 inta, inta_mask, inta_fh);
4619
4620 inta &= ~CSR_INT_BIT_SCD;
4621
4622 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4623 if (likely(inta || inta_fh))
4624 tasklet_schedule(&priv->irq_tasklet);
4625 unplugged:
4626 spin_unlock(&priv->lock);
4627
4628 return IRQ_HANDLED;
4629
4630 none:
4631 /* re-enable interrupts here since we don't have anything to service. */
4632 /* only Re-enable if disabled by irq */
4633 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4634 iwl3945_enable_interrupts(priv);
4635 spin_unlock(&priv->lock);
4636 return IRQ_NONE;
4637 }
4638
4639 /************************** EEPROM BANDS ****************************
4640 *
4641 * The iwl3945_eeprom_band definitions below provide the mapping from the
4642 * EEPROM contents to the specific channel number supported for each
4643 * band.
4644 *
4645 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4646 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4647 * The specific geography and calibration information for that channel
4648 * is contained in the eeprom map itself.
4649 *
4650 * During init, we copy the eeprom information and channel map
4651 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4652 *
4653 * channel_map_24/52 provides the index in the channel_info array for a
4654 * given channel. We have to have two separate maps as there is channel
4655 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4656 * band_2
4657 *
4658 * A value of 0xff stored in the channel_map indicates that the channel
4659 * is not supported by the hardware at all.
4660 *
4661 * A value of 0xfe in the channel_map indicates that the channel is not
4662 * valid for Tx with the current hardware. This means that
4663 * while the system can tune and receive on a given channel, it may not
4664 * be able to associate or transmit any frames on that
4665 * channel. There is no corresponding channel information for that
4666 * entry.
4667 *
4668 *********************************************************************/
4669
4670 /* 2.4 GHz */
4671 static const u8 iwl3945_eeprom_band_1[14] = {
4672 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4673 };
4674
4675 /* 5.2 GHz bands */
4676 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4677 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4678 };
4679
4680 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4681 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4682 };
4683
4684 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4685 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4686 };
4687
4688 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4689 145, 149, 153, 157, 161, 165
4690 };
4691
4692 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4693 int *eeprom_ch_count,
4694 const struct iwl3945_eeprom_channel
4695 **eeprom_ch_info,
4696 const u8 **eeprom_ch_index)
4697 {
4698 switch (band) {
4699 case 1: /* 2.4GHz band */
4700 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4701 *eeprom_ch_info = priv->eeprom.band_1_channels;
4702 *eeprom_ch_index = iwl3945_eeprom_band_1;
4703 break;
4704 case 2: /* 4.9GHz band */
4705 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4706 *eeprom_ch_info = priv->eeprom.band_2_channels;
4707 *eeprom_ch_index = iwl3945_eeprom_band_2;
4708 break;
4709 case 3: /* 5.2GHz band */
4710 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4711 *eeprom_ch_info = priv->eeprom.band_3_channels;
4712 *eeprom_ch_index = iwl3945_eeprom_band_3;
4713 break;
4714 case 4: /* 5.5GHz band */
4715 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4716 *eeprom_ch_info = priv->eeprom.band_4_channels;
4717 *eeprom_ch_index = iwl3945_eeprom_band_4;
4718 break;
4719 case 5: /* 5.7GHz band */
4720 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4721 *eeprom_ch_info = priv->eeprom.band_5_channels;
4722 *eeprom_ch_index = iwl3945_eeprom_band_5;
4723 break;
4724 default:
4725 BUG();
4726 return;
4727 }
4728 }
4729
4730 /**
4731 * iwl3945_get_channel_info - Find driver's private channel info
4732 *
4733 * Based on band and channel number.
4734 */
4735 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4736 enum ieee80211_band band, u16 channel)
4737 {
4738 int i;
4739
4740 switch (band) {
4741 case IEEE80211_BAND_5GHZ:
4742 for (i = 14; i < priv->channel_count; i++) {
4743 if (priv->channel_info[i].channel == channel)
4744 return &priv->channel_info[i];
4745 }
4746 break;
4747
4748 case IEEE80211_BAND_2GHZ:
4749 if (channel >= 1 && channel <= 14)
4750 return &priv->channel_info[channel - 1];
4751 break;
4752 case IEEE80211_NUM_BANDS:
4753 WARN_ON(1);
4754 }
4755
4756 return NULL;
4757 }
4758
4759 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4760 ? # x " " : "")
4761
4762 /**
4763 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4764 */
4765 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4766 {
4767 int eeprom_ch_count = 0;
4768 const u8 *eeprom_ch_index = NULL;
4769 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
4770 int band, ch;
4771 struct iwl3945_channel_info *ch_info;
4772
4773 if (priv->channel_count) {
4774 IWL_DEBUG_INFO("Channel map already initialized.\n");
4775 return 0;
4776 }
4777
4778 if (priv->eeprom.version < 0x2f) {
4779 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4780 priv->eeprom.version);
4781 return -EINVAL;
4782 }
4783
4784 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4785
4786 priv->channel_count =
4787 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4788 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4789 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4790 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4791 ARRAY_SIZE(iwl3945_eeprom_band_5);
4792
4793 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4794
4795 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
4796 priv->channel_count, GFP_KERNEL);
4797 if (!priv->channel_info) {
4798 IWL_ERROR("Could not allocate channel_info\n");
4799 priv->channel_count = 0;
4800 return -ENOMEM;
4801 }
4802
4803 ch_info = priv->channel_info;
4804
4805 /* Loop through the 5 EEPROM bands adding them in order to the
4806 * channel map we maintain (that contains additional information than
4807 * what just in the EEPROM) */
4808 for (band = 1; band <= 5; band++) {
4809
4810 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4811 &eeprom_ch_info, &eeprom_ch_index);
4812
4813 /* Loop through each band adding each of the channels */
4814 for (ch = 0; ch < eeprom_ch_count; ch++) {
4815 ch_info->channel = eeprom_ch_index[ch];
4816 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4817 IEEE80211_BAND_5GHZ;
4818
4819 /* permanently store EEPROM's channel regulatory flags
4820 * and max power in channel info database. */
4821 ch_info->eeprom = eeprom_ch_info[ch];
4822
4823 /* Copy the run-time flags so they are there even on
4824 * invalid channels */
4825 ch_info->flags = eeprom_ch_info[ch].flags;
4826
4827 if (!(is_channel_valid(ch_info))) {
4828 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4829 "No traffic\n",
4830 ch_info->channel,
4831 ch_info->flags,
4832 is_channel_a_band(ch_info) ?
4833 "5.2" : "2.4");
4834 ch_info++;
4835 continue;
4836 }
4837
4838 /* Initialize regulatory-based run-time data */
4839 ch_info->max_power_avg = ch_info->curr_txpow =
4840 eeprom_ch_info[ch].max_power_avg;
4841 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4842 ch_info->min_power = 0;
4843
4844 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
4845 " %ddBm): Ad-Hoc %ssupported\n",
4846 ch_info->channel,
4847 is_channel_a_band(ch_info) ?
4848 "5.2" : "2.4",
4849 CHECK_AND_PRINT(VALID),
4850 CHECK_AND_PRINT(IBSS),
4851 CHECK_AND_PRINT(ACTIVE),
4852 CHECK_AND_PRINT(RADAR),
4853 CHECK_AND_PRINT(WIDE),
4854 CHECK_AND_PRINT(NARROW),
4855 CHECK_AND_PRINT(DFS),
4856 eeprom_ch_info[ch].flags,
4857 eeprom_ch_info[ch].max_power_avg,
4858 ((eeprom_ch_info[ch].
4859 flags & EEPROM_CHANNEL_IBSS)
4860 && !(eeprom_ch_info[ch].
4861 flags & EEPROM_CHANNEL_RADAR))
4862 ? "" : "not ");
4863
4864 /* Set the user_txpower_limit to the highest power
4865 * supported by any channel */
4866 if (eeprom_ch_info[ch].max_power_avg >
4867 priv->user_txpower_limit)
4868 priv->user_txpower_limit =
4869 eeprom_ch_info[ch].max_power_avg;
4870
4871 ch_info++;
4872 }
4873 }
4874
4875 /* Set up txpower settings in driver for all channels */
4876 if (iwl3945_txpower_set_from_eeprom(priv))
4877 return -EIO;
4878
4879 return 0;
4880 }
4881
4882 /*
4883 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4884 */
4885 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4886 {
4887 kfree(priv->channel_info);
4888 priv->channel_count = 0;
4889 }
4890
4891 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4892 * sending probe req. This should be set long enough to hear probe responses
4893 * from more than one AP. */
4894 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4895 #define IWL_ACTIVE_DWELL_TIME_52 (10)
4896
4897 /* For faster active scanning, scan will move to the next channel if fewer than
4898 * PLCP_QUIET_THRESH packets are heard on this channel within
4899 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4900 * time if it's a quiet channel (nothing responded to our probe, and there's
4901 * no other traffic).
4902 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4903 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4904 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4905
4906 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4907 * Must be set longer than active dwell time.
4908 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4909 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4910 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4911 #define IWL_PASSIVE_DWELL_BASE (100)
4912 #define IWL_CHANNEL_TUNE_TIME 5
4913
4914 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4915 enum ieee80211_band band)
4916 {
4917 if (band == IEEE80211_BAND_5GHZ)
4918 return IWL_ACTIVE_DWELL_TIME_52;
4919 else
4920 return IWL_ACTIVE_DWELL_TIME_24;
4921 }
4922
4923 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4924 enum ieee80211_band band)
4925 {
4926 u16 active = iwl3945_get_active_dwell_time(priv, band);
4927 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4928 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4929 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4930
4931 if (iwl3945_is_associated(priv)) {
4932 /* If we're associated, we clamp the maximum passive
4933 * dwell time to be 98% of the beacon interval (minus
4934 * 2 * channel tune time) */
4935 passive = priv->beacon_int;
4936 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4937 passive = IWL_PASSIVE_DWELL_BASE;
4938 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4939 }
4940
4941 if (passive <= active)
4942 passive = active + 1;
4943
4944 return passive;
4945 }
4946
4947 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4948 enum ieee80211_band band,
4949 u8 is_active, u8 direct_mask,
4950 struct iwl3945_scan_channel *scan_ch)
4951 {
4952 const struct ieee80211_channel *channels = NULL;
4953 const struct ieee80211_supported_band *sband;
4954 const struct iwl3945_channel_info *ch_info;
4955 u16 passive_dwell = 0;
4956 u16 active_dwell = 0;
4957 int added, i;
4958
4959 sband = iwl3945_get_band(priv, band);
4960 if (!sband)
4961 return 0;
4962
4963 channels = sband->channels;
4964
4965 active_dwell = iwl3945_get_active_dwell_time(priv, band);
4966 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4967
4968 for (i = 0, added = 0; i < sband->n_channels; i++) {
4969 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4970 continue;
4971
4972 scan_ch->channel = channels[i].hw_value;
4973
4974 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4975 if (!is_channel_valid(ch_info)) {
4976 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4977 scan_ch->channel);
4978 continue;
4979 }
4980
4981 if (!is_active || is_channel_passive(ch_info) ||
4982 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
4983 scan_ch->type = 0; /* passive */
4984 else
4985 scan_ch->type = 1; /* active */
4986
4987 if (scan_ch->type & 1)
4988 scan_ch->type |= (direct_mask << 1);
4989
4990 if (is_channel_narrow(ch_info))
4991 scan_ch->type |= (1 << 7);
4992
4993 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4994 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4995
4996 /* Set txpower levels to defaults */
4997 scan_ch->tpc.dsp_atten = 110;
4998 /* scan_pwr_info->tpc.dsp_atten; */
4999
5000 /*scan_pwr_info->tpc.tx_gain; */
5001 if (band == IEEE80211_BAND_5GHZ)
5002 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5003 else {
5004 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5005 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5006 * power level:
5007 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5008 */
5009 }
5010
5011 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5012 scan_ch->channel,
5013 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5014 (scan_ch->type & 1) ?
5015 active_dwell : passive_dwell);
5016
5017 scan_ch++;
5018 added++;
5019 }
5020
5021 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5022 return added;
5023 }
5024
5025 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
5026 struct ieee80211_rate *rates)
5027 {
5028 int i;
5029
5030 for (i = 0; i < IWL_RATE_COUNT; i++) {
5031 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5032 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5033 rates[i].hw_value_short = i;
5034 rates[i].flags = 0;
5035 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
5036 /*
5037 * If CCK != 1M then set short preamble rate flag.
5038 */
5039 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
5040 0 : IEEE80211_RATE_SHORT_PREAMBLE;
5041 }
5042 }
5043 }
5044
5045 /**
5046 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
5047 */
5048 static int iwl3945_init_geos(struct iwl3945_priv *priv)
5049 {
5050 struct iwl3945_channel_info *ch;
5051 struct ieee80211_supported_band *sband;
5052 struct ieee80211_channel *channels;
5053 struct ieee80211_channel *geo_ch;
5054 struct ieee80211_rate *rates;
5055 int i = 0;
5056
5057 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5058 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
5059 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5060 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5061 return 0;
5062 }
5063
5064 channels = kzalloc(sizeof(struct ieee80211_channel) *
5065 priv->channel_count, GFP_KERNEL);
5066 if (!channels)
5067 return -ENOMEM;
5068
5069 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
5070 GFP_KERNEL);
5071 if (!rates) {
5072 kfree(channels);
5073 return -ENOMEM;
5074 }
5075
5076 /* 5.2GHz channels start after the 2.4GHz channels */
5077 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5078 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5079 /* just OFDM */
5080 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5081 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
5082
5083 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5084 sband->channels = channels;
5085 /* OFDM & CCK */
5086 sband->bitrates = rates;
5087 sband->n_bitrates = IWL_RATE_COUNT;
5088
5089 priv->ieee_channels = channels;
5090 priv->ieee_rates = rates;
5091
5092 iwl3945_init_hw_rates(priv, rates);
5093
5094 for (i = 0; i < priv->channel_count; i++) {
5095 ch = &priv->channel_info[i];
5096
5097 /* FIXME: might be removed if scan is OK*/
5098 if (!is_channel_valid(ch))
5099 continue;
5100
5101 if (is_channel_a_band(ch))
5102 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5103 else
5104 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5105
5106 geo_ch = &sband->channels[sband->n_channels++];
5107
5108 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
5109 geo_ch->max_power = ch->max_power_avg;
5110 geo_ch->max_antenna_gain = 0xff;
5111 geo_ch->hw_value = ch->channel;
5112
5113 if (is_channel_valid(ch)) {
5114 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5115 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
5116
5117 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5118 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
5119
5120 if (ch->flags & EEPROM_CHANNEL_RADAR)
5121 geo_ch->flags |= IEEE80211_CHAN_RADAR;
5122
5123 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5124 priv->max_channel_txpower_limit =
5125 ch->max_power_avg;
5126 } else {
5127 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
5128 }
5129
5130 /* Save flags for reg domain usage */
5131 geo_ch->orig_flags = geo_ch->flags;
5132
5133 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5134 ch->channel, geo_ch->center_freq,
5135 is_channel_a_band(ch) ? "5.2" : "2.4",
5136 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5137 "restricted" : "valid",
5138 geo_ch->flags);
5139 }
5140
5141 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5142 priv->cfg->sku & IWL_SKU_A) {
5143 printk(KERN_INFO DRV_NAME
5144 ": Incorrectly detected BG card as ABG. Please send "
5145 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5146 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5147 priv->cfg->sku &= ~IWL_SKU_A;
5148 }
5149
5150 printk(KERN_INFO DRV_NAME
5151 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5152 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5153 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5154
5155 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5156 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5157 &priv->bands[IEEE80211_BAND_2GHZ];
5158 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5159 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5160 &priv->bands[IEEE80211_BAND_5GHZ];
5161
5162 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5163
5164 return 0;
5165 }
5166
5167 /*
5168 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5169 */
5170 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5171 {
5172 kfree(priv->ieee_channels);
5173 kfree(priv->ieee_rates);
5174 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5175 }
5176
5177 /******************************************************************************
5178 *
5179 * uCode download functions
5180 *
5181 ******************************************************************************/
5182
5183 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5184 {
5185 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5186 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5187 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5188 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5189 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5190 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5191 }
5192
5193 /**
5194 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5195 * looking at all data.
5196 */
5197 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5198 {
5199 u32 val;
5200 u32 save_len = len;
5201 int rc = 0;
5202 u32 errcnt;
5203
5204 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5205
5206 rc = iwl3945_grab_nic_access(priv);
5207 if (rc)
5208 return rc;
5209
5210 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5211
5212 errcnt = 0;
5213 for (; len > 0; len -= sizeof(u32), image++) {
5214 /* read data comes through single port, auto-incr addr */
5215 /* NOTE: Use the debugless read so we don't flood kernel log
5216 * if IWL_DL_IO is set */
5217 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5218 if (val != le32_to_cpu(*image)) {
5219 IWL_ERROR("uCode INST section is invalid at "
5220 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5221 save_len - len, val, le32_to_cpu(*image));
5222 rc = -EIO;
5223 errcnt++;
5224 if (errcnt >= 20)
5225 break;
5226 }
5227 }
5228
5229 iwl3945_release_nic_access(priv);
5230
5231 if (!errcnt)
5232 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5233
5234 return rc;
5235 }
5236
5237
5238 /**
5239 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5240 * using sample data 100 bytes apart. If these sample points are good,
5241 * it's a pretty good bet that everything between them is good, too.
5242 */
5243 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5244 {
5245 u32 val;
5246 int rc = 0;
5247 u32 errcnt = 0;
5248 u32 i;
5249
5250 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5251
5252 rc = iwl3945_grab_nic_access(priv);
5253 if (rc)
5254 return rc;
5255
5256 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5257 /* read data comes through single port, auto-incr addr */
5258 /* NOTE: Use the debugless read so we don't flood kernel log
5259 * if IWL_DL_IO is set */
5260 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5261 i + RTC_INST_LOWER_BOUND);
5262 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5263 if (val != le32_to_cpu(*image)) {
5264 #if 0 /* Enable this if you want to see details */
5265 IWL_ERROR("uCode INST section is invalid at "
5266 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5267 i, val, *image);
5268 #endif
5269 rc = -EIO;
5270 errcnt++;
5271 if (errcnt >= 3)
5272 break;
5273 }
5274 }
5275
5276 iwl3945_release_nic_access(priv);
5277
5278 return rc;
5279 }
5280
5281
5282 /**
5283 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5284 * and verify its contents
5285 */
5286 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5287 {
5288 __le32 *image;
5289 u32 len;
5290 int rc = 0;
5291
5292 /* Try bootstrap */
5293 image = (__le32 *)priv->ucode_boot.v_addr;
5294 len = priv->ucode_boot.len;
5295 rc = iwl3945_verify_inst_sparse(priv, image, len);
5296 if (rc == 0) {
5297 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5298 return 0;
5299 }
5300
5301 /* Try initialize */
5302 image = (__le32 *)priv->ucode_init.v_addr;
5303 len = priv->ucode_init.len;
5304 rc = iwl3945_verify_inst_sparse(priv, image, len);
5305 if (rc == 0) {
5306 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5307 return 0;
5308 }
5309
5310 /* Try runtime/protocol */
5311 image = (__le32 *)priv->ucode_code.v_addr;
5312 len = priv->ucode_code.len;
5313 rc = iwl3945_verify_inst_sparse(priv, image, len);
5314 if (rc == 0) {
5315 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5316 return 0;
5317 }
5318
5319 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5320
5321 /* Since nothing seems to match, show first several data entries in
5322 * instruction SRAM, so maybe visual inspection will give a clue.
5323 * Selection of bootstrap image (vs. other images) is arbitrary. */
5324 image = (__le32 *)priv->ucode_boot.v_addr;
5325 len = priv->ucode_boot.len;
5326 rc = iwl3945_verify_inst_full(priv, image, len);
5327
5328 return rc;
5329 }
5330
5331
5332 /* check contents of special bootstrap uCode SRAM */
5333 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5334 {
5335 __le32 *image = priv->ucode_boot.v_addr;
5336 u32 len = priv->ucode_boot.len;
5337 u32 reg;
5338 u32 val;
5339
5340 IWL_DEBUG_INFO("Begin verify bsm\n");
5341
5342 /* verify BSM SRAM contents */
5343 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5344 for (reg = BSM_SRAM_LOWER_BOUND;
5345 reg < BSM_SRAM_LOWER_BOUND + len;
5346 reg += sizeof(u32), image ++) {
5347 val = iwl3945_read_prph(priv, reg);
5348 if (val != le32_to_cpu(*image)) {
5349 IWL_ERROR("BSM uCode verification failed at "
5350 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5351 BSM_SRAM_LOWER_BOUND,
5352 reg - BSM_SRAM_LOWER_BOUND, len,
5353 val, le32_to_cpu(*image));
5354 return -EIO;
5355 }
5356 }
5357
5358 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5359
5360 return 0;
5361 }
5362
5363 /**
5364 * iwl3945_load_bsm - Load bootstrap instructions
5365 *
5366 * BSM operation:
5367 *
5368 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5369 * in special SRAM that does not power down during RFKILL. When powering back
5370 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5371 * the bootstrap program into the on-board processor, and starts it.
5372 *
5373 * The bootstrap program loads (via DMA) instructions and data for a new
5374 * program from host DRAM locations indicated by the host driver in the
5375 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5376 * automatically.
5377 *
5378 * When initializing the NIC, the host driver points the BSM to the
5379 * "initialize" uCode image. This uCode sets up some internal data, then
5380 * notifies host via "initialize alive" that it is complete.
5381 *
5382 * The host then replaces the BSM_DRAM_* pointer values to point to the
5383 * normal runtime uCode instructions and a backup uCode data cache buffer
5384 * (filled initially with starting data values for the on-board processor),
5385 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5386 * which begins normal operation.
5387 *
5388 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5389 * the backup data cache in DRAM before SRAM is powered down.
5390 *
5391 * When powering back up, the BSM loads the bootstrap program. This reloads
5392 * the runtime uCode instructions and the backup data cache into SRAM,
5393 * and re-launches the runtime uCode from where it left off.
5394 */
5395 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5396 {
5397 __le32 *image = priv->ucode_boot.v_addr;
5398 u32 len = priv->ucode_boot.len;
5399 dma_addr_t pinst;
5400 dma_addr_t pdata;
5401 u32 inst_len;
5402 u32 data_len;
5403 int rc;
5404 int i;
5405 u32 done;
5406 u32 reg_offset;
5407
5408 IWL_DEBUG_INFO("Begin load bsm\n");
5409
5410 /* make sure bootstrap program is no larger than BSM's SRAM size */
5411 if (len > IWL_MAX_BSM_SIZE)
5412 return -EINVAL;
5413
5414 /* Tell bootstrap uCode where to find the "Initialize" uCode
5415 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5416 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5417 * after the "initialize" uCode has run, to point to
5418 * runtime/protocol instructions and backup data cache. */
5419 pinst = priv->ucode_init.p_addr;
5420 pdata = priv->ucode_init_data.p_addr;
5421 inst_len = priv->ucode_init.len;
5422 data_len = priv->ucode_init_data.len;
5423
5424 rc = iwl3945_grab_nic_access(priv);
5425 if (rc)
5426 return rc;
5427
5428 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5429 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5430 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5431 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5432
5433 /* Fill BSM memory with bootstrap instructions */
5434 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5435 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5436 reg_offset += sizeof(u32), image++)
5437 _iwl3945_write_prph(priv, reg_offset,
5438 le32_to_cpu(*image));
5439
5440 rc = iwl3945_verify_bsm(priv);
5441 if (rc) {
5442 iwl3945_release_nic_access(priv);
5443 return rc;
5444 }
5445
5446 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5447 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5448 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5449 RTC_INST_LOWER_BOUND);
5450 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5451
5452 /* Load bootstrap code into instruction SRAM now,
5453 * to prepare to load "initialize" uCode */
5454 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5455 BSM_WR_CTRL_REG_BIT_START);
5456
5457 /* Wait for load of bootstrap uCode to finish */
5458 for (i = 0; i < 100; i++) {
5459 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5460 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5461 break;
5462 udelay(10);
5463 }
5464 if (i < 100)
5465 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5466 else {
5467 IWL_ERROR("BSM write did not complete!\n");
5468 return -EIO;
5469 }
5470
5471 /* Enable future boot loads whenever power management unit triggers it
5472 * (e.g. when powering back up after power-save shutdown) */
5473 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5474 BSM_WR_CTRL_REG_BIT_START_EN);
5475
5476 iwl3945_release_nic_access(priv);
5477
5478 return 0;
5479 }
5480
5481 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5482 {
5483 /* Remove all resets to allow NIC to operate */
5484 iwl3945_write32(priv, CSR_RESET, 0);
5485 }
5486
5487 /**
5488 * iwl3945_read_ucode - Read uCode images from disk file.
5489 *
5490 * Copy into buffers for card to fetch via bus-mastering
5491 */
5492 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5493 {
5494 struct iwl3945_ucode *ucode;
5495 int ret = 0;
5496 const struct firmware *ucode_raw;
5497 /* firmware file name contains uCode/driver compatibility version */
5498 const char *name = priv->cfg->fw_name;
5499 u8 *src;
5500 size_t len;
5501 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5502
5503 /* Ask kernel firmware_class module to get the boot firmware off disk.
5504 * request_firmware() is synchronous, file is in memory on return. */
5505 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5506 if (ret < 0) {
5507 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5508 name, ret);
5509 goto error;
5510 }
5511
5512 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5513 name, ucode_raw->size);
5514
5515 /* Make sure that we got at least our header! */
5516 if (ucode_raw->size < sizeof(*ucode)) {
5517 IWL_ERROR("File size way too small!\n");
5518 ret = -EINVAL;
5519 goto err_release;
5520 }
5521
5522 /* Data from ucode file: header followed by uCode images */
5523 ucode = (void *)ucode_raw->data;
5524
5525 ver = le32_to_cpu(ucode->ver);
5526 inst_size = le32_to_cpu(ucode->inst_size);
5527 data_size = le32_to_cpu(ucode->data_size);
5528 init_size = le32_to_cpu(ucode->init_size);
5529 init_data_size = le32_to_cpu(ucode->init_data_size);
5530 boot_size = le32_to_cpu(ucode->boot_size);
5531
5532 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5533 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5534 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5535 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5536 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5537 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5538
5539 /* Verify size of file vs. image size info in file's header */
5540 if (ucode_raw->size < sizeof(*ucode) +
5541 inst_size + data_size + init_size +
5542 init_data_size + boot_size) {
5543
5544 IWL_DEBUG_INFO("uCode file size %d too small\n",
5545 (int)ucode_raw->size);
5546 ret = -EINVAL;
5547 goto err_release;
5548 }
5549
5550 /* Verify that uCode images will fit in card's SRAM */
5551 if (inst_size > IWL_MAX_INST_SIZE) {
5552 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5553 inst_size);
5554 ret = -EINVAL;
5555 goto err_release;
5556 }
5557
5558 if (data_size > IWL_MAX_DATA_SIZE) {
5559 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5560 data_size);
5561 ret = -EINVAL;
5562 goto err_release;
5563 }
5564 if (init_size > IWL_MAX_INST_SIZE) {
5565 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5566 init_size);
5567 ret = -EINVAL;
5568 goto err_release;
5569 }
5570 if (init_data_size > IWL_MAX_DATA_SIZE) {
5571 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5572 init_data_size);
5573 ret = -EINVAL;
5574 goto err_release;
5575 }
5576 if (boot_size > IWL_MAX_BSM_SIZE) {
5577 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5578 boot_size);
5579 ret = -EINVAL;
5580 goto err_release;
5581 }
5582
5583 /* Allocate ucode buffers for card's bus-master loading ... */
5584
5585 /* Runtime instructions and 2 copies of data:
5586 * 1) unmodified from disk
5587 * 2) backup cache for save/restore during power-downs */
5588 priv->ucode_code.len = inst_size;
5589 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5590
5591 priv->ucode_data.len = data_size;
5592 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5593
5594 priv->ucode_data_backup.len = data_size;
5595 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5596
5597 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5598 !priv->ucode_data_backup.v_addr)
5599 goto err_pci_alloc;
5600
5601 /* Initialization instructions and data */
5602 if (init_size && init_data_size) {
5603 priv->ucode_init.len = init_size;
5604 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5605
5606 priv->ucode_init_data.len = init_data_size;
5607 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5608
5609 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5610 goto err_pci_alloc;
5611 }
5612
5613 /* Bootstrap (instructions only, no data) */
5614 if (boot_size) {
5615 priv->ucode_boot.len = boot_size;
5616 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5617
5618 if (!priv->ucode_boot.v_addr)
5619 goto err_pci_alloc;
5620 }
5621
5622 /* Copy images into buffers for card's bus-master reads ... */
5623
5624 /* Runtime instructions (first block of data in file) */
5625 src = &ucode->data[0];
5626 len = priv->ucode_code.len;
5627 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5628 memcpy(priv->ucode_code.v_addr, src, len);
5629 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5630 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5631
5632 /* Runtime data (2nd block)
5633 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5634 src = &ucode->data[inst_size];
5635 len = priv->ucode_data.len;
5636 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5637 memcpy(priv->ucode_data.v_addr, src, len);
5638 memcpy(priv->ucode_data_backup.v_addr, src, len);
5639
5640 /* Initialization instructions (3rd block) */
5641 if (init_size) {
5642 src = &ucode->data[inst_size + data_size];
5643 len = priv->ucode_init.len;
5644 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5645 len);
5646 memcpy(priv->ucode_init.v_addr, src, len);
5647 }
5648
5649 /* Initialization data (4th block) */
5650 if (init_data_size) {
5651 src = &ucode->data[inst_size + data_size + init_size];
5652 len = priv->ucode_init_data.len;
5653 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5654 (int)len);
5655 memcpy(priv->ucode_init_data.v_addr, src, len);
5656 }
5657
5658 /* Bootstrap instructions (5th block) */
5659 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5660 len = priv->ucode_boot.len;
5661 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5662 (int)len);
5663 memcpy(priv->ucode_boot.v_addr, src, len);
5664
5665 /* We have our copies now, allow OS release its copies */
5666 release_firmware(ucode_raw);
5667 return 0;
5668
5669 err_pci_alloc:
5670 IWL_ERROR("failed to allocate pci memory\n");
5671 ret = -ENOMEM;
5672 iwl3945_dealloc_ucode_pci(priv);
5673
5674 err_release:
5675 release_firmware(ucode_raw);
5676
5677 error:
5678 return ret;
5679 }
5680
5681
5682 /**
5683 * iwl3945_set_ucode_ptrs - Set uCode address location
5684 *
5685 * Tell initialization uCode where to find runtime uCode.
5686 *
5687 * BSM registers initially contain pointers to initialization uCode.
5688 * We need to replace them to load runtime uCode inst and data,
5689 * and to save runtime data when powering down.
5690 */
5691 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5692 {
5693 dma_addr_t pinst;
5694 dma_addr_t pdata;
5695 int rc = 0;
5696 unsigned long flags;
5697
5698 /* bits 31:0 for 3945 */
5699 pinst = priv->ucode_code.p_addr;
5700 pdata = priv->ucode_data_backup.p_addr;
5701
5702 spin_lock_irqsave(&priv->lock, flags);
5703 rc = iwl3945_grab_nic_access(priv);
5704 if (rc) {
5705 spin_unlock_irqrestore(&priv->lock, flags);
5706 return rc;
5707 }
5708
5709 /* Tell bootstrap uCode where to find image to load */
5710 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5711 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5712 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5713 priv->ucode_data.len);
5714
5715 /* Inst bytecount must be last to set up, bit 31 signals uCode
5716 * that all new ptr/size info is in place */
5717 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5718 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5719
5720 iwl3945_release_nic_access(priv);
5721
5722 spin_unlock_irqrestore(&priv->lock, flags);
5723
5724 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5725
5726 return rc;
5727 }
5728
5729 /**
5730 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5731 *
5732 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5733 *
5734 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5735 */
5736 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
5737 {
5738 /* Check alive response for "valid" sign from uCode */
5739 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5740 /* We had an error bringing up the hardware, so take it
5741 * all the way back down so we can try again */
5742 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5743 goto restart;
5744 }
5745
5746 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5747 * This is a paranoid check, because we would not have gotten the
5748 * "initialize" alive if code weren't properly loaded. */
5749 if (iwl3945_verify_ucode(priv)) {
5750 /* Runtime instruction load was bad;
5751 * take it all the way back down so we can try again */
5752 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5753 goto restart;
5754 }
5755
5756 /* Send pointers to protocol/runtime uCode image ... init code will
5757 * load and launch runtime uCode, which will send us another "Alive"
5758 * notification. */
5759 IWL_DEBUG_INFO("Initialization Alive received.\n");
5760 if (iwl3945_set_ucode_ptrs(priv)) {
5761 /* Runtime instruction load won't happen;
5762 * take it all the way back down so we can try again */
5763 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5764 goto restart;
5765 }
5766 return;
5767
5768 restart:
5769 queue_work(priv->workqueue, &priv->restart);
5770 }
5771
5772
5773 /**
5774 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5775 * from protocol/runtime uCode (initialization uCode's
5776 * Alive gets handled by iwl3945_init_alive_start()).
5777 */
5778 static void iwl3945_alive_start(struct iwl3945_priv *priv)
5779 {
5780 int rc = 0;
5781 int thermal_spin = 0;
5782 u32 rfkill;
5783
5784 IWL_DEBUG_INFO("Runtime Alive received.\n");
5785
5786 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5787 /* We had an error bringing up the hardware, so take it
5788 * all the way back down so we can try again */
5789 IWL_DEBUG_INFO("Alive failed.\n");
5790 goto restart;
5791 }
5792
5793 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5794 * This is a paranoid check, because we would not have gotten the
5795 * "runtime" alive if code weren't properly loaded. */
5796 if (iwl3945_verify_ucode(priv)) {
5797 /* Runtime instruction load was bad;
5798 * take it all the way back down so we can try again */
5799 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5800 goto restart;
5801 }
5802
5803 iwl3945_clear_stations_table(priv);
5804
5805 rc = iwl3945_grab_nic_access(priv);
5806 if (rc) {
5807 IWL_WARNING("Can not read rfkill status from adapter\n");
5808 return;
5809 }
5810
5811 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
5812 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5813 iwl3945_release_nic_access(priv);
5814
5815 if (rfkill & 0x1) {
5816 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5817 /* if rfkill is not on, then wait for thermal
5818 * sensor in adapter to kick in */
5819 while (iwl3945_hw_get_temperature(priv) == 0) {
5820 thermal_spin++;
5821 udelay(10);
5822 }
5823
5824 if (thermal_spin)
5825 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5826 thermal_spin * 10);
5827 } else
5828 set_bit(STATUS_RF_KILL_HW, &priv->status);
5829
5830 /* After the ALIVE response, we can send commands to 3945 uCode */
5831 set_bit(STATUS_ALIVE, &priv->status);
5832
5833 /* Clear out the uCode error bit if it is set */
5834 clear_bit(STATUS_FW_ERROR, &priv->status);
5835
5836 if (iwl3945_is_rfkill(priv))
5837 return;
5838
5839 ieee80211_start_queues(priv->hw);
5840
5841 priv->active_rate = priv->rates_mask;
5842 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5843
5844 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5845
5846 if (iwl3945_is_associated(priv)) {
5847 struct iwl3945_rxon_cmd *active_rxon =
5848 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
5849
5850 memcpy(&priv->staging_rxon, &priv->active_rxon,
5851 sizeof(priv->staging_rxon));
5852 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5853 } else {
5854 /* Initialize our rx_config data */
5855 iwl3945_connection_init_rx_config(priv);
5856 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5857 }
5858
5859 /* Configure Bluetooth device coexistence support */
5860 iwl3945_send_bt_config(priv);
5861
5862 /* Configure the adapter for unassociated operation */
5863 iwl3945_commit_rxon(priv);
5864
5865 /* At this point, the NIC is initialized and operational */
5866 priv->notif_missed_beacons = 0;
5867
5868 iwl3945_reg_txpower_periodic(priv);
5869
5870 iwl3945_led_register(priv);
5871
5872 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5873 set_bit(STATUS_READY, &priv->status);
5874 wake_up_interruptible(&priv->wait_command_queue);
5875
5876 if (priv->error_recovering)
5877 iwl3945_error_recovery(priv);
5878
5879 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
5880 return;
5881
5882 restart:
5883 queue_work(priv->workqueue, &priv->restart);
5884 }
5885
5886 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
5887
5888 static void __iwl3945_down(struct iwl3945_priv *priv)
5889 {
5890 unsigned long flags;
5891 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5892 struct ieee80211_conf *conf = NULL;
5893
5894 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5895
5896 conf = ieee80211_get_hw_conf(priv->hw);
5897
5898 if (!exit_pending)
5899 set_bit(STATUS_EXIT_PENDING, &priv->status);
5900
5901 iwl3945_led_unregister(priv);
5902 iwl3945_clear_stations_table(priv);
5903
5904 /* Unblock any waiting calls */
5905 wake_up_interruptible_all(&priv->wait_command_queue);
5906
5907 /* Wipe out the EXIT_PENDING status bit if we are not actually
5908 * exiting the module */
5909 if (!exit_pending)
5910 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5911
5912 /* stop and reset the on-board processor */
5913 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5914
5915 /* tell the device to stop sending interrupts */
5916 spin_lock_irqsave(&priv->lock, flags);
5917 iwl3945_disable_interrupts(priv);
5918 spin_unlock_irqrestore(&priv->lock, flags);
5919 iwl_synchronize_irq(priv);
5920
5921 if (priv->mac80211_registered)
5922 ieee80211_stop_queues(priv->hw);
5923
5924 /* If we have not previously called iwl3945_init() then
5925 * clear all bits but the RF Kill and SUSPEND bits and return */
5926 if (!iwl3945_is_init(priv)) {
5927 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5928 STATUS_RF_KILL_HW |
5929 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5930 STATUS_RF_KILL_SW |
5931 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5932 STATUS_GEO_CONFIGURED |
5933 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5934 STATUS_IN_SUSPEND;
5935 goto exit;
5936 }
5937
5938 /* ...otherwise clear out all the status bits but the RF Kill and
5939 * SUSPEND bits and continue taking the NIC down. */
5940 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5941 STATUS_RF_KILL_HW |
5942 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5943 STATUS_RF_KILL_SW |
5944 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5945 STATUS_GEO_CONFIGURED |
5946 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5947 STATUS_IN_SUSPEND |
5948 test_bit(STATUS_FW_ERROR, &priv->status) <<
5949 STATUS_FW_ERROR;
5950
5951 spin_lock_irqsave(&priv->lock, flags);
5952 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5953 spin_unlock_irqrestore(&priv->lock, flags);
5954
5955 iwl3945_hw_txq_ctx_stop(priv);
5956 iwl3945_hw_rxq_stop(priv);
5957
5958 spin_lock_irqsave(&priv->lock, flags);
5959 if (!iwl3945_grab_nic_access(priv)) {
5960 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
5961 APMG_CLK_VAL_DMA_CLK_RQT);
5962 iwl3945_release_nic_access(priv);
5963 }
5964 spin_unlock_irqrestore(&priv->lock, flags);
5965
5966 udelay(5);
5967
5968 iwl3945_hw_nic_stop_master(priv);
5969 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5970 iwl3945_hw_nic_reset(priv);
5971
5972 exit:
5973 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
5974
5975 if (priv->ibss_beacon)
5976 dev_kfree_skb(priv->ibss_beacon);
5977 priv->ibss_beacon = NULL;
5978
5979 /* clear out any free frames */
5980 iwl3945_clear_free_frames(priv);
5981 }
5982
5983 static void iwl3945_down(struct iwl3945_priv *priv)
5984 {
5985 mutex_lock(&priv->mutex);
5986 __iwl3945_down(priv);
5987 mutex_unlock(&priv->mutex);
5988
5989 iwl3945_cancel_deferred_work(priv);
5990 }
5991
5992 #define MAX_HW_RESTARTS 5
5993
5994 static int __iwl3945_up(struct iwl3945_priv *priv)
5995 {
5996 int rc, i;
5997
5998 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5999 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6000 return -EIO;
6001 }
6002
6003 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6004 IWL_WARNING("Radio disabled by SW RF kill (module "
6005 "parameter)\n");
6006 return -ENODEV;
6007 }
6008
6009 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6010 IWL_ERROR("ucode not available for device bringup\n");
6011 return -EIO;
6012 }
6013
6014 /* If platform's RF_KILL switch is NOT set to KILL */
6015 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6016 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6017 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6018 else {
6019 set_bit(STATUS_RF_KILL_HW, &priv->status);
6020 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6021 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6022 return -ENODEV;
6023 }
6024 }
6025
6026 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6027
6028 rc = iwl3945_hw_nic_init(priv);
6029 if (rc) {
6030 IWL_ERROR("Unable to int nic\n");
6031 return rc;
6032 }
6033
6034 /* make sure rfkill handshake bits are cleared */
6035 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6036 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6037 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6038
6039 /* clear (again), then enable host interrupts */
6040 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6041 iwl3945_enable_interrupts(priv);
6042
6043 /* really make sure rfkill handshake bits are cleared */
6044 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6045 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6046
6047 /* Copy original ucode data image from disk into backup cache.
6048 * This will be used to initialize the on-board processor's
6049 * data SRAM for a clean start when the runtime program first loads. */
6050 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6051 priv->ucode_data.len);
6052
6053 /* We return success when we resume from suspend and rf_kill is on. */
6054 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6055 return 0;
6056
6057 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6058
6059 iwl3945_clear_stations_table(priv);
6060
6061 /* load bootstrap state machine,
6062 * load bootstrap program into processor's memory,
6063 * prepare to load the "initialize" uCode */
6064 rc = iwl3945_load_bsm(priv);
6065
6066 if (rc) {
6067 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6068 continue;
6069 }
6070
6071 /* start card; "initialize" will load runtime ucode */
6072 iwl3945_nic_start(priv);
6073
6074 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6075
6076 return 0;
6077 }
6078
6079 set_bit(STATUS_EXIT_PENDING, &priv->status);
6080 __iwl3945_down(priv);
6081
6082 /* tried to restart and config the device for as long as our
6083 * patience could withstand */
6084 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6085 return -EIO;
6086 }
6087
6088
6089 /*****************************************************************************
6090 *
6091 * Workqueue callbacks
6092 *
6093 *****************************************************************************/
6094
6095 static void iwl3945_bg_init_alive_start(struct work_struct *data)
6096 {
6097 struct iwl3945_priv *priv =
6098 container_of(data, struct iwl3945_priv, init_alive_start.work);
6099
6100 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6101 return;
6102
6103 mutex_lock(&priv->mutex);
6104 iwl3945_init_alive_start(priv);
6105 mutex_unlock(&priv->mutex);
6106 }
6107
6108 static void iwl3945_bg_alive_start(struct work_struct *data)
6109 {
6110 struct iwl3945_priv *priv =
6111 container_of(data, struct iwl3945_priv, alive_start.work);
6112
6113 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6114 return;
6115
6116 mutex_lock(&priv->mutex);
6117 iwl3945_alive_start(priv);
6118 mutex_unlock(&priv->mutex);
6119 }
6120
6121 static void iwl3945_bg_rf_kill(struct work_struct *work)
6122 {
6123 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6124
6125 wake_up_interruptible(&priv->wait_command_queue);
6126
6127 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6128 return;
6129
6130 mutex_lock(&priv->mutex);
6131
6132 if (!iwl3945_is_rfkill(priv)) {
6133 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6134 "HW and/or SW RF Kill no longer active, restarting "
6135 "device\n");
6136 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6137 queue_work(priv->workqueue, &priv->restart);
6138 } else {
6139
6140 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6141 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6142 "disabled by SW switch\n");
6143 else
6144 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6145 "Kill switch must be turned off for "
6146 "wireless networking to work.\n");
6147 }
6148 mutex_unlock(&priv->mutex);
6149 }
6150
6151 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6152
6153 static void iwl3945_bg_scan_check(struct work_struct *data)
6154 {
6155 struct iwl3945_priv *priv =
6156 container_of(data, struct iwl3945_priv, scan_check.work);
6157
6158 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6159 return;
6160
6161 mutex_lock(&priv->mutex);
6162 if (test_bit(STATUS_SCANNING, &priv->status) ||
6163 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6164 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6165 "Scan completion watchdog resetting adapter (%dms)\n",
6166 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6167
6168 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6169 iwl3945_send_scan_abort(priv);
6170 }
6171 mutex_unlock(&priv->mutex);
6172 }
6173
6174 static void iwl3945_bg_request_scan(struct work_struct *data)
6175 {
6176 struct iwl3945_priv *priv =
6177 container_of(data, struct iwl3945_priv, request_scan);
6178 struct iwl3945_host_cmd cmd = {
6179 .id = REPLY_SCAN_CMD,
6180 .len = sizeof(struct iwl3945_scan_cmd),
6181 .meta.flags = CMD_SIZE_HUGE,
6182 };
6183 int rc = 0;
6184 struct iwl3945_scan_cmd *scan;
6185 struct ieee80211_conf *conf = NULL;
6186 u8 direct_mask;
6187 enum ieee80211_band band;
6188
6189 conf = ieee80211_get_hw_conf(priv->hw);
6190
6191 mutex_lock(&priv->mutex);
6192
6193 if (!iwl3945_is_ready(priv)) {
6194 IWL_WARNING("request scan called when driver not ready.\n");
6195 goto done;
6196 }
6197
6198 /* Make sure the scan wasn't cancelled before this queued work
6199 * was given the chance to run... */
6200 if (!test_bit(STATUS_SCANNING, &priv->status))
6201 goto done;
6202
6203 /* This should never be called or scheduled if there is currently
6204 * a scan active in the hardware. */
6205 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6206 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6207 "Ignoring second request.\n");
6208 rc = -EIO;
6209 goto done;
6210 }
6211
6212 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6213 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6214 goto done;
6215 }
6216
6217 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6218 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6219 goto done;
6220 }
6221
6222 if (iwl3945_is_rfkill(priv)) {
6223 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6224 goto done;
6225 }
6226
6227 if (!test_bit(STATUS_READY, &priv->status)) {
6228 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6229 goto done;
6230 }
6231
6232 if (!priv->scan_bands) {
6233 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6234 goto done;
6235 }
6236
6237 if (!priv->scan) {
6238 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6239 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6240 if (!priv->scan) {
6241 rc = -ENOMEM;
6242 goto done;
6243 }
6244 }
6245 scan = priv->scan;
6246 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6247
6248 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6249 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6250
6251 if (iwl3945_is_associated(priv)) {
6252 u16 interval = 0;
6253 u32 extra;
6254 u32 suspend_time = 100;
6255 u32 scan_suspend_time = 100;
6256 unsigned long flags;
6257
6258 IWL_DEBUG_INFO("Scanning while associated...\n");
6259
6260 spin_lock_irqsave(&priv->lock, flags);
6261 interval = priv->beacon_int;
6262 spin_unlock_irqrestore(&priv->lock, flags);
6263
6264 scan->suspend_time = 0;
6265 scan->max_out_time = cpu_to_le32(200 * 1024);
6266 if (!interval)
6267 interval = suspend_time;
6268 /*
6269 * suspend time format:
6270 * 0-19: beacon interval in usec (time before exec.)
6271 * 20-23: 0
6272 * 24-31: number of beacons (suspend between channels)
6273 */
6274
6275 extra = (suspend_time / interval) << 24;
6276 scan_suspend_time = 0xFF0FFFFF &
6277 (extra | ((suspend_time % interval) * 1024));
6278
6279 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6280 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6281 scan_suspend_time, interval);
6282 }
6283
6284 /* We should add the ability for user to lock to PASSIVE ONLY */
6285 if (priv->one_direct_scan) {
6286 IWL_DEBUG_SCAN
6287 ("Kicking off one direct scan for '%s'\n",
6288 iwl3945_escape_essid(priv->direct_ssid,
6289 priv->direct_ssid_len));
6290 scan->direct_scan[0].id = WLAN_EID_SSID;
6291 scan->direct_scan[0].len = priv->direct_ssid_len;
6292 memcpy(scan->direct_scan[0].ssid,
6293 priv->direct_ssid, priv->direct_ssid_len);
6294 direct_mask = 1;
6295 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6296 IWL_DEBUG_SCAN
6297 ("Kicking off one direct scan for '%s' when not associated\n",
6298 iwl3945_escape_essid(priv->essid, priv->essid_len));
6299 scan->direct_scan[0].id = WLAN_EID_SSID;
6300 scan->direct_scan[0].len = priv->essid_len;
6301 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6302 direct_mask = 1;
6303 } else {
6304 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6305 direct_mask = 0;
6306 }
6307
6308 /* We don't build a direct scan probe request; the uCode will do
6309 * that based on the direct_mask added to each channel entry */
6310 scan->tx_cmd.len = cpu_to_le16(
6311 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6312 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
6313 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6314 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6315 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6316
6317 /* flags + rate selection */
6318
6319 switch (priv->scan_bands) {
6320 case 2:
6321 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6322 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6323 scan->good_CRC_th = 0;
6324 band = IEEE80211_BAND_2GHZ;
6325 break;
6326
6327 case 1:
6328 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6329 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6330 band = IEEE80211_BAND_5GHZ;
6331 break;
6332
6333 default:
6334 IWL_WARNING("Invalid scan band count\n");
6335 goto done;
6336 }
6337
6338 /* select Rx antennas */
6339 scan->flags |= iwl3945_get_antenna_flags(priv);
6340
6341 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6342 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6343
6344 if (direct_mask)
6345 scan->channel_count =
6346 iwl3945_get_channels_for_scan(
6347 priv, band, 1, /* active */
6348 direct_mask,
6349 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6350 else
6351 scan->channel_count =
6352 iwl3945_get_channels_for_scan(
6353 priv, band, 0, /* passive */
6354 direct_mask,
6355 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6356
6357 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6358 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6359 cmd.data = scan;
6360 scan->len = cpu_to_le16(cmd.len);
6361
6362 set_bit(STATUS_SCAN_HW, &priv->status);
6363 rc = iwl3945_send_cmd_sync(priv, &cmd);
6364 if (rc)
6365 goto done;
6366
6367 queue_delayed_work(priv->workqueue, &priv->scan_check,
6368 IWL_SCAN_CHECK_WATCHDOG);
6369
6370 mutex_unlock(&priv->mutex);
6371 return;
6372
6373 done:
6374 /* inform mac80211 scan aborted */
6375 queue_work(priv->workqueue, &priv->scan_completed);
6376 mutex_unlock(&priv->mutex);
6377 }
6378
6379 static void iwl3945_bg_up(struct work_struct *data)
6380 {
6381 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6382
6383 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6384 return;
6385
6386 mutex_lock(&priv->mutex);
6387 __iwl3945_up(priv);
6388 mutex_unlock(&priv->mutex);
6389 }
6390
6391 static void iwl3945_bg_restart(struct work_struct *data)
6392 {
6393 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6394
6395 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6396 return;
6397
6398 iwl3945_down(priv);
6399 queue_work(priv->workqueue, &priv->up);
6400 }
6401
6402 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6403 {
6404 struct iwl3945_priv *priv =
6405 container_of(data, struct iwl3945_priv, rx_replenish);
6406
6407 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6408 return;
6409
6410 mutex_lock(&priv->mutex);
6411 iwl3945_rx_replenish(priv);
6412 mutex_unlock(&priv->mutex);
6413 }
6414
6415 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6416
6417 static void iwl3945_bg_post_associate(struct work_struct *data)
6418 {
6419 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6420 post_associate.work);
6421
6422 int rc = 0;
6423 struct ieee80211_conf *conf = NULL;
6424 DECLARE_MAC_BUF(mac);
6425
6426 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6427 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6428 return;
6429 }
6430
6431
6432 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6433 priv->assoc_id,
6434 print_mac(mac, priv->active_rxon.bssid_addr));
6435
6436 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6437 return;
6438
6439 mutex_lock(&priv->mutex);
6440
6441 if (!priv->vif || !priv->is_open) {
6442 mutex_unlock(&priv->mutex);
6443 return;
6444 }
6445 iwl3945_scan_cancel_timeout(priv, 200);
6446
6447 conf = ieee80211_get_hw_conf(priv->hw);
6448
6449 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6450 iwl3945_commit_rxon(priv);
6451
6452 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6453 iwl3945_setup_rxon_timing(priv);
6454 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6455 sizeof(priv->rxon_timing), &priv->rxon_timing);
6456 if (rc)
6457 IWL_WARNING("REPLY_RXON_TIMING failed - "
6458 "Attempting to continue.\n");
6459
6460 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6461
6462 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6463
6464 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6465 priv->assoc_id, priv->beacon_int);
6466
6467 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6468 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6469 else
6470 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6471
6472 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6473 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6474 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6475 else
6476 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6477
6478 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6479 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6480
6481 }
6482
6483 iwl3945_commit_rxon(priv);
6484
6485 switch (priv->iw_mode) {
6486 case IEEE80211_IF_TYPE_STA:
6487 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6488 break;
6489
6490 case IEEE80211_IF_TYPE_IBSS:
6491
6492 /* clear out the station table */
6493 iwl3945_clear_stations_table(priv);
6494
6495 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6496 iwl3945_add_station(priv, priv->bssid, 0, 0);
6497 iwl3945_sync_sta(priv, IWL_STA_ID,
6498 (priv->band == IEEE80211_BAND_5GHZ) ?
6499 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6500 CMD_ASYNC);
6501 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6502 iwl3945_send_beacon_cmd(priv);
6503
6504 break;
6505
6506 default:
6507 IWL_ERROR("%s Should not be called in %d mode\n",
6508 __FUNCTION__, priv->iw_mode);
6509 break;
6510 }
6511
6512 iwl3945_sequence_reset(priv);
6513
6514 iwl3945_activate_qos(priv, 0);
6515
6516 /* we have just associated, don't start scan too early */
6517 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6518 mutex_unlock(&priv->mutex);
6519 }
6520
6521 static void iwl3945_bg_abort_scan(struct work_struct *work)
6522 {
6523 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6524
6525 if (!iwl3945_is_ready(priv))
6526 return;
6527
6528 mutex_lock(&priv->mutex);
6529
6530 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6531 iwl3945_send_scan_abort(priv);
6532
6533 mutex_unlock(&priv->mutex);
6534 }
6535
6536 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6537
6538 static void iwl3945_bg_scan_completed(struct work_struct *work)
6539 {
6540 struct iwl3945_priv *priv =
6541 container_of(work, struct iwl3945_priv, scan_completed);
6542
6543 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6544
6545 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6546 return;
6547
6548 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6549 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6550
6551 ieee80211_scan_completed(priv->hw);
6552
6553 /* Since setting the TXPOWER may have been deferred while
6554 * performing the scan, fire one off */
6555 mutex_lock(&priv->mutex);
6556 iwl3945_hw_reg_send_txpower(priv);
6557 mutex_unlock(&priv->mutex);
6558 }
6559
6560 /*****************************************************************************
6561 *
6562 * mac80211 entry point functions
6563 *
6564 *****************************************************************************/
6565
6566 #define UCODE_READY_TIMEOUT (2 * HZ)
6567
6568 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6569 {
6570 struct iwl3945_priv *priv = hw->priv;
6571 int ret;
6572
6573 IWL_DEBUG_MAC80211("enter\n");
6574
6575 if (pci_enable_device(priv->pci_dev)) {
6576 IWL_ERROR("Fail to pci_enable_device\n");
6577 return -ENODEV;
6578 }
6579 pci_restore_state(priv->pci_dev);
6580 pci_enable_msi(priv->pci_dev);
6581
6582 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6583 DRV_NAME, priv);
6584 if (ret) {
6585 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6586 goto out_disable_msi;
6587 }
6588
6589 /* we should be verifying the device is ready to be opened */
6590 mutex_lock(&priv->mutex);
6591
6592 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6593 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6594 * ucode filename and max sizes are card-specific. */
6595
6596 if (!priv->ucode_code.len) {
6597 ret = iwl3945_read_ucode(priv);
6598 if (ret) {
6599 IWL_ERROR("Could not read microcode: %d\n", ret);
6600 mutex_unlock(&priv->mutex);
6601 goto out_release_irq;
6602 }
6603 }
6604
6605 ret = __iwl3945_up(priv);
6606
6607 mutex_unlock(&priv->mutex);
6608
6609 if (ret)
6610 goto out_release_irq;
6611
6612 IWL_DEBUG_INFO("Start UP work.\n");
6613
6614 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6615 return 0;
6616
6617 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6618 * mac80211 will not be run successfully. */
6619 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6620 test_bit(STATUS_READY, &priv->status),
6621 UCODE_READY_TIMEOUT);
6622 if (!ret) {
6623 if (!test_bit(STATUS_READY, &priv->status)) {
6624 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6625 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6626 ret = -ETIMEDOUT;
6627 goto out_release_irq;
6628 }
6629 }
6630
6631 priv->is_open = 1;
6632 IWL_DEBUG_MAC80211("leave\n");
6633 return 0;
6634
6635 out_release_irq:
6636 free_irq(priv->pci_dev->irq, priv);
6637 out_disable_msi:
6638 pci_disable_msi(priv->pci_dev);
6639 pci_disable_device(priv->pci_dev);
6640 priv->is_open = 0;
6641 IWL_DEBUG_MAC80211("leave - failed\n");
6642 return ret;
6643 }
6644
6645 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6646 {
6647 struct iwl3945_priv *priv = hw->priv;
6648
6649 IWL_DEBUG_MAC80211("enter\n");
6650
6651 if (!priv->is_open) {
6652 IWL_DEBUG_MAC80211("leave - skip\n");
6653 return;
6654 }
6655
6656 priv->is_open = 0;
6657
6658 if (iwl3945_is_ready_rf(priv)) {
6659 /* stop mac, cancel any scan request and clear
6660 * RXON_FILTER_ASSOC_MSK BIT
6661 */
6662 mutex_lock(&priv->mutex);
6663 iwl3945_scan_cancel_timeout(priv, 100);
6664 cancel_delayed_work(&priv->post_associate);
6665 mutex_unlock(&priv->mutex);
6666 }
6667
6668 iwl3945_down(priv);
6669
6670 flush_workqueue(priv->workqueue);
6671 free_irq(priv->pci_dev->irq, priv);
6672 pci_disable_msi(priv->pci_dev);
6673 pci_save_state(priv->pci_dev);
6674 pci_disable_device(priv->pci_dev);
6675
6676 IWL_DEBUG_MAC80211("leave\n");
6677 }
6678
6679 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
6680 struct ieee80211_tx_control *ctl)
6681 {
6682 struct iwl3945_priv *priv = hw->priv;
6683
6684 IWL_DEBUG_MAC80211("enter\n");
6685
6686 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6687 IWL_DEBUG_MAC80211("leave - monitor\n");
6688 return -1;
6689 }
6690
6691 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6692 ctl->tx_rate->bitrate);
6693
6694 if (iwl3945_tx_skb(priv, skb, ctl))
6695 dev_kfree_skb_any(skb);
6696
6697 IWL_DEBUG_MAC80211("leave\n");
6698 return 0;
6699 }
6700
6701 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6702 struct ieee80211_if_init_conf *conf)
6703 {
6704 struct iwl3945_priv *priv = hw->priv;
6705 unsigned long flags;
6706 DECLARE_MAC_BUF(mac);
6707
6708 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6709
6710 if (priv->vif) {
6711 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6712 return -EOPNOTSUPP;
6713 }
6714
6715 spin_lock_irqsave(&priv->lock, flags);
6716 priv->vif = conf->vif;
6717
6718 spin_unlock_irqrestore(&priv->lock, flags);
6719
6720 mutex_lock(&priv->mutex);
6721
6722 if (conf->mac_addr) {
6723 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6724 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6725 }
6726
6727 if (iwl3945_is_ready(priv))
6728 iwl3945_set_mode(priv, conf->type);
6729
6730 mutex_unlock(&priv->mutex);
6731
6732 IWL_DEBUG_MAC80211("leave\n");
6733 return 0;
6734 }
6735
6736 /**
6737 * iwl3945_mac_config - mac80211 config callback
6738 *
6739 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6740 * be set inappropriately and the driver currently sets the hardware up to
6741 * use it whenever needed.
6742 */
6743 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
6744 {
6745 struct iwl3945_priv *priv = hw->priv;
6746 const struct iwl3945_channel_info *ch_info;
6747 unsigned long flags;
6748 int ret = 0;
6749
6750 mutex_lock(&priv->mutex);
6751 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6752
6753 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6754
6755 if (!iwl3945_is_ready(priv)) {
6756 IWL_DEBUG_MAC80211("leave - not ready\n");
6757 ret = -EIO;
6758 goto out;
6759 }
6760
6761 if (unlikely(!iwl3945_param_disable_hw_scan &&
6762 test_bit(STATUS_SCANNING, &priv->status))) {
6763 IWL_DEBUG_MAC80211("leave - scanning\n");
6764 set_bit(STATUS_CONF_PENDING, &priv->status);
6765 mutex_unlock(&priv->mutex);
6766 return 0;
6767 }
6768
6769 spin_lock_irqsave(&priv->lock, flags);
6770
6771 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6772 conf->channel->hw_value);
6773 if (!is_channel_valid(ch_info)) {
6774 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
6775 conf->channel->hw_value, conf->channel->band);
6776 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6777 spin_unlock_irqrestore(&priv->lock, flags);
6778 ret = -EINVAL;
6779 goto out;
6780 }
6781
6782 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6783
6784 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6785
6786 /* The list of supported rates and rate mask can be different
6787 * for each phymode; since the phymode may have changed, reset
6788 * the rate mask to what mac80211 lists */
6789 iwl3945_set_rate(priv);
6790
6791 spin_unlock_irqrestore(&priv->lock, flags);
6792
6793 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6794 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6795 iwl3945_hw_channel_switch(priv, conf->channel);
6796 goto out;
6797 }
6798 #endif
6799
6800 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6801
6802 if (!conf->radio_enabled) {
6803 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6804 goto out;
6805 }
6806
6807 if (iwl3945_is_rfkill(priv)) {
6808 IWL_DEBUG_MAC80211("leave - RF kill\n");
6809 ret = -EIO;
6810 goto out;
6811 }
6812
6813 iwl3945_set_rate(priv);
6814
6815 if (memcmp(&priv->active_rxon,
6816 &priv->staging_rxon, sizeof(priv->staging_rxon)))
6817 iwl3945_commit_rxon(priv);
6818 else
6819 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6820
6821 IWL_DEBUG_MAC80211("leave\n");
6822
6823 out:
6824 clear_bit(STATUS_CONF_PENDING, &priv->status);
6825 mutex_unlock(&priv->mutex);
6826 return ret;
6827 }
6828
6829 static void iwl3945_config_ap(struct iwl3945_priv *priv)
6830 {
6831 int rc = 0;
6832
6833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6834 return;
6835
6836 /* The following should be done only at AP bring up */
6837 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6838
6839 /* RXON - unassoc (to set timing command) */
6840 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6841 iwl3945_commit_rxon(priv);
6842
6843 /* RXON Timing */
6844 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6845 iwl3945_setup_rxon_timing(priv);
6846 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6847 sizeof(priv->rxon_timing), &priv->rxon_timing);
6848 if (rc)
6849 IWL_WARNING("REPLY_RXON_TIMING failed - "
6850 "Attempting to continue.\n");
6851
6852 /* FIXME: what should be the assoc_id for AP? */
6853 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6854 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6855 priv->staging_rxon.flags |=
6856 RXON_FLG_SHORT_PREAMBLE_MSK;
6857 else
6858 priv->staging_rxon.flags &=
6859 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6860
6861 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6862 if (priv->assoc_capability &
6863 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6864 priv->staging_rxon.flags |=
6865 RXON_FLG_SHORT_SLOT_MSK;
6866 else
6867 priv->staging_rxon.flags &=
6868 ~RXON_FLG_SHORT_SLOT_MSK;
6869
6870 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6871 priv->staging_rxon.flags &=
6872 ~RXON_FLG_SHORT_SLOT_MSK;
6873 }
6874 /* restore RXON assoc */
6875 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6876 iwl3945_commit_rxon(priv);
6877 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6878 }
6879 iwl3945_send_beacon_cmd(priv);
6880
6881 /* FIXME - we need to add code here to detect a totally new
6882 * configuration, reset the AP, unassoc, rxon timing, assoc,
6883 * clear sta table, add BCAST sta... */
6884 }
6885
6886 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6887 struct ieee80211_vif *vif,
6888 struct ieee80211_if_conf *conf)
6889 {
6890 struct iwl3945_priv *priv = hw->priv;
6891 DECLARE_MAC_BUF(mac);
6892 unsigned long flags;
6893 int rc;
6894
6895 if (conf == NULL)
6896 return -EIO;
6897
6898 if (priv->vif != vif) {
6899 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6900 return 0;
6901 }
6902
6903 /* XXX: this MUST use conf->mac_addr */
6904
6905 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6906 (!conf->beacon || !conf->ssid_len)) {
6907 IWL_DEBUG_MAC80211
6908 ("Leaving in AP mode because HostAPD is not ready.\n");
6909 return 0;
6910 }
6911
6912 if (!iwl3945_is_alive(priv))
6913 return -EAGAIN;
6914
6915 mutex_lock(&priv->mutex);
6916
6917 if (conf->bssid)
6918 IWL_DEBUG_MAC80211("bssid: %s\n",
6919 print_mac(mac, conf->bssid));
6920
6921 /*
6922 * very dubious code was here; the probe filtering flag is never set:
6923 *
6924 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6925 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6926 */
6927
6928 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6929 if (!conf->bssid) {
6930 conf->bssid = priv->mac_addr;
6931 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6932 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6933 print_mac(mac, conf->bssid));
6934 }
6935 if (priv->ibss_beacon)
6936 dev_kfree_skb(priv->ibss_beacon);
6937
6938 priv->ibss_beacon = conf->beacon;
6939 }
6940
6941 if (iwl3945_is_rfkill(priv))
6942 goto done;
6943
6944 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6945 !is_multicast_ether_addr(conf->bssid)) {
6946 /* If there is currently a HW scan going on in the background
6947 * then we need to cancel it else the RXON below will fail. */
6948 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6949 IWL_WARNING("Aborted scan still in progress "
6950 "after 100ms\n");
6951 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6952 mutex_unlock(&priv->mutex);
6953 return -EAGAIN;
6954 }
6955 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6956
6957 /* TODO: Audit driver for usage of these members and see
6958 * if mac80211 deprecates them (priv->bssid looks like it
6959 * shouldn't be there, but I haven't scanned the IBSS code
6960 * to verify) - jpk */
6961 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6962
6963 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
6964 iwl3945_config_ap(priv);
6965 else {
6966 rc = iwl3945_commit_rxon(priv);
6967 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
6968 iwl3945_add_station(priv,
6969 priv->active_rxon.bssid_addr, 1, 0);
6970 }
6971
6972 } else {
6973 iwl3945_scan_cancel_timeout(priv, 100);
6974 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6975 iwl3945_commit_rxon(priv);
6976 }
6977
6978 done:
6979 spin_lock_irqsave(&priv->lock, flags);
6980 if (!conf->ssid_len)
6981 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6982 else
6983 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6984
6985 priv->essid_len = conf->ssid_len;
6986 spin_unlock_irqrestore(&priv->lock, flags);
6987
6988 IWL_DEBUG_MAC80211("leave\n");
6989 mutex_unlock(&priv->mutex);
6990
6991 return 0;
6992 }
6993
6994 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6995 unsigned int changed_flags,
6996 unsigned int *total_flags,
6997 int mc_count, struct dev_addr_list *mc_list)
6998 {
6999 /*
7000 * XXX: dummy
7001 * see also iwl3945_connection_init_rx_config
7002 */
7003 *total_flags = 0;
7004 }
7005
7006 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
7007 struct ieee80211_if_init_conf *conf)
7008 {
7009 struct iwl3945_priv *priv = hw->priv;
7010
7011 IWL_DEBUG_MAC80211("enter\n");
7012
7013 mutex_lock(&priv->mutex);
7014
7015 if (iwl3945_is_ready_rf(priv)) {
7016 iwl3945_scan_cancel_timeout(priv, 100);
7017 cancel_delayed_work(&priv->post_associate);
7018 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7019 iwl3945_commit_rxon(priv);
7020 }
7021 if (priv->vif == conf->vif) {
7022 priv->vif = NULL;
7023 memset(priv->bssid, 0, ETH_ALEN);
7024 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7025 priv->essid_len = 0;
7026 }
7027 mutex_unlock(&priv->mutex);
7028
7029 IWL_DEBUG_MAC80211("leave\n");
7030 }
7031
7032 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7033 {
7034 int rc = 0;
7035 unsigned long flags;
7036 struct iwl3945_priv *priv = hw->priv;
7037
7038 IWL_DEBUG_MAC80211("enter\n");
7039
7040 mutex_lock(&priv->mutex);
7041 spin_lock_irqsave(&priv->lock, flags);
7042
7043 if (!iwl3945_is_ready_rf(priv)) {
7044 rc = -EIO;
7045 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7046 goto out_unlock;
7047 }
7048
7049 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7050 rc = -EIO;
7051 IWL_ERROR("ERROR: APs don't scan\n");
7052 goto out_unlock;
7053 }
7054
7055 /* we don't schedule scan within next_scan_jiffies period */
7056 if (priv->next_scan_jiffies &&
7057 time_after(priv->next_scan_jiffies, jiffies)) {
7058 rc = -EAGAIN;
7059 goto out_unlock;
7060 }
7061 /* if we just finished scan ask for delay */
7062 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7063 IWL_DELAY_NEXT_SCAN, jiffies)) {
7064 rc = -EAGAIN;
7065 goto out_unlock;
7066 }
7067 if (len) {
7068 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7069 iwl3945_escape_essid(ssid, len), (int)len);
7070
7071 priv->one_direct_scan = 1;
7072 priv->direct_ssid_len = (u8)
7073 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7074 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7075 } else
7076 priv->one_direct_scan = 0;
7077
7078 rc = iwl3945_scan_initiate(priv);
7079
7080 IWL_DEBUG_MAC80211("leave\n");
7081
7082 out_unlock:
7083 spin_unlock_irqrestore(&priv->lock, flags);
7084 mutex_unlock(&priv->mutex);
7085
7086 return rc;
7087 }
7088
7089 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7090 const u8 *local_addr, const u8 *addr,
7091 struct ieee80211_key_conf *key)
7092 {
7093 struct iwl3945_priv *priv = hw->priv;
7094 int rc = 0;
7095 u8 sta_id;
7096
7097 IWL_DEBUG_MAC80211("enter\n");
7098
7099 if (!iwl3945_param_hwcrypto) {
7100 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7101 return -EOPNOTSUPP;
7102 }
7103
7104 if (is_zero_ether_addr(addr))
7105 /* only support pairwise keys */
7106 return -EOPNOTSUPP;
7107
7108 sta_id = iwl3945_hw_find_station(priv, addr);
7109 if (sta_id == IWL_INVALID_STATION) {
7110 DECLARE_MAC_BUF(mac);
7111
7112 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7113 print_mac(mac, addr));
7114 return -EINVAL;
7115 }
7116
7117 mutex_lock(&priv->mutex);
7118
7119 iwl3945_scan_cancel_timeout(priv, 100);
7120
7121 switch (cmd) {
7122 case SET_KEY:
7123 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7124 if (!rc) {
7125 iwl3945_set_rxon_hwcrypto(priv, 1);
7126 iwl3945_commit_rxon(priv);
7127 key->hw_key_idx = sta_id;
7128 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7129 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7130 }
7131 break;
7132 case DISABLE_KEY:
7133 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7134 if (!rc) {
7135 iwl3945_set_rxon_hwcrypto(priv, 0);
7136 iwl3945_commit_rxon(priv);
7137 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7138 }
7139 break;
7140 default:
7141 rc = -EINVAL;
7142 }
7143
7144 IWL_DEBUG_MAC80211("leave\n");
7145 mutex_unlock(&priv->mutex);
7146
7147 return rc;
7148 }
7149
7150 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7151 const struct ieee80211_tx_queue_params *params)
7152 {
7153 struct iwl3945_priv *priv = hw->priv;
7154 unsigned long flags;
7155 int q;
7156
7157 IWL_DEBUG_MAC80211("enter\n");
7158
7159 if (!iwl3945_is_ready_rf(priv)) {
7160 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7161 return -EIO;
7162 }
7163
7164 if (queue >= AC_NUM) {
7165 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7166 return 0;
7167 }
7168
7169 if (!priv->qos_data.qos_enable) {
7170 priv->qos_data.qos_active = 0;
7171 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7172 return 0;
7173 }
7174 q = AC_NUM - 1 - queue;
7175
7176 spin_lock_irqsave(&priv->lock, flags);
7177
7178 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7179 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7180 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7181 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7182 cpu_to_le16((params->txop * 32));
7183
7184 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7185 priv->qos_data.qos_active = 1;
7186
7187 spin_unlock_irqrestore(&priv->lock, flags);
7188
7189 mutex_lock(&priv->mutex);
7190 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7191 iwl3945_activate_qos(priv, 1);
7192 else if (priv->assoc_id && iwl3945_is_associated(priv))
7193 iwl3945_activate_qos(priv, 0);
7194
7195 mutex_unlock(&priv->mutex);
7196
7197 IWL_DEBUG_MAC80211("leave\n");
7198 return 0;
7199 }
7200
7201 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7202 struct ieee80211_tx_queue_stats *stats)
7203 {
7204 struct iwl3945_priv *priv = hw->priv;
7205 int i, avail;
7206 struct iwl3945_tx_queue *txq;
7207 struct iwl3945_queue *q;
7208 unsigned long flags;
7209
7210 IWL_DEBUG_MAC80211("enter\n");
7211
7212 if (!iwl3945_is_ready_rf(priv)) {
7213 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7214 return -EIO;
7215 }
7216
7217 spin_lock_irqsave(&priv->lock, flags);
7218
7219 for (i = 0; i < AC_NUM; i++) {
7220 txq = &priv->txq[i];
7221 q = &txq->q;
7222 avail = iwl3945_queue_space(q);
7223
7224 stats->data[i].len = q->n_window - avail;
7225 stats->data[i].limit = q->n_window - q->high_mark;
7226 stats->data[i].count = q->n_window;
7227
7228 }
7229 spin_unlock_irqrestore(&priv->lock, flags);
7230
7231 IWL_DEBUG_MAC80211("leave\n");
7232
7233 return 0;
7234 }
7235
7236 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7237 struct ieee80211_low_level_stats *stats)
7238 {
7239 IWL_DEBUG_MAC80211("enter\n");
7240 IWL_DEBUG_MAC80211("leave\n");
7241
7242 return 0;
7243 }
7244
7245 static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7246 {
7247 IWL_DEBUG_MAC80211("enter\n");
7248 IWL_DEBUG_MAC80211("leave\n");
7249
7250 return 0;
7251 }
7252
7253 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7254 {
7255 struct iwl3945_priv *priv = hw->priv;
7256 unsigned long flags;
7257
7258 mutex_lock(&priv->mutex);
7259 IWL_DEBUG_MAC80211("enter\n");
7260
7261 iwl3945_reset_qos(priv);
7262
7263 cancel_delayed_work(&priv->post_associate);
7264
7265 spin_lock_irqsave(&priv->lock, flags);
7266 priv->assoc_id = 0;
7267 priv->assoc_capability = 0;
7268 priv->call_post_assoc_from_beacon = 0;
7269
7270 /* new association get rid of ibss beacon skb */
7271 if (priv->ibss_beacon)
7272 dev_kfree_skb(priv->ibss_beacon);
7273
7274 priv->ibss_beacon = NULL;
7275
7276 priv->beacon_int = priv->hw->conf.beacon_int;
7277 priv->timestamp1 = 0;
7278 priv->timestamp0 = 0;
7279 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7280 priv->beacon_int = 0;
7281
7282 spin_unlock_irqrestore(&priv->lock, flags);
7283
7284 if (!iwl3945_is_ready_rf(priv)) {
7285 IWL_DEBUG_MAC80211("leave - not ready\n");
7286 mutex_unlock(&priv->mutex);
7287 return;
7288 }
7289
7290 /* we are restarting association process
7291 * clear RXON_FILTER_ASSOC_MSK bit
7292 */
7293 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7294 iwl3945_scan_cancel_timeout(priv, 100);
7295 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7296 iwl3945_commit_rxon(priv);
7297 }
7298
7299 /* Per mac80211.h: This is only used in IBSS mode... */
7300 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7301
7302 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7303 mutex_unlock(&priv->mutex);
7304 return;
7305 }
7306
7307 iwl3945_set_rate(priv);
7308
7309 mutex_unlock(&priv->mutex);
7310
7311 IWL_DEBUG_MAC80211("leave\n");
7312
7313 }
7314
7315 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7316 struct ieee80211_tx_control *control)
7317 {
7318 struct iwl3945_priv *priv = hw->priv;
7319 unsigned long flags;
7320
7321 mutex_lock(&priv->mutex);
7322 IWL_DEBUG_MAC80211("enter\n");
7323
7324 if (!iwl3945_is_ready_rf(priv)) {
7325 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7326 mutex_unlock(&priv->mutex);
7327 return -EIO;
7328 }
7329
7330 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7331 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7332 mutex_unlock(&priv->mutex);
7333 return -EIO;
7334 }
7335
7336 spin_lock_irqsave(&priv->lock, flags);
7337
7338 if (priv->ibss_beacon)
7339 dev_kfree_skb(priv->ibss_beacon);
7340
7341 priv->ibss_beacon = skb;
7342
7343 priv->assoc_id = 0;
7344
7345 IWL_DEBUG_MAC80211("leave\n");
7346 spin_unlock_irqrestore(&priv->lock, flags);
7347
7348 iwl3945_reset_qos(priv);
7349
7350 queue_work(priv->workqueue, &priv->post_associate.work);
7351
7352 mutex_unlock(&priv->mutex);
7353
7354 return 0;
7355 }
7356
7357 /*****************************************************************************
7358 *
7359 * sysfs attributes
7360 *
7361 *****************************************************************************/
7362
7363 #ifdef CONFIG_IWL3945_DEBUG
7364
7365 /*
7366 * The following adds a new attribute to the sysfs representation
7367 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7368 * used for controlling the debug level.
7369 *
7370 * See the level definitions in iwl for details.
7371 */
7372
7373 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7374 {
7375 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7376 }
7377 static ssize_t store_debug_level(struct device_driver *d,
7378 const char *buf, size_t count)
7379 {
7380 char *p = (char *)buf;
7381 u32 val;
7382
7383 val = simple_strtoul(p, &p, 0);
7384 if (p == buf)
7385 printk(KERN_INFO DRV_NAME
7386 ": %s is not in hex or decimal form.\n", buf);
7387 else
7388 iwl3945_debug_level = val;
7389
7390 return strnlen(buf, count);
7391 }
7392
7393 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7394 show_debug_level, store_debug_level);
7395
7396 #endif /* CONFIG_IWL3945_DEBUG */
7397
7398 static ssize_t show_rf_kill(struct device *d,
7399 struct device_attribute *attr, char *buf)
7400 {
7401 /*
7402 * 0 - RF kill not enabled
7403 * 1 - SW based RF kill active (sysfs)
7404 * 2 - HW based RF kill active
7405 * 3 - Both HW and SW based RF kill active
7406 */
7407 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7408 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7409 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7410
7411 return sprintf(buf, "%i\n", val);
7412 }
7413
7414 static ssize_t store_rf_kill(struct device *d,
7415 struct device_attribute *attr,
7416 const char *buf, size_t count)
7417 {
7418 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7419
7420 mutex_lock(&priv->mutex);
7421 iwl3945_radio_kill_sw(priv, buf[0] == '1');
7422 mutex_unlock(&priv->mutex);
7423
7424 return count;
7425 }
7426
7427 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7428
7429 static ssize_t show_temperature(struct device *d,
7430 struct device_attribute *attr, char *buf)
7431 {
7432 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7433
7434 if (!iwl3945_is_alive(priv))
7435 return -EAGAIN;
7436
7437 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7438 }
7439
7440 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7441
7442 static ssize_t show_rs_window(struct device *d,
7443 struct device_attribute *attr,
7444 char *buf)
7445 {
7446 struct iwl3945_priv *priv = d->driver_data;
7447 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7448 }
7449 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7450
7451 static ssize_t show_tx_power(struct device *d,
7452 struct device_attribute *attr, char *buf)
7453 {
7454 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7455 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7456 }
7457
7458 static ssize_t store_tx_power(struct device *d,
7459 struct device_attribute *attr,
7460 const char *buf, size_t count)
7461 {
7462 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7463 char *p = (char *)buf;
7464 u32 val;
7465
7466 val = simple_strtoul(p, &p, 10);
7467 if (p == buf)
7468 printk(KERN_INFO DRV_NAME
7469 ": %s is not in decimal form.\n", buf);
7470 else
7471 iwl3945_hw_reg_set_txpower(priv, val);
7472
7473 return count;
7474 }
7475
7476 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7477
7478 static ssize_t show_flags(struct device *d,
7479 struct device_attribute *attr, char *buf)
7480 {
7481 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7482
7483 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7484 }
7485
7486 static ssize_t store_flags(struct device *d,
7487 struct device_attribute *attr,
7488 const char *buf, size_t count)
7489 {
7490 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7491 u32 flags = simple_strtoul(buf, NULL, 0);
7492
7493 mutex_lock(&priv->mutex);
7494 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7495 /* Cancel any currently running scans... */
7496 if (iwl3945_scan_cancel_timeout(priv, 100))
7497 IWL_WARNING("Could not cancel scan.\n");
7498 else {
7499 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7500 flags);
7501 priv->staging_rxon.flags = cpu_to_le32(flags);
7502 iwl3945_commit_rxon(priv);
7503 }
7504 }
7505 mutex_unlock(&priv->mutex);
7506
7507 return count;
7508 }
7509
7510 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7511
7512 static ssize_t show_filter_flags(struct device *d,
7513 struct device_attribute *attr, char *buf)
7514 {
7515 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7516
7517 return sprintf(buf, "0x%04X\n",
7518 le32_to_cpu(priv->active_rxon.filter_flags));
7519 }
7520
7521 static ssize_t store_filter_flags(struct device *d,
7522 struct device_attribute *attr,
7523 const char *buf, size_t count)
7524 {
7525 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7526 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7527
7528 mutex_lock(&priv->mutex);
7529 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7530 /* Cancel any currently running scans... */
7531 if (iwl3945_scan_cancel_timeout(priv, 100))
7532 IWL_WARNING("Could not cancel scan.\n");
7533 else {
7534 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7535 "0x%04X\n", filter_flags);
7536 priv->staging_rxon.filter_flags =
7537 cpu_to_le32(filter_flags);
7538 iwl3945_commit_rxon(priv);
7539 }
7540 }
7541 mutex_unlock(&priv->mutex);
7542
7543 return count;
7544 }
7545
7546 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7547 store_filter_flags);
7548
7549 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7550
7551 static ssize_t show_measurement(struct device *d,
7552 struct device_attribute *attr, char *buf)
7553 {
7554 struct iwl3945_priv *priv = dev_get_drvdata(d);
7555 struct iwl3945_spectrum_notification measure_report;
7556 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7557 u8 *data = (u8 *) & measure_report;
7558 unsigned long flags;
7559
7560 spin_lock_irqsave(&priv->lock, flags);
7561 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7562 spin_unlock_irqrestore(&priv->lock, flags);
7563 return 0;
7564 }
7565 memcpy(&measure_report, &priv->measure_report, size);
7566 priv->measurement_status = 0;
7567 spin_unlock_irqrestore(&priv->lock, flags);
7568
7569 while (size && (PAGE_SIZE - len)) {
7570 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7571 PAGE_SIZE - len, 1);
7572 len = strlen(buf);
7573 if (PAGE_SIZE - len)
7574 buf[len++] = '\n';
7575
7576 ofs += 16;
7577 size -= min(size, 16U);
7578 }
7579
7580 return len;
7581 }
7582
7583 static ssize_t store_measurement(struct device *d,
7584 struct device_attribute *attr,
7585 const char *buf, size_t count)
7586 {
7587 struct iwl3945_priv *priv = dev_get_drvdata(d);
7588 struct ieee80211_measurement_params params = {
7589 .channel = le16_to_cpu(priv->active_rxon.channel),
7590 .start_time = cpu_to_le64(priv->last_tsf),
7591 .duration = cpu_to_le16(1),
7592 };
7593 u8 type = IWL_MEASURE_BASIC;
7594 u8 buffer[32];
7595 u8 channel;
7596
7597 if (count) {
7598 char *p = buffer;
7599 strncpy(buffer, buf, min(sizeof(buffer), count));
7600 channel = simple_strtoul(p, NULL, 0);
7601 if (channel)
7602 params.channel = channel;
7603
7604 p = buffer;
7605 while (*p && *p != ' ')
7606 p++;
7607 if (*p)
7608 type = simple_strtoul(p + 1, NULL, 0);
7609 }
7610
7611 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7612 "channel %d (for '%s')\n", type, params.channel, buf);
7613 iwl3945_get_measurement(priv, &params, type);
7614
7615 return count;
7616 }
7617
7618 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7619 show_measurement, store_measurement);
7620 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7621
7622 static ssize_t store_retry_rate(struct device *d,
7623 struct device_attribute *attr,
7624 const char *buf, size_t count)
7625 {
7626 struct iwl3945_priv *priv = dev_get_drvdata(d);
7627
7628 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7629 if (priv->retry_rate <= 0)
7630 priv->retry_rate = 1;
7631
7632 return count;
7633 }
7634
7635 static ssize_t show_retry_rate(struct device *d,
7636 struct device_attribute *attr, char *buf)
7637 {
7638 struct iwl3945_priv *priv = dev_get_drvdata(d);
7639 return sprintf(buf, "%d", priv->retry_rate);
7640 }
7641
7642 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7643 store_retry_rate);
7644
7645 static ssize_t store_power_level(struct device *d,
7646 struct device_attribute *attr,
7647 const char *buf, size_t count)
7648 {
7649 struct iwl3945_priv *priv = dev_get_drvdata(d);
7650 int rc;
7651 int mode;
7652
7653 mode = simple_strtoul(buf, NULL, 0);
7654 mutex_lock(&priv->mutex);
7655
7656 if (!iwl3945_is_ready(priv)) {
7657 rc = -EAGAIN;
7658 goto out;
7659 }
7660
7661 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7662 mode = IWL_POWER_AC;
7663 else
7664 mode |= IWL_POWER_ENABLED;
7665
7666 if (mode != priv->power_mode) {
7667 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7668 if (rc) {
7669 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7670 goto out;
7671 }
7672 priv->power_mode = mode;
7673 }
7674
7675 rc = count;
7676
7677 out:
7678 mutex_unlock(&priv->mutex);
7679 return rc;
7680 }
7681
7682 #define MAX_WX_STRING 80
7683
7684 /* Values are in microsecond */
7685 static const s32 timeout_duration[] = {
7686 350000,
7687 250000,
7688 75000,
7689 37000,
7690 25000,
7691 };
7692 static const s32 period_duration[] = {
7693 400000,
7694 700000,
7695 1000000,
7696 1000000,
7697 1000000
7698 };
7699
7700 static ssize_t show_power_level(struct device *d,
7701 struct device_attribute *attr, char *buf)
7702 {
7703 struct iwl3945_priv *priv = dev_get_drvdata(d);
7704 int level = IWL_POWER_LEVEL(priv->power_mode);
7705 char *p = buf;
7706
7707 p += sprintf(p, "%d ", level);
7708 switch (level) {
7709 case IWL_POWER_MODE_CAM:
7710 case IWL_POWER_AC:
7711 p += sprintf(p, "(AC)");
7712 break;
7713 case IWL_POWER_BATTERY:
7714 p += sprintf(p, "(BATTERY)");
7715 break;
7716 default:
7717 p += sprintf(p,
7718 "(Timeout %dms, Period %dms)",
7719 timeout_duration[level - 1] / 1000,
7720 period_duration[level - 1] / 1000);
7721 }
7722
7723 if (!(priv->power_mode & IWL_POWER_ENABLED))
7724 p += sprintf(p, " OFF\n");
7725 else
7726 p += sprintf(p, " \n");
7727
7728 return (p - buf + 1);
7729
7730 }
7731
7732 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7733 store_power_level);
7734
7735 static ssize_t show_channels(struct device *d,
7736 struct device_attribute *attr, char *buf)
7737 {
7738 /* all this shit doesn't belong into sysfs anyway */
7739 return 0;
7740 }
7741
7742 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7743
7744 static ssize_t show_statistics(struct device *d,
7745 struct device_attribute *attr, char *buf)
7746 {
7747 struct iwl3945_priv *priv = dev_get_drvdata(d);
7748 u32 size = sizeof(struct iwl3945_notif_statistics);
7749 u32 len = 0, ofs = 0;
7750 u8 *data = (u8 *) & priv->statistics;
7751 int rc = 0;
7752
7753 if (!iwl3945_is_alive(priv))
7754 return -EAGAIN;
7755
7756 mutex_lock(&priv->mutex);
7757 rc = iwl3945_send_statistics_request(priv);
7758 mutex_unlock(&priv->mutex);
7759
7760 if (rc) {
7761 len = sprintf(buf,
7762 "Error sending statistics request: 0x%08X\n", rc);
7763 return len;
7764 }
7765
7766 while (size && (PAGE_SIZE - len)) {
7767 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7768 PAGE_SIZE - len, 1);
7769 len = strlen(buf);
7770 if (PAGE_SIZE - len)
7771 buf[len++] = '\n';
7772
7773 ofs += 16;
7774 size -= min(size, 16U);
7775 }
7776
7777 return len;
7778 }
7779
7780 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7781
7782 static ssize_t show_antenna(struct device *d,
7783 struct device_attribute *attr, char *buf)
7784 {
7785 struct iwl3945_priv *priv = dev_get_drvdata(d);
7786
7787 if (!iwl3945_is_alive(priv))
7788 return -EAGAIN;
7789
7790 return sprintf(buf, "%d\n", priv->antenna);
7791 }
7792
7793 static ssize_t store_antenna(struct device *d,
7794 struct device_attribute *attr,
7795 const char *buf, size_t count)
7796 {
7797 int ant;
7798 struct iwl3945_priv *priv = dev_get_drvdata(d);
7799
7800 if (count == 0)
7801 return 0;
7802
7803 if (sscanf(buf, "%1i", &ant) != 1) {
7804 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7805 return count;
7806 }
7807
7808 if ((ant >= 0) && (ant <= 2)) {
7809 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7810 priv->antenna = (enum iwl3945_antenna)ant;
7811 } else
7812 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7813
7814
7815 return count;
7816 }
7817
7818 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7819
7820 static ssize_t show_status(struct device *d,
7821 struct device_attribute *attr, char *buf)
7822 {
7823 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7824 if (!iwl3945_is_alive(priv))
7825 return -EAGAIN;
7826 return sprintf(buf, "0x%08x\n", (int)priv->status);
7827 }
7828
7829 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7830
7831 static ssize_t dump_error_log(struct device *d,
7832 struct device_attribute *attr,
7833 const char *buf, size_t count)
7834 {
7835 char *p = (char *)buf;
7836
7837 if (p[0] == '1')
7838 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
7839
7840 return strnlen(buf, count);
7841 }
7842
7843 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7844
7845 static ssize_t dump_event_log(struct device *d,
7846 struct device_attribute *attr,
7847 const char *buf, size_t count)
7848 {
7849 char *p = (char *)buf;
7850
7851 if (p[0] == '1')
7852 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
7853
7854 return strnlen(buf, count);
7855 }
7856
7857 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7858
7859 /*****************************************************************************
7860 *
7861 * driver setup and teardown
7862 *
7863 *****************************************************************************/
7864
7865 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
7866 {
7867 priv->workqueue = create_workqueue(DRV_NAME);
7868
7869 init_waitqueue_head(&priv->wait_command_queue);
7870
7871 INIT_WORK(&priv->up, iwl3945_bg_up);
7872 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7873 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7874 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7875 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7876 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7877 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7878 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7879 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7880 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7881 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7882 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7883
7884 iwl3945_hw_setup_deferred_work(priv);
7885
7886 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7887 iwl3945_irq_tasklet, (unsigned long)priv);
7888 }
7889
7890 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
7891 {
7892 iwl3945_hw_cancel_deferred_work(priv);
7893
7894 cancel_delayed_work_sync(&priv->init_alive_start);
7895 cancel_delayed_work(&priv->scan_check);
7896 cancel_delayed_work(&priv->alive_start);
7897 cancel_delayed_work(&priv->post_associate);
7898 cancel_work_sync(&priv->beacon_update);
7899 }
7900
7901 static struct attribute *iwl3945_sysfs_entries[] = {
7902 &dev_attr_antenna.attr,
7903 &dev_attr_channels.attr,
7904 &dev_attr_dump_errors.attr,
7905 &dev_attr_dump_events.attr,
7906 &dev_attr_flags.attr,
7907 &dev_attr_filter_flags.attr,
7908 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7909 &dev_attr_measurement.attr,
7910 #endif
7911 &dev_attr_power_level.attr,
7912 &dev_attr_retry_rate.attr,
7913 &dev_attr_rf_kill.attr,
7914 &dev_attr_rs_window.attr,
7915 &dev_attr_statistics.attr,
7916 &dev_attr_status.attr,
7917 &dev_attr_temperature.attr,
7918 &dev_attr_tx_power.attr,
7919
7920 NULL
7921 };
7922
7923 static struct attribute_group iwl3945_attribute_group = {
7924 .name = NULL, /* put in device directory */
7925 .attrs = iwl3945_sysfs_entries,
7926 };
7927
7928 static struct ieee80211_ops iwl3945_hw_ops = {
7929 .tx = iwl3945_mac_tx,
7930 .start = iwl3945_mac_start,
7931 .stop = iwl3945_mac_stop,
7932 .add_interface = iwl3945_mac_add_interface,
7933 .remove_interface = iwl3945_mac_remove_interface,
7934 .config = iwl3945_mac_config,
7935 .config_interface = iwl3945_mac_config_interface,
7936 .configure_filter = iwl3945_configure_filter,
7937 .set_key = iwl3945_mac_set_key,
7938 .get_stats = iwl3945_mac_get_stats,
7939 .get_tx_stats = iwl3945_mac_get_tx_stats,
7940 .conf_tx = iwl3945_mac_conf_tx,
7941 .get_tsf = iwl3945_mac_get_tsf,
7942 .reset_tsf = iwl3945_mac_reset_tsf,
7943 .beacon_update = iwl3945_mac_beacon_update,
7944 .hw_scan = iwl3945_mac_hw_scan
7945 };
7946
7947 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7948 {
7949 int err = 0;
7950 struct iwl3945_priv *priv;
7951 struct ieee80211_hw *hw;
7952 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
7953 int i;
7954 unsigned long flags;
7955 DECLARE_MAC_BUF(mac);
7956
7957 /* Disabling hardware scan means that mac80211 will perform scans
7958 * "the hard way", rather than using device's scan. */
7959 if (iwl3945_param_disable_hw_scan) {
7960 IWL_DEBUG_INFO("Disabling hw_scan\n");
7961 iwl3945_hw_ops.hw_scan = NULL;
7962 }
7963
7964 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7965 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7966 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7967 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7968 err = -EINVAL;
7969 goto out;
7970 }
7971
7972 /* mac80211 allocates memory for this device instance, including
7973 * space for this driver's private structure */
7974 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
7975 if (hw == NULL) {
7976 IWL_ERROR("Can not allocate network device\n");
7977 err = -ENOMEM;
7978 goto out;
7979 }
7980 SET_IEEE80211_DEV(hw, &pdev->dev);
7981
7982 hw->rate_control_algorithm = "iwl-3945-rs";
7983
7984 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7985 priv = hw->priv;
7986 priv->hw = hw;
7987
7988 priv->pci_dev = pdev;
7989 priv->cfg = cfg;
7990
7991 /* Select antenna (may be helpful if only one antenna is connected) */
7992 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7993 #ifdef CONFIG_IWL3945_DEBUG
7994 iwl3945_debug_level = iwl3945_param_debug;
7995 atomic_set(&priv->restrict_refcnt, 0);
7996 #endif
7997 priv->retry_rate = 1;
7998
7999 priv->ibss_beacon = NULL;
8000
8001 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8002 * the range of signal quality values that we'll provide.
8003 * Negative values for level/noise indicate that we'll provide dBm.
8004 * For WE, at least, non-0 values here *enable* display of values
8005 * in app (iwconfig). */
8006 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8007 hw->max_noise = -20; /* noise level, negative indicates dBm */
8008 hw->max_signal = 100; /* link quality indication (%) */
8009
8010 /* Tell mac80211 our Tx characteristics */
8011 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8012
8013 /* 4 EDCA QOS priorities */
8014 hw->queues = 4;
8015
8016 spin_lock_init(&priv->lock);
8017 spin_lock_init(&priv->power_data.lock);
8018 spin_lock_init(&priv->sta_lock);
8019 spin_lock_init(&priv->hcmd_lock);
8020
8021 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8022 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8023
8024 INIT_LIST_HEAD(&priv->free_frames);
8025
8026 mutex_init(&priv->mutex);
8027 if (pci_enable_device(pdev)) {
8028 err = -ENODEV;
8029 goto out_ieee80211_free_hw;
8030 }
8031
8032 pci_set_master(pdev);
8033
8034 /* Clear the driver's (not device's) station table */
8035 iwl3945_clear_stations_table(priv);
8036
8037 priv->data_retry_limit = -1;
8038 priv->ieee_channels = NULL;
8039 priv->ieee_rates = NULL;
8040 priv->band = IEEE80211_BAND_2GHZ;
8041
8042 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8043 if (!err)
8044 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8045 if (err) {
8046 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8047 goto out_pci_disable_device;
8048 }
8049
8050 pci_set_drvdata(pdev, priv);
8051 err = pci_request_regions(pdev, DRV_NAME);
8052 if (err)
8053 goto out_pci_disable_device;
8054
8055 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8056 * PCI Tx retries from interfering with C3 CPU state */
8057 pci_write_config_byte(pdev, 0x41, 0x00);
8058
8059 priv->hw_base = pci_iomap(pdev, 0, 0);
8060 if (!priv->hw_base) {
8061 err = -ENODEV;
8062 goto out_pci_release_regions;
8063 }
8064
8065 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8066 (unsigned long long) pci_resource_len(pdev, 0));
8067 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8068
8069 /* Initialize module parameter values here */
8070
8071 /* Disable radio (SW RF KILL) via parameter when loading driver */
8072 if (iwl3945_param_disable) {
8073 set_bit(STATUS_RF_KILL_SW, &priv->status);
8074 IWL_DEBUG_INFO("Radio disabled.\n");
8075 }
8076
8077 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8078
8079 printk(KERN_INFO DRV_NAME
8080 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
8081
8082 /* Device-specific setup */
8083 if (iwl3945_hw_set_hw_setting(priv)) {
8084 IWL_ERROR("failed to set hw settings\n");
8085 goto out_iounmap;
8086 }
8087
8088 if (iwl3945_param_qos_enable)
8089 priv->qos_data.qos_enable = 1;
8090
8091 iwl3945_reset_qos(priv);
8092
8093 priv->qos_data.qos_active = 0;
8094 priv->qos_data.qos_cap.val = 0;
8095
8096 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
8097 iwl3945_setup_deferred_work(priv);
8098 iwl3945_setup_rx_handlers(priv);
8099
8100 priv->rates_mask = IWL_RATES_MASK;
8101 /* If power management is turned on, default to AC mode */
8102 priv->power_mode = IWL_POWER_AC;
8103 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8104
8105 spin_lock_irqsave(&priv->lock, flags);
8106 iwl3945_disable_interrupts(priv);
8107 spin_unlock_irqrestore(&priv->lock, flags);
8108
8109 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8110 if (err) {
8111 IWL_ERROR("failed to create sysfs device attributes\n");
8112 goto out_release_irq;
8113 }
8114
8115 /* nic init */
8116 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8117 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8118
8119 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8120 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8121 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8122 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8123 if (err < 0) {
8124 IWL_DEBUG_INFO("Failed to init the card\n");
8125 goto out_remove_sysfs;
8126 }
8127 /* Read the EEPROM */
8128 err = iwl3945_eeprom_init(priv);
8129 if (err) {
8130 IWL_ERROR("Unable to init EEPROM\n");
8131 goto out_remove_sysfs;
8132 }
8133 /* MAC Address location in EEPROM same for 3945/4965 */
8134 get_eeprom_mac(priv, priv->mac_addr);
8135 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8136 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8137
8138 err = iwl3945_init_channel_map(priv);
8139 if (err) {
8140 IWL_ERROR("initializing regulatory failed: %d\n", err);
8141 goto out_remove_sysfs;
8142 }
8143
8144 err = iwl3945_init_geos(priv);
8145 if (err) {
8146 IWL_ERROR("initializing geos failed: %d\n", err);
8147 goto out_free_channel_map;
8148 }
8149
8150 err = ieee80211_register_hw(priv->hw);
8151 if (err) {
8152 IWL_ERROR("Failed to register network device (error %d)\n", err);
8153 goto out_free_geos;
8154 }
8155
8156 priv->hw->conf.beacon_int = 100;
8157 priv->mac80211_registered = 1;
8158 pci_save_state(pdev);
8159 pci_disable_device(pdev);
8160
8161 return 0;
8162
8163 out_free_geos:
8164 iwl3945_free_geos(priv);
8165 out_free_channel_map:
8166 iwl3945_free_channel_map(priv);
8167 out_remove_sysfs:
8168 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8169
8170 out_release_irq:
8171 destroy_workqueue(priv->workqueue);
8172 priv->workqueue = NULL;
8173 iwl3945_unset_hw_setting(priv);
8174
8175 out_iounmap:
8176 pci_iounmap(pdev, priv->hw_base);
8177 out_pci_release_regions:
8178 pci_release_regions(pdev);
8179 out_pci_disable_device:
8180 pci_disable_device(pdev);
8181 pci_set_drvdata(pdev, NULL);
8182 out_ieee80211_free_hw:
8183 ieee80211_free_hw(priv->hw);
8184 out:
8185 return err;
8186 }
8187
8188 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
8189 {
8190 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8191 struct list_head *p, *q;
8192 int i;
8193 unsigned long flags;
8194
8195 if (!priv)
8196 return;
8197
8198 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8199
8200 set_bit(STATUS_EXIT_PENDING, &priv->status);
8201
8202 iwl3945_down(priv);
8203
8204 /* make sure we flush any pending irq or
8205 * tasklet for the driver
8206 */
8207 spin_lock_irqsave(&priv->lock, flags);
8208 iwl3945_disable_interrupts(priv);
8209 spin_unlock_irqrestore(&priv->lock, flags);
8210
8211 iwl_synchronize_irq(priv);
8212
8213 /* Free MAC hash list for ADHOC */
8214 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8215 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8216 list_del(p);
8217 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
8218 }
8219 }
8220
8221 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8222
8223 iwl3945_dealloc_ucode_pci(priv);
8224
8225 if (priv->rxq.bd)
8226 iwl3945_rx_queue_free(priv, &priv->rxq);
8227 iwl3945_hw_txq_ctx_free(priv);
8228
8229 iwl3945_unset_hw_setting(priv);
8230 iwl3945_clear_stations_table(priv);
8231
8232 if (priv->mac80211_registered) {
8233 ieee80211_unregister_hw(priv->hw);
8234 }
8235
8236 /*netif_stop_queue(dev); */
8237 flush_workqueue(priv->workqueue);
8238
8239 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8240 * priv->workqueue... so we can't take down the workqueue
8241 * until now... */
8242 destroy_workqueue(priv->workqueue);
8243 priv->workqueue = NULL;
8244
8245 pci_iounmap(pdev, priv->hw_base);
8246 pci_release_regions(pdev);
8247 pci_disable_device(pdev);
8248 pci_set_drvdata(pdev, NULL);
8249
8250 iwl3945_free_channel_map(priv);
8251 iwl3945_free_geos(priv);
8252
8253 if (priv->ibss_beacon)
8254 dev_kfree_skb(priv->ibss_beacon);
8255
8256 ieee80211_free_hw(priv->hw);
8257 }
8258
8259 #ifdef CONFIG_PM
8260
8261 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8262 {
8263 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8264
8265 if (priv->is_open) {
8266 set_bit(STATUS_IN_SUSPEND, &priv->status);
8267 iwl3945_mac_stop(priv->hw);
8268 priv->is_open = 1;
8269 }
8270
8271 pci_set_power_state(pdev, PCI_D3hot);
8272
8273 return 0;
8274 }
8275
8276 static int iwl3945_pci_resume(struct pci_dev *pdev)
8277 {
8278 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8279
8280 pci_set_power_state(pdev, PCI_D0);
8281
8282 if (priv->is_open)
8283 iwl3945_mac_start(priv->hw);
8284
8285 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8286 return 0;
8287 }
8288
8289 #endif /* CONFIG_PM */
8290
8291 /*****************************************************************************
8292 *
8293 * driver and module entry point
8294 *
8295 *****************************************************************************/
8296
8297 static struct pci_driver iwl3945_driver = {
8298 .name = DRV_NAME,
8299 .id_table = iwl3945_hw_card_ids,
8300 .probe = iwl3945_pci_probe,
8301 .remove = __devexit_p(iwl3945_pci_remove),
8302 #ifdef CONFIG_PM
8303 .suspend = iwl3945_pci_suspend,
8304 .resume = iwl3945_pci_resume,
8305 #endif
8306 };
8307
8308 static int __init iwl3945_init(void)
8309 {
8310
8311 int ret;
8312 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8313 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8314
8315 ret = iwl3945_rate_control_register();
8316 if (ret) {
8317 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8318 return ret;
8319 }
8320
8321 ret = pci_register_driver(&iwl3945_driver);
8322 if (ret) {
8323 IWL_ERROR("Unable to initialize PCI module\n");
8324 goto error_register;
8325 }
8326 #ifdef CONFIG_IWL3945_DEBUG
8327 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8328 if (ret) {
8329 IWL_ERROR("Unable to create driver sysfs file\n");
8330 goto error_debug;
8331 }
8332 #endif
8333
8334 return ret;
8335
8336 #ifdef CONFIG_IWL3945_DEBUG
8337 error_debug:
8338 pci_unregister_driver(&iwl3945_driver);
8339 #endif
8340 error_register:
8341 iwl3945_rate_control_unregister();
8342 return ret;
8343 }
8344
8345 static void __exit iwl3945_exit(void)
8346 {
8347 #ifdef CONFIG_IWL3945_DEBUG
8348 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8349 #endif
8350 pci_unregister_driver(&iwl3945_driver);
8351 iwl3945_rate_control_unregister();
8352 }
8353
8354 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8355 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8356 module_param_named(disable, iwl3945_param_disable, int, 0444);
8357 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8358 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8359 MODULE_PARM_DESC(hwcrypto,
8360 "using hardware crypto engine (default 0 [software])\n");
8361 module_param_named(debug, iwl3945_param_debug, int, 0444);
8362 MODULE_PARM_DESC(debug, "debug output mask");
8363 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8364 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8365
8366 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8367 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8368
8369 /* QoS */
8370 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8371 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8372
8373 module_exit(iwl3945_exit);
8374 module_init(iwl3945_init);
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