2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
23 #include <linux/module.h>
24 #include <linux/errno.h>
25 #include <linux/timer.h>
26 #include <linux/interrupt.h>
27 #include <linux/tty.h>
28 #include <linux/tty_flip.h>
29 #include <linux/serial.h>
30 #include <linux/major.h>
31 #include <linux/string.h>
32 #include <linux/sysrq.h>
33 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/delay.h>
37 #include <linux/console.h>
38 #include <linux/platform_device.h>
40 #ifdef CONFIG_CPU_FREQ
41 #include <linux/notifier.h>
42 #include <linux/cpufreq.h>
45 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
46 #include <asm/clock.h>
47 #include <asm/sh_bios.h>
53 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
60 struct uart_port port
;
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs
[SCIx_NR_IRQS
];
68 /* Port pin configuration */
69 void (*init_pins
)(struct uart_port
*port
,
72 /* Port enable callback */
73 void (*enable
)(struct uart_port
*port
);
75 /* Port disable callback */
76 void (*disable
)(struct uart_port
*port
);
79 struct timer_list break_timer
;
84 static struct sci_port
*kgdb_sci_port
;
87 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
88 static struct sci_port
*serial_console_port
;
91 /* Function prototypes */
92 static void sci_stop_tx(struct uart_port
*port
);
94 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
96 static struct sci_port sci_ports
[SCI_NPORTS
];
97 static struct uart_driver sci_uart_driver
;
99 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
100 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
101 static inline void handle_error(struct uart_port
*port
)
103 /* Clear error flags */
104 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
107 static int get_char(struct uart_port
*port
)
110 unsigned short status
;
113 spin_lock_irqsave(&port
->lock
, flags
);
115 status
= sci_in(port
, SCxSR
);
116 if (status
& SCxSR_ERRORS(port
)) {
120 } while (!(status
& SCxSR_RDxF(port
)));
121 c
= sci_in(port
, SCxRDR
);
122 sci_in(port
, SCxSR
); /* Dummy read */
123 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
124 spin_unlock_irqrestore(&port
->lock
, flags
);
128 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
130 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
131 static void put_char(struct uart_port
*port
, char c
)
134 unsigned short status
;
136 spin_lock_irqsave(&port
->lock
, flags
);
139 status
= sci_in(port
, SCxSR
);
140 } while (!(status
& SCxSR_TDxE(port
)));
142 sci_out(port
, SCxTDR
, c
);
143 sci_in(port
, SCxSR
); /* Dummy read */
144 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
146 spin_unlock_irqrestore(&port
->lock
, flags
);
150 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
151 static void put_string(struct sci_port
*sci_port
, const char *buffer
, int count
)
153 struct uart_port
*port
= &sci_port
->port
;
154 const unsigned char *p
= buffer
;
157 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
161 #ifdef CONFIG_SH_STANDARD_BIOS
162 /* This call only does a trap the first time it is
163 * called, and so is safe to do here unconditionally
165 usegdb
|= sh_bios_in_gdb_mode();
167 #ifdef CONFIG_SH_KGDB
168 usegdb
|= (kgdb_in_gdb_mode
&& (port
== kgdb_sci_port
));
172 /* $<packet info>#<checksum>. */
176 put_char(port
, 'O'); /* 'O'utput to console */
179 for (i
=0; i
<count
; i
++) { /* Don't use run length encoding */
190 put_char(port
, highhex(checksum
));
191 put_char(port
, lowhex(checksum
));
192 } while (get_char(port
) != '+');
194 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
195 for (i
=0; i
<count
; i
++) {
197 put_char(port
, '\r');
198 put_char(port
, *p
++);
201 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
203 #ifdef CONFIG_SH_KGDB
204 static int kgdb_sci_getchar(void)
208 /* Keep trying to read a character, this could be neater */
209 while ((c
= get_char(kgdb_sci_port
)) < 0)
215 static inline void kgdb_sci_putchar(int c
)
217 put_char(kgdb_sci_port
, c
);
219 #endif /* CONFIG_SH_KGDB */
221 #if defined(__H8300S__)
222 enum { sci_disable
, sci_enable
};
224 static void h8300_sci_config(struct uart_port
* port
, unsigned int ctrl
)
226 volatile unsigned char *mstpcrl
=(volatile unsigned char *)MSTPCRL
;
227 int ch
= (port
->mapbase
- SMR0
) >> 3;
228 unsigned char mask
= 1 << (ch
+1);
230 if (ctrl
== sci_disable
) {
237 static inline void h8300_sci_enable(struct uart_port
*port
)
239 h8300_sci_config(port
, sci_enable
);
242 static inline void h8300_sci_disable(struct uart_port
*port
)
244 h8300_sci_config(port
, sci_disable
);
248 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
249 defined(__H8300H__) || defined(__H8300S__)
250 static void sci_init_pins_sci(struct uart_port
* port
, unsigned int cflag
)
252 int ch
= (port
->mapbase
- SMR0
) >> 3;
255 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
256 h8300_sci_pins
[ch
].rx
,
258 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
259 h8300_sci_pins
[ch
].tx
,
263 H8300_SCI_DR(ch
) |= h8300_sci_pins
[ch
].tx
;
266 #define sci_init_pins_sci NULL
269 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
270 static void sci_init_pins_irda(struct uart_port
*port
, unsigned int cflag
)
272 unsigned int fcr_val
= 0;
275 fcr_val
|= SCFCR_MCE
;
277 sci_out(port
, SCFCR
, fcr_val
);
280 #define sci_init_pins_irda NULL
284 #define sci_init_pins_scif NULL
287 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
288 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
289 /* SH7300 doesn't use RTS/CTS */
290 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
292 sci_out(port
, SCFCR
, 0);
294 #elif defined(CONFIG_CPU_SH3)
295 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
296 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
298 unsigned int fcr_val
= 0;
301 /* We need to set SCPCR to enable RTS/CTS */
302 data
= ctrl_inw(SCPCR
);
303 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
304 ctrl_outw(data
& 0x0fcf, SCPCR
);
307 fcr_val
|= SCFCR_MCE
;
309 /* We need to set SCPCR to enable RTS/CTS */
310 data
= ctrl_inw(SCPCR
);
311 /* Clear out SCP7MD1,0, SCP4MD1,0,
312 Set SCP6MD1,0 = {01} (output) */
313 ctrl_outw((data
& 0x0fcf) | 0x1000, SCPCR
);
315 data
= ctrl_inb(SCPDR
);
316 /* Set /RTS2 (bit6) = 0 */
317 ctrl_outb(data
& 0xbf, SCPDR
);
320 sci_out(port
, SCFCR
, fcr_val
);
324 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
326 unsigned int fcr_val
= 0;
328 if (cflag
& CRTSCTS
) {
329 fcr_val
|= SCFCR_MCE
;
331 #ifdef CONFIG_CPU_SUBTYPE_SH7343
333 #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
334 ctrl_outw(0x0080, SCSPTR0
); /* Set RTS = 1 */
336 ctrl_outw(0x0080, SCSPTR2
); /* Set RTS = 1 */
339 sci_out(port
, SCFCR
, fcr_val
);
343 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
344 static inline int scif_txroom(struct uart_port
*port
)
346 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0x7f);
349 static inline int scif_rxroom(struct uart_port
*port
)
351 return sci_in(port
, SCRFDR
) & 0x7f;
354 static inline int scif_txroom(struct uart_port
*port
)
356 return SCIF_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
359 static inline int scif_rxroom(struct uart_port
*port
)
361 return sci_in(port
, SCFDR
) & SCIF_RFDC_MASK
;
364 #endif /* SCIF_ONLY || SCI_AND_SCIF */
366 static inline int sci_txroom(struct uart_port
*port
)
368 return ((sci_in(port
, SCxSR
) & SCI_TDRE
) != 0);
371 static inline int sci_rxroom(struct uart_port
*port
)
373 return ((sci_in(port
, SCxSR
) & SCxSR_RDxF(port
)) != 0);
376 /* ********************************************************************** *
377 * the interrupt related routines *
378 * ********************************************************************** */
380 static void sci_transmit_chars(struct uart_port
*port
)
382 struct circ_buf
*xmit
= &port
->info
->xmit
;
383 unsigned int stopped
= uart_tx_stopped(port
);
384 unsigned short status
;
388 status
= sci_in(port
, SCxSR
);
389 if (!(status
& SCxSR_TDxE(port
))) {
390 ctrl
= sci_in(port
, SCSCR
);
391 if (uart_circ_empty(xmit
)) {
392 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
394 ctrl
|= SCI_CTRL_FLAGS_TIE
;
396 sci_out(port
, SCSCR
, ctrl
);
401 if (port
->type
== PORT_SCIF
)
402 count
= scif_txroom(port
);
405 count
= sci_txroom(port
);
413 } else if (!uart_circ_empty(xmit
) && !stopped
) {
414 c
= xmit
->buf
[xmit
->tail
];
415 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
420 sci_out(port
, SCxTDR
, c
);
423 } while (--count
> 0);
425 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
427 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
428 uart_write_wakeup(port
);
429 if (uart_circ_empty(xmit
)) {
432 ctrl
= sci_in(port
, SCSCR
);
434 #if !defined(SCI_ONLY)
435 if (port
->type
== PORT_SCIF
) {
436 sci_in(port
, SCxSR
); /* Dummy read */
437 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
441 ctrl
|= SCI_CTRL_FLAGS_TIE
;
442 sci_out(port
, SCSCR
, ctrl
);
446 /* On SH3, SCIF may read end-of-break as a space->mark char */
447 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
449 static inline void sci_receive_chars(struct uart_port
*port
)
451 struct sci_port
*sci_port
= (struct sci_port
*)port
;
452 struct tty_struct
*tty
= port
->info
->tty
;
453 int i
, count
, copied
= 0;
454 unsigned short status
;
457 status
= sci_in(port
, SCxSR
);
458 if (!(status
& SCxSR_RDxF(port
)))
462 #if !defined(SCI_ONLY)
463 if (port
->type
== PORT_SCIF
)
464 count
= scif_rxroom(port
);
467 count
= sci_rxroom(port
);
469 /* Don't copy more bytes than there is room for in the buffer */
470 count
= tty_buffer_request_room(tty
, count
);
472 /* If for any reason we can't copy more data, we're done! */
476 if (port
->type
== PORT_SCI
) {
477 char c
= sci_in(port
, SCxRDR
);
478 if (uart_handle_sysrq_char(port
, c
) || sci_port
->break_flag
)
481 tty_insert_flip_char(tty
, c
, TTY_NORMAL
);
484 for (i
=0; i
<count
; i
++) {
485 char c
= sci_in(port
, SCxRDR
);
486 status
= sci_in(port
, SCxSR
);
487 #if defined(CONFIG_CPU_SH3)
488 /* Skip "chars" during break */
489 if (sci_port
->break_flag
) {
491 (status
& SCxSR_FER(port
))) {
496 /* Nonzero => end-of-break */
497 pr_debug("scif: debounce<%02x>\n", c
);
498 sci_port
->break_flag
= 0;
505 #endif /* CONFIG_CPU_SH3 */
506 if (uart_handle_sysrq_char(port
, c
)) {
511 /* Store data and status */
512 if (status
&SCxSR_FER(port
)) {
514 pr_debug("sci: frame error\n");
515 } else if (status
&SCxSR_PER(port
)) {
517 pr_debug("sci: parity error\n");
520 tty_insert_flip_char(tty
, c
, flag
);
524 sci_in(port
, SCxSR
); /* dummy read */
525 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
528 port
->icount
.rx
+= count
;
532 /* Tell the rest of the system the news. New characters! */
533 tty_flip_buffer_push(tty
);
535 sci_in(port
, SCxSR
); /* dummy read */
536 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
540 #define SCI_BREAK_JIFFIES (HZ/20)
541 /* The sci generates interrupts during the break,
542 * 1 per millisecond or so during the break period, for 9600 baud.
543 * So dont bother disabling interrupts.
544 * But dont want more than 1 break event.
545 * Use a kernel timer to periodically poll the rx line until
546 * the break is finished.
548 static void sci_schedule_break_timer(struct sci_port
*port
)
550 port
->break_timer
.expires
= jiffies
+ SCI_BREAK_JIFFIES
;
551 add_timer(&port
->break_timer
);
553 /* Ensure that two consecutive samples find the break over. */
554 static void sci_break_timer(unsigned long data
)
556 struct sci_port
*port
= (struct sci_port
*)data
;
558 if (sci_rxd_in(&port
->port
) == 0) {
559 port
->break_flag
= 1;
560 sci_schedule_break_timer(port
);
561 } else if (port
->break_flag
== 1) {
563 port
->break_flag
= 2;
564 sci_schedule_break_timer(port
);
566 port
->break_flag
= 0;
569 static inline int sci_handle_errors(struct uart_port
*port
)
572 unsigned short status
= sci_in(port
, SCxSR
);
573 struct tty_struct
*tty
= port
->info
->tty
;
575 if (status
& SCxSR_ORER(port
)) {
577 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
))
579 pr_debug("sci: overrun error\n");
582 if (status
& SCxSR_FER(port
)) {
583 if (sci_rxd_in(port
) == 0) {
584 /* Notify of BREAK */
585 struct sci_port
*sci_port
= (struct sci_port
*)port
;
587 if (!sci_port
->break_flag
) {
588 sci_port
->break_flag
= 1;
589 sci_schedule_break_timer(sci_port
);
591 /* Do sysrq handling. */
592 if (uart_handle_break(port
))
594 pr_debug("sci: BREAK detected\n");
595 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
600 if (tty_insert_flip_char(tty
, 0, TTY_FRAME
))
602 pr_debug("sci: frame error\n");
606 if (status
& SCxSR_PER(port
)) {
608 if (tty_insert_flip_char(tty
, 0, TTY_PARITY
))
610 pr_debug("sci: parity error\n");
614 tty_flip_buffer_push(tty
);
619 static inline int sci_handle_breaks(struct uart_port
*port
)
622 unsigned short status
= sci_in(port
, SCxSR
);
623 struct tty_struct
*tty
= port
->info
->tty
;
624 struct sci_port
*s
= &sci_ports
[port
->line
];
626 if (!s
->break_flag
&& status
& SCxSR_BRK(port
)) {
627 #if defined(CONFIG_CPU_SH3)
631 /* Notify of BREAK */
632 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
634 pr_debug("sci: BREAK detected\n");
637 #if defined(SCIF_ORER)
638 /* XXX: Handle SCIF overrun error */
639 if (port
->type
== PORT_SCIF
&& (sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
640 sci_out(port
, SCLSR
, 0);
641 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
)) {
643 pr_debug("sci: overrun error\n");
649 tty_flip_buffer_push(tty
);
654 static irqreturn_t
sci_rx_interrupt(int irq
, void *port
)
656 /* I think sci_receive_chars has to be called irrespective
657 * of whether the I_IXOFF is set, otherwise, how is the interrupt
660 sci_receive_chars(port
);
665 static irqreturn_t
sci_tx_interrupt(int irq
, void *ptr
)
667 struct uart_port
*port
= ptr
;
669 spin_lock_irq(&port
->lock
);
670 sci_transmit_chars(port
);
671 spin_unlock_irq(&port
->lock
);
676 static irqreturn_t
sci_er_interrupt(int irq
, void *ptr
)
678 struct uart_port
*port
= ptr
;
681 if (port
->type
== PORT_SCI
) {
682 if (sci_handle_errors(port
)) {
683 /* discard character in rx buffer */
685 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
688 #if defined(SCIF_ORER)
689 if((sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
690 struct tty_struct
*tty
= port
->info
->tty
;
692 sci_out(port
, SCLSR
, 0);
693 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
694 tty_flip_buffer_push(tty
);
695 pr_debug("scif: overrun error\n");
698 sci_rx_interrupt(irq
, ptr
);
701 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
703 /* Kick the transmission */
704 sci_tx_interrupt(irq
, ptr
);
709 static irqreturn_t
sci_br_interrupt(int irq
, void *ptr
)
711 struct uart_port
*port
= ptr
;
714 sci_handle_breaks(port
);
716 #ifdef CONFIG_SH_KGDB
717 /* Break into the debugger if a break is detected */
721 sci_out(port
, SCxSR
, SCxSR_BREAK_CLEAR(port
));
726 static irqreturn_t
sci_mpxed_interrupt(int irq
, void *ptr
)
728 unsigned short ssr_status
, scr_status
;
729 struct uart_port
*port
= ptr
;
731 ssr_status
= sci_in(port
,SCxSR
);
732 scr_status
= sci_in(port
,SCSCR
);
735 if ((ssr_status
& 0x0020) && (scr_status
& 0x0080))
736 sci_tx_interrupt(irq
, ptr
);
738 if ((ssr_status
& 0x0002) && (scr_status
& 0x0040))
739 sci_rx_interrupt(irq
, ptr
);
740 /* Error Interrupt */
741 if ((ssr_status
& 0x0080) && (scr_status
& 0x0400))
742 sci_er_interrupt(irq
, ptr
);
743 /* Break Interrupt */
744 if ((ssr_status
& 0x0010) && (scr_status
& 0x0200))
745 sci_br_interrupt(irq
, ptr
);
750 #ifdef CONFIG_CPU_FREQ
752 * Here we define a transistion notifier so that we can update all of our
753 * ports' baud rate when the peripheral clock changes.
755 static int sci_notifier(struct notifier_block
*self
,
756 unsigned long phase
, void *p
)
758 struct cpufreq_freqs
*freqs
= p
;
761 if ((phase
== CPUFREQ_POSTCHANGE
) ||
762 (phase
== CPUFREQ_RESUMECHANGE
)){
763 for (i
= 0; i
< SCI_NPORTS
; i
++) {
764 struct uart_port
*port
= &sci_ports
[i
].port
;
768 * Update the uartclk per-port if frequency has
769 * changed, since it will no longer necessarily be
770 * consistent with the old frequency.
772 * Really we want to be able to do something like
773 * uart_change_speed() or something along those lines
774 * here to implicitly reset the per-port baud rate..
776 * Clean this up later..
778 clk
= clk_get(NULL
, "module_clk");
779 port
->uartclk
= clk_get_rate(clk
) * 16;
783 printk(KERN_INFO
"%s: got a postchange notification "
784 "for cpu %d (old %d, new %d)\n",
785 __FUNCTION__
, freqs
->cpu
, freqs
->old
, freqs
->new);
791 static struct notifier_block sci_nb
= { &sci_notifier
, NULL
, 0 };
792 #endif /* CONFIG_CPU_FREQ */
794 static int sci_request_irq(struct sci_port
*port
)
797 irqreturn_t (*handlers
[4])(int irq
, void *ptr
) = {
798 sci_er_interrupt
, sci_rx_interrupt
, sci_tx_interrupt
,
801 const char *desc
[] = { "SCI Receive Error", "SCI Receive Data Full",
802 "SCI Transmit Data Empty", "SCI Break" };
804 if (port
->irqs
[0] == port
->irqs
[1]) {
805 if (!port
->irqs
[0]) {
806 printk(KERN_ERR
"sci: Cannot allocate irq.(IRQ=0)\n");
810 if (request_irq(port
->irqs
[0], sci_mpxed_interrupt
,
811 IRQF_DISABLED
, "sci", port
)) {
812 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
816 for (i
= 0; i
< ARRAY_SIZE(handlers
); i
++) {
819 if (request_irq(port
->irqs
[i
], handlers
[i
],
820 IRQF_DISABLED
, desc
[i
], port
)) {
821 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
830 static void sci_free_irq(struct sci_port
*port
)
834 if (port
->irqs
[0] == port
->irqs
[1]) {
836 printk("sci: sci_free_irq error\n");
838 free_irq(port
->irqs
[0], port
);
840 for (i
= 0; i
< ARRAY_SIZE(port
->irqs
); i
++) {
844 free_irq(port
->irqs
[i
], port
);
849 static unsigned int sci_tx_empty(struct uart_port
*port
)
855 static void sci_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
857 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
858 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
859 /* If you have signals for DTR and DCD, please implement here. */
862 static unsigned int sci_get_mctrl(struct uart_port
*port
)
864 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
867 return TIOCM_DTR
| TIOCM_RTS
| TIOCM_DSR
;
870 static void sci_start_tx(struct uart_port
*port
)
874 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
875 ctrl
= sci_in(port
, SCSCR
);
876 ctrl
|= SCI_CTRL_FLAGS_TIE
;
877 sci_out(port
, SCSCR
, ctrl
);
880 static void sci_stop_tx(struct uart_port
*port
)
884 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
885 ctrl
= sci_in(port
, SCSCR
);
886 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
887 sci_out(port
, SCSCR
, ctrl
);
890 static void sci_start_rx(struct uart_port
*port
, unsigned int tty_start
)
894 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
895 ctrl
= sci_in(port
, SCSCR
);
896 ctrl
|= SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
;
897 sci_out(port
, SCSCR
, ctrl
);
900 static void sci_stop_rx(struct uart_port
*port
)
904 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
905 ctrl
= sci_in(port
, SCSCR
);
906 ctrl
&= ~(SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
);
907 sci_out(port
, SCSCR
, ctrl
);
910 static void sci_enable_ms(struct uart_port
*port
)
912 /* Nothing here yet .. */
915 static void sci_break_ctl(struct uart_port
*port
, int break_state
)
917 /* Nothing here yet .. */
920 static int sci_startup(struct uart_port
*port
)
922 struct sci_port
*s
= &sci_ports
[port
->line
];
929 sci_start_rx(port
, 1);
934 static void sci_shutdown(struct uart_port
*port
)
936 struct sci_port
*s
= &sci_ports
[port
->line
];
946 static void sci_set_termios(struct uart_port
*port
, struct termios
*termios
,
949 struct sci_port
*s
= &sci_ports
[port
->line
];
950 unsigned int status
, baud
, smr_val
;
954 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
962 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
963 struct clk
*clk
= clk_get(NULL
, "module_clk");
964 t
= SCBRR_VALUE(baud
, clk_get_rate(clk
));
967 t
= SCBRR_VALUE(baud
);
973 spin_lock_irqsave(&port
->lock
, flags
);
976 status
= sci_in(port
, SCxSR
);
977 } while (!(status
& SCxSR_TEND(port
)));
979 sci_out(port
, SCSCR
, 0x00); /* TE=0, RE=0, CKE1=0 */
981 #if !defined(SCI_ONLY)
982 if (port
->type
== PORT_SCIF
)
983 sci_out(port
, SCFCR
, SCFCR_RFRST
| SCFCR_TFRST
);
986 smr_val
= sci_in(port
, SCSMR
) & 3;
987 if ((termios
->c_cflag
& CSIZE
) == CS7
)
989 if (termios
->c_cflag
& PARENB
)
991 if (termios
->c_cflag
& PARODD
)
993 if (termios
->c_cflag
& CSTOPB
)
996 uart_update_timeout(port
, termios
->c_cflag
, baud
);
998 sci_out(port
, SCSMR
, smr_val
);
1002 sci_out(port
, SCSMR
, (sci_in(port
, SCSMR
) & ~3) | 1);
1005 sci_out(port
, SCSMR
, sci_in(port
, SCSMR
) & ~3);
1007 sci_out(port
, SCBRR
, t
);
1008 udelay((1000000+(baud
-1)) / baud
); /* Wait one bit interval */
1011 if (likely(s
->init_pins
))
1012 s
->init_pins(port
, termios
->c_cflag
);
1014 sci_out(port
, SCSCR
, SCSCR_INIT(port
));
1016 if ((termios
->c_cflag
& CREAD
) != 0)
1017 sci_start_rx(port
,0);
1019 spin_unlock_irqrestore(&port
->lock
, flags
);
1022 static const char *sci_type(struct uart_port
*port
)
1024 switch (port
->type
) {
1025 case PORT_SCI
: return "sci";
1026 case PORT_SCIF
: return "scif";
1027 case PORT_IRDA
: return "irda";
1033 static void sci_release_port(struct uart_port
*port
)
1035 /* Nothing here yet .. */
1038 static int sci_request_port(struct uart_port
*port
)
1040 /* Nothing here yet .. */
1044 static void sci_config_port(struct uart_port
*port
, int flags
)
1046 struct sci_port
*s
= &sci_ports
[port
->line
];
1048 port
->type
= s
->type
;
1050 switch (port
->type
) {
1052 s
->init_pins
= sci_init_pins_sci
;
1055 s
->init_pins
= sci_init_pins_scif
;
1058 s
->init_pins
= sci_init_pins_irda
;
1062 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1063 if (port
->mapbase
== 0)
1064 port
->mapbase
= onchip_remap(SCIF_ADDR_SH5
, 1024, "SCIF");
1066 port
->membase
= (void __iomem
*)port
->mapbase
;
1070 static int sci_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1072 struct sci_port
*s
= &sci_ports
[port
->line
];
1074 if (ser
->irq
!= s
->irqs
[SCIx_TXI_IRQ
] || ser
->irq
> NR_IRQS
)
1076 if (ser
->baud_base
< 2400)
1077 /* No paper tape reader for Mitch.. */
1083 static struct uart_ops sci_uart_ops
= {
1084 .tx_empty
= sci_tx_empty
,
1085 .set_mctrl
= sci_set_mctrl
,
1086 .get_mctrl
= sci_get_mctrl
,
1087 .start_tx
= sci_start_tx
,
1088 .stop_tx
= sci_stop_tx
,
1089 .stop_rx
= sci_stop_rx
,
1090 .enable_ms
= sci_enable_ms
,
1091 .break_ctl
= sci_break_ctl
,
1092 .startup
= sci_startup
,
1093 .shutdown
= sci_shutdown
,
1094 .set_termios
= sci_set_termios
,
1096 .release_port
= sci_release_port
,
1097 .request_port
= sci_request_port
,
1098 .config_port
= sci_config_port
,
1099 .verify_port
= sci_verify_port
,
1102 static void __init
sci_init_ports(void)
1104 static int first
= 1;
1112 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1113 sci_ports
[i
].port
.ops
= &sci_uart_ops
;
1114 sci_ports
[i
].port
.iotype
= UPIO_MEM
;
1115 sci_ports
[i
].port
.line
= i
;
1116 sci_ports
[i
].port
.fifosize
= 1;
1118 #if defined(__H8300H__) || defined(__H8300S__)
1120 sci_ports
[i
].enable
= h8300_sci_enable
;
1121 sci_ports
[i
].disable
= h8300_sci_disable
;
1123 sci_ports
[i
].port
.uartclk
= CONFIG_CPU_CLOCK
;
1124 #elif defined(CONFIG_SUPERH64)
1125 sci_ports
[i
].port
.uartclk
= current_cpu_data
.module_clock
* 16;
1128 * XXX: We should use a proper SCI/SCIF clock
1131 struct clk
*clk
= clk_get(NULL
, "module_clk");
1132 sci_ports
[i
].port
.uartclk
= clk_get_rate(clk
) * 16;
1137 sci_ports
[i
].break_timer
.data
= (unsigned long)&sci_ports
[i
];
1138 sci_ports
[i
].break_timer
.function
= sci_break_timer
;
1140 init_timer(&sci_ports
[i
].break_timer
);
1144 int __init
early_sci_setup(struct uart_port
*port
)
1146 if (unlikely(port
->line
> SCI_NPORTS
))
1151 sci_ports
[port
->line
].port
.membase
= port
->membase
;
1152 sci_ports
[port
->line
].port
.mapbase
= port
->mapbase
;
1153 sci_ports
[port
->line
].port
.type
= port
->type
;
1158 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1160 * Print a string to the serial port trying not to disturb
1161 * any possible real use of the port...
1163 static void serial_console_write(struct console
*co
, const char *s
,
1166 put_string(serial_console_port
, s
, count
);
1169 static int __init
serial_console_setup(struct console
*co
, char *options
)
1171 struct uart_port
*port
;
1179 * Check whether an invalid uart number has been specified, and
1180 * if so, search for the first available port that does have
1183 if (co
->index
>= SCI_NPORTS
)
1186 serial_console_port
= &sci_ports
[co
->index
];
1187 port
= &serial_console_port
->port
;
1190 * Also need to check port->type, we don't actually have any
1191 * UPIO_PORT ports, but uart_report_port() handily misreports
1192 * it anyways if we don't have a port available by the time this is
1197 if (!port
->membase
|| !port
->mapbase
)
1200 spin_lock_init(&port
->lock
);
1202 port
->type
= serial_console_port
->type
;
1204 if (port
->flags
& UPF_IOREMAP
)
1205 sci_config_port(port
, 0);
1207 if (serial_console_port
->enable
)
1208 serial_console_port
->enable(port
);
1211 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1213 ret
= uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1214 #if defined(__H8300H__) || defined(__H8300S__)
1215 /* disable rx interrupt */
1222 static struct console serial_console
= {
1224 .device
= uart_console_device
,
1225 .write
= serial_console_write
,
1226 .setup
= serial_console_setup
,
1227 .flags
= CON_PRINTBUFFER
,
1229 .data
= &sci_uart_driver
,
1232 static int __init
sci_console_init(void)
1235 register_console(&serial_console
);
1238 console_initcall(sci_console_init
);
1239 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1241 #ifdef CONFIG_SH_KGDB
1243 * FIXME: Most of this can go away.. at the moment, we rely on
1244 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1245 * most of that can easily be done here instead.
1247 * For the time being, just accept the values that were parsed earlier..
1249 static void __init
kgdb_console_get_options(struct uart_port
*port
, int *baud
,
1250 int *parity
, int *bits
)
1253 *parity
= tolower(kgdb_parity
);
1254 *bits
= kgdb_bits
- '0';
1258 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1259 * care of the early-on initialization for kgdb, regardless of whether we
1260 * actually use kgdb as a console or not.
1262 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1264 int __init
kgdb_console_setup(struct console
*co
, char *options
)
1266 struct uart_port
*port
= &sci_ports
[kgdb_portnum
].port
;
1272 spin_lock_init(&port
->lock
);
1274 if (co
->index
!= kgdb_portnum
)
1275 co
->index
= kgdb_portnum
;
1278 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1280 kgdb_console_get_options(port
, &baud
, &parity
, &bits
);
1282 kgdb_getchar
= kgdb_sci_getchar
;
1283 kgdb_putchar
= kgdb_sci_putchar
;
1285 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1287 #endif /* CONFIG_SH_KGDB */
1289 #ifdef CONFIG_SH_KGDB_CONSOLE
1290 static struct console kgdb_console
= {
1292 .write
= kgdb_console_write
,
1293 .setup
= kgdb_console_setup
,
1294 .flags
= CON_PRINTBUFFER
| CON_ENABLED
,
1296 .data
= &sci_uart_driver
,
1299 /* Register the KGDB console so we get messages (d'oh!) */
1300 static int __init
kgdb_console_init(void)
1303 register_console(&kgdb_console
);
1306 console_initcall(kgdb_console_init
);
1307 #endif /* CONFIG_SH_KGDB_CONSOLE */
1309 #if defined(CONFIG_SH_KGDB_CONSOLE)
1310 #define SCI_CONSOLE &kgdb_console
1311 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1312 #define SCI_CONSOLE &serial_console
1314 #define SCI_CONSOLE 0
1317 static char banner
[] __initdata
=
1318 KERN_INFO
"SuperH SCI(F) driver initialized\n";
1320 static struct uart_driver sci_uart_driver
= {
1321 .owner
= THIS_MODULE
,
1322 .driver_name
= "sci",
1323 .dev_name
= "ttySC",
1325 .minor
= SCI_MINOR_START
,
1327 .cons
= SCI_CONSOLE
,
1331 * Register a set of serial devices attached to a platform device. The
1332 * list is terminated with a zero flags entry, which means we expect
1333 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1334 * remapping (such as sh64) should also set UPF_IOREMAP.
1336 static int __devinit
sci_probe(struct platform_device
*dev
)
1338 struct plat_sci_port
*p
= dev
->dev
.platform_data
;
1341 for (i
= 0; p
&& p
->flags
!= 0 && i
< SCI_NPORTS
; p
++, i
++) {
1342 struct sci_port
*sciport
= &sci_ports
[i
];
1344 sciport
->port
.mapbase
= p
->mapbase
;
1347 * For the simple (and majority of) cases where we don't need
1348 * to do any remapping, just cast the cookie directly.
1350 if (p
->mapbase
&& !p
->membase
&& !(p
->flags
& UPF_IOREMAP
))
1351 p
->membase
= (void __iomem
*)p
->mapbase
;
1353 sciport
->port
.membase
= p
->membase
;
1355 sciport
->port
.irq
= p
->irqs
[SCIx_TXI_IRQ
];
1356 sciport
->port
.flags
= p
->flags
;
1357 sciport
->port
.dev
= &dev
->dev
;
1359 sciport
->type
= sciport
->port
.type
= p
->type
;
1361 memcpy(&sciport
->irqs
, &p
->irqs
, sizeof(p
->irqs
));
1363 uart_add_one_port(&sci_uart_driver
, &sciport
->port
);
1366 #ifdef CONFIG_CPU_FREQ
1367 cpufreq_register_notifier(&sci_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1368 dev_info(&dev
->dev
, "sci: CPU frequency notifier registered\n");
1371 #ifdef CONFIG_SH_STANDARD_BIOS
1372 sh_bios_gdb_detach();
1378 static int __devexit
sci_remove(struct platform_device
*dev
)
1382 for (i
= 0; i
< SCI_NPORTS
; i
++)
1383 uart_remove_one_port(&sci_uart_driver
, &sci_ports
[i
].port
);
1388 static int sci_suspend(struct platform_device
*dev
, pm_message_t state
)
1392 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1393 struct sci_port
*p
= &sci_ports
[i
];
1395 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1396 uart_suspend_port(&sci_uart_driver
, &p
->port
);
1402 static int sci_resume(struct platform_device
*dev
)
1406 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1407 struct sci_port
*p
= &sci_ports
[i
];
1409 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1410 uart_resume_port(&sci_uart_driver
, &p
->port
);
1416 static struct platform_driver sci_driver
= {
1418 .remove
= __devexit_p(sci_remove
),
1419 .suspend
= sci_suspend
,
1420 .resume
= sci_resume
,
1423 .owner
= THIS_MODULE
,
1427 static int __init
sci_init(void)
1435 ret
= uart_register_driver(&sci_uart_driver
);
1436 if (likely(ret
== 0)) {
1437 ret
= platform_driver_register(&sci_driver
);
1439 uart_unregister_driver(&sci_uart_driver
);
1445 static void __exit
sci_exit(void)
1447 platform_driver_unregister(&sci_driver
);
1448 uart_unregister_driver(&sci_uart_driver
);
1451 module_init(sci_init
);
1452 module_exit(sci_exit
);
1454 MODULE_LICENSE("GPL");