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[PATCH] sched: new sched domain for representing multi-core
[linux-2.6/verdex.git] / arch / i386 / kernel / cpu / intel_cacheinfo.c
blob7e7fd4e67dd0613dcf0322c3a77a37e9ed1eba57
1 /*
2 * Routines to indentify caches on Intel CPU.
3 *
4 * Changes:
5 * Venkatesh Pallipadi : Adding cache identification through cpuid(4)
6 * Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
7 */
8
9 #include <linux/init.h>
10 #include <linux/slab.h>
11 #include <linux/device.h>
12 #include <linux/compiler.h>
13 #include <linux/cpu.h>
14 #include <linux/sched.h>
15
16 #include <asm/processor.h>
17 #include <asm/smp.h>
18
19 #define LVL_1_INST 1
20 #define LVL_1_DATA 2
21 #define LVL_2 3
22 #define LVL_3 4
23 #define LVL_TRACE 5
24
25 struct _cache_table
26 {
27 unsigned char descriptor;
28 char cache_type;
29 short size;
30 };
31
32 /* all the cache descriptor types we care about (no TLB or trace cache entries) */
33 static struct _cache_table cache_table[] __cpuinitdata =
34 {
35 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
36 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
37 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
38 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
39 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
40 { 0x23, LVL_3, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */
41 { 0x25, LVL_3, 2048 }, /* 8-way set assoc, sectored cache, 64 byte line size */
42 { 0x29, LVL_3, 4096 }, /* 8-way set assoc, sectored cache, 64 byte line size */
43 { 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */
44 { 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */
45 { 0x39, LVL_2, 128 }, /* 4-way set assoc, sectored cache, 64 byte line size */
46 { 0x3a, LVL_2, 192 }, /* 6-way set assoc, sectored cache, 64 byte line size */
47 { 0x3b, LVL_2, 128 }, /* 2-way set assoc, sectored cache, 64 byte line size */
48 { 0x3c, LVL_2, 256 }, /* 4-way set assoc, sectored cache, 64 byte line size */
49 { 0x3d, LVL_2, 384 }, /* 6-way set assoc, sectored cache, 64 byte line size */
50 { 0x3e, LVL_2, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
51 { 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */
52 { 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */
53 { 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */
54 { 0x44, LVL_2, 1024 }, /* 4-way set assoc, 32 byte line size */
55 { 0x45, LVL_2, 2048 }, /* 4-way set assoc, 32 byte line size */
56 { 0x46, LVL_3, 4096 }, /* 4-way set assoc, 64 byte line size */
57 { 0x47, LVL_3, 8192 }, /* 8-way set assoc, 64 byte line size */
58 { 0x49, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
59 { 0x4a, LVL_3, 6144 }, /* 12-way set assoc, 64 byte line size */
60 { 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
61 { 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */
62 { 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */
63 { 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */
64 { 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */
65 { 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */
66 { 0x68, LVL_1_DATA, 32 }, /* 4-way set assoc, sectored cache, 64 byte line size */
67 { 0x70, LVL_TRACE, 12 }, /* 8-way set assoc */
68 { 0x71, LVL_TRACE, 16 }, /* 8-way set assoc */
69 { 0x72, LVL_TRACE, 32 }, /* 8-way set assoc */
70 { 0x73, LVL_TRACE, 64 }, /* 8-way set assoc */
71 { 0x78, LVL_2, 1024 }, /* 4-way set assoc, 64 byte line size */
72 { 0x79, LVL_2, 128 }, /* 8-way set assoc, sectored cache, 64 byte line size */
73 { 0x7a, LVL_2, 256 }, /* 8-way set assoc, sectored cache, 64 byte line size */
74 { 0x7b, LVL_2, 512 }, /* 8-way set assoc, sectored cache, 64 byte line size */
75 { 0x7c, LVL_2, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */
76 { 0x7d, LVL_2, 2048 }, /* 8-way set assoc, 64 byte line size */
77 { 0x7f, LVL_2, 512 }, /* 2-way set assoc, 64 byte line size */
78 { 0x82, LVL_2, 256 }, /* 8-way set assoc, 32 byte line size */
79 { 0x83, LVL_2, 512 }, /* 8-way set assoc, 32 byte line size */
80 { 0x84, LVL_2, 1024 }, /* 8-way set assoc, 32 byte line size */
81 { 0x85, LVL_2, 2048 }, /* 8-way set assoc, 32 byte line size */
82 { 0x86, LVL_2, 512 }, /* 4-way set assoc, 64 byte line size */
83 { 0x87, LVL_2, 1024 }, /* 8-way set assoc, 64 byte line size */
84 { 0x00, 0, 0}
85 };
86
87
88 enum _cache_type
89 {
90 CACHE_TYPE_NULL = 0,
91 CACHE_TYPE_DATA = 1,
92 CACHE_TYPE_INST = 2,
93 CACHE_TYPE_UNIFIED = 3
94 };
95
96 union _cpuid4_leaf_eax {
97 struct {
98 enum _cache_type type:5;
99 unsigned int level:3;
100 unsigned int is_self_initializing:1;
101 unsigned int is_fully_associative:1;
102 unsigned int reserved:4;
103 unsigned int num_threads_sharing:12;
104 unsigned int num_cores_on_die:6;
105 } split;
106 u32 full;
107 };
108
109 union _cpuid4_leaf_ebx {
110 struct {
111 unsigned int coherency_line_size:12;
112 unsigned int physical_line_partition:10;
113 unsigned int ways_of_associativity:10;
114 } split;
115 u32 full;
116 };
117
118 union _cpuid4_leaf_ecx {
119 struct {
120 unsigned int number_of_sets:32;
121 } split;
122 u32 full;
123 };
124
125 struct _cpuid4_info {
126 union _cpuid4_leaf_eax eax;
127 union _cpuid4_leaf_ebx ebx;
128 union _cpuid4_leaf_ecx ecx;
129 unsigned long size;
130 cpumask_t shared_cpu_map;
131 };
132
133 static unsigned short num_cache_leaves;
134
135 static int __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
136 {
137 unsigned int eax, ebx, ecx, edx;
138 union _cpuid4_leaf_eax cache_eax;
139
140 cpuid_count(4, index, &eax, &ebx, &ecx, &edx);
141 cache_eax.full = eax;
142 if (cache_eax.split.type == CACHE_TYPE_NULL)
143 return -EIO; /* better error ? */
144
145 this_leaf->eax.full = eax;
146 this_leaf->ebx.full = ebx;
147 this_leaf->ecx.full = ecx;
148 this_leaf->size = (this_leaf->ecx.split.number_of_sets + 1) *
149 (this_leaf->ebx.split.coherency_line_size + 1) *
150 (this_leaf->ebx.split.physical_line_partition + 1) *
151 (this_leaf->ebx.split.ways_of_associativity + 1);
152 return 0;
153 }
154
155 /* will only be called once; __init is safe here */
156 static int __init find_num_cache_leaves(void)
157 {
158 unsigned int eax, ebx, ecx, edx;
159 union _cpuid4_leaf_eax cache_eax;
160 int i = -1;
161
162 do {
163 ++i;
164 /* Do cpuid(4) loop to find out num_cache_leaves */
165 cpuid_count(4, i, &eax, &ebx, &ecx, &edx);
166 cache_eax.full = eax;
167 } while (cache_eax.split.type != CACHE_TYPE_NULL);
168 return i;
169 }
170
171 unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
172 {
173 unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0; /* Cache sizes */
174 unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
175 unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
176 unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;
177 #ifdef CONFIG_SMP
178 unsigned int cpu = (c == &boot_cpu_data) ? 0 : (c - cpu_data);
179 #endif
180
181 if (c->cpuid_level > 3) {
182 static int is_initialized;
183
184 if (is_initialized == 0) {
185 /* Init num_cache_leaves from boot CPU */
186 num_cache_leaves = find_num_cache_leaves();
187 is_initialized++;
188 }
189
190 /*
191 * Whenever possible use cpuid(4), deterministic cache
192 * parameters cpuid leaf to find the cache details
193 */
194 for (i = 0; i < num_cache_leaves; i++) {
195 struct _cpuid4_info this_leaf;
196
197 int retval;
198
199 retval = cpuid4_cache_lookup(i, &this_leaf);
200 if (retval >= 0) {
201 switch(this_leaf.eax.split.level) {
202 case 1:
203 if (this_leaf.eax.split.type ==
204 CACHE_TYPE_DATA)
205 new_l1d = this_leaf.size/1024;
206 else if (this_leaf.eax.split.type ==
207 CACHE_TYPE_INST)
208 new_l1i = this_leaf.size/1024;
209 break;
210 case 2:
211 new_l2 = this_leaf.size/1024;
212 num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
213 index_msb = get_count_order(num_threads_sharing);
214 l2_id = c->apicid >> index_msb;
215 break;
216 case 3:
217 new_l3 = this_leaf.size/1024;
218 num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
219 index_msb = get_count_order(num_threads_sharing);
220 l3_id = c->apicid >> index_msb;
221 break;
222 default:
223 break;
224 }
225 }
226 }
227 }
228 if (c->cpuid_level > 1) {
229 /* supports eax=2 call */
230 int i, j, n;
231 int regs[4];
232 unsigned char *dp = (unsigned char *)regs;
233
234 /* Number of times to iterate */
235 n = cpuid_eax(2) & 0xFF;
236
237 for ( i = 0 ; i < n ; i++ ) {
238 cpuid(2, &regs[0], &regs[1], &regs[2], &regs[3]);
239
240 /* If bit 31 is set, this is an unknown format */
241 for ( j = 0 ; j < 3 ; j++ ) {
242 if ( regs[j] < 0 ) regs[j] = 0;
243 }
244
245 /* Byte 0 is level count, not a descriptor */
246 for ( j = 1 ; j < 16 ; j++ ) {
247 unsigned char des = dp[j];
248 unsigned char k = 0;
249
250 /* look up this descriptor in the table */
251 while (cache_table[k].descriptor != 0)
252 {
253 if (cache_table[k].descriptor == des) {
254 switch (cache_table[k].cache_type) {
255 case LVL_1_INST:
256 l1i += cache_table[k].size;
257 break;
258 case LVL_1_DATA:
259 l1d += cache_table[k].size;
260 break;
261 case LVL_2:
262 l2 += cache_table[k].size;
263 break;
264 case LVL_3:
265 l3 += cache_table[k].size;
266 break;
267 case LVL_TRACE:
268 trace += cache_table[k].size;
269 break;
270 }
271
272 break;
273 }
274
275 k++;
276 }
277 }
278 }
279
280 if (new_l1d)
281 l1d = new_l1d;
282
283 if (new_l1i)
284 l1i = new_l1i;
285
286 if (new_l2) {
287 l2 = new_l2;
288 #ifdef CONFIG_SMP
289 cpu_llc_id[cpu] = l2_id;
290 #endif
291 }
292
293 if (new_l3) {
294 l3 = new_l3;
295 #ifdef CONFIG_SMP
296 cpu_llc_id[cpu] = l3_id;
297 #endif
298 }
299
300 if ( trace )
301 printk (KERN_INFO "CPU: Trace cache: %dK uops", trace);
302 else if ( l1i )
303 printk (KERN_INFO "CPU: L1 I cache: %dK", l1i);
304 if ( l1d )
305 printk(", L1 D cache: %dK\n", l1d);
306 else
307 printk("\n");
308 if ( l2 )
309 printk(KERN_INFO "CPU: L2 cache: %dK\n", l2);
310 if ( l3 )
311 printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);
312
313 c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
314 }
315
316 return l2;
317 }
318
319 /* pointer to _cpuid4_info array (for each cache leaf) */
320 static struct _cpuid4_info *cpuid4_info[NR_CPUS];
321 #define CPUID4_INFO_IDX(x,y) (&((cpuid4_info[x])[y]))
322
323 #ifdef CONFIG_SMP
324 static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
325 {
326 struct _cpuid4_info *this_leaf, *sibling_leaf;
327 unsigned long num_threads_sharing;
328 int index_msb, i;
329 struct cpuinfo_x86 *c = cpu_data;
330
331 this_leaf = CPUID4_INFO_IDX(cpu, index);
332 num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
333
334 if (num_threads_sharing == 1)
335 cpu_set(cpu, this_leaf->shared_cpu_map);
336 else {
337 index_msb = get_count_order(num_threads_sharing);
338
339 for_each_online_cpu(i) {
340 if (c[i].apicid >> index_msb ==
341 c[cpu].apicid >> index_msb) {
342 cpu_set(i, this_leaf->shared_cpu_map);
343 if (i != cpu && cpuid4_info[i]) {
344 sibling_leaf = CPUID4_INFO_IDX(i, index);
345 cpu_set(cpu, sibling_leaf->shared_cpu_map);
346 }
347 }
348 }
349 }
350 }
351 static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
352 {
353 struct _cpuid4_info *this_leaf, *sibling_leaf;
354 int sibling;
355
356 this_leaf = CPUID4_INFO_IDX(cpu, index);
357 for_each_cpu_mask(sibling, this_leaf->shared_cpu_map) {
358 sibling_leaf = CPUID4_INFO_IDX(sibling, index);
359 cpu_clear(cpu, sibling_leaf->shared_cpu_map);
360 }
361 }
362 #else
363 static void __init cache_shared_cpu_map_setup(unsigned int cpu, int index) {}
364 static void __init cache_remove_shared_cpu_map(unsigned int cpu, int index) {}
365 #endif
366
367 static void free_cache_attributes(unsigned int cpu)
368 {
369 kfree(cpuid4_info[cpu]);
370 cpuid4_info[cpu] = NULL;
371 }
372
373 static int __cpuinit detect_cache_attributes(unsigned int cpu)
374 {
375 struct _cpuid4_info *this_leaf;
376 unsigned long j;
377 int retval;
378 cpumask_t oldmask;
379
380 if (num_cache_leaves == 0)
381 return -ENOENT;
382
383 cpuid4_info[cpu] = kmalloc(
384 sizeof(struct _cpuid4_info) * num_cache_leaves, GFP_KERNEL);
385 if (unlikely(cpuid4_info[cpu] == NULL))
386 return -ENOMEM;
387 memset(cpuid4_info[cpu], 0,
388 sizeof(struct _cpuid4_info) * num_cache_leaves);
389
390 oldmask = current->cpus_allowed;
391 retval = set_cpus_allowed(current, cpumask_of_cpu(cpu));
392 if (retval)
393 goto out;
394
395 /* Do cpuid and store the results */
396 retval = 0;
397 for (j = 0; j < num_cache_leaves; j++) {
398 this_leaf = CPUID4_INFO_IDX(cpu, j);
399 retval = cpuid4_cache_lookup(j, this_leaf);
400 if (unlikely(retval < 0))
401 break;
402 cache_shared_cpu_map_setup(cpu, j);
403 }
404 set_cpus_allowed(current, oldmask);
405
406 out:
407 if (retval)
408 free_cache_attributes(cpu);
409 return retval;
410 }
411
412 #ifdef CONFIG_SYSFS
413
414 #include <linux/kobject.h>
415 #include <linux/sysfs.h>
416
417 extern struct sysdev_class cpu_sysdev_class; /* from drivers/base/cpu.c */
418
419 /* pointer to kobject for cpuX/cache */
420 static struct kobject * cache_kobject[NR_CPUS];
421
422 struct _index_kobject {
423 struct kobject kobj;
424 unsigned int cpu;
425 unsigned short index;
426 };
427
428 /* pointer to array of kobjects for cpuX/cache/indexY */
429 static struct _index_kobject *index_kobject[NR_CPUS];
430 #define INDEX_KOBJECT_PTR(x,y) (&((index_kobject[x])[y]))
431
432 #define show_one_plus(file_name, object, val) \
433 static ssize_t show_##file_name \
434 (struct _cpuid4_info *this_leaf, char *buf) \
435 { \
436 return sprintf (buf, "%lu\n", (unsigned long)this_leaf->object + val); \
437 }
438
439 show_one_plus(level, eax.split.level, 0);
440 show_one_plus(coherency_line_size, ebx.split.coherency_line_size, 1);
441 show_one_plus(physical_line_partition, ebx.split.physical_line_partition, 1);
442 show_one_plus(ways_of_associativity, ebx.split.ways_of_associativity, 1);
443 show_one_plus(number_of_sets, ecx.split.number_of_sets, 1);
444
445 static ssize_t show_size(struct _cpuid4_info *this_leaf, char *buf)
446 {
447 return sprintf (buf, "%luK\n", this_leaf->size / 1024);
448 }
449
450 static ssize_t show_shared_cpu_map(struct _cpuid4_info *this_leaf, char *buf)
451 {
452 char mask_str[NR_CPUS];
453 cpumask_scnprintf(mask_str, NR_CPUS, this_leaf->shared_cpu_map);
454 return sprintf(buf, "%s\n", mask_str);
455 }
456
457 static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) {
458 switch(this_leaf->eax.split.type) {
459 case CACHE_TYPE_DATA:
460 return sprintf(buf, "Data\n");
461 break;
462 case CACHE_TYPE_INST:
463 return sprintf(buf, "Instruction\n");
464 break;
465 case CACHE_TYPE_UNIFIED:
466 return sprintf(buf, "Unified\n");
467 break;
468 default:
469 return sprintf(buf, "Unknown\n");
470 break;
471 }
472 }
473
474 struct _cache_attr {
475 struct attribute attr;
476 ssize_t (*show)(struct _cpuid4_info *, char *);
477 ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count);
478 };
479
480 #define define_one_ro(_name) \
481 static struct _cache_attr _name = \
482 __ATTR(_name, 0444, show_##_name, NULL)
483
484 define_one_ro(level);
485 define_one_ro(type);
486 define_one_ro(coherency_line_size);
487 define_one_ro(physical_line_partition);
488 define_one_ro(ways_of_associativity);
489 define_one_ro(number_of_sets);
490 define_one_ro(size);
491 define_one_ro(shared_cpu_map);
492
493 static struct attribute * default_attrs[] = {
494 &type.attr,
495 &level.attr,
496 &coherency_line_size.attr,
497 &physical_line_partition.attr,
498 &ways_of_associativity.attr,
499 &number_of_sets.attr,
500 &size.attr,
501 &shared_cpu_map.attr,
502 NULL
503 };
504
505 #define to_object(k) container_of(k, struct _index_kobject, kobj)
506 #define to_attr(a) container_of(a, struct _cache_attr, attr)
507
508 static ssize_t show(struct kobject * kobj, struct attribute * attr, char * buf)
509 {
510 struct _cache_attr *fattr = to_attr(attr);
511 struct _index_kobject *this_leaf = to_object(kobj);
512 ssize_t ret;
513
514 ret = fattr->show ?
515 fattr->show(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
516 buf) :
517 0;
518 return ret;
519 }
520
521 static ssize_t store(struct kobject * kobj, struct attribute * attr,
522 const char * buf, size_t count)
523 {
524 return 0;
525 }
526
527 static struct sysfs_ops sysfs_ops = {
528 .show = show,
529 .store = store,
530 };
531
532 static struct kobj_type ktype_cache = {
533 .sysfs_ops = &sysfs_ops,
534 .default_attrs = default_attrs,
535 };
536
537 static struct kobj_type ktype_percpu_entry = {
538 .sysfs_ops = &sysfs_ops,
539 };
540
541 static void cpuid4_cache_sysfs_exit(unsigned int cpu)
542 {
543 kfree(cache_kobject[cpu]);
544 kfree(index_kobject[cpu]);
545 cache_kobject[cpu] = NULL;
546 index_kobject[cpu] = NULL;
547 free_cache_attributes(cpu);
548 }
549
550 static int __cpuinit cpuid4_cache_sysfs_init(unsigned int cpu)
551 {
552
553 if (num_cache_leaves == 0)
554 return -ENOENT;
555
556 detect_cache_attributes(cpu);
557 if (cpuid4_info[cpu] == NULL)
558 return -ENOENT;
559
560 /* Allocate all required memory */
561 cache_kobject[cpu] = kmalloc(sizeof(struct kobject), GFP_KERNEL);
562 if (unlikely(cache_kobject[cpu] == NULL))
563 goto err_out;
564 memset(cache_kobject[cpu], 0, sizeof(struct kobject));
565
566 index_kobject[cpu] = kmalloc(
567 sizeof(struct _index_kobject ) * num_cache_leaves, GFP_KERNEL);
568 if (unlikely(index_kobject[cpu] == NULL))
569 goto err_out;
570 memset(index_kobject[cpu], 0,
571 sizeof(struct _index_kobject) * num_cache_leaves);
572
573 return 0;
574
575 err_out:
576 cpuid4_cache_sysfs_exit(cpu);
577 return -ENOMEM;
578 }
579
580 /* Add/Remove cache interface for CPU device */
581 static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
582 {
583 unsigned int cpu = sys_dev->id;
584 unsigned long i, j;
585 struct _index_kobject *this_object;
586 int retval = 0;
587
588 retval = cpuid4_cache_sysfs_init(cpu);
589 if (unlikely(retval < 0))
590 return retval;
591
592 cache_kobject[cpu]->parent = &sys_dev->kobj;
593 kobject_set_name(cache_kobject[cpu], "%s", "cache");
594 cache_kobject[cpu]->ktype = &ktype_percpu_entry;
595 retval = kobject_register(cache_kobject[cpu]);
596
597 for (i = 0; i < num_cache_leaves; i++) {
598 this_object = INDEX_KOBJECT_PTR(cpu,i);
599 this_object->cpu = cpu;
600 this_object->index = i;
601 this_object->kobj.parent = cache_kobject[cpu];
602 kobject_set_name(&(this_object->kobj), "index%1lu", i);
603 this_object->kobj.ktype = &ktype_cache;
604 retval = kobject_register(&(this_object->kobj));
605 if (unlikely(retval)) {
606 for (j = 0; j < i; j++) {
607 kobject_unregister(
608 &(INDEX_KOBJECT_PTR(cpu,j)->kobj));
609 }
610 kobject_unregister(cache_kobject[cpu]);
611 cpuid4_cache_sysfs_exit(cpu);
612 break;
613 }
614 }
615 return retval;
616 }
617
618 static void __cpuexit cache_remove_dev(struct sys_device * sys_dev)
619 {
620 unsigned int cpu = sys_dev->id;
621 unsigned long i;
622
623 for (i = 0; i < num_cache_leaves; i++) {
624 cache_remove_shared_cpu_map(cpu, i);
625 kobject_unregister(&(INDEX_KOBJECT_PTR(cpu,i)->kobj));
626 }
627 kobject_unregister(cache_kobject[cpu]);
628 cpuid4_cache_sysfs_exit(cpu);
629 return;
630 }
631
632 static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
633 unsigned long action, void *hcpu)
634 {
635 unsigned int cpu = (unsigned long)hcpu;
636 struct sys_device *sys_dev;
637
638 sys_dev = get_cpu_sysdev(cpu);
639 switch (action) {
640 case CPU_ONLINE:
641 cache_add_dev(sys_dev);
642 break;
643 case CPU_DEAD:
644 cache_remove_dev(sys_dev);
645 break;
646 }
647 return NOTIFY_OK;
648 }
649
650 static struct notifier_block cacheinfo_cpu_notifier =
651 {
652 .notifier_call = cacheinfo_cpu_callback,
653 };
654
655 static int __cpuinit cache_sysfs_init(void)
656 {
657 int i;
658
659 if (num_cache_leaves == 0)
660 return 0;
661
662 register_cpu_notifier(&cacheinfo_cpu_notifier);
663
664 for_each_online_cpu(i) {
665 cacheinfo_cpu_callback(&cacheinfo_cpu_notifier, CPU_ONLINE,
666 (void *)(long)i);
667 }
668
669 return 0;
670 }
671
672 device_initcall(cache_sysfs_init);
673
674 #endif
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