arch/ppc/platforms/chrp_setup.c

   1 /*
   2  *  arch/ppc/platforms/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  */
   8
   9 /*
  10  * bootup setup stuff..
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/errno.h>
  15 #include <linux/sched.h>
  16 #include <linux/kernel.h>
  17 #include <linux/mm.h>
  18 #include <linux/stddef.h>
  19 #include <linux/unistd.h>
  20 #include <linux/ptrace.h>
  21 #include <linux/slab.h>
  22 #include <linux/user.h>
  23 #include <linux/a.out.h>
  24 #include <linux/tty.h>
  25 #include <linux/major.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/reboot.h>
  28 #include <linux/init.h>
  29 #include <linux/pci.h>
  30 #include <linux/version.h>
  31 #include <linux/adb.h>
  32 #include <linux/module.h>
  33 #include <linux/delay.h>
  34 #include <linux/ide.h>
  35 #include <linux/irq.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/root_dev.h>
  39 #include <linux/initrd.h>
  40 #include <linux/module.h>
  41
  42 #include <asm/io.h>
  43 #include <asm/pgtable.h>
  44 #include <asm/prom.h>
  45 #include <asm/gg2.h>
  46 #include <asm/pci-bridge.h>
  47 #include <asm/dma.h>
  48 #include <asm/machdep.h>
  49 #include <asm/irq.h>
  50 #include <asm/hydra.h>
  51 #include <asm/sections.h>
  52 #include <asm/time.h>
  53 #include <asm/btext.h>
  54 #include <asm/i8259.h>
  55 #include <asm/open_pic.h>
  56 #include <asm/xmon.h>
  57
  58 unsigned long chrp_get_rtc_time(void);
  59 int chrp_set_rtc_time(unsigned long nowtime);
  60 void chrp_calibrate_decr(void);
  61 long chrp_time_init(void);
  62
  63 void chrp_find_bridges(void);
  64 void chrp_event_scan(void);
  65 void rtas_display_progress(char *, unsigned short);
  66 void rtas_indicator_progress(char *, unsigned short);
  67 void btext_progress(char *, unsigned short);
  68
  69 extern unsigned long pmac_find_end_of_memory(void);
  70 extern int of_show_percpuinfo(struct seq_file *, int);
  71
  72 int _chrp_type;
  73 EXPORT_SYMBOL(_chrp_type);
  74
  75 /*
  76  * XXX this should be in xmon.h, but putting it there means xmon.h
  77  * has to include <linux/interrupt.h> (to get irqreturn_t), which
  78  * causes all sorts of problems.  -- paulus
  79  */
  80 extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
  81
  82 extern dev_t boot_dev;
  83
  84 extern PTE *Hash, *Hash_end;
  85 extern unsigned long Hash_size, Hash_mask;
  86 extern int probingmem;
  87 extern unsigned long loops_per_jiffy;
  88 static int max_width;
  89
  90 #ifdef CONFIG_SMP
  91 extern struct smp_ops_t chrp_smp_ops;
  92 #endif
  93
  94 static const char *gg2_memtypes[4] = {
  95         "FPM", "SDRAM", "EDO", "BEDO"
  96 };
  97 static const char *gg2_cachesizes[4] = {
  98         "256 KB", "512 KB", "1 MB", "Reserved"
  99 };
 100 static const char *gg2_cachetypes[4] = {
 101         "Asynchronous", "Reserved", "Flow-Through Synchronous",
 102         "Pipelined Synchronous"
 103 };
 104 static const char *gg2_cachemodes[4] = {
 105         "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
 106 };
 107
 108 int __chrp
 109 chrp_show_cpuinfo(struct seq_file *m)
 110 {
 111         int i, sdramen;
 112         unsigned int t;
 113         struct device_node *root;
 114         const char *model = "";
 115
 116         root = find_path_device("/");
 117         if (root)
 118                 model = get_property(root, "model", NULL);
 119         seq_printf(m, "machine\t\t: CHRP %s\n", model);
 120
 121         /* longtrail (goldengate) stuff */
 122         if (!strncmp(model, "IBM,LongTrail", 13)) {
 123                 /* VLSI VAS96011/12 `Golden Gate 2' */
 124                 /* Memory banks */
 125                 sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL)
 126                            >>31) & 1;
 127                 for (i = 0; i < (sdramen ? 4 : 6); i++) {
 128                         t = in_le32(gg2_pci_config_base+
 129                                                  GG2_PCI_DRAM_BANK0+
 130                                                  i*4);
 131                         if (!(t & 1))
 132                                 continue;
 133                         switch ((t>>8) & 0x1f) {
 134                         case 0x1f:
 135                                 model = "4 MB";
 136                                 break;
 137                         case 0x1e:
 138                                 model = "8 MB";
 139                                 break;
 140                         case 0x1c:
 141                                 model = "16 MB";
 142                                 break;
 143                         case 0x18:
 144                                 model = "32 MB";
 145                                 break;
 146                         case 0x10:
 147                                 model = "64 MB";
 148                                 break;
 149                         case 0x00:
 150                                 model = "128 MB";
 151                                 break;
 152                         default:
 153                                 model = "Reserved";
 154                                 break;
 155                         }
 156                         seq_printf(m, "memory bank %d\t: %s %s\n", i, model,
 157                                    gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]);
 158                 }
 159                 /* L2 cache */
 160                 t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL);
 161                 seq_printf(m, "board l2\t: %s %s (%s)\n",
 162                            gg2_cachesizes[(t>>7) & 3],
 163                            gg2_cachetypes[(t>>2) & 3],
 164                            gg2_cachemodes[t & 3]);
 165         }
 166         return 0;
 167 }
 168
 169 /*
 170  *  Fixes for the National Semiconductor PC78308VUL SuperI/O
 171  *
 172  *  Some versions of Open Firmware incorrectly initialize the IRQ settings
 173  *  for keyboard and mouse
 174  */
 175 static inline void __init sio_write(u8 val, u8 index)
 176 {
 177         outb(index, 0x15c);
 178         outb(val, 0x15d);
 179 }
 180
 181 static inline u8 __init sio_read(u8 index)
 182 {
 183         outb(index, 0x15c);
 184         return inb(0x15d);
 185 }
 186
 187 static void __init sio_fixup_irq(const char *name, u8 device, u8 level,
 188                                      u8 type)
 189 {
 190         u8 level0, type0, active;
 191
 192         /* select logical device */
 193         sio_write(device, 0x07);
 194         active = sio_read(0x30);
 195         level0 = sio_read(0x70);
 196         type0 = sio_read(0x71);
 197         if (level0 != level || type0 != type || !active) {
 198                 printk(KERN_WARNING "sio: %s irq level %d, type %d, %sactive: "
 199                        "remapping to level %d, type %d, active\n",
 200                        name, level0, type0, !active ? "in" : "", level, type);
 201                 sio_write(0x01, 0x30);
 202                 sio_write(level, 0x70);
 203                 sio_write(type, 0x71);
 204         }
 205 }
 206
 207 static void __init sio_init(void)
 208 {
 209         struct device_node *root;
 210
 211         if ((root = find_path_device("/")) &&
 212             !strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13)) {
 213                 /* logical device 0 (KBC/Keyboard) */
 214                 sio_fixup_irq("keyboard", 0, 1, 2);
 215                 /* select logical device 1 (KBC/Mouse) */
 216                 sio_fixup_irq("mouse", 1, 12, 2);
 217         }
 218 }
 219
 220
 221 static void __init pegasos_set_l2cr(void)
 222 {
 223         struct device_node *np;
 224
 225         /* On Pegasos, enable the l2 cache if needed, as the OF forgets it */
 226         if (_chrp_type != _CHRP_Pegasos)
 227                 return;
 228
 229         /* Enable L2 cache if needed */
 230         np = find_type_devices("cpu");
 231         if (np != NULL) {
 232                 unsigned int *l2cr = (unsigned int *)
 233                         get_property (np, "l2cr", NULL);
 234                 if (l2cr == NULL) {
 235                         printk ("Pegasos l2cr : no cpu l2cr property found\n");
 236                         return;
 237                 }
 238                 if (!((*l2cr) & 0x80000000)) {
 239                         printk ("Pegasos l2cr : L2 cache was not active, "
 240                                 "activating\n");
 241                         _set_L2CR(0);
 242                         _set_L2CR((*l2cr) | 0x80000000);
 243                 }
 244         }
 245 }
 246
 247 void __init chrp_setup_arch(void)
 248 {
 249         struct device_node *device;
 250
 251         /* init to some ~sane value until calibrate_delay() runs */
 252         loops_per_jiffy = 50000000/HZ;
 253
 254 #ifdef CONFIG_BLK_DEV_INITRD
 255         /* this is fine for chrp */
 256         initrd_below_start_ok = 1;
 257
 258         if (initrd_start)
 259                 ROOT_DEV = Root_RAM0;
 260         else
 261 #endif
 262                 ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
 263
 264         /* On pegasos, enable the L2 cache if not already done by OF */
 265         pegasos_set_l2cr();
 266
 267         /* Lookup PCI host bridges */
 268         chrp_find_bridges();
 269
 270 #ifndef CONFIG_PPC64BRIDGE
 271         /*
 272          *  Temporary fixes for PCI devices.
 273          *  -- Geert
 274          */
 275         hydra_init();           /* Mac I/O */
 276
 277 #endif /* CONFIG_PPC64BRIDGE */
 278
 279         /*
 280          *  Fix the Super I/O configuration
 281          */
 282         sio_init();
 283
 284         /* Get the event scan rate for the rtas so we know how
 285          * often it expects a heartbeat. -- Cort
 286          */
 287         if ( rtas_data ) {
 288                 struct property *p;
 289                 device = find_devices("rtas");
 290                 for ( p = device->properties;
 291                       p && strncmp(p->name, "rtas-event-scan-rate", 20);
 292                       p = p->next )
 293                         /* nothing */ ;
 294                 if ( p && *(unsigned long *)p->value ) {
 295                         ppc_md.heartbeat = chrp_event_scan;
 296                         ppc_md.heartbeat_reset = (HZ/(*(unsigned long *)p->value)*30)-1;
 297                         ppc_md.heartbeat_count = 1;
 298                         printk("RTAS Event Scan Rate: %lu (%lu jiffies)\n",
 299                                *(unsigned long *)p->value, ppc_md.heartbeat_reset );
 300                 }
 301         }
 302
 303         pci_create_OF_bus_map();
 304 }
 305
 306 void __chrp
 307 chrp_event_scan(void)
 308 {
 309         unsigned char log[1024];
 310         unsigned long ret = 0;
 311         /* XXX: we should loop until the hardware says no more error logs -- Cort */
 312         call_rtas( "event-scan", 4, 1, &ret, 0xffffffff, 0,
 313                    __pa(log), 1024 );
 314         ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
 315 }
 316
 317 void __chrp
 318 chrp_restart(char *cmd)
 319 {
 320         printk("RTAS system-reboot returned %d\n",
 321                call_rtas("system-reboot", 0, 1, NULL));
 322         for (;;);
 323 }
 324
 325 void __chrp
 326 chrp_power_off(void)
 327 {
 328         /* allow power on only with power button press */
 329         printk("RTAS power-off returned %d\n",
 330                call_rtas("power-off", 2, 1, NULL,0xffffffff,0xffffffff));
 331         for (;;);
 332 }
 333
 334 void __chrp
 335 chrp_halt(void)
 336 {
 337         chrp_power_off();
 338 }
 339
 340 u_int __chrp
 341 chrp_irq_canonicalize(u_int irq)
 342 {
 343         if (irq == 2)
 344                 return 9;
 345         return irq;
 346 }
 347
 348 /*
 349  * Finds the open-pic node and sets OpenPIC_Addr based on its reg property.
 350  * Then checks if it has an interrupt-ranges property.  If it does then
 351  * we have a distributed open-pic, so call openpic_set_sources to tell
 352  * the openpic code where to find the interrupt source registers.
 353  */
 354 static void __init chrp_find_openpic(void)
 355 {
 356         struct device_node *np;
 357         int len, i;
 358         unsigned int *iranges;
 359         void __iomem *isu;
 360
 361         np = find_type_devices("open-pic");
 362         if (np == NULL || np->n_addrs == 0)
 363                 return;
 364         printk(KERN_INFO "OpenPIC at %x (size %x)\n",
 365                np->addrs[0].address, np->addrs[0].size);
 366         OpenPIC_Addr = ioremap(np->addrs[0].address, 0x40000);
 367         if (OpenPIC_Addr == NULL) {
 368                 printk(KERN_ERR "Failed to map OpenPIC!\n");
 369                 return;
 370         }
 371
 372         iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
 373         if (iranges == NULL || len < 2 * sizeof(unsigned int))
 374                 return;         /* not distributed */
 375
 376         /*
 377          * The first pair of cells in interrupt-ranges refers to the
 378          * IDU; subsequent pairs refer to the ISUs.
 379          */
 380         len /= 2 * sizeof(unsigned int);
 381         if (np->n_addrs < len) {
 382                 printk(KERN_ERR "Insufficient addresses for distributed"
 383                        " OpenPIC (%d < %d)\n", np->n_addrs, len);
 384                 return;
 385         }
 386         if (iranges[1] != 0) {
 387                 printk(KERN_INFO "OpenPIC irqs %d..%d in IDU\n",
 388                        iranges[0], iranges[0] + iranges[1] - 1);
 389                 openpic_set_sources(iranges[0], iranges[1], NULL);
 390         }
 391         for (i = 1; i < len; ++i) {
 392                 iranges += 2;
 393                 printk(KERN_INFO "OpenPIC irqs %d..%d in ISU at %x (%x)\n",
 394                        iranges[0], iranges[0] + iranges[1] - 1,
 395                        np->addrs[i].address, np->addrs[i].size);
 396                 isu = ioremap(np->addrs[i].address, np->addrs[i].size);
 397                 if (isu != NULL)
 398                         openpic_set_sources(iranges[0], iranges[1], isu);
 399                 else
 400                         printk(KERN_ERR "Failed to map OpenPIC ISU at %x!\n",
 401                                np->addrs[i].address);
 402         }
 403 }
 404
 405 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
 406 static struct irqaction xmon_irqaction = {
 407         .handler = xmon_irq,
 408         .mask = CPU_MASK_NONE,
 409         .name = "XMON break",
 410 };
 411 #endif
 412
 413 void __init chrp_init_IRQ(void)
 414 {
 415         struct device_node *np;
 416         int i;
 417         unsigned long chrp_int_ack = 0;
 418         unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
 419 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
 420         struct device_node *kbd;
 421 #endif
 422
 423         for (np = find_devices("pci"); np != NULL; np = np->next) {
 424                 unsigned int *addrp = (unsigned int *)
 425                         get_property(np, "8259-interrupt-acknowledge", NULL);
 426
 427                 if (addrp == NULL)
 428                         continue;
 429                 chrp_int_ack = addrp[prom_n_addr_cells(np)-1];
 430                 break;
 431         }
 432         if (np == NULL)
 433                 printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n");
 434
 435         chrp_find_openpic();
 436
 437         if (OpenPIC_Addr) {
 438                 prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS);
 439                 OpenPIC_InitSenses = init_senses;
 440                 OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
 441
 442                 openpic_init(NUM_8259_INTERRUPTS);
 443                 /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
 444                 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
 445                                        i8259_irq);
 446
 447         }
 448         for (i = 0; i < NUM_8259_INTERRUPTS; i++)
 449                 irq_desc[i].handler = &i8259_pic;
 450         i8259_init(chrp_int_ack);
 451
 452 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
 453         /* see if there is a keyboard in the device tree
 454            with a parent of type "adb" */
 455         for (kbd = find_devices("keyboard"); kbd; kbd = kbd->next)
 456                 if (kbd->parent && kbd->parent->type
 457                     && strcmp(kbd->parent->type, "adb") == 0)
 458                         break;
 459         if (kbd)
 460                 setup_irq(HYDRA_INT_ADB_NMI, &xmon_irqaction);
 461 #endif
 462 }
 463
 464 void __init
 465 chrp_init2(void)
 466 {
 467 #ifdef CONFIG_NVRAM
 468 // XX replace this in a more saner way
 469 //      pmac_nvram_init();
 470 #endif
 471
 472         request_region(0x20,0x20,"pic1");
 473         request_region(0xa0,0x20,"pic2");
 474         request_region(0x00,0x20,"dma1");
 475         request_region(0x40,0x20,"timer");
 476         request_region(0x80,0x10,"dma page reg");
 477         request_region(0xc0,0x20,"dma2");
 478
 479         if (ppc_md.progress)
 480                 ppc_md.progress("  Have fun!    ", 0x7777);
 481 }
 482
 483 void __init
 484 chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
 485           unsigned long r6, unsigned long r7)
 486 {
 487         struct device_node *root = find_path_device ("/");
 488         char *machine = NULL;
 489
 490 #ifdef CONFIG_BLK_DEV_INITRD
 491         /* take care of initrd if we have one */
 492         if ( r6 )
 493         {
 494                 initrd_start = r6 + KERNELBASE;
 495                 initrd_end = r6 + r7 + KERNELBASE;
 496         }
 497 #endif /* CONFIG_BLK_DEV_INITRD */
 498
 499         ISA_DMA_THRESHOLD = ~0L;
 500         DMA_MODE_READ = 0x44;
 501         DMA_MODE_WRITE = 0x48;
 502         isa_io_base = CHRP_ISA_IO_BASE;         /* default value */
 503
 504         if (root)
 505                 machine = get_property(root, "model", NULL);
 506         if (machine && strncmp(machine, "Pegasos", 7) == 0) {
 507                 _chrp_type = _CHRP_Pegasos;
 508         } else if (machine && strncmp(machine, "IBM", 3) == 0) {
 509                 _chrp_type = _CHRP_IBM;
 510         } else if (machine && strncmp(machine, "MOT", 3) == 0) {
 511                 _chrp_type = _CHRP_Motorola;
 512         } else {
 513                 /* Let's assume it is an IBM chrp if all else fails */
 514                 _chrp_type = _CHRP_IBM;
 515         }
 516
 517         ppc_md.setup_arch     = chrp_setup_arch;
 518         ppc_md.show_percpuinfo = of_show_percpuinfo;
 519         ppc_md.show_cpuinfo   = chrp_show_cpuinfo;
 520
 521         ppc_md.irq_canonicalize = chrp_irq_canonicalize;
 522         ppc_md.init_IRQ       = chrp_init_IRQ;
 523         if (_chrp_type == _CHRP_Pegasos)
 524                 ppc_md.get_irq        = i8259_irq;
 525         else
 526                 ppc_md.get_irq        = openpic_get_irq;
 527
 528         ppc_md.init           = chrp_init2;
 529
 530         ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
 531
 532         ppc_md.restart        = chrp_restart;
 533         ppc_md.power_off      = chrp_power_off;
 534         ppc_md.halt           = chrp_halt;
 535
 536         ppc_md.time_init      = chrp_time_init;
 537         ppc_md.set_rtc_time   = chrp_set_rtc_time;
 538         ppc_md.get_rtc_time   = chrp_get_rtc_time;
 539         ppc_md.calibrate_decr = chrp_calibrate_decr;
 540
 541         ppc_md.find_end_of_memory = pmac_find_end_of_memory;
 542
 543         if (rtas_data) {
 544                 struct device_node *rtas;
 545                 unsigned int *p;
 546
 547                 rtas = find_devices("rtas");
 548                 if (rtas != NULL) {
 549                         if (get_property(rtas, "display-character", NULL)) {
 550                                 ppc_md.progress = rtas_display_progress;
 551                                 p = (unsigned int *) get_property
 552                                        (rtas, "ibm,display-line-length", NULL);
 553                                 if (p)
 554                                         max_width = *p;
 555                         } else if (get_property(rtas, "set-indicator", NULL))
 556                                 ppc_md.progress = rtas_indicator_progress;
 557                 }
 558         }
 559 #ifdef CONFIG_BOOTX_TEXT
 560         if (ppc_md.progress == NULL && boot_text_mapped)
 561                 ppc_md.progress = btext_progress;
 562 #endif
 563
 564 #ifdef CONFIG_SMP
 565         ppc_md.smp_ops = &chrp_smp_ops;
 566 #endif /* CONFIG_SMP */
 567
 568         /*
 569          * Print the banner, then scroll down so boot progress
 570          * can be printed.  -- Cort
 571          */
 572         if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
 573 }
 574
 575 void __chrp
 576 rtas_display_progress(char *s, unsigned short hex)
 577 {
 578         int width;
 579         char *os = s;
 580
 581         if ( call_rtas( "display-character", 1, 1, NULL, '\r' ) )
 582                 return;
 583
 584         width = max_width;
 585         while ( *os )
 586         {
 587                 if ( (*os == '\n') || (*os == '\r') )
 588                         width = max_width;
 589                 else
 590                         width--;
 591                 call_rtas( "display-character", 1, 1, NULL, *os++ );
 592                 /* if we overwrite the screen length */
 593                 if ( width == 0 )
 594                         while ( (*os != 0) && (*os != '\n') && (*os != '\r') )
 595                                 os++;
 596         }
 597
 598         /*while ( width-- > 0 )*/
 599         call_rtas( "display-character", 1, 1, NULL, ' ' );
 600 }
 601
 602 void __chrp
 603 rtas_indicator_progress(char *s, unsigned short hex)
 604 {
 605         call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
 606 }
 607
 608 #ifdef CONFIG_BOOTX_TEXT
 609 void
 610 btext_progress(char *s, unsigned short hex)
 611 {
 612         prom_print(s);
 613         prom_print("\n");
 614 }
 615 #endif /* CONFIG_BOOTX_TEXT */