arch/ppc/syslib/ppc4xx_setup.c

   1 /*
   2  *
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Copyright 2000-2001 MontaVista Software Inc.
   6  *      Completed implementation.
   7  *      Author: MontaVista Software, Inc.  <source@mvista.com>
   8  *              Frank Rowand <frank_rowand@mvista.com>
   9  *              Debbie Chu   <debbie_chu@mvista.com>
  10  *      Further modifications by Armin Kuster
  11  *
  12  *    Module name: ppc4xx_setup.c
  13  *
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/init.h>
  18 #include <linux/smp.h>
  19 #include <linux/threads.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/irq.h>
  22 #include <linux/reboot.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/pci.h>
  27 #include <linux/rtc.h>
  28 #include <linux/console.h>
  29 #include <linux/ide.h>
  30 #include <linux/serial_reg.h>
  31 #include <linux/seq_file.h>
  32
  33 #include <asm/system.h>
  34 #include <asm/processor.h>
  35 #include <asm/machdep.h>
  36 #include <asm/page.h>
  37 #include <asm/kgdb.h>
  38 #include <asm/ibm4xx.h>
  39 #include <asm/time.h>
  40 #include <asm/todc.h>
  41 #include <asm/ppc4xx_pic.h>
  42 #include <asm/pci-bridge.h>
  43 #include <asm/bootinfo.h>
  44
  45 #include <syslib/gen550.h>
  46
  47 /* Function Prototypes */
  48 extern void abort(void);
  49 extern void ppc4xx_find_bridges(void);
  50
  51 /* Global Variables */
  52 bd_t __res;
  53
  54 void __init
  55 ppc4xx_setup_arch(void)
  56 {
  57 #if !defined(CONFIG_BDI_SWITCH)
  58         /*
  59          * The Abatron BDI JTAG debugger does not tolerate others
  60          * mucking with the debug registers.
  61          */
  62         mtspr(SPRN_DBCR0, (DBCR0_IDM));
  63         mtspr(SPRN_DBSR, 0xffffffff);
  64 #endif
  65
  66         /* Setup PCI host bridges */
  67 #ifdef CONFIG_PCI
  68         ppc4xx_find_bridges();
  69 #endif
  70 }
  71
  72 /*
  73  *   This routine pretty-prints the platform's internal CPU clock
  74  *   frequencies into the buffer for usage in /proc/cpuinfo.
  75  */
  76
  77 static int
  78 ppc4xx_show_percpuinfo(struct seq_file *m, int i)
  79 {
  80         seq_printf(m, "clock\t\t: %ldMHz\n", (long)__res.bi_intfreq / 1000000);
  81
  82         return 0;
  83 }
  84
  85 /*
  86  *   This routine pretty-prints the platform's internal bus clock
  87  *   frequencies into the buffer for usage in /proc/cpuinfo.
  88  */
  89 static int
  90 ppc4xx_show_cpuinfo(struct seq_file *m)
  91 {
  92         bd_t *bip = &__res;
  93
  94         seq_printf(m, "machine\t\t: %s\n", PPC4xx_MACHINE_NAME);
  95         seq_printf(m, "plb bus clock\t: %ldMHz\n",
  96                    (long) bip->bi_busfreq / 1000000);
  97 #ifdef CONFIG_PCI
  98         seq_printf(m, "pci bus clock\t: %dMHz\n",
  99                    bip->bi_pci_busfreq / 1000000);
 100 #endif
 101
 102         return 0;
 103 }
 104
 105 /*
 106  * Return the virtual address representing the top of physical RAM.
 107  */
 108 static unsigned long __init
 109 ppc4xx_find_end_of_memory(void)
 110 {
 111         return ((unsigned long) __res.bi_memsize);
 112 }
 113
 114 void __init
 115 ppc4xx_map_io(void)
 116 {
 117         io_block_mapping(PPC4xx_ONB_IO_VADDR,
 118                          PPC4xx_ONB_IO_PADDR, PPC4xx_ONB_IO_SIZE, _PAGE_IO);
 119 #ifdef CONFIG_PCI
 120         io_block_mapping(PPC4xx_PCI_IO_VADDR,
 121                          PPC4xx_PCI_IO_PADDR, PPC4xx_PCI_IO_SIZE, _PAGE_IO);
 122         io_block_mapping(PPC4xx_PCI_CFG_VADDR,
 123                          PPC4xx_PCI_CFG_PADDR, PPC4xx_PCI_CFG_SIZE, _PAGE_IO);
 124         io_block_mapping(PPC4xx_PCI_LCFG_VADDR,
 125                          PPC4xx_PCI_LCFG_PADDR, PPC4xx_PCI_LCFG_SIZE, _PAGE_IO);
 126 #endif
 127 }
 128
 129 void __init
 130 ppc4xx_init_IRQ(void)
 131 {
 132         ppc4xx_pic_init();
 133 }
 134
 135 static void
 136 ppc4xx_restart(char *cmd)
 137 {
 138         printk("%s\n", cmd);
 139         abort();
 140 }
 141
 142 static void
 143 ppc4xx_power_off(void)
 144 {
 145         printk("System Halted\n");
 146         local_irq_disable();
 147         while (1) ;
 148 }
 149
 150 static void
 151 ppc4xx_halt(void)
 152 {
 153         printk("System Halted\n");
 154         local_irq_disable();
 155         while (1) ;
 156 }
 157
 158 /*
 159  * This routine retrieves the internal processor frequency from the board
 160  * information structure, sets up the kernel timer decrementer based on
 161  * that value, enables the 4xx programmable interval timer (PIT) and sets
 162  * it up for auto-reload.
 163  */
 164 static void __init
 165 ppc4xx_calibrate_decr(void)
 166 {
 167         unsigned int freq;
 168         bd_t *bip = &__res;
 169
 170 #if defined(CONFIG_WALNUT) || defined(CONFIG_SYCAMORE)
 171         /* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */
 172         mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE);
 173 #endif
 174         freq = bip->bi_tbfreq;
 175         tb_ticks_per_jiffy = freq / HZ;
 176         tb_to_us = mulhwu_scale_factor(freq, 1000000);
 177
 178         /* Set the time base to zero.
 179            ** At 200 Mhz, time base will rollover in ~2925 years.
 180          */
 181
 182         mtspr(SPRN_TBWL, 0);
 183         mtspr(SPRN_TBWU, 0);
 184
 185         /* Clear any pending timer interrupts */
 186
 187         mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS);
 188         mtspr(SPRN_TCR, TCR_PIE | TCR_ARE);
 189
 190         /* Set the PIT reload value and just let it run. */
 191         mtspr(SPRN_PIT, tb_ticks_per_jiffy);
 192 }
 193
 194 /*
 195  * IDE stuff.
 196  * should be generic for every IDE PCI chipset
 197  */
 198 #if defined(CONFIG_PCI) && defined(CONFIG_IDE)
 199 static void
 200 ppc4xx_ide_init_hwif_ports(hw_regs_t * hw, unsigned long data_port,
 201                            unsigned long ctrl_port, int *irq)
 202 {
 203         int i;
 204
 205         for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i)
 206                 hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET;
 207
 208         hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
 209 }
 210 #endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */
 211
 212 TODC_ALLOC();
 213
 214 /*
 215  * Input(s):
 216  *   r3 - Optional pointer to a board information structure.
 217  *   r4 - Optional pointer to the physical starting address of the init RAM
 218  *        disk.
 219  *   r5 - Optional pointer to the physical ending address of the init RAM
 220  *        disk.
 221  *   r6 - Optional pointer to the physical starting address of any kernel
 222  *        command-line parameters.
 223  *   r7 - Optional pointer to the physical ending address of any kernel
 224  *        command-line parameters.
 225  */
 226 void __init
 227 ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
 228             unsigned long r6, unsigned long r7)
 229 {
 230         parse_bootinfo(find_bootinfo());
 231
 232         /*
 233          * If we were passed in a board information, copy it into the
 234          * residual data area.
 235          */
 236         if (r3)
 237                 __res = *(bd_t *)(r3 + KERNELBASE);
 238
 239 #if defined(CONFIG_BLK_DEV_INITRD)
 240         /*
 241          * If the init RAM disk has been configured in, and there's a valid
 242          * starting address for it, set it up.
 243          */
 244         if (r4) {
 245                 initrd_start = r4 + KERNELBASE;
 246                 initrd_end = r5 + KERNELBASE;
 247         }
 248 #endif                          /* CONFIG_BLK_DEV_INITRD */
 249
 250         /* Copy the kernel command line arguments to a safe place. */
 251
 252         if (r6) {
 253                 *(char *) (r7 + KERNELBASE) = 0;
 254                 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
 255         }
 256
 257         /* Initialize machine-dependent vectors */
 258
 259         ppc_md.setup_arch = ppc4xx_setup_arch;
 260         ppc_md.show_percpuinfo = ppc4xx_show_percpuinfo;
 261         ppc_md.show_cpuinfo = ppc4xx_show_cpuinfo;
 262         ppc_md.init_IRQ = ppc4xx_init_IRQ;
 263
 264         ppc_md.restart = ppc4xx_restart;
 265         ppc_md.power_off = ppc4xx_power_off;
 266         ppc_md.halt = ppc4xx_halt;
 267
 268         ppc_md.calibrate_decr = ppc4xx_calibrate_decr;
 269
 270         ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory;
 271         ppc_md.setup_io_mappings = ppc4xx_map_io;
 272
 273 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 274         ppc_md.progress = gen550_progress;
 275 #endif
 276
 277 #if defined(CONFIG_PCI) && defined(CONFIG_IDE)
 278         ppc_ide_md.ide_init_hwif = ppc4xx_ide_init_hwif_ports;
 279 #endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */
 280 }
 281
 282 /* Called from MachineCheckException */
 283 void platform_machine_check(struct pt_regs *regs)
 284 {
 285 #if defined(DCRN_PLB0_BEAR)
 286         printk("PLB0: BEAR= 0x%08x ACR=   0x%08x BESR=  0x%08x\n",
 287             mfdcr(DCRN_PLB0_BEAR), mfdcr(DCRN_PLB0_ACR),
 288             mfdcr(DCRN_PLB0_BESR));
 289 #endif
 290 #if defined(DCRN_POB0_BEAR)
 291         printk("PLB0 to OPB: BEAR= 0x%08x BESR0= 0x%08x BESR1= 0x%08x\n",
 292             mfdcr(DCRN_POB0_BEAR), mfdcr(DCRN_POB0_BESR0),
 293             mfdcr(DCRN_POB0_BESR1));
 294 #endif
 295
 296 }