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kbuild: document howto build external modules using several directories
[linux-2.6/verdex.git] / drivers / net / e1000 / e1000_ethtool.c
blobc88f1a3c1b1db7d58a87a779d6517480e514d31c
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for e1000 */
30
31 #include "e1000.h"
32
33 #include <asm/uaccess.h>
34
35 extern char e1000_driver_name[];
36 extern char e1000_driver_version[];
37
38 extern int e1000_up(struct e1000_adapter *adapter);
39 extern void e1000_down(struct e1000_adapter *adapter);
40 extern void e1000_reset(struct e1000_adapter *adapter);
41 extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
42 extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
43 extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
44 extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
45 extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
46 extern void e1000_update_stats(struct e1000_adapter *adapter);
47
48 struct e1000_stats {
49 char stat_string[ETH_GSTRING_LEN];
50 int sizeof_stat;
51 int stat_offset;
52 };
53
54 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
55 offsetof(struct e1000_adapter, m)
56 static const struct e1000_stats e1000_gstrings_stats[] = {
57 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
58 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
59 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
60 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
61 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
62 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
63 { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
64 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
65 { "multicast", E1000_STAT(net_stats.multicast) },
66 { "collisions", E1000_STAT(net_stats.collisions) },
67 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
68 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
69 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
70 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
71 { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
72 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
73 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
74 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
75 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
76 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
77 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
78 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
79 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
80 { "tx_deferred_ok", E1000_STAT(stats.dc) },
81 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
82 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
83 { "rx_long_length_errors", E1000_STAT(stats.roc) },
84 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
85 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
86 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
87 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
88 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
89 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
90 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
91 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
92 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
93 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
94 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
95 { "rx_header_split", E1000_STAT(rx_hdr_split) },
96 };
97 #define E1000_STATS_LEN \
98 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
99 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
100 "Register test (offline)", "Eeprom test (offline)",
101 "Interrupt test (offline)", "Loopback test (offline)",
102 "Link test (on/offline)"
103 };
104 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
105
106 static int
107 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
108 {
109 struct e1000_adapter *adapter = netdev_priv(netdev);
110 struct e1000_hw *hw = &adapter->hw;
111
112 if(hw->media_type == e1000_media_type_copper) {
113
114 ecmd->supported = (SUPPORTED_10baseT_Half |
115 SUPPORTED_10baseT_Full |
116 SUPPORTED_100baseT_Half |
117 SUPPORTED_100baseT_Full |
118 SUPPORTED_1000baseT_Full|
119 SUPPORTED_Autoneg |
120 SUPPORTED_TP);
121
122 ecmd->advertising = ADVERTISED_TP;
123
124 if(hw->autoneg == 1) {
125 ecmd->advertising |= ADVERTISED_Autoneg;
126
127 /* the e1000 autoneg seems to match ethtool nicely */
128
129 ecmd->advertising |= hw->autoneg_advertised;
130 }
131
132 ecmd->port = PORT_TP;
133 ecmd->phy_address = hw->phy_addr;
134
135 if(hw->mac_type == e1000_82543)
136 ecmd->transceiver = XCVR_EXTERNAL;
137 else
138 ecmd->transceiver = XCVR_INTERNAL;
139
140 } else {
141 ecmd->supported = (SUPPORTED_1000baseT_Full |
142 SUPPORTED_FIBRE |
143 SUPPORTED_Autoneg);
144
145 ecmd->advertising = (ADVERTISED_1000baseT_Full |
146 ADVERTISED_FIBRE |
147 ADVERTISED_Autoneg);
148
149 ecmd->port = PORT_FIBRE;
150
151 if(hw->mac_type >= e1000_82545)
152 ecmd->transceiver = XCVR_INTERNAL;
153 else
154 ecmd->transceiver = XCVR_EXTERNAL;
155 }
156
157 if(netif_carrier_ok(adapter->netdev)) {
158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex);
161 ecmd->speed = adapter->link_speed;
162
163 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
164 * and HALF_DUPLEX != DUPLEX_HALF */
165
166 if(adapter->link_duplex == FULL_DUPLEX)
167 ecmd->duplex = DUPLEX_FULL;
168 else
169 ecmd->duplex = DUPLEX_HALF;
170 } else {
171 ecmd->speed = -1;
172 ecmd->duplex = -1;
173 }
174
175 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
176 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
177 return 0;
178 }
179
180 static int
181 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
182 {
183 struct e1000_adapter *adapter = netdev_priv(netdev);
184 struct e1000_hw *hw = &adapter->hw;
185
186 if(ecmd->autoneg == AUTONEG_ENABLE) {
187 hw->autoneg = 1;
188 if(hw->media_type == e1000_media_type_fiber)
189 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
190 ADVERTISED_FIBRE |
191 ADVERTISED_Autoneg;
192 else
193 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
194 ADVERTISED_10baseT_Full |
195 ADVERTISED_100baseT_Half |
196 ADVERTISED_100baseT_Full |
197 ADVERTISED_1000baseT_Full|
198 ADVERTISED_Autoneg |
199 ADVERTISED_TP;
200 ecmd->advertising = hw->autoneg_advertised;
201 } else
202 if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
203 return -EINVAL;
204
205 /* reset the link */
206
207 if(netif_running(adapter->netdev)) {
208 e1000_down(adapter);
209 e1000_reset(adapter);
210 e1000_up(adapter);
211 } else
212 e1000_reset(adapter);
213
214 return 0;
215 }
216
217 static void
218 e1000_get_pauseparam(struct net_device *netdev,
219 struct ethtool_pauseparam *pause)
220 {
221 struct e1000_adapter *adapter = netdev_priv(netdev);
222 struct e1000_hw *hw = &adapter->hw;
223
224 pause->autoneg =
225 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
226
227 if(hw->fc == e1000_fc_rx_pause)
228 pause->rx_pause = 1;
229 else if(hw->fc == e1000_fc_tx_pause)
230 pause->tx_pause = 1;
231 else if(hw->fc == e1000_fc_full) {
232 pause->rx_pause = 1;
233 pause->tx_pause = 1;
234 }
235 }
236
237 static int
238 e1000_set_pauseparam(struct net_device *netdev,
239 struct ethtool_pauseparam *pause)
240 {
241 struct e1000_adapter *adapter = netdev_priv(netdev);
242 struct e1000_hw *hw = &adapter->hw;
243
244 adapter->fc_autoneg = pause->autoneg;
245
246 if(pause->rx_pause && pause->tx_pause)
247 hw->fc = e1000_fc_full;
248 else if(pause->rx_pause && !pause->tx_pause)
249 hw->fc = e1000_fc_rx_pause;
250 else if(!pause->rx_pause && pause->tx_pause)
251 hw->fc = e1000_fc_tx_pause;
252 else if(!pause->rx_pause && !pause->tx_pause)
253 hw->fc = e1000_fc_none;
254
255 hw->original_fc = hw->fc;
256
257 if(adapter->fc_autoneg == AUTONEG_ENABLE) {
258 if(netif_running(adapter->netdev)) {
259 e1000_down(adapter);
260 e1000_up(adapter);
261 } else
262 e1000_reset(adapter);
263 }
264 else
265 return ((hw->media_type == e1000_media_type_fiber) ?
266 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
267
268 return 0;
269 }
270
271 static uint32_t
272 e1000_get_rx_csum(struct net_device *netdev)
273 {
274 struct e1000_adapter *adapter = netdev_priv(netdev);
275 return adapter->rx_csum;
276 }
277
278 static int
279 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
280 {
281 struct e1000_adapter *adapter = netdev_priv(netdev);
282 adapter->rx_csum = data;
283
284 if(netif_running(netdev)) {
285 e1000_down(adapter);
286 e1000_up(adapter);
287 } else
288 e1000_reset(adapter);
289 return 0;
290 }
291
292 static uint32_t
293 e1000_get_tx_csum(struct net_device *netdev)
294 {
295 return (netdev->features & NETIF_F_HW_CSUM) != 0;
296 }
297
298 static int
299 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
300 {
301 struct e1000_adapter *adapter = netdev_priv(netdev);
302
303 if(adapter->hw.mac_type < e1000_82543) {
304 if (!data)
305 return -EINVAL;
306 return 0;
307 }
308
309 if (data)
310 netdev->features |= NETIF_F_HW_CSUM;
311 else
312 netdev->features &= ~NETIF_F_HW_CSUM;
313
314 return 0;
315 }
316
317 #ifdef NETIF_F_TSO
318 static int
319 e1000_set_tso(struct net_device *netdev, uint32_t data)
320 {
321 struct e1000_adapter *adapter = netdev_priv(netdev);
322 if((adapter->hw.mac_type < e1000_82544) ||
323 (adapter->hw.mac_type == e1000_82547))
324 return data ? -EINVAL : 0;
325
326 if (data)
327 netdev->features |= NETIF_F_TSO;
328 else
329 netdev->features &= ~NETIF_F_TSO;
330 return 0;
331 }
332 #endif /* NETIF_F_TSO */
333
334 static uint32_t
335 e1000_get_msglevel(struct net_device *netdev)
336 {
337 struct e1000_adapter *adapter = netdev_priv(netdev);
338 return adapter->msg_enable;
339 }
340
341 static void
342 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
343 {
344 struct e1000_adapter *adapter = netdev_priv(netdev);
345 adapter->msg_enable = data;
346 }
347
348 static int
349 e1000_get_regs_len(struct net_device *netdev)
350 {
351 #define E1000_REGS_LEN 32
352 return E1000_REGS_LEN * sizeof(uint32_t);
353 }
354
355 static void
356 e1000_get_regs(struct net_device *netdev,
357 struct ethtool_regs *regs, void *p)
358 {
359 struct e1000_adapter *adapter = netdev_priv(netdev);
360 struct e1000_hw *hw = &adapter->hw;
361 uint32_t *regs_buff = p;
362 uint16_t phy_data;
363
364 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
365
366 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
367
368 regs_buff[0] = E1000_READ_REG(hw, CTRL);
369 regs_buff[1] = E1000_READ_REG(hw, STATUS);
370
371 regs_buff[2] = E1000_READ_REG(hw, RCTL);
372 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
373 regs_buff[4] = E1000_READ_REG(hw, RDH);
374 regs_buff[5] = E1000_READ_REG(hw, RDT);
375 regs_buff[6] = E1000_READ_REG(hw, RDTR);
376
377 regs_buff[7] = E1000_READ_REG(hw, TCTL);
378 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
379 regs_buff[9] = E1000_READ_REG(hw, TDH);
380 regs_buff[10] = E1000_READ_REG(hw, TDT);
381 regs_buff[11] = E1000_READ_REG(hw, TIDV);
382
383 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
384 if(hw->phy_type == e1000_phy_igp) {
385 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
386 IGP01E1000_PHY_AGC_A);
387 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
388 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
389 regs_buff[13] = (uint32_t)phy_data; /* cable length */
390 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
391 IGP01E1000_PHY_AGC_B);
392 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
393 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
394 regs_buff[14] = (uint32_t)phy_data; /* cable length */
395 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
396 IGP01E1000_PHY_AGC_C);
397 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
398 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
399 regs_buff[15] = (uint32_t)phy_data; /* cable length */
400 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
401 IGP01E1000_PHY_AGC_D);
402 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
403 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
404 regs_buff[16] = (uint32_t)phy_data; /* cable length */
405 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
406 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
407 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
408 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
409 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
410 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
411 IGP01E1000_PHY_PCS_INIT_REG);
412 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
413 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
414 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
415 regs_buff[20] = 0; /* polarity correction enabled (always) */
416 regs_buff[22] = 0; /* phy receive errors (unavailable) */
417 regs_buff[23] = regs_buff[18]; /* mdix mode */
418 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
419 } else {
420 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
421 regs_buff[13] = (uint32_t)phy_data; /* cable length */
422 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
423 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
424 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
425 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
426 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
427 regs_buff[18] = regs_buff[13]; /* cable polarity */
428 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
429 regs_buff[20] = regs_buff[17]; /* polarity correction */
430 /* phy receive errors */
431 regs_buff[22] = adapter->phy_stats.receive_errors;
432 regs_buff[23] = regs_buff[13]; /* mdix mode */
433 }
434 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
435 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
436 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
437 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
438 if(hw->mac_type >= e1000_82540 &&
439 hw->media_type == e1000_media_type_copper) {
440 regs_buff[26] = E1000_READ_REG(hw, MANC);
441 }
442 }
443
444 static int
445 e1000_get_eeprom_len(struct net_device *netdev)
446 {
447 struct e1000_adapter *adapter = netdev_priv(netdev);
448 return adapter->hw.eeprom.word_size * 2;
449 }
450
451 static int
452 e1000_get_eeprom(struct net_device *netdev,
453 struct ethtool_eeprom *eeprom, uint8_t *bytes)
454 {
455 struct e1000_adapter *adapter = netdev_priv(netdev);
456 struct e1000_hw *hw = &adapter->hw;
457 uint16_t *eeprom_buff;
458 int first_word, last_word;
459 int ret_val = 0;
460 uint16_t i;
461
462 if(eeprom->len == 0)
463 return -EINVAL;
464
465 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
466
467 first_word = eeprom->offset >> 1;
468 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
469
470 eeprom_buff = kmalloc(sizeof(uint16_t) *
471 (last_word - first_word + 1), GFP_KERNEL);
472 if(!eeprom_buff)
473 return -ENOMEM;
474
475 if(hw->eeprom.type == e1000_eeprom_spi)
476 ret_val = e1000_read_eeprom(hw, first_word,
477 last_word - first_word + 1,
478 eeprom_buff);
479 else {
480 for (i = 0; i < last_word - first_word + 1; i++)
481 if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
482 &eeprom_buff[i])))
483 break;
484 }
485
486 /* Device's eeprom is always little-endian, word addressable */
487 for (i = 0; i < last_word - first_word + 1; i++)
488 le16_to_cpus(&eeprom_buff[i]);
489
490 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
491 eeprom->len);
492 kfree(eeprom_buff);
493
494 return ret_val;
495 }
496
497 static int
498 e1000_set_eeprom(struct net_device *netdev,
499 struct ethtool_eeprom *eeprom, uint8_t *bytes)
500 {
501 struct e1000_adapter *adapter = netdev_priv(netdev);
502 struct e1000_hw *hw = &adapter->hw;
503 uint16_t *eeprom_buff;
504 void *ptr;
505 int max_len, first_word, last_word, ret_val = 0;
506 uint16_t i;
507
508 if(eeprom->len == 0)
509 return -EOPNOTSUPP;
510
511 if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
512 return -EFAULT;
513
514 max_len = hw->eeprom.word_size * 2;
515
516 first_word = eeprom->offset >> 1;
517 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
518 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
519 if(!eeprom_buff)
520 return -ENOMEM;
521
522 ptr = (void *)eeprom_buff;
523
524 if(eeprom->offset & 1) {
525 /* need read/modify/write of first changed EEPROM word */
526 /* only the second byte of the word is being modified */
527 ret_val = e1000_read_eeprom(hw, first_word, 1,
528 &eeprom_buff[0]);
529 ptr++;
530 }
531 if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
532 /* need read/modify/write of last changed EEPROM word */
533 /* only the first byte of the word is being modified */
534 ret_val = e1000_read_eeprom(hw, last_word, 1,
535 &eeprom_buff[last_word - first_word]);
536 }
537
538 /* Device's eeprom is always little-endian, word addressable */
539 for (i = 0; i < last_word - first_word + 1; i++)
540 le16_to_cpus(&eeprom_buff[i]);
541
542 memcpy(ptr, bytes, eeprom->len);
543
544 for (i = 0; i < last_word - first_word + 1; i++)
545 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
546
547 ret_val = e1000_write_eeprom(hw, first_word,
548 last_word - first_word + 1, eeprom_buff);
549
550 /* Update the checksum over the first part of the EEPROM if needed
551 * and flush shadow RAM for 82573 conrollers */
552 if((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
553 (hw->mac_type == e1000_82573)))
554 e1000_update_eeprom_checksum(hw);
555
556 kfree(eeprom_buff);
557 return ret_val;
558 }
559
560 static void
561 e1000_get_drvinfo(struct net_device *netdev,
562 struct ethtool_drvinfo *drvinfo)
563 {
564 struct e1000_adapter *adapter = netdev_priv(netdev);
565 char firmware_version[32];
566 uint16_t eeprom_data;
567
568 strncpy(drvinfo->driver, e1000_driver_name, 32);
569 strncpy(drvinfo->version, e1000_driver_version, 32);
570
571 /* EEPROM image version # is reported as firware version # for
572 * 8257{1|2|3} controllers */
573 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
574 switch (adapter->hw.mac_type) {
575 case e1000_82571:
576 case e1000_82572:
577 case e1000_82573:
578 sprintf(firmware_version, "%d.%d-%d",
579 (eeprom_data & 0xF000) >> 12,
580 (eeprom_data & 0x0FF0) >> 4,
581 eeprom_data & 0x000F);
582 break;
583 default:
584 sprintf(firmware_version, "n/a");
585 }
586
587 strncpy(drvinfo->fw_version, firmware_version, 32);
588 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
589 drvinfo->n_stats = E1000_STATS_LEN;
590 drvinfo->testinfo_len = E1000_TEST_LEN;
591 drvinfo->regdump_len = e1000_get_regs_len(netdev);
592 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
593 }
594
595 static void
596 e1000_get_ringparam(struct net_device *netdev,
597 struct ethtool_ringparam *ring)
598 {
599 struct e1000_adapter *adapter = netdev_priv(netdev);
600 e1000_mac_type mac_type = adapter->hw.mac_type;
601 struct e1000_tx_ring *txdr = adapter->tx_ring;
602 struct e1000_rx_ring *rxdr = adapter->rx_ring;
603
604 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
605 E1000_MAX_82544_RXD;
606 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
607 E1000_MAX_82544_TXD;
608 ring->rx_mini_max_pending = 0;
609 ring->rx_jumbo_max_pending = 0;
610 ring->rx_pending = rxdr->count;
611 ring->tx_pending = txdr->count;
612 ring->rx_mini_pending = 0;
613 ring->rx_jumbo_pending = 0;
614 }
615
616 static int
617 e1000_set_ringparam(struct net_device *netdev,
618 struct ethtool_ringparam *ring)
619 {
620 struct e1000_adapter *adapter = netdev_priv(netdev);
621 e1000_mac_type mac_type = adapter->hw.mac_type;
622 struct e1000_tx_ring *txdr, *tx_old, *tx_new;
623 struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
624 int i, err, tx_ring_size, rx_ring_size;
625
626 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
627 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
628
629 if (netif_running(adapter->netdev))
630 e1000_down(adapter);
631
632 tx_old = adapter->tx_ring;
633 rx_old = adapter->rx_ring;
634
635 adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
636 if (!adapter->tx_ring) {
637 err = -ENOMEM;
638 goto err_setup_rx;
639 }
640 memset(adapter->tx_ring, 0, tx_ring_size);
641
642 adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
643 if (!adapter->rx_ring) {
644 kfree(adapter->tx_ring);
645 err = -ENOMEM;
646 goto err_setup_rx;
647 }
648 memset(adapter->rx_ring, 0, rx_ring_size);
649
650 txdr = adapter->tx_ring;
651 rxdr = adapter->rx_ring;
652
653 if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
654 return -EINVAL;
655
656 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
657 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
658 E1000_MAX_RXD : E1000_MAX_82544_RXD));
659 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
660
661 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
662 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
663 E1000_MAX_TXD : E1000_MAX_82544_TXD));
664 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
665
666 for (i = 0; i < adapter->num_queues; i++) {
667 txdr[i].count = txdr->count;
668 rxdr[i].count = rxdr->count;
669 }
670
671 if(netif_running(adapter->netdev)) {
672 /* Try to get new resources before deleting old */
673 if ((err = e1000_setup_all_rx_resources(adapter)))
674 goto err_setup_rx;
675 if ((err = e1000_setup_all_tx_resources(adapter)))
676 goto err_setup_tx;
677
678 /* save the new, restore the old in order to free it,
679 * then restore the new back again */
680
681 rx_new = adapter->rx_ring;
682 tx_new = adapter->tx_ring;
683 adapter->rx_ring = rx_old;
684 adapter->tx_ring = tx_old;
685 e1000_free_all_rx_resources(adapter);
686 e1000_free_all_tx_resources(adapter);
687 kfree(tx_old);
688 kfree(rx_old);
689 adapter->rx_ring = rx_new;
690 adapter->tx_ring = tx_new;
691 if((err = e1000_up(adapter)))
692 return err;
693 }
694
695 return 0;
696 err_setup_tx:
697 e1000_free_all_rx_resources(adapter);
698 err_setup_rx:
699 adapter->rx_ring = rx_old;
700 adapter->tx_ring = tx_old;
701 e1000_up(adapter);
702 return err;
703 }
704
705 #define REG_PATTERN_TEST(R, M, W) \
706 { \
707 uint32_t pat, value; \
708 uint32_t test[] = \
709 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
710 for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
711 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
712 value = E1000_READ_REG(&adapter->hw, R); \
713 if(value != (test[pat] & W & M)) { \
714 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
715 "0x%08X expected 0x%08X\n", \
716 E1000_##R, value, (test[pat] & W & M)); \
717 *data = (adapter->hw.mac_type < e1000_82543) ? \
718 E1000_82542_##R : E1000_##R; \
719 return 1; \
720 } \
721 } \
722 }
723
724 #define REG_SET_AND_CHECK(R, M, W) \
725 { \
726 uint32_t value; \
727 E1000_WRITE_REG(&adapter->hw, R, W & M); \
728 value = E1000_READ_REG(&adapter->hw, R); \
729 if((W & M) != (value & M)) { \
730 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
731 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
732 *data = (adapter->hw.mac_type < e1000_82543) ? \
733 E1000_82542_##R : E1000_##R; \
734 return 1; \
735 } \
736 }
737
738 static int
739 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
740 {
741 uint32_t value, before, after;
742 uint32_t i, toggle;
743
744 /* The status register is Read Only, so a write should fail.
745 * Some bits that get toggled are ignored.
746 */
747 switch (adapter->hw.mac_type) {
748 /* there are several bits on newer hardware that are r/w */
749 case e1000_82571:
750 case e1000_82572:
751 toggle = 0x7FFFF3FF;
752 break;
753 case e1000_82573:
754 toggle = 0x7FFFF033;
755 break;
756 default:
757 toggle = 0xFFFFF833;
758 break;
759 }
760
761 before = E1000_READ_REG(&adapter->hw, STATUS);
762 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
763 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
764 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
765 if(value != after) {
766 DPRINTK(DRV, ERR, "failed STATUS register test got: "
767 "0x%08X expected: 0x%08X\n", after, value);
768 *data = 1;
769 return 1;
770 }
771 /* restore previous status */
772 E1000_WRITE_REG(&adapter->hw, STATUS, before);
773
774 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
775 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
776 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
777 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
778 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
779 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
780 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
781 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
782 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
783 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
784 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
785 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
786 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
787 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
788
789 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
790 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
791 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
792
793 if(adapter->hw.mac_type >= e1000_82543) {
794
795 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
796 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
797 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
798 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
799 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
800
801 for(i = 0; i < E1000_RAR_ENTRIES; i++) {
802 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
803 0xFFFFFFFF);
804 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
805 0xFFFFFFFF);
806 }
807
808 } else {
809
810 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
811 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
812 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
813 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
814
815 }
816
817 for(i = 0; i < E1000_MC_TBL_SIZE; i++)
818 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
819
820 *data = 0;
821 return 0;
822 }
823
824 static int
825 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
826 {
827 uint16_t temp;
828 uint16_t checksum = 0;
829 uint16_t i;
830
831 *data = 0;
832 /* Read and add up the contents of the EEPROM */
833 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
834 if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
835 *data = 1;
836 break;
837 }
838 checksum += temp;
839 }
840
841 /* If Checksum is not Correct return error else test passed */
842 if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
843 *data = 2;
844
845 return *data;
846 }
847
848 static irqreturn_t
849 e1000_test_intr(int irq,
850 void *data,
851 struct pt_regs *regs)
852 {
853 struct net_device *netdev = (struct net_device *) data;
854 struct e1000_adapter *adapter = netdev_priv(netdev);
855
856 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
857
858 return IRQ_HANDLED;
859 }
860
861 static int
862 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
863 {
864 struct net_device *netdev = adapter->netdev;
865 uint32_t mask, i=0, shared_int = TRUE;
866 uint32_t irq = adapter->pdev->irq;
867
868 *data = 0;
869
870 /* Hook up test interrupt handler just for this test */
871 if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
872 shared_int = FALSE;
873 } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
874 netdev->name, netdev)){
875 *data = 1;
876 return -1;
877 }
878
879 /* Disable all the interrupts */
880 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
881 msec_delay(10);
882
883 /* Test each interrupt */
884 for(; i < 10; i++) {
885
886 /* Interrupt to test */
887 mask = 1 << i;
888
889 if(!shared_int) {
890 /* Disable the interrupt to be reported in
891 * the cause register and then force the same
892 * interrupt and see if one gets posted. If
893 * an interrupt was posted to the bus, the
894 * test failed.
895 */
896 adapter->test_icr = 0;
897 E1000_WRITE_REG(&adapter->hw, IMC, mask);
898 E1000_WRITE_REG(&adapter->hw, ICS, mask);
899 msec_delay(10);
900
901 if(adapter->test_icr & mask) {
902 *data = 3;
903 break;
904 }
905 }
906
907 /* Enable the interrupt to be reported in
908 * the cause register and then force the same
909 * interrupt and see if one gets posted. If
910 * an interrupt was not posted to the bus, the
911 * test failed.
912 */
913 adapter->test_icr = 0;
914 E1000_WRITE_REG(&adapter->hw, IMS, mask);
915 E1000_WRITE_REG(&adapter->hw, ICS, mask);
916 msec_delay(10);
917
918 if(!(adapter->test_icr & mask)) {
919 *data = 4;
920 break;
921 }
922
923 if(!shared_int) {
924 /* Disable the other interrupts to be reported in
925 * the cause register and then force the other
926 * interrupts and see if any get posted. If
927 * an interrupt was posted to the bus, the
928 * test failed.
929 */
930 adapter->test_icr = 0;
931 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
932 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
933 msec_delay(10);
934
935 if(adapter->test_icr) {
936 *data = 5;
937 break;
938 }
939 }
940 }
941
942 /* Disable all the interrupts */
943 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
944 msec_delay(10);
945
946 /* Unhook test interrupt handler */
947 free_irq(irq, netdev);
948
949 return *data;
950 }
951
952 static void
953 e1000_free_desc_rings(struct e1000_adapter *adapter)
954 {
955 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
956 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
957 struct pci_dev *pdev = adapter->pdev;
958 int i;
959
960 if(txdr->desc && txdr->buffer_info) {
961 for(i = 0; i < txdr->count; i++) {
962 if(txdr->buffer_info[i].dma)
963 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
964 txdr->buffer_info[i].length,
965 PCI_DMA_TODEVICE);
966 if(txdr->buffer_info[i].skb)
967 dev_kfree_skb(txdr->buffer_info[i].skb);
968 }
969 }
970
971 if(rxdr->desc && rxdr->buffer_info) {
972 for(i = 0; i < rxdr->count; i++) {
973 if(rxdr->buffer_info[i].dma)
974 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
975 rxdr->buffer_info[i].length,
976 PCI_DMA_FROMDEVICE);
977 if(rxdr->buffer_info[i].skb)
978 dev_kfree_skb(rxdr->buffer_info[i].skb);
979 }
980 }
981
982 if(txdr->desc) {
983 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
984 txdr->desc = NULL;
985 }
986 if(rxdr->desc) {
987 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
988 rxdr->desc = NULL;
989 }
990
991 kfree(txdr->buffer_info);
992 txdr->buffer_info = NULL;
993
994 kfree(rxdr->buffer_info);
995 rxdr->buffer_info = NULL;
996
997 return;
998 }
999
1000 static int
1001 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1002 {
1003 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1004 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1005 struct pci_dev *pdev = adapter->pdev;
1006 uint32_t rctl;
1007 int size, i, ret_val;
1008
1009 /* Setup Tx descriptor ring and Tx buffers */
1010
1011 if(!txdr->count)
1012 txdr->count = E1000_DEFAULT_TXD;
1013
1014 size = txdr->count * sizeof(struct e1000_buffer);
1015 if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1016 ret_val = 1;
1017 goto err_nomem;
1018 }
1019 memset(txdr->buffer_info, 0, size);
1020
1021 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1022 E1000_ROUNDUP(txdr->size, 4096);
1023 if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1024 ret_val = 2;
1025 goto err_nomem;
1026 }
1027 memset(txdr->desc, 0, txdr->size);
1028 txdr->next_to_use = txdr->next_to_clean = 0;
1029
1030 E1000_WRITE_REG(&adapter->hw, TDBAL,
1031 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1032 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1033 E1000_WRITE_REG(&adapter->hw, TDLEN,
1034 txdr->count * sizeof(struct e1000_tx_desc));
1035 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1036 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1037 E1000_WRITE_REG(&adapter->hw, TCTL,
1038 E1000_TCTL_PSP | E1000_TCTL_EN |
1039 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1040 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1041
1042 for(i = 0; i < txdr->count; i++) {
1043 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1044 struct sk_buff *skb;
1045 unsigned int size = 1024;
1046
1047 if(!(skb = alloc_skb(size, GFP_KERNEL))) {
1048 ret_val = 3;
1049 goto err_nomem;
1050 }
1051 skb_put(skb, size);
1052 txdr->buffer_info[i].skb = skb;
1053 txdr->buffer_info[i].length = skb->len;
1054 txdr->buffer_info[i].dma =
1055 pci_map_single(pdev, skb->data, skb->len,
1056 PCI_DMA_TODEVICE);
1057 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1058 tx_desc->lower.data = cpu_to_le32(skb->len);
1059 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1060 E1000_TXD_CMD_IFCS |
1061 E1000_TXD_CMD_RPS);
1062 tx_desc->upper.data = 0;
1063 }
1064
1065 /* Setup Rx descriptor ring and Rx buffers */
1066
1067 if(!rxdr->count)
1068 rxdr->count = E1000_DEFAULT_RXD;
1069
1070 size = rxdr->count * sizeof(struct e1000_buffer);
1071 if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1072 ret_val = 4;
1073 goto err_nomem;
1074 }
1075 memset(rxdr->buffer_info, 0, size);
1076
1077 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1078 if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1079 ret_val = 5;
1080 goto err_nomem;
1081 }
1082 memset(rxdr->desc, 0, rxdr->size);
1083 rxdr->next_to_use = rxdr->next_to_clean = 0;
1084
1085 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1086 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1087 E1000_WRITE_REG(&adapter->hw, RDBAL,
1088 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1089 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1090 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1091 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1092 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1093 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1094 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1095 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1096 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1097
1098 for(i = 0; i < rxdr->count; i++) {
1099 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1100 struct sk_buff *skb;
1101
1102 if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1103 GFP_KERNEL))) {
1104 ret_val = 6;
1105 goto err_nomem;
1106 }
1107 skb_reserve(skb, NET_IP_ALIGN);
1108 rxdr->buffer_info[i].skb = skb;
1109 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1110 rxdr->buffer_info[i].dma =
1111 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1112 PCI_DMA_FROMDEVICE);
1113 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1114 memset(skb->data, 0x00, skb->len);
1115 }
1116
1117 return 0;
1118
1119 err_nomem:
1120 e1000_free_desc_rings(adapter);
1121 return ret_val;
1122 }
1123
1124 static void
1125 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1126 {
1127 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1128 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1129 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1130 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1131 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1132 }
1133
1134 static void
1135 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1136 {
1137 uint16_t phy_reg;
1138
1139 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1140 * Extended PHY Specific Control Register to 25MHz clock. This
1141 * value defaults back to a 2.5MHz clock when the PHY is reset.
1142 */
1143 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1144 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1145 e1000_write_phy_reg(&adapter->hw,
1146 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1147
1148 /* In addition, because of the s/w reset above, we need to enable
1149 * CRS on TX. This must be set for both full and half duplex
1150 * operation.
1151 */
1152 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1153 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1154 e1000_write_phy_reg(&adapter->hw,
1155 M88E1000_PHY_SPEC_CTRL, phy_reg);
1156 }
1157
1158 static int
1159 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1160 {
1161 uint32_t ctrl_reg;
1162 uint16_t phy_reg;
1163
1164 /* Setup the Device Control Register for PHY loopback test. */
1165
1166 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1167 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1168 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1169 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1170 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1171 E1000_CTRL_FD); /* Force Duplex to FULL */
1172
1173 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1174
1175 /* Read the PHY Specific Control Register (0x10) */
1176 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1177
1178 /* Clear Auto-Crossover bits in PHY Specific Control Register
1179 * (bits 6:5).
1180 */
1181 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1182 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1183
1184 /* Perform software reset on the PHY */
1185 e1000_phy_reset(&adapter->hw);
1186
1187 /* Have to setup TX_CLK and TX_CRS after software reset */
1188 e1000_phy_reset_clk_and_crs(adapter);
1189
1190 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1191
1192 /* Wait for reset to complete. */
1193 udelay(500);
1194
1195 /* Have to setup TX_CLK and TX_CRS after software reset */
1196 e1000_phy_reset_clk_and_crs(adapter);
1197
1198 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1199 e1000_phy_disable_receiver(adapter);
1200
1201 /* Set the loopback bit in the PHY control register. */
1202 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1203 phy_reg |= MII_CR_LOOPBACK;
1204 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1205
1206 /* Setup TX_CLK and TX_CRS one more time. */
1207 e1000_phy_reset_clk_and_crs(adapter);
1208
1209 /* Check Phy Configuration */
1210 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1211 if(phy_reg != 0x4100)
1212 return 9;
1213
1214 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1215 if(phy_reg != 0x0070)
1216 return 10;
1217
1218 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1219 if(phy_reg != 0x001A)
1220 return 11;
1221
1222 return 0;
1223 }
1224
1225 static int
1226 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1227 {
1228 uint32_t ctrl_reg = 0;
1229 uint32_t stat_reg = 0;
1230
1231 adapter->hw.autoneg = FALSE;
1232
1233 if(adapter->hw.phy_type == e1000_phy_m88) {
1234 /* Auto-MDI/MDIX Off */
1235 e1000_write_phy_reg(&adapter->hw,
1236 M88E1000_PHY_SPEC_CTRL, 0x0808);
1237 /* reset to update Auto-MDI/MDIX */
1238 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1239 /* autoneg off */
1240 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1241 }
1242 /* force 1000, set loopback */
1243 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1244
1245 /* Now set up the MAC to the same speed/duplex as the PHY. */
1246 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1247 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1248 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1249 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1250 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1251 E1000_CTRL_FD); /* Force Duplex to FULL */
1252
1253 if(adapter->hw.media_type == e1000_media_type_copper &&
1254 adapter->hw.phy_type == e1000_phy_m88) {
1255 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1256 } else {
1257 /* Set the ILOS bit on the fiber Nic is half
1258 * duplex link is detected. */
1259 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1260 if((stat_reg & E1000_STATUS_FD) == 0)
1261 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1262 }
1263
1264 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1265
1266 /* Disable the receiver on the PHY so when a cable is plugged in, the
1267 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1268 */
1269 if(adapter->hw.phy_type == e1000_phy_m88)
1270 e1000_phy_disable_receiver(adapter);
1271
1272 udelay(500);
1273
1274 return 0;
1275 }
1276
1277 static int
1278 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1279 {
1280 uint16_t phy_reg = 0;
1281 uint16_t count = 0;
1282
1283 switch (adapter->hw.mac_type) {
1284 case e1000_82543:
1285 if(adapter->hw.media_type == e1000_media_type_copper) {
1286 /* Attempt to setup Loopback mode on Non-integrated PHY.
1287 * Some PHY registers get corrupted at random, so
1288 * attempt this 10 times.
1289 */
1290 while(e1000_nonintegrated_phy_loopback(adapter) &&
1291 count++ < 10);
1292 if(count < 11)
1293 return 0;
1294 }
1295 break;
1296
1297 case e1000_82544:
1298 case e1000_82540:
1299 case e1000_82545:
1300 case e1000_82545_rev_3:
1301 case e1000_82546:
1302 case e1000_82546_rev_3:
1303 case e1000_82541:
1304 case e1000_82541_rev_2:
1305 case e1000_82547:
1306 case e1000_82547_rev_2:
1307 case e1000_82571:
1308 case e1000_82572:
1309 case e1000_82573:
1310 return e1000_integrated_phy_loopback(adapter);
1311 break;
1312
1313 default:
1314 /* Default PHY loopback work is to read the MII
1315 * control register and assert bit 14 (loopback mode).
1316 */
1317 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1318 phy_reg |= MII_CR_LOOPBACK;
1319 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1320 return 0;
1321 break;
1322 }
1323
1324 return 8;
1325 }
1326
1327 static int
1328 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1329 {
1330 uint32_t rctl;
1331 struct e1000_hw *hw = &adapter->hw;
1332
1333 if (hw->media_type == e1000_media_type_fiber ||
1334 hw->media_type == e1000_media_type_internal_serdes) {
1335 switch (hw->mac_type) {
1336 case e1000_82545:
1337 case e1000_82546:
1338 case e1000_82545_rev_3:
1339 case e1000_82546_rev_3:
1340 return e1000_set_phy_loopback(adapter);
1341 break;
1342 case e1000_82571:
1343 case e1000_82572:
1344 #define E1000_SERDES_LB_ON 0x410
1345 e1000_set_phy_loopback(adapter);
1346 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1347 msec_delay(10);
1348 return 0;
1349 break;
1350 default:
1351 rctl = E1000_READ_REG(hw, RCTL);
1352 rctl |= E1000_RCTL_LBM_TCVR;
1353 E1000_WRITE_REG(hw, RCTL, rctl);
1354 return 0;
1355 }
1356 } else if (hw->media_type == e1000_media_type_copper)
1357 return e1000_set_phy_loopback(adapter);
1358
1359 return 7;
1360 }
1361
1362 static void
1363 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1364 {
1365 uint32_t rctl;
1366 uint16_t phy_reg;
1367 struct e1000_hw *hw = &adapter->hw;
1368
1369 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1370 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1371 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1372
1373 switch (hw->mac_type) {
1374 case e1000_82571:
1375 case e1000_82572:
1376 if (hw->media_type == e1000_media_type_fiber ||
1377 hw->media_type == e1000_media_type_internal_serdes){
1378 #define E1000_SERDES_LB_OFF 0x400
1379 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1380 msec_delay(10);
1381 break;
1382 }
1383 /* fall thru for Cu adapters */
1384 case e1000_82545:
1385 case e1000_82546:
1386 case e1000_82545_rev_3:
1387 case e1000_82546_rev_3:
1388 default:
1389 hw->autoneg = TRUE;
1390 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1391 if (phy_reg & MII_CR_LOOPBACK) {
1392 phy_reg &= ~MII_CR_LOOPBACK;
1393 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1394 e1000_phy_reset(hw);
1395 }
1396 break;
1397 }
1398 }
1399
1400 static void
1401 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1402 {
1403 memset(skb->data, 0xFF, frame_size);
1404 frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
1405 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1406 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1407 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1408 }
1409
1410 static int
1411 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1412 {
1413 frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
1414 if(*(skb->data + 3) == 0xFF) {
1415 if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1416 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1417 return 0;
1418 }
1419 }
1420 return 13;
1421 }
1422
1423 static int
1424 e1000_run_loopback_test(struct e1000_adapter *adapter)
1425 {
1426 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1427 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1428 struct pci_dev *pdev = adapter->pdev;
1429 int i, j, k, l, lc, good_cnt, ret_val=0;
1430 unsigned long time;
1431
1432 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1433
1434 /* Calculate the loop count based on the largest descriptor ring
1435 * The idea is to wrap the largest ring a number of times using 64
1436 * send/receive pairs during each loop
1437 */
1438
1439 if(rxdr->count <= txdr->count)
1440 lc = ((txdr->count / 64) * 2) + 1;
1441 else
1442 lc = ((rxdr->count / 64) * 2) + 1;
1443
1444 k = l = 0;
1445 for(j = 0; j <= lc; j++) { /* loop count loop */
1446 for(i = 0; i < 64; i++) { /* send the packets */
1447 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1448 1024);
1449 pci_dma_sync_single_for_device(pdev,
1450 txdr->buffer_info[k].dma,
1451 txdr->buffer_info[k].length,
1452 PCI_DMA_TODEVICE);
1453 if(unlikely(++k == txdr->count)) k = 0;
1454 }
1455 E1000_WRITE_REG(&adapter->hw, TDT, k);
1456 msec_delay(200);
1457 time = jiffies; /* set the start time for the receive */
1458 good_cnt = 0;
1459 do { /* receive the sent packets */
1460 pci_dma_sync_single_for_cpu(pdev,
1461 rxdr->buffer_info[l].dma,
1462 rxdr->buffer_info[l].length,
1463 PCI_DMA_FROMDEVICE);
1464
1465 ret_val = e1000_check_lbtest_frame(
1466 rxdr->buffer_info[l].skb,
1467 1024);
1468 if(!ret_val)
1469 good_cnt++;
1470 if(unlikely(++l == rxdr->count)) l = 0;
1471 /* time + 20 msecs (200 msecs on 2.4) is more than
1472 * enough time to complete the receives, if it's
1473 * exceeded, break and error off
1474 */
1475 } while (good_cnt < 64 && jiffies < (time + 20));
1476 if(good_cnt != 64) {
1477 ret_val = 13; /* ret_val is the same as mis-compare */
1478 break;
1479 }
1480 if(jiffies >= (time + 2)) {
1481 ret_val = 14; /* error code for time out error */
1482 break;
1483 }
1484 } /* end loop count loop */
1485 return ret_val;
1486 }
1487
1488 static int
1489 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1490 {
1491 if((*data = e1000_setup_desc_rings(adapter))) goto err_loopback;
1492 if((*data = e1000_setup_loopback_test(adapter)))
1493 goto err_loopback_setup;
1494 *data = e1000_run_loopback_test(adapter);
1495 e1000_loopback_cleanup(adapter);
1496 err_loopback_setup:
1497 e1000_free_desc_rings(adapter);
1498 err_loopback:
1499 return *data;
1500 }
1501
1502 static int
1503 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1504 {
1505 *data = 0;
1506 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1507 int i = 0;
1508 adapter->hw.serdes_link_down = TRUE;
1509
1510 /* On some blade server designs, link establishment
1511 * could take as long as 2-3 minutes */
1512 do {
1513 e1000_check_for_link(&adapter->hw);
1514 if (adapter->hw.serdes_link_down == FALSE)
1515 return *data;
1516 msec_delay(20);
1517 } while (i++ < 3750);
1518
1519 *data = 1;
1520 } else {
1521 e1000_check_for_link(&adapter->hw);
1522 if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
1523 msec_delay(4000);
1524
1525 if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1526 *data = 1;
1527 }
1528 }
1529 return *data;
1530 }
1531
1532 static int
1533 e1000_diag_test_count(struct net_device *netdev)
1534 {
1535 return E1000_TEST_LEN;
1536 }
1537
1538 static void
1539 e1000_diag_test(struct net_device *netdev,
1540 struct ethtool_test *eth_test, uint64_t *data)
1541 {
1542 struct e1000_adapter *adapter = netdev_priv(netdev);
1543 boolean_t if_running = netif_running(netdev);
1544
1545 if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
1546 /* Offline tests */
1547
1548 /* save speed, duplex, autoneg settings */
1549 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1550 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1551 uint8_t autoneg = adapter->hw.autoneg;
1552
1553 /* Link test performed before hardware reset so autoneg doesn't
1554 * interfere with test result */
1555 if(e1000_link_test(adapter, &data[4]))
1556 eth_test->flags |= ETH_TEST_FL_FAILED;
1557
1558 if(if_running)
1559 e1000_down(adapter);
1560 else
1561 e1000_reset(adapter);
1562
1563 if(e1000_reg_test(adapter, &data[0]))
1564 eth_test->flags |= ETH_TEST_FL_FAILED;
1565
1566 e1000_reset(adapter);
1567 if(e1000_eeprom_test(adapter, &data[1]))
1568 eth_test->flags |= ETH_TEST_FL_FAILED;
1569
1570 e1000_reset(adapter);
1571 if(e1000_intr_test(adapter, &data[2]))
1572 eth_test->flags |= ETH_TEST_FL_FAILED;
1573
1574 e1000_reset(adapter);
1575 if(e1000_loopback_test(adapter, &data[3]))
1576 eth_test->flags |= ETH_TEST_FL_FAILED;
1577
1578 /* restore speed, duplex, autoneg settings */
1579 adapter->hw.autoneg_advertised = autoneg_advertised;
1580 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1581 adapter->hw.autoneg = autoneg;
1582
1583 e1000_reset(adapter);
1584 if(if_running)
1585 e1000_up(adapter);
1586 } else {
1587 /* Online tests */
1588 if(e1000_link_test(adapter, &data[4]))
1589 eth_test->flags |= ETH_TEST_FL_FAILED;
1590
1591 /* Offline tests aren't run; pass by default */
1592 data[0] = 0;
1593 data[1] = 0;
1594 data[2] = 0;
1595 data[3] = 0;
1596 }
1597 msleep_interruptible(4 * 1000);
1598 }
1599
1600 static void
1601 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1602 {
1603 struct e1000_adapter *adapter = netdev_priv(netdev);
1604 struct e1000_hw *hw = &adapter->hw;
1605
1606 switch(adapter->hw.device_id) {
1607 case E1000_DEV_ID_82542:
1608 case E1000_DEV_ID_82543GC_FIBER:
1609 case E1000_DEV_ID_82543GC_COPPER:
1610 case E1000_DEV_ID_82544EI_FIBER:
1611 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1612 case E1000_DEV_ID_82545EM_FIBER:
1613 case E1000_DEV_ID_82545EM_COPPER:
1614 wol->supported = 0;
1615 wol->wolopts = 0;
1616 return;
1617
1618 case E1000_DEV_ID_82546EB_FIBER:
1619 case E1000_DEV_ID_82546GB_FIBER:
1620 /* Wake events only supported on port A for dual fiber */
1621 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1622 wol->supported = 0;
1623 wol->wolopts = 0;
1624 return;
1625 }
1626 /* Fall Through */
1627
1628 default:
1629 wol->supported = WAKE_UCAST | WAKE_MCAST |
1630 WAKE_BCAST | WAKE_MAGIC;
1631
1632 wol->wolopts = 0;
1633 if(adapter->wol & E1000_WUFC_EX)
1634 wol->wolopts |= WAKE_UCAST;
1635 if(adapter->wol & E1000_WUFC_MC)
1636 wol->wolopts |= WAKE_MCAST;
1637 if(adapter->wol & E1000_WUFC_BC)
1638 wol->wolopts |= WAKE_BCAST;
1639 if(adapter->wol & E1000_WUFC_MAG)
1640 wol->wolopts |= WAKE_MAGIC;
1641 return;
1642 }
1643 }
1644
1645 static int
1646 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1647 {
1648 struct e1000_adapter *adapter = netdev_priv(netdev);
1649 struct e1000_hw *hw = &adapter->hw;
1650
1651 switch(adapter->hw.device_id) {
1652 case E1000_DEV_ID_82542:
1653 case E1000_DEV_ID_82543GC_FIBER:
1654 case E1000_DEV_ID_82543GC_COPPER:
1655 case E1000_DEV_ID_82544EI_FIBER:
1656 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1657 case E1000_DEV_ID_82545EM_FIBER:
1658 case E1000_DEV_ID_82545EM_COPPER:
1659 return wol->wolopts ? -EOPNOTSUPP : 0;
1660
1661 case E1000_DEV_ID_82546EB_FIBER:
1662 case E1000_DEV_ID_82546GB_FIBER:
1663 /* Wake events only supported on port A for dual fiber */
1664 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1665 return wol->wolopts ? -EOPNOTSUPP : 0;
1666 /* Fall Through */
1667
1668 default:
1669 if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1670 return -EOPNOTSUPP;
1671
1672 adapter->wol = 0;
1673
1674 if(wol->wolopts & WAKE_UCAST)
1675 adapter->wol |= E1000_WUFC_EX;
1676 if(wol->wolopts & WAKE_MCAST)
1677 adapter->wol |= E1000_WUFC_MC;
1678 if(wol->wolopts & WAKE_BCAST)
1679 adapter->wol |= E1000_WUFC_BC;
1680 if(wol->wolopts & WAKE_MAGIC)
1681 adapter->wol |= E1000_WUFC_MAG;
1682 }
1683
1684 return 0;
1685 }
1686
1687 /* toggle LED 4 times per second = 2 "blinks" per second */
1688 #define E1000_ID_INTERVAL (HZ/4)
1689
1690 /* bit defines for adapter->led_status */
1691 #define E1000_LED_ON 0
1692
1693 static void
1694 e1000_led_blink_callback(unsigned long data)
1695 {
1696 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1697
1698 if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1699 e1000_led_off(&adapter->hw);
1700 else
1701 e1000_led_on(&adapter->hw);
1702
1703 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1704 }
1705
1706 static int
1707 e1000_phys_id(struct net_device *netdev, uint32_t data)
1708 {
1709 struct e1000_adapter *adapter = netdev_priv(netdev);
1710
1711 if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1712 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1713
1714 if(adapter->hw.mac_type < e1000_82571) {
1715 if(!adapter->blink_timer.function) {
1716 init_timer(&adapter->blink_timer);
1717 adapter->blink_timer.function = e1000_led_blink_callback;
1718 adapter->blink_timer.data = (unsigned long) adapter;
1719 }
1720 e1000_setup_led(&adapter->hw);
1721 mod_timer(&adapter->blink_timer, jiffies);
1722 msleep_interruptible(data * 1000);
1723 del_timer_sync(&adapter->blink_timer);
1724 }
1725 else if(adapter->hw.mac_type < e1000_82573) {
1726 E1000_WRITE_REG(&adapter->hw, LEDCTL, (E1000_LEDCTL_LED2_BLINK_RATE |
1727 E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
1728 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1729 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
1730 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
1731 msleep_interruptible(data * 1000);
1732 }
1733 else {
1734 E1000_WRITE_REG(&adapter->hw, LEDCTL, (E1000_LEDCTL_LED2_BLINK_RATE |
1735 E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
1736 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1737 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
1738 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
1739 msleep_interruptible(data * 1000);
1740 }
1741
1742 e1000_led_off(&adapter->hw);
1743 clear_bit(E1000_LED_ON, &adapter->led_status);
1744 e1000_cleanup_led(&adapter->hw);
1745
1746 return 0;
1747 }
1748
1749 static int
1750 e1000_nway_reset(struct net_device *netdev)
1751 {
1752 struct e1000_adapter *adapter = netdev_priv(netdev);
1753 if(netif_running(netdev)) {
1754 e1000_down(adapter);
1755 e1000_up(adapter);
1756 }
1757 return 0;
1758 }
1759
1760 static int
1761 e1000_get_stats_count(struct net_device *netdev)
1762 {
1763 return E1000_STATS_LEN;
1764 }
1765
1766 static void
1767 e1000_get_ethtool_stats(struct net_device *netdev,
1768 struct ethtool_stats *stats, uint64_t *data)
1769 {
1770 struct e1000_adapter *adapter = netdev_priv(netdev);
1771 int i;
1772
1773 e1000_update_stats(adapter);
1774 for(i = 0; i < E1000_STATS_LEN; i++) {
1775 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1776 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1777 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1778 }
1779 }
1780
1781 static void
1782 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1783 {
1784 int i;
1785
1786 switch(stringset) {
1787 case ETH_SS_TEST:
1788 memcpy(data, *e1000_gstrings_test,
1789 E1000_TEST_LEN*ETH_GSTRING_LEN);
1790 break;
1791 case ETH_SS_STATS:
1792 for (i=0; i < E1000_STATS_LEN; i++) {
1793 memcpy(data + i * ETH_GSTRING_LEN,
1794 e1000_gstrings_stats[i].stat_string,
1795 ETH_GSTRING_LEN);
1796 }
1797 break;
1798 }
1799 }
1800
1801 static struct ethtool_ops e1000_ethtool_ops = {
1802 .get_settings = e1000_get_settings,
1803 .set_settings = e1000_set_settings,
1804 .get_drvinfo = e1000_get_drvinfo,
1805 .get_regs_len = e1000_get_regs_len,
1806 .get_regs = e1000_get_regs,
1807 .get_wol = e1000_get_wol,
1808 .set_wol = e1000_set_wol,
1809 .get_msglevel = e1000_get_msglevel,
1810 .set_msglevel = e1000_set_msglevel,
1811 .nway_reset = e1000_nway_reset,
1812 .get_link = ethtool_op_get_link,
1813 .get_eeprom_len = e1000_get_eeprom_len,
1814 .get_eeprom = e1000_get_eeprom,
1815 .set_eeprom = e1000_set_eeprom,
1816 .get_ringparam = e1000_get_ringparam,
1817 .set_ringparam = e1000_set_ringparam,
1818 .get_pauseparam = e1000_get_pauseparam,
1819 .set_pauseparam = e1000_set_pauseparam,
1820 .get_rx_csum = e1000_get_rx_csum,
1821 .set_rx_csum = e1000_set_rx_csum,
1822 .get_tx_csum = e1000_get_tx_csum,
1823 .set_tx_csum = e1000_set_tx_csum,
1824 .get_sg = ethtool_op_get_sg,
1825 .set_sg = ethtool_op_set_sg,
1826 #ifdef NETIF_F_TSO
1827 .get_tso = ethtool_op_get_tso,
1828 .set_tso = e1000_set_tso,
1829 #endif
1830 .self_test_count = e1000_diag_test_count,
1831 .self_test = e1000_diag_test,
1832 .get_strings = e1000_get_strings,
1833 .phys_id = e1000_phys_id,
1834 .get_stats_count = e1000_get_stats_count,
1835 .get_ethtool_stats = e1000_get_ethtool_stats,
1836 .get_perm_addr = ethtool_op_get_perm_addr,
1837 };
1838
1839 void e1000_set_ethtool_ops(struct net_device *netdev)
1840 {
1841 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1842 }
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