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kbuild: document howto build external modules using several directories
[linux-2.6/verdex.git] / drivers / serial / imx.c
blob83c4c12165877c4e02b2449a63969dbdba05ab04
1 /*
2 * linux/drivers/serial/imx.c
3 *
4 * Driver for Motorola IMX serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
27 */
28 #include <linux/config.h>
29
30 #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31 #define SUPPORT_SYSRQ
32 #endif
33
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/platform_device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/hardware.h>
48
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_IMX_MAJOR 204
51 #define MINOR_START 41
52
53 #define NR_PORTS 2
54
55 #define IMX_ISR_PASS_LIMIT 256
56
57 /*
58 * This is the size of our serial port register set.
59 */
60 #define UART_PORT_SIZE 0x100
61
62 /*
63 * This determines how often we check the modem status signals
64 * for any change. They generally aren't connected to an IRQ
65 * so we have to poll them. We also check immediately before
66 * filling the TX fifo incase CTS has been dropped.
67 */
68 #define MCTRL_TIMEOUT (250*HZ/1000)
69
70 #define DRIVER_NAME "IMX-uart"
71
72 struct imx_port {
73 struct uart_port port;
74 struct timer_list timer;
75 unsigned int old_status;
76 int txirq,rxirq,rtsirq;
77 };
78
79 /*
80 * Handle any change of modem status signal since we were last called.
81 */
82 static void imx_mctrl_check(struct imx_port *sport)
83 {
84 unsigned int status, changed;
85
86 status = sport->port.ops->get_mctrl(&sport->port);
87 changed = status ^ sport->old_status;
88
89 if (changed == 0)
90 return;
91
92 sport->old_status = status;
93
94 if (changed & TIOCM_RI)
95 sport->port.icount.rng++;
96 if (changed & TIOCM_DSR)
97 sport->port.icount.dsr++;
98 if (changed & TIOCM_CAR)
99 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
100 if (changed & TIOCM_CTS)
101 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
102
103 wake_up_interruptible(&sport->port.info->delta_msr_wait);
104 }
105
106 /*
107 * This is our per-port timeout handler, for checking the
108 * modem status signals.
109 */
110 static void imx_timeout(unsigned long data)
111 {
112 struct imx_port *sport = (struct imx_port *)data;
113 unsigned long flags;
114
115 if (sport->port.info) {
116 spin_lock_irqsave(&sport->port.lock, flags);
117 imx_mctrl_check(sport);
118 spin_unlock_irqrestore(&sport->port.lock, flags);
119
120 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
121 }
122 }
123
124 /*
125 * interrupts disabled on entry
126 */
127 static void imx_stop_tx(struct uart_port *port)
128 {
129 struct imx_port *sport = (struct imx_port *)port;
130 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
131 }
132
133 /*
134 * interrupts disabled on entry
135 */
136 static void imx_stop_rx(struct uart_port *port)
137 {
138 struct imx_port *sport = (struct imx_port *)port;
139 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
140 }
141
142 /*
143 * Set the modem control timer to fire immediately.
144 */
145 static void imx_enable_ms(struct uart_port *port)
146 {
147 struct imx_port *sport = (struct imx_port *)port;
148
149 mod_timer(&sport->timer, jiffies);
150 }
151
152 static inline void imx_transmit_buffer(struct imx_port *sport)
153 {
154 struct circ_buf *xmit = &sport->port.info->xmit;
155
156 do {
157 /* send xmit->buf[xmit->tail]
158 * out the port here */
159 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
160 xmit->tail = (xmit->tail + 1) &
161 (UART_XMIT_SIZE - 1);
162 sport->port.icount.tx++;
163 if (uart_circ_empty(xmit))
164 break;
165 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
166
167 if (uart_circ_empty(xmit))
168 imx_stop_tx(&sport->port);
169 }
170
171 /*
172 * interrupts disabled on entry
173 */
174 static void imx_start_tx(struct uart_port *port)
175 {
176 struct imx_port *sport = (struct imx_port *)port;
177
178 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
179
180 if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
181 imx_transmit_buffer(sport);
182 }
183
184 static irqreturn_t imx_rtsint(int irq, void *dev_id, struct pt_regs *regs)
185 {
186 struct imx_port *sport = (struct imx_port *)dev_id;
187 unsigned int val = USR1((u32)sport->port.membase)&USR1_RTSS;
188 unsigned long flags;
189
190 spin_lock_irqsave(&sport->port.lock, flags);
191
192 USR1((u32)sport->port.membase) = USR1_RTSD;
193 uart_handle_cts_change(&sport->port, !!val);
194 wake_up_interruptible(&sport->port.info->delta_msr_wait);
195
196 spin_unlock_irqrestore(&sport->port.lock, flags);
197 return IRQ_HANDLED;
198 }
199
200 static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
201 {
202 struct imx_port *sport = (struct imx_port *)dev_id;
203 struct circ_buf *xmit = &sport->port.info->xmit;
204 unsigned long flags;
205
206 spin_lock_irqsave(&sport->port.lock,flags);
207 if (sport->port.x_char)
208 {
209 /* Send next char */
210 URTX0((u32)sport->port.membase) = sport->port.x_char;
211 goto out;
212 }
213
214 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
215 imx_stop_tx(&sport->port);
216 goto out;
217 }
218
219 imx_transmit_buffer(sport);
220
221 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
222 uart_write_wakeup(&sport->port);
223
224 out:
225 spin_unlock_irqrestore(&sport->port.lock,flags);
226 return IRQ_HANDLED;
227 }
228
229 static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
230 {
231 struct imx_port *sport = dev_id;
232 unsigned int rx,flg,ignored = 0;
233 struct tty_struct *tty = sport->port.info->tty;
234 unsigned long flags;
235
236 rx = URXD0((u32)sport->port.membase);
237 spin_lock_irqsave(&sport->port.lock,flags);
238
239 do {
240 flg = TTY_NORMAL;
241 sport->port.icount.rx++;
242
243 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
244 USR2((u32)sport->port.membase) |= USR2_BRCD;
245 if(uart_handle_break(&sport->port))
246 goto ignore_char;
247 }
248
249 if (uart_handle_sysrq_char
250 (&sport->port, (unsigned char)rx, regs))
251 goto ignore_char;
252
253 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
254 goto handle_error;
255
256 error_return:
257 tty_insert_flip_char(tty, rx, flg);
258
259 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
260 goto out;
261
262 ignore_char:
263 rx = URXD0((u32)sport->port.membase);
264 } while(rx & URXD_CHARRDY);
265
266 out:
267 spin_unlock_irqrestore(&sport->port.lock,flags);
268 tty_flip_buffer_push(tty);
269 return IRQ_HANDLED;
270
271 handle_error:
272 if (rx & URXD_PRERR)
273 sport->port.icount.parity++;
274 else if (rx & URXD_FRMERR)
275 sport->port.icount.frame++;
276 if (rx & URXD_OVRRUN)
277 sport->port.icount.overrun++;
278
279 if (rx & sport->port.ignore_status_mask) {
280 if (++ignored > 100)
281 goto out;
282 goto ignore_char;
283 }
284
285 rx &= sport->port.read_status_mask;
286
287 if (rx & URXD_PRERR)
288 flg = TTY_PARITY;
289 else if (rx & URXD_FRMERR)
290 flg = TTY_FRAME;
291 if (rx & URXD_OVRRUN)
292 flg = TTY_OVERRUN;
293
294 #ifdef SUPPORT_SYSRQ
295 sport->port.sysrq = 0;
296 #endif
297 goto error_return;
298 }
299
300 /*
301 * Return TIOCSER_TEMT when transmitter is not busy.
302 */
303 static unsigned int imx_tx_empty(struct uart_port *port)
304 {
305 struct imx_port *sport = (struct imx_port *)port;
306
307 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
308 }
309
310 /*
311 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
312 */
313 static unsigned int imx_get_mctrl(struct uart_port *port)
314 {
315 struct imx_port *sport = (struct imx_port *)port;
316 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
317
318 if (USR1((u32)sport->port.membase) & USR1_RTSS)
319 tmp |= TIOCM_CTS;
320
321 if (UCR2((u32)sport->port.membase) & UCR2_CTS)
322 tmp |= TIOCM_RTS;
323
324 return tmp;
325 }
326
327 static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
328 {
329 struct imx_port *sport = (struct imx_port *)port;
330
331 if (mctrl & TIOCM_RTS)
332 UCR2((u32)sport->port.membase) |= UCR2_CTS;
333 else
334 UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
335 }
336
337 /*
338 * Interrupts always disabled.
339 */
340 static void imx_break_ctl(struct uart_port *port, int break_state)
341 {
342 struct imx_port *sport = (struct imx_port *)port;
343 unsigned long flags;
344
345 spin_lock_irqsave(&sport->port.lock, flags);
346
347 if ( break_state != 0 )
348 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
349 else
350 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
351
352 spin_unlock_irqrestore(&sport->port.lock, flags);
353 }
354
355 #define TXTL 2 /* reset default */
356 #define RXTL 1 /* reset default */
357
358 static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
359 {
360 unsigned int val;
361 unsigned int ufcr_rfdiv;
362
363 /* set receiver / transmitter trigger level.
364 * RFDIV is set such way to satisfy requested uartclk value
365 */
366 val = TXTL<<10 | RXTL;
367 ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
368
369 if(!ufcr_rfdiv)
370 ufcr_rfdiv = 1;
371
372 if(ufcr_rfdiv >= 7)
373 ufcr_rfdiv = 6;
374 else
375 ufcr_rfdiv = 6 - ufcr_rfdiv;
376
377 val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
378
379 UFCR((u32)sport->port.membase) = val;
380
381 return 0;
382 }
383
384 static int imx_startup(struct uart_port *port)
385 {
386 struct imx_port *sport = (struct imx_port *)port;
387 int retval;
388 unsigned long flags;
389
390 imx_setup_ufcr(sport, 0);
391
392 /* disable the DREN bit (Data Ready interrupt enable) before
393 * requesting IRQs
394 */
395 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
396
397 /*
398 * Allocate the IRQ
399 */
400 retval = request_irq(sport->rxirq, imx_rxint, 0,
401 DRIVER_NAME, sport);
402 if (retval) goto error_out1;
403
404 retval = request_irq(sport->txirq, imx_txint, 0,
405 DRIVER_NAME, sport);
406 if (retval) goto error_out2;
407
408 retval = request_irq(sport->rtsirq, imx_rtsint, 0,
409 DRIVER_NAME, sport);
410 if (retval) goto error_out3;
411 set_irq_type(sport->rtsirq, IRQT_BOTHEDGE);
412
413 /*
414 * Finally, clear and enable interrupts
415 */
416
417 USR1((u32)sport->port.membase) = USR1_RTSD;
418 UCR1((u32)sport->port.membase) |=
419 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
420
421 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
422 /*
423 * Enable modem status interrupts
424 */
425 spin_lock_irqsave(&sport->port.lock,flags);
426 imx_enable_ms(&sport->port);
427 spin_unlock_irqrestore(&sport->port.lock,flags);
428
429 return 0;
430
431 error_out3:
432 free_irq(sport->txirq, sport);
433 error_out2:
434 free_irq(sport->rxirq, sport);
435 error_out1:
436 return retval;
437 }
438
439 static void imx_shutdown(struct uart_port *port)
440 {
441 struct imx_port *sport = (struct imx_port *)port;
442
443 /*
444 * Stop our timer.
445 */
446 del_timer_sync(&sport->timer);
447
448 /*
449 * Free the interrupts
450 */
451 free_irq(sport->rtsirq, sport);
452 free_irq(sport->txirq, sport);
453 free_irq(sport->rxirq, sport);
454
455 /*
456 * Disable all interrupts, port and break condition.
457 */
458
459 UCR1((u32)sport->port.membase) &=
460 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
461 }
462
463 static void
464 imx_set_termios(struct uart_port *port, struct termios *termios,
465 struct termios *old)
466 {
467 struct imx_port *sport = (struct imx_port *)port;
468 unsigned long flags;
469 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
470 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
471
472 /*
473 * If we don't support modem control lines, don't allow
474 * these to be set.
475 */
476 if (0) {
477 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
478 termios->c_cflag |= CLOCAL;
479 }
480
481 /*
482 * We only support CS7 and CS8.
483 */
484 while ((termios->c_cflag & CSIZE) != CS7 &&
485 (termios->c_cflag & CSIZE) != CS8) {
486 termios->c_cflag &= ~CSIZE;
487 termios->c_cflag |= old_csize;
488 old_csize = CS8;
489 }
490
491 if ((termios->c_cflag & CSIZE) == CS8)
492 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
493 else
494 ucr2 = UCR2_SRST | UCR2_IRTS;
495
496 if (termios->c_cflag & CRTSCTS) {
497 ucr2 &= ~UCR2_IRTS;
498 ucr2 |= UCR2_CTSC;
499 }
500
501 if (termios->c_cflag & CSTOPB)
502 ucr2 |= UCR2_STPB;
503 if (termios->c_cflag & PARENB) {
504 ucr2 |= UCR2_PREN;
505 if (!(termios->c_cflag & PARODD))
506 ucr2 |= UCR2_PROE;
507 }
508
509 /*
510 * Ask the core to calculate the divisor for us.
511 */
512 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
513 quot = uart_get_divisor(port, baud);
514
515 spin_lock_irqsave(&sport->port.lock, flags);
516
517 sport->port.read_status_mask = 0;
518 if (termios->c_iflag & INPCK)
519 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
520 if (termios->c_iflag & (BRKINT | PARMRK))
521 sport->port.read_status_mask |= URXD_BRK;
522
523 /*
524 * Characters to ignore
525 */
526 sport->port.ignore_status_mask = 0;
527 if (termios->c_iflag & IGNPAR)
528 sport->port.ignore_status_mask |= URXD_PRERR;
529 if (termios->c_iflag & IGNBRK) {
530 sport->port.ignore_status_mask |= URXD_BRK;
531 /*
532 * If we're ignoring parity and break indicators,
533 * ignore overruns too (for real raw support).
534 */
535 if (termios->c_iflag & IGNPAR)
536 sport->port.ignore_status_mask |= URXD_OVRRUN;
537 }
538
539 del_timer_sync(&sport->timer);
540
541 /*
542 * Update the per-port timeout.
543 */
544 uart_update_timeout(port, termios->c_cflag, baud);
545
546 /*
547 * disable interrupts and drain transmitter
548 */
549 old_ucr1 = UCR1((u32)sport->port.membase);
550 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
551
552 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
553 barrier();
554
555 /* then, disable everything */
556 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
557 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
558
559 /* set the parity, stop bits and data size */
560 UCR2((u32)sport->port.membase) = ucr2;
561
562 /* set the baud rate. We assume uartclk = 16 MHz
563 *
564 * baud * 16 UBIR - 1
565 * --------- = --------
566 * uartclk UBMR - 1
567 */
568 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
569 UBMR((u32)sport->port.membase) = 10000 - 1;
570
571 UCR1((u32)sport->port.membase) = old_ucr1;
572 UCR2((u32)sport->port.membase) |= old_txrxen;
573
574 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
575 imx_enable_ms(&sport->port);
576
577 spin_unlock_irqrestore(&sport->port.lock, flags);
578 }
579
580 static const char *imx_type(struct uart_port *port)
581 {
582 struct imx_port *sport = (struct imx_port *)port;
583
584 return sport->port.type == PORT_IMX ? "IMX" : NULL;
585 }
586
587 /*
588 * Release the memory region(s) being used by 'port'.
589 */
590 static void imx_release_port(struct uart_port *port)
591 {
592 struct imx_port *sport = (struct imx_port *)port;
593
594 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
595 }
596
597 /*
598 * Request the memory region(s) being used by 'port'.
599 */
600 static int imx_request_port(struct uart_port *port)
601 {
602 struct imx_port *sport = (struct imx_port *)port;
603
604 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
605 "imx-uart") != NULL ? 0 : -EBUSY;
606 }
607
608 /*
609 * Configure/autoconfigure the port.
610 */
611 static void imx_config_port(struct uart_port *port, int flags)
612 {
613 struct imx_port *sport = (struct imx_port *)port;
614
615 if (flags & UART_CONFIG_TYPE &&
616 imx_request_port(&sport->port) == 0)
617 sport->port.type = PORT_IMX;
618 }
619
620 /*
621 * Verify the new serial_struct (for TIOCSSERIAL).
622 * The only change we allow are to the flags and type, and
623 * even then only between PORT_IMX and PORT_UNKNOWN
624 */
625 static int
626 imx_verify_port(struct uart_port *port, struct serial_struct *ser)
627 {
628 struct imx_port *sport = (struct imx_port *)port;
629 int ret = 0;
630
631 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
632 ret = -EINVAL;
633 if (sport->port.irq != ser->irq)
634 ret = -EINVAL;
635 if (ser->io_type != UPIO_MEM)
636 ret = -EINVAL;
637 if (sport->port.uartclk / 16 != ser->baud_base)
638 ret = -EINVAL;
639 if ((void *)sport->port.mapbase != ser->iomem_base)
640 ret = -EINVAL;
641 if (sport->port.iobase != ser->port)
642 ret = -EINVAL;
643 if (ser->hub6 != 0)
644 ret = -EINVAL;
645 return ret;
646 }
647
648 static struct uart_ops imx_pops = {
649 .tx_empty = imx_tx_empty,
650 .set_mctrl = imx_set_mctrl,
651 .get_mctrl = imx_get_mctrl,
652 .stop_tx = imx_stop_tx,
653 .start_tx = imx_start_tx,
654 .stop_rx = imx_stop_rx,
655 .enable_ms = imx_enable_ms,
656 .break_ctl = imx_break_ctl,
657 .startup = imx_startup,
658 .shutdown = imx_shutdown,
659 .set_termios = imx_set_termios,
660 .type = imx_type,
661 .release_port = imx_release_port,
662 .request_port = imx_request_port,
663 .config_port = imx_config_port,
664 .verify_port = imx_verify_port,
665 };
666
667 static struct imx_port imx_ports[] = {
668 {
669 .txirq = UART1_MINT_TX,
670 .rxirq = UART1_MINT_RX,
671 .rtsirq = UART1_MINT_RTS,
672 .port = {
673 .type = PORT_IMX,
674 .iotype = SERIAL_IO_MEM,
675 .membase = (void *)IMX_UART1_BASE,
676 .mapbase = IMX_UART1_BASE, /* FIXME */
677 .irq = UART1_MINT_RX,
678 .uartclk = 16000000,
679 .fifosize = 8,
680 .flags = ASYNC_BOOT_AUTOCONF,
681 .ops = &imx_pops,
682 .line = 0,
683 },
684 }, {
685 .txirq = UART2_MINT_TX,
686 .rxirq = UART2_MINT_RX,
687 .rtsirq = UART2_MINT_RTS,
688 .port = {
689 .type = PORT_IMX,
690 .iotype = SERIAL_IO_MEM,
691 .membase = (void *)IMX_UART2_BASE,
692 .mapbase = IMX_UART2_BASE, /* FIXME */
693 .irq = UART2_MINT_RX,
694 .uartclk = 16000000,
695 .fifosize = 8,
696 .flags = ASYNC_BOOT_AUTOCONF,
697 .ops = &imx_pops,
698 .line = 1,
699 },
700 }
701 };
702
703 /*
704 * Setup the IMX serial ports.
705 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
706 * Which serial port this ends up being depends on the machine you're
707 * running this kernel on. I'm not convinced that this is a good idea,
708 * but that's the way it traditionally works.
709 *
710 */
711 static void __init imx_init_ports(void)
712 {
713 static int first = 1;
714 int i;
715
716 if (!first)
717 return;
718 first = 0;
719
720 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
721 init_timer(&imx_ports[i].timer);
722 imx_ports[i].timer.function = imx_timeout;
723 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
724 }
725
726 imx_gpio_mode(PC9_PF_UART1_CTS);
727 imx_gpio_mode(PC10_PF_UART1_RTS);
728 imx_gpio_mode(PC11_PF_UART1_TXD);
729 imx_gpio_mode(PC12_PF_UART1_RXD);
730 imx_gpio_mode(PB28_PF_UART2_CTS);
731 imx_gpio_mode(PB29_PF_UART2_RTS);
732
733 imx_gpio_mode(PB30_PF_UART2_TXD);
734 imx_gpio_mode(PB31_PF_UART2_RXD);
735
736 #if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
737 * is implemented.
738 */
739 imx_gpio_mode(PD7_AF_UART2_DTR);
740 imx_gpio_mode(PD8_AF_UART2_DCD);
741 imx_gpio_mode(PD9_AF_UART2_RI);
742 imx_gpio_mode(PD10_AF_UART2_DSR);
743 #endif
744
745
746 }
747
748 #ifdef CONFIG_SERIAL_IMX_CONSOLE
749
750 /*
751 * Interrupts are disabled on entering
752 */
753 static void
754 imx_console_write(struct console *co, const char *s, unsigned int count)
755 {
756 struct imx_port *sport = &imx_ports[co->index];
757 unsigned int old_ucr1, old_ucr2, i;
758
759 /*
760 * First, save UCR1/2 and then disable interrupts
761 */
762 old_ucr1 = UCR1((u32)sport->port.membase);
763 old_ucr2 = UCR2((u32)sport->port.membase);
764
765 UCR1((u32)sport->port.membase) =
766 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
767 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
768 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
769
770 /*
771 * Now, do each character
772 */
773 for (i = 0; i < count; i++) {
774
775 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
776 barrier();
777
778 URTX0((u32)sport->port.membase) = s[i];
779
780 if (s[i] == '\n') {
781 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
782 barrier();
783 URTX0((u32)sport->port.membase) = '\r';
784 }
785 }
786
787 /*
788 * Finally, wait for transmitter to become empty
789 * and restore UCR1/2
790 */
791 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
792
793 UCR1((u32)sport->port.membase) = old_ucr1;
794 UCR2((u32)sport->port.membase) = old_ucr2;
795 }
796
797 /*
798 * If the port was already initialised (eg, by a boot loader),
799 * try to determine the current setup.
800 */
801 static void __init
802 imx_console_get_options(struct imx_port *sport, int *baud,
803 int *parity, int *bits)
804 {
805
806 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
807 /* ok, the port was enabled */
808 unsigned int ucr2, ubir,ubmr, uartclk;
809 unsigned int baud_raw;
810 unsigned int ucfr_rfdiv;
811
812 ucr2 = UCR2((u32)sport->port.membase);
813
814 *parity = 'n';
815 if (ucr2 & UCR2_PREN) {
816 if (ucr2 & UCR2_PROE)
817 *parity = 'o';
818 else
819 *parity = 'e';
820 }
821
822 if (ucr2 & UCR2_WS)
823 *bits = 8;
824 else
825 *bits = 7;
826
827 ubir = UBIR((u32)sport->port.membase) & 0xffff;
828 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
829
830
831 ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
832 if (ucfr_rfdiv == 6)
833 ucfr_rfdiv = 7;
834 else
835 ucfr_rfdiv = 6 - ucfr_rfdiv;
836
837 uartclk = imx_get_perclk1();
838 uartclk /= ucfr_rfdiv;
839
840 { /*
841 * The next code provides exact computation of
842 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
843 * without need of float support or long long division,
844 * which would be required to prevent 32bit arithmetic overflow
845 */
846 unsigned int mul = ubir + 1;
847 unsigned int div = 16 * (ubmr + 1);
848 unsigned int rem = uartclk % div;
849
850 baud_raw = (uartclk / div) * mul;
851 baud_raw += (rem * mul + div / 2) / div;
852 *baud = (baud_raw + 50) / 100 * 100;
853 }
854
855 if(*baud != baud_raw)
856 printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
857 baud_raw, *baud);
858 }
859 }
860
861 static int __init
862 imx_console_setup(struct console *co, char *options)
863 {
864 struct imx_port *sport;
865 int baud = 9600;
866 int bits = 8;
867 int parity = 'n';
868 int flow = 'n';
869
870 /*
871 * Check whether an invalid uart number has been specified, and
872 * if so, search for the first available port that does have
873 * console support.
874 */
875 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
876 co->index = 0;
877 sport = &imx_ports[co->index];
878
879 if (options)
880 uart_parse_options(options, &baud, &parity, &bits, &flow);
881 else
882 imx_console_get_options(sport, &baud, &parity, &bits);
883
884 imx_setup_ufcr(sport, 0);
885
886 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
887 }
888
889 static struct uart_driver imx_reg;
890 static struct console imx_console = {
891 .name = "ttySMX",
892 .write = imx_console_write,
893 .device = uart_console_device,
894 .setup = imx_console_setup,
895 .flags = CON_PRINTBUFFER,
896 .index = -1,
897 .data = &imx_reg,
898 };
899
900 static int __init imx_rs_console_init(void)
901 {
902 imx_init_ports();
903 register_console(&imx_console);
904 return 0;
905 }
906 console_initcall(imx_rs_console_init);
907
908 #define IMX_CONSOLE &imx_console
909 #else
910 #define IMX_CONSOLE NULL
911 #endif
912
913 static struct uart_driver imx_reg = {
914 .owner = THIS_MODULE,
915 .driver_name = DRIVER_NAME,
916 .dev_name = "ttySMX",
917 .devfs_name = "ttsmx/",
918 .major = SERIAL_IMX_MAJOR,
919 .minor = MINOR_START,
920 .nr = ARRAY_SIZE(imx_ports),
921 .cons = IMX_CONSOLE,
922 };
923
924 static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
925 {
926 struct imx_port *sport = platform_get_drvdata(dev);
927
928 if (sport)
929 uart_suspend_port(&imx_reg, &sport->port);
930
931 return 0;
932 }
933
934 static int serial_imx_resume(struct platform_device *dev)
935 {
936 struct imx_port *sport = platform_get_drvdata(dev);
937
938 if (sport)
939 uart_resume_port(&imx_reg, &sport->port);
940
941 return 0;
942 }
943
944 static int serial_imx_probe(struct platform_device *dev)
945 {
946 imx_ports[dev->id].port.dev = &dev->dev;
947 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
948 platform_set_drvdata(dev, &imx_ports[dev->id]);
949 return 0;
950 }
951
952 static int serial_imx_remove(struct platform_device *dev)
953 {
954 struct imx_port *sport = platform_get_drvdata(dev);
955
956 platform_set_drvdata(dev, NULL);
957
958 if (sport)
959 uart_remove_one_port(&imx_reg, &sport->port);
960
961 return 0;
962 }
963
964 static struct platform_driver serial_imx_driver = {
965 .probe = serial_imx_probe,
966 .remove = serial_imx_remove,
967
968 .suspend = serial_imx_suspend,
969 .resume = serial_imx_resume,
970 .driver = {
971 .name = "imx-uart",
972 },
973 };
974
975 static int __init imx_serial_init(void)
976 {
977 int ret;
978
979 printk(KERN_INFO "Serial: IMX driver\n");
980
981 imx_init_ports();
982
983 ret = uart_register_driver(&imx_reg);
984 if (ret)
985 return ret;
986
987 ret = platform_driver_register(&serial_imx_driver);
988 if (ret != 0)
989 uart_unregister_driver(&imx_reg);
990
991 return 0;
992 }
993
994 static void __exit imx_serial_exit(void)
995 {
996 uart_unregister_driver(&imx_reg);
997 platform_driver_unregister(&serial_imx_driver);
998 }
999
1000 module_init(imx_serial_init);
1001 module_exit(imx_serial_exit);
1002
1003 MODULE_AUTHOR("Sascha Hauer");
1004 MODULE_DESCRIPTION("IMX generic serial port driver");
1005 MODULE_LICENSE("GPL");
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