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kbuild: document howto build external modules using several directories
[linux-2.6/verdex.git] / drivers / video / controlfb.c
blob403d17377f8db67fce024dbf52e4091225e6a743
1 /*
2 * controlfb.c -- frame buffer device for the PowerMac 'control' display
3 *
4 * Created 12 July 1998 by Dan Jacobowitz <dan@debian.org>
5 * Copyright (C) 1998 Dan Jacobowitz
6 * Copyright (C) 2001 Takashi Oe
7 *
8 * Mmap code by Michel Lanners <mlan@cpu.lu>
9 *
10 * Frame buffer structure from:
11 * drivers/video/chipsfb.c -- frame buffer device for
12 * Chips & Technologies 65550 chip.
13 *
14 * Copyright (C) 1998 Paul Mackerras
15 *
16 * This file is derived from the Powermac "chips" driver:
17 * Copyright (C) 1997 Fabio Riccardi.
18 * And from the frame buffer device for Open Firmware-initialized devices:
19 * Copyright (C) 1997 Geert Uytterhoeven.
20 *
21 * Hardware information from:
22 * control.c: Console support for PowerMac "control" display adaptor.
23 * Copyright (C) 1996 Paul Mackerras
24 *
25 * Updated to 2.5 framebuffer API by Ben Herrenschmidt
26 * <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>,
27 * and James Simmons <jsimmons@infradead.org>.
28 *
29 * This file is subject to the terms and conditions of the GNU General Public
30 * License. See the file COPYING in the main directory of this archive for
31 * more details.
32 */
33
34 #include <linux/config.h>
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/errno.h>
38 #include <linux/string.h>
39 #include <linux/mm.h>
40 #include <linux/tty.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/delay.h>
44 #include <linux/interrupt.h>
45 #include <linux/fb.h>
46 #include <linux/init.h>
47 #include <linux/pci.h>
48 #include <linux/nvram.h>
49 #include <linux/adb.h>
50 #include <linux/cuda.h>
51 #include <asm/io.h>
52 #include <asm/prom.h>
53 #include <asm/pgtable.h>
54 #include <asm/btext.h>
55
56 #include "macmodes.h"
57 #include "controlfb.h"
58
59 struct fb_par_control {
60 int vmode, cmode;
61 int xres, yres;
62 int vxres, vyres;
63 int xoffset, yoffset;
64 int pitch;
65 struct control_regvals regvals;
66 unsigned long sync;
67 unsigned char ctrl;
68 };
69
70 #define DIRTY(z) ((x)->z != (y)->z)
71 #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))
72 static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)
73 {
74 int i, results;
75
76 results = 1;
77 for (i = 0; i < 3; i++)
78 results &= !DIRTY(regvals.clock_params[i]);
79 if (!results)
80 return 0;
81 for (i = 0; i < 16; i++)
82 results &= !DIRTY(regvals.regs[i]);
83 if (!results)
84 return 0;
85 return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)
86 && !DIRTY(vxres) && !DIRTY(vyres));
87 }
88 static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y)
89 {
90 return (!DIRTY(bits_per_pixel) && !DIRTY(xres)
91 && !DIRTY(yres) && !DIRTY(xres_virtual)
92 && !DIRTY(yres_virtual)
93 && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue));
94 }
95
96 struct fb_info_control {
97 struct fb_info info;
98 struct fb_par_control par;
99 u32 pseudo_palette[17];
100
101 struct cmap_regs __iomem *cmap_regs;
102 unsigned long cmap_regs_phys;
103
104 struct control_regs __iomem *control_regs;
105 unsigned long control_regs_phys;
106 unsigned long control_regs_size;
107
108 __u8 __iomem *frame_buffer;
109 unsigned long frame_buffer_phys;
110 unsigned long fb_orig_base;
111 unsigned long fb_orig_size;
112
113 int control_use_bank2;
114 unsigned long total_vram;
115 unsigned char vram_attr;
116 };
117
118 /* control register access macro */
119 #define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))
120
121
122 /******************** Prototypes for exported functions ********************/
123 /*
124 * struct fb_ops
125 */
126 static int controlfb_pan_display(struct fb_var_screeninfo *var,
127 struct fb_info *info);
128 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
129 u_int transp, struct fb_info *info);
130 static int controlfb_blank(int blank_mode, struct fb_info *info);
131 static int controlfb_mmap(struct fb_info *info, struct file *file,
132 struct vm_area_struct *vma);
133 static int controlfb_set_par (struct fb_info *info);
134 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info);
135
136 /*
137 * inititialization
138 */
139 int control_init(void);
140 void control_setup(char *);
141
142 /******************** Prototypes for internal functions **********************/
143
144 static void set_control_clock(unsigned char *params);
145 static int init_control(struct fb_info_control *p);
146 static void control_set_hardware(struct fb_info_control *p,
147 struct fb_par_control *par);
148 static int control_of_init(struct device_node *dp);
149 static void find_vram_size(struct fb_info_control *p);
150 static int read_control_sense(struct fb_info_control *p);
151 static int calc_clock_params(unsigned long clk, unsigned char *param);
152 static int control_var_to_par(struct fb_var_screeninfo *var,
153 struct fb_par_control *par, const struct fb_info *fb_info);
154 static inline void control_par_to_var(struct fb_par_control *par,
155 struct fb_var_screeninfo *var);
156 static void control_init_info(struct fb_info *info, struct fb_info_control *p);
157 static void control_cleanup(void);
158
159
160 /************************** Internal variables *******************************/
161
162 static struct fb_info_control *control_fb;
163
164 static int default_vmode __initdata = VMODE_NVRAM;
165 static int default_cmode __initdata = CMODE_NVRAM;
166
167
168 static struct fb_ops controlfb_ops = {
169 .owner = THIS_MODULE,
170 .fb_check_var = controlfb_check_var,
171 .fb_set_par = controlfb_set_par,
172 .fb_setcolreg = controlfb_setcolreg,
173 .fb_pan_display = controlfb_pan_display,
174 .fb_blank = controlfb_blank,
175 .fb_mmap = controlfb_mmap,
176 .fb_fillrect = cfb_fillrect,
177 .fb_copyarea = cfb_copyarea,
178 .fb_imageblit = cfb_imageblit,
179 };
180
181
182 /******************** The functions for controlfb_ops ********************/
183
184 #ifdef MODULE
185 MODULE_LICENSE("GPL");
186
187 int init_module(void)
188 {
189 struct device_node *dp;
190
191 dp = find_devices("control");
192 if (dp != 0 && !control_of_init(dp))
193 return 0;
194
195 return -ENXIO;
196 }
197
198 void cleanup_module(void)
199 {
200 control_cleanup();
201 }
202 #endif
203
204 /*
205 * Checks a var structure
206 */
207 static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
208 {
209 struct fb_par_control par;
210 int err;
211
212 err = control_var_to_par(var, &par, info);
213 if (err)
214 return err;
215 control_par_to_var(&par, var);
216
217 return 0;
218 }
219
220 /*
221 * Applies current var to display
222 */
223 static int controlfb_set_par (struct fb_info *info)
224 {
225 struct fb_info_control *p = (struct fb_info_control *) info;
226 struct fb_par_control par;
227 int err;
228
229 if((err = control_var_to_par(&info->var, &par, info))) {
230 printk (KERN_ERR "controlfb_set_par: error calling"
231 " control_var_to_par: %d.\n", err);
232 return err;
233 }
234
235 control_set_hardware(p, &par);
236
237 info->fix.visual = (p->par.cmode == CMODE_8) ?
238 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
239 info->fix.line_length = p->par.pitch;
240 info->fix.xpanstep = 32 >> p->par.cmode;
241 info->fix.ypanstep = 1;
242
243 return 0;
244 }
245
246 /*
247 * Set screen start address according to var offset values
248 */
249 static inline void set_screen_start(int xoffset, int yoffset,
250 struct fb_info_control *p)
251 {
252 struct fb_par_control *par = &p->par;
253
254 par->xoffset = xoffset;
255 par->yoffset = yoffset;
256 out_le32(CNTRL_REG(p,start_addr),
257 par->yoffset * par->pitch + (par->xoffset << par->cmode));
258 }
259
260
261 static int controlfb_pan_display(struct fb_var_screeninfo *var,
262 struct fb_info *info)
263 {
264 unsigned int xoffset, hstep;
265 struct fb_info_control *p = (struct fb_info_control *)info;
266 struct fb_par_control *par = &p->par;
267
268 /*
269 * make sure start addr will be 32-byte aligned
270 */
271 hstep = 0x1f >> par->cmode;
272 xoffset = (var->xoffset + hstep) & ~hstep;
273
274 if (xoffset+par->xres > par->vxres ||
275 var->yoffset+par->yres > par->vyres)
276 return -EINVAL;
277
278 set_screen_start(xoffset, var->yoffset, p);
279
280 return 0;
281 }
282
283
284 /*
285 * Private mmap since we want to have a different caching on the framebuffer
286 * for controlfb.
287 * Note there's no locking in here; it's done in fb_mmap() in fbmem.c.
288 */
289 static int controlfb_mmap(struct fb_info *info, struct file *file,
290 struct vm_area_struct *vma)
291 {
292 unsigned long off, start;
293 u32 len;
294
295 off = vma->vm_pgoff << PAGE_SHIFT;
296
297 /* frame buffer memory */
298 start = info->fix.smem_start;
299 len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.smem_len);
300 if (off >= len) {
301 /* memory mapped io */
302 off -= len;
303 if (info->var.accel_flags)
304 return -EINVAL;
305 start = info->fix.mmio_start;
306 len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.mmio_len);
307 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE|_PAGE_GUARDED;
308 } else {
309 /* framebuffer */
310 pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
311 }
312 start &= PAGE_MASK;
313 if ((vma->vm_end - vma->vm_start + off) > len)
314 return -EINVAL;
315 off += start;
316 vma->vm_pgoff = off >> PAGE_SHIFT;
317 if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
318 vma->vm_end - vma->vm_start, vma->vm_page_prot))
319 return -EAGAIN;
320
321 return 0;
322 }
323
324 static int controlfb_blank(int blank_mode, struct fb_info *info)
325 {
326 struct fb_info_control *p = (struct fb_info_control *) info;
327 unsigned ctrl;
328
329 ctrl = ld_le32(CNTRL_REG(p,ctrl));
330 if (blank_mode > 0)
331 switch (blank_mode) {
332 case FB_BLANK_VSYNC_SUSPEND:
333 ctrl &= ~3;
334 break;
335 case FB_BLANK_HSYNC_SUSPEND:
336 ctrl &= ~0x30;
337 break;
338 case FB_BLANK_POWERDOWN:
339 ctrl &= ~0x33;
340 /* fall through */
341 case FB_BLANK_NORMAL:
342 ctrl |= 0x400;
343 break;
344 default:
345 break;
346 }
347 else {
348 ctrl &= ~0x400;
349 ctrl |= 0x33;
350 }
351 out_le32(CNTRL_REG(p,ctrl), ctrl);
352
353 return 0;
354 }
355
356 static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
357 u_int transp, struct fb_info *info)
358 {
359 struct fb_info_control *p = (struct fb_info_control *) info;
360 __u8 r, g, b;
361
362 if (regno > 255)
363 return 1;
364
365 r = red >> 8;
366 g = green >> 8;
367 b = blue >> 8;
368
369 out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */
370 out_8(&p->cmap_regs->lut, r); /* send one color channel at */
371 out_8(&p->cmap_regs->lut, g); /* a time... */
372 out_8(&p->cmap_regs->lut, b);
373
374 if (regno < 16) {
375 int i;
376 switch (p->par.cmode) {
377 case CMODE_16:
378 p->pseudo_palette[regno] =
379 (regno << 10) | (regno << 5) | regno;
380 break;
381 case CMODE_32:
382 i = (regno << 8) | regno;
383 p->pseudo_palette[regno] = (i << 16) | i;
384 break;
385 }
386 }
387
388 return 0;
389 }
390
391
392 /******************** End of controlfb_ops implementation ******************/
393
394
395
396 static void set_control_clock(unsigned char *params)
397 {
398 #ifdef CONFIG_ADB_CUDA
399 struct adb_request req;
400 int i;
401
402 for (i = 0; i < 3; ++i) {
403 cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,
404 0x50, i + 1, params[i]);
405 while (!req.complete)
406 cuda_poll();
407 }
408 #endif
409 }
410
411
412 /*
413 * finish off the driver initialization and register
414 */
415 static int __init init_control(struct fb_info_control *p)
416 {
417 int full, sense, vmode, cmode, vyres;
418 struct fb_var_screeninfo var;
419 int rc;
420
421 printk(KERN_INFO "controlfb: ");
422
423 full = p->total_vram == 0x400000;
424
425 /* Try to pick a video mode out of NVRAM if we have one. */
426 if (default_cmode == CMODE_NVRAM){
427 cmode = nvram_read_byte(NV_CMODE);
428 if(cmode < CMODE_8 || cmode > CMODE_32)
429 cmode = CMODE_8;
430 } else
431 cmode=default_cmode;
432
433 if (default_vmode == VMODE_NVRAM) {
434 vmode = nvram_read_byte(NV_VMODE);
435 if (vmode < 1 || vmode > VMODE_MAX ||
436 control_mac_modes[vmode - 1].m[full] < cmode) {
437 sense = read_control_sense(p);
438 printk("Monitor sense value = 0x%x, ", sense);
439 vmode = mac_map_monitor_sense(sense);
440 if (control_mac_modes[vmode - 1].m[full] < cmode)
441 vmode = VMODE_640_480_60;
442 }
443 } else {
444 vmode=default_vmode;
445 if (control_mac_modes[vmode - 1].m[full] < cmode) {
446 if (cmode > CMODE_8)
447 cmode--;
448 else
449 vmode = VMODE_640_480_60;
450 }
451 }
452
453 /* Initialize info structure */
454 control_init_info(&p->info, p);
455
456 /* Setup default var */
457 if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
458 /* This shouldn't happen! */
459 printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);
460 try_again:
461 vmode = VMODE_640_480_60;
462 cmode = CMODE_8;
463 if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
464 printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");
465 return -ENXIO;
466 }
467 printk(KERN_INFO "controlfb: ");
468 }
469 printk("using video mode %d and color mode %d.\n", vmode, cmode);
470
471 vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);
472 if (vyres > var.yres)
473 var.yres_virtual = vyres;
474
475 /* Apply default var */
476 var.activate = FB_ACTIVATE_NOW;
477 rc = fb_set_var(&p->info, &var);
478 if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))
479 goto try_again;
480
481 /* Register with fbdev layer */
482 if (register_framebuffer(&p->info) < 0)
483 return -ENXIO;
484
485 printk(KERN_INFO "fb%d: control display adapter\n", p->info.node);
486
487 return 0;
488 }
489
490 #define RADACAL_WRITE(a,d) \
491 out_8(&p->cmap_regs->addr, (a)); \
492 out_8(&p->cmap_regs->dat, (d))
493
494 /* Now how about actually saying, Make it so! */
495 /* Some things in here probably don't need to be done each time. */
496 static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)
497 {
498 struct control_regvals *r;
499 volatile struct preg __iomem *rp;
500 int i, cmode;
501
502 if (PAR_EQUAL(&p->par, par)) {
503 /*
504 * check if only xoffset or yoffset differs.
505 * this prevents flickers in typical VT switch case.
506 */
507 if (p->par.xoffset != par->xoffset ||
508 p->par.yoffset != par->yoffset)
509 set_screen_start(par->xoffset, par->yoffset, p);
510
511 return;
512 }
513
514 p->par = *par;
515 cmode = p->par.cmode;
516 r = &par->regvals;
517
518 /* Turn off display */
519 out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);
520
521 set_control_clock(r->clock_params);
522
523 RADACAL_WRITE(0x20, r->radacal_ctrl);
524 RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);
525 RADACAL_WRITE(0x10, 0);
526 RADACAL_WRITE(0x11, 0);
527
528 rp = &p->control_regs->vswin;
529 for (i = 0; i < 16; ++i, ++rp)
530 out_le32(&rp->r, r->regs[i]);
531
532 out_le32(CNTRL_REG(p,pitch), par->pitch);
533 out_le32(CNTRL_REG(p,mode), r->mode);
534 out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);
535 out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch
536 + (par->xoffset << cmode));
537 out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);
538 out_le32(CNTRL_REG(p,intr_ena), 0);
539
540 /* Turn on display */
541 out_le32(CNTRL_REG(p,ctrl), par->ctrl);
542
543 #ifdef CONFIG_BOOTX_TEXT
544 btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
545 p->par.xres, p->par.yres,
546 (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),
547 p->par.pitch);
548 #endif /* CONFIG_BOOTX_TEXT */
549 }
550
551
552 /*
553 * Called from fbmem.c for probing & initializing
554 */
555 int __init control_init(void)
556 {
557 struct device_node *dp;
558 char *option = NULL;
559
560 if (fb_get_options("controlfb", &option))
561 return -ENODEV;
562 control_setup(option);
563
564 dp = find_devices("control");
565 if (dp != 0 && !control_of_init(dp))
566 return 0;
567
568 return -ENXIO;
569 }
570
571 module_init(control_init);
572
573 /* Work out which banks of VRAM we have installed. */
574 /* danj: I guess the card just ignores writes to nonexistant VRAM... */
575
576 static void __init find_vram_size(struct fb_info_control *p)
577 {
578 int bank1, bank2;
579
580 /*
581 * Set VRAM in 2MB (bank 1) mode
582 * VRAM Bank 2 will be accessible through offset 0x600000 if present
583 * and VRAM Bank 1 will not respond at that offset even if present
584 */
585 out_le32(CNTRL_REG(p,vram_attr), 0x31);
586
587 out_8(&p->frame_buffer[0x600000], 0xb3);
588 out_8(&p->frame_buffer[0x600001], 0x71);
589 asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000])
590 : "memory" );
591 mb();
592 asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000])
593 : "memory" );
594 mb();
595
596 bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)
597 && (in_8(&p->frame_buffer[0x600001]) == 0x71);
598
599 /*
600 * Set VRAM in 2MB (bank 2) mode
601 * VRAM Bank 1 will be accessible through offset 0x000000 if present
602 * and VRAM Bank 2 will not respond at that offset even if present
603 */
604 out_le32(CNTRL_REG(p,vram_attr), 0x39);
605
606 out_8(&p->frame_buffer[0], 0x5a);
607 out_8(&p->frame_buffer[1], 0xc7);
608 asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0])
609 : "memory" );
610 mb();
611 asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0])
612 : "memory" );
613 mb();
614
615 bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)
616 && (in_8(&p->frame_buffer[1]) == 0xc7);
617
618 if (bank2) {
619 if (!bank1) {
620 /*
621 * vram bank 2 only
622 */
623 p->control_use_bank2 = 1;
624 p->vram_attr = 0x39;
625 p->frame_buffer += 0x600000;
626 p->frame_buffer_phys += 0x600000;
627 } else {
628 /*
629 * 4 MB vram
630 */
631 p->vram_attr = 0x51;
632 }
633 } else {
634 /*
635 * vram bank 1 only
636 */
637 p->vram_attr = 0x31;
638 }
639
640 p->total_vram = (bank1 + bank2) * 0x200000;
641
642 printk(KERN_INFO "controlfb: VRAM Total = %dMB "
643 "(%dMB @ bank 1, %dMB @ bank 2)\n",
644 (bank1 + bank2) << 1, bank1 << 1, bank2 << 1);
645 }
646
647
648 /*
649 * find "control" and initialize
650 */
651 static int __init control_of_init(struct device_node *dp)
652 {
653 struct fb_info_control *p;
654 unsigned long addr;
655 int i;
656
657 if (control_fb) {
658 printk(KERN_ERR "controlfb: only one control is supported\n");
659 return -ENXIO;
660 }
661 if(dp->n_addrs != 2) {
662 printk(KERN_ERR "expecting 2 address for control (got %d)", dp->n_addrs);
663 return -ENXIO;
664 }
665 p = kmalloc(sizeof(*p), GFP_KERNEL);
666 if (p == 0)
667 return -ENXIO;
668 control_fb = p; /* save it for cleanups */
669 memset(p, 0, sizeof(*p));
670
671 /* Map in frame buffer and registers */
672 for (i = 0; i < dp->n_addrs; ++i) {
673 addr = dp->addrs[i].address;
674 if (dp->addrs[i].size >= 0x800000) {
675 p->fb_orig_base = addr;
676 p->fb_orig_size = dp->addrs[i].size;
677 /* use the big-endian aperture (??) */
678 p->frame_buffer_phys = addr + 0x800000;
679 } else {
680 p->control_regs_phys = addr;
681 p->control_regs_size = dp->addrs[i].size;
682 }
683 }
684
685 if (!p->fb_orig_base ||
686 !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {
687 p->fb_orig_base = 0;
688 goto error_out;
689 }
690 /* map at most 8MB for the frame buffer */
691 p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
692 _PAGE_WRITETHRU);
693
694 if (!p->control_regs_phys ||
695 !request_mem_region(p->control_regs_phys, p->control_regs_size,
696 "controlfb regs")) {
697 p->control_regs_phys = 0;
698 goto error_out;
699 }
700 p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);
701
702 p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */
703 if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {
704 p->cmap_regs_phys = 0;
705 goto error_out;
706 }
707 p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
708
709 if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)
710 goto error_out;
711
712 find_vram_size(p);
713 if (!p->total_vram)
714 goto error_out;
715
716 if (init_control(p) < 0)
717 goto error_out;
718
719 return 0;
720
721 error_out:
722 control_cleanup();
723 return -ENXIO;
724 }
725
726 /*
727 * Get the monitor sense value.
728 * Note that this can be called before calibrate_delay,
729 * so we can't use udelay.
730 */
731 static int read_control_sense(struct fb_info_control *p)
732 {
733 int sense;
734
735 out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */
736 __delay(200);
737 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
738 __delay(2000);
739 sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;
740
741 /* drive each sense line low in turn and collect the other 2 */
742 out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */
743 __delay(2000);
744 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;
745 out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */
746 __delay(2000);
747 sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)
748 | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);
749 out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */
750 __delay(2000);
751 sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;
752
753 out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
754
755 return sense;
756 }
757
758 /********************** Various translation functions **********************/
759
760 #define CONTROL_PIXCLOCK_BASE 256016
761 #define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */
762
763 /*
764 * calculate the clock paramaters to be sent to CUDA according to given
765 * pixclock in pico second.
766 */
767 static int calc_clock_params(unsigned long clk, unsigned char *param)
768 {
769 unsigned long p0, p1, p2, k, l, m, n, min;
770
771 if (clk > (CONTROL_PIXCLOCK_BASE << 3))
772 return 1;
773
774 p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;
775 l = clk << p2;
776 p0 = 0;
777 p1 = 0;
778 for (k = 1, min = l; k < 32; k++) {
779 unsigned long rem;
780
781 m = CONTROL_PIXCLOCK_BASE * k;
782 n = m / l;
783 rem = m % l;
784 if (n && (n < 128) && rem < min) {
785 p0 = k;
786 p1 = n;
787 min = rem;
788 }
789 }
790 if (!p0 || !p1)
791 return 1;
792
793 param[0] = p0;
794 param[1] = p1;
795 param[2] = p2;
796
797 return 0;
798 }
799
800
801 /*
802 * This routine takes a user-supplied var, and picks the best vmode/cmode
803 * from it.
804 */
805
806 static int control_var_to_par(struct fb_var_screeninfo *var,
807 struct fb_par_control *par, const struct fb_info *fb_info)
808 {
809 int cmode, piped_diff, hstep;
810 unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,
811 hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;
812 unsigned long pixclock;
813 struct fb_info_control *p = (struct fb_info_control *) fb_info;
814 struct control_regvals *r = &par->regvals;
815
816 switch (var->bits_per_pixel) {
817 case 8:
818 par->cmode = CMODE_8;
819 if (p->total_vram > 0x200000) {
820 r->mode = 3;
821 r->radacal_ctrl = 0x20;
822 piped_diff = 13;
823 } else {
824 r->mode = 2;
825 r->radacal_ctrl = 0x10;
826 piped_diff = 9;
827 }
828 break;
829 case 15:
830 case 16:
831 par->cmode = CMODE_16;
832 if (p->total_vram > 0x200000) {
833 r->mode = 2;
834 r->radacal_ctrl = 0x24;
835 piped_diff = 5;
836 } else {
837 r->mode = 1;
838 r->radacal_ctrl = 0x14;
839 piped_diff = 3;
840 }
841 break;
842 case 32:
843 par->cmode = CMODE_32;
844 if (p->total_vram > 0x200000) {
845 r->mode = 1;
846 r->radacal_ctrl = 0x28;
847 } else {
848 r->mode = 0;
849 r->radacal_ctrl = 0x18;
850 }
851 piped_diff = 1;
852 break;
853 default:
854 return -EINVAL;
855 }
856
857 /*
858 * adjust xres and vxres so that the corresponding memory widths are
859 * 32-byte aligned
860 */
861 hstep = 31 >> par->cmode;
862 par->xres = (var->xres + hstep) & ~hstep;
863 par->vxres = (var->xres_virtual + hstep) & ~hstep;
864 par->xoffset = (var->xoffset + hstep) & ~hstep;
865 if (par->vxres < par->xres)
866 par->vxres = par->xres;
867 par->pitch = par->vxres << par->cmode;
868
869 par->yres = var->yres;
870 par->vyres = var->yres_virtual;
871 par->yoffset = var->yoffset;
872 if (par->vyres < par->yres)
873 par->vyres = par->yres;
874
875 par->sync = var->sync;
876
877 if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)
878 return -EINVAL;
879
880 if (par->xoffset + par->xres > par->vxres)
881 par->xoffset = par->vxres - par->xres;
882 if (par->yoffset + par->yres > par->vyres)
883 par->yoffset = par->vyres - par->yres;
884
885 pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:
886 var->pixclock;
887 if (calc_clock_params(pixclock, r->clock_params))
888 return -EINVAL;
889
890 hperiod = ((var->left_margin + par->xres + var->right_margin
891 + var->hsync_len) >> 1) - 2;
892 hssync = hperiod + 1;
893 hsblank = hssync - (var->right_margin >> 1);
894 hesync = (var->hsync_len >> 1) - 1;
895 heblank = (var->left_margin >> 1) + hesync;
896 piped = heblank - piped_diff;
897 heq = var->hsync_len >> 2;
898 hlfln = (hperiod+2) >> 1;
899 hserr = hssync-hesync;
900 vperiod = (var->vsync_len + var->lower_margin + par->yres
901 + var->upper_margin) << 1;
902 vssync = vperiod - 2;
903 vesync = (var->vsync_len << 1) - vperiod + vssync;
904 veblank = (var->upper_margin << 1) + vesync;
905 vsblank = vssync - (var->lower_margin << 1);
906 vswin = (vsblank+vssync) >> 1;
907 vewin = (vesync+veblank) >> 1;
908
909 r->regs[0] = vswin;
910 r->regs[1] = vsblank;
911 r->regs[2] = veblank;
912 r->regs[3] = vewin;
913 r->regs[4] = vesync;
914 r->regs[5] = vssync;
915 r->regs[6] = vperiod;
916 r->regs[7] = piped;
917 r->regs[8] = hperiod;
918 r->regs[9] = hsblank;
919 r->regs[10] = heblank;
920 r->regs[11] = hesync;
921 r->regs[12] = hssync;
922 r->regs[13] = heq;
923 r->regs[14] = hlfln;
924 r->regs[15] = hserr;
925
926 if (par->xres >= 1280 && par->cmode >= CMODE_16)
927 par->ctrl = 0x7f;
928 else
929 par->ctrl = 0x3b;
930
931 if (mac_var_to_vmode(var, &par->vmode, &cmode))
932 par->vmode = 0;
933
934 return 0;
935 }
936
937
938 /*
939 * Convert hardware data in par to an fb_var_screeninfo
940 */
941
942 static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)
943 {
944 struct control_regints *rv;
945
946 rv = (struct control_regints *) par->regvals.regs;
947
948 memset(var, 0, sizeof(*var));
949 var->xres = par->xres;
950 var->yres = par->yres;
951 var->xres_virtual = par->vxres;
952 var->yres_virtual = par->vyres;
953 var->xoffset = par->xoffset;
954 var->yoffset = par->yoffset;
955
956 switch(par->cmode) {
957 default:
958 case CMODE_8:
959 var->bits_per_pixel = 8;
960 var->red.length = 8;
961 var->green.length = 8;
962 var->blue.length = 8;
963 break;
964 case CMODE_16: /* RGB 555 */
965 var->bits_per_pixel = 16;
966 var->red.offset = 10;
967 var->red.length = 5;
968 var->green.offset = 5;
969 var->green.length = 5;
970 var->blue.length = 5;
971 break;
972 case CMODE_32: /* RGB 888 */
973 var->bits_per_pixel = 32;
974 var->red.offset = 16;
975 var->red.length = 8;
976 var->green.offset = 8;
977 var->green.length = 8;
978 var->blue.length = 8;
979 var->transp.offset = 24;
980 var->transp.length = 8;
981 break;
982 }
983 var->height = -1;
984 var->width = -1;
985 var->vmode = FB_VMODE_NONINTERLACED;
986
987 var->left_margin = (rv->heblank - rv->hesync) << 1;
988 var->right_margin = (rv->hssync - rv->hsblank) << 1;
989 var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;
990
991 var->upper_margin = (rv->veblank - rv->vesync) >> 1;
992 var->lower_margin = (rv->vssync - rv->vsblank) >> 1;
993 var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;
994
995 var->sync = par->sync;
996
997 /*
998 * 10^12 * clock_params[0] / (3906400 * clock_params[1]
999 * * 2^clock_params[2])
1000 * (10^12 * clock_params[0] / (3906400 * clock_params[1]))
1001 * >> clock_params[2]
1002 */
1003 /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */
1004 var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];
1005 var->pixclock /= par->regvals.clock_params[1];
1006 var->pixclock >>= par->regvals.clock_params[2];
1007 }
1008
1009 /*
1010 * Set misc info vars for this driver
1011 */
1012 static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)
1013 {
1014 /* Fill fb_info */
1015 info->par = &p->par;
1016 info->fbops = &controlfb_ops;
1017 info->pseudo_palette = p->pseudo_palette;
1018 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1019 info->screen_base = p->frame_buffer + CTRLFB_OFF;
1020
1021 fb_alloc_cmap(&info->cmap, 256, 0);
1022
1023 /* Fill fix common fields */
1024 strcpy(info->fix.id, "control");
1025 info->fix.mmio_start = p->control_regs_phys;
1026 info->fix.mmio_len = sizeof(struct control_regs);
1027 info->fix.type = FB_TYPE_PACKED_PIXELS;
1028 info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;
1029 info->fix.smem_len = p->total_vram - CTRLFB_OFF;
1030 info->fix.ywrapstep = 0;
1031 info->fix.type_aux = 0;
1032 info->fix.accel = FB_ACCEL_NONE;
1033 }
1034
1035
1036 static void control_cleanup(void)
1037 {
1038 struct fb_info_control *p = control_fb;
1039
1040 if (!p)
1041 return;
1042
1043 if (p->cmap_regs)
1044 iounmap(p->cmap_regs);
1045 if (p->control_regs)
1046 iounmap(p->control_regs);
1047 if (p->frame_buffer) {
1048 if (p->control_use_bank2)
1049 p->frame_buffer -= 0x600000;
1050 iounmap(p->frame_buffer);
1051 }
1052 if (p->cmap_regs_phys)
1053 release_mem_region(p->cmap_regs_phys, 0x1000);
1054 if (p->control_regs_phys)
1055 release_mem_region(p->control_regs_phys, p->control_regs_size);
1056 if (p->fb_orig_base)
1057 release_mem_region(p->fb_orig_base, p->fb_orig_size);
1058 kfree(p);
1059 }
1060
1061
1062 /*
1063 * Parse user speficied options (`video=controlfb:')
1064 */
1065 void __init control_setup(char *options)
1066 {
1067 char *this_opt;
1068
1069 if (!options || !*options)
1070 return;
1071
1072 while ((this_opt = strsep(&options, ",")) != NULL) {
1073 if (!strncmp(this_opt, "vmode:", 6)) {
1074 int vmode = simple_strtoul(this_opt+6, NULL, 0);
1075 if (vmode > 0 && vmode <= VMODE_MAX &&
1076 control_mac_modes[vmode - 1].m[1] >= 0)
1077 default_vmode = vmode;
1078 } else if (!strncmp(this_opt, "cmode:", 6)) {
1079 int depth = simple_strtoul(this_opt+6, NULL, 0);
1080 switch (depth) {
1081 case CMODE_8:
1082 case CMODE_16:
1083 case CMODE_32:
1084 default_cmode = depth;
1085 break;
1086 case 8:
1087 default_cmode = CMODE_8;
1088 break;
1089 case 15:
1090 case 16:
1091 default_cmode = CMODE_16;
1092 break;
1093 case 24:
1094 case 32:
1095 default_cmode = CMODE_32;
1096 break;
1097 }
1098 }
1099 }
1100 }
1101
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