2 * pata_sis.c - SiS ATA driver
4 * (C) 2005 Red Hat <alan@redhat.com>
6 * Based upon linux/drivers/ide/pci/sis5513.c
7 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
8 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
9 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
10 * SiS Taiwan : for direct support and hardware.
11 * Daniela Engert : for initial ATA100 advices and numerous others.
12 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
13 * for checking code correctness, providing patches.
14 * Original tests and design on the SiS620 chipset.
15 * ATA100 tests and design on the SiS735 chipset.
16 * ATA16/33 support from specs
17 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
21 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29 #include <linux/blkdev.h>
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/ata.h>
36 #define DRV_NAME "pata_sis"
37 #define DRV_VERSION "0.4.3"
40 u16 device
; /* PCI host ID */
41 struct ata_port_info
*info
; /* Info block */
42 /* Probably add family, cable detect type etc here to clean
47 * sis_port_base - return PCI configuration base for dev
50 * Returns the base of the PCI configuration registers for this port
54 static int sis_port_base(struct ata_device
*adev
)
56 return 0x40 + (4 * adev
->ap
->port_no
) + (2 * adev
->devno
);
60 * sis_133_pre_reset - check for 40/80 pin
63 * Perform cable detection for the later UDMA133 capable
67 static int sis_133_pre_reset(struct ata_port
*ap
)
69 static const struct pci_bits sis_enable_bits
[] = {
70 { 0x4aU
, 1U, 0x02UL
, 0x02UL
}, /* port 0 */
71 { 0x4aU
, 1U, 0x04UL
, 0x04UL
}, /* port 1 */
74 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
77 if (!pci_test_config_bits(pdev
, &sis_enable_bits
[ap
->port_no
])) {
79 printk(KERN_INFO
"ata%u: port disabled. ignoring.\n", ap
->id
);
82 /* The top bit of this register is the cable detect bit */
83 pci_read_config_word(pdev
, 0x50 + 2 * ap
->port_no
, &tmp
);
85 ap
->cbl
= ATA_CBL_PATA40
;
87 ap
->cbl
= ATA_CBL_PATA80
;
89 return ata_std_prereset(ap
);
93 * sis_error_handler - Probe specified port on PATA host controller
97 * None (inherited from caller).
100 static void sis_133_error_handler(struct ata_port
*ap
)
102 ata_bmdma_drive_eh(ap
, sis_133_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
107 * sis_66_pre_reset - check for 40/80 pin
110 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
111 * SiS IDE controllers.
114 static int sis_66_pre_reset(struct ata_port
*ap
)
116 static const struct pci_bits sis_enable_bits
[] = {
117 { 0x4aU
, 1U, 0x02UL
, 0x02UL
}, /* port 0 */
118 { 0x4aU
, 1U, 0x04UL
, 0x04UL
}, /* port 1 */
121 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
124 if (!pci_test_config_bits(pdev
, &sis_enable_bits
[ap
->port_no
])) {
125 ata_port_disable(ap
);
126 printk(KERN_INFO
"ata%u: port disabled. ignoring.\n", ap
->id
);
129 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
130 pci_read_config_byte(pdev
, 0x48, &tmp
);
133 ap
->cbl
= ATA_CBL_PATA40
;
135 ap
->cbl
= ATA_CBL_PATA80
;
137 return ata_std_prereset(ap
);
141 * sis_66_error_handler - Probe specified port on PATA host controller
146 * None (inherited from caller).
149 static void sis_66_error_handler(struct ata_port
*ap
)
151 ata_bmdma_drive_eh(ap
, sis_66_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
155 * sis_old_pre_reset - probe begin
158 * Set up cable type and use generic probe init
161 static int sis_old_pre_reset(struct ata_port
*ap
)
163 static const struct pci_bits sis_enable_bits
[] = {
164 { 0x4aU
, 1U, 0x02UL
, 0x02UL
}, /* port 0 */
165 { 0x4aU
, 1U, 0x04UL
, 0x04UL
}, /* port 1 */
168 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
170 if (!pci_test_config_bits(pdev
, &sis_enable_bits
[ap
->port_no
])) {
171 ata_port_disable(ap
);
172 printk(KERN_INFO
"ata%u: port disabled. ignoring.\n", ap
->id
);
175 ap
->cbl
= ATA_CBL_PATA40
;
176 return ata_std_prereset(ap
);
181 * sis_old_error_handler - Probe specified port on PATA host controller
185 * None (inherited from caller).
188 static void sis_old_error_handler(struct ata_port
*ap
)
190 ata_bmdma_drive_eh(ap
, sis_old_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
194 * sis_set_fifo - Set RWP fifo bits for this device
198 * SIS chipsets implement prefetch/postwrite bits for each device
199 * on both channels. This functionality is not ATAPI compatible and
200 * must be configured according to the class of device present
203 static void sis_set_fifo(struct ata_port
*ap
, struct ata_device
*adev
)
205 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
209 mask
<<= (2 * ap
->port_no
);
210 mask
<<= adev
->devno
;
212 /* This holds various bits including the FIFO control */
213 pci_read_config_byte(pdev
, 0x4B, &fifoctrl
);
216 /* Enable for ATA (disk) only */
217 if (adev
->class == ATA_DEV_ATA
)
219 pci_write_config_byte(pdev
, 0x4B, fifoctrl
);
223 * sis_old_set_piomode - Initialize host controller PATA PIO timings
224 * @ap: Port whose timings we are configuring
225 * @adev: Device we are configuring for.
227 * Set PIO mode for device, in host controller PCI config space. This
228 * function handles PIO set up for all chips that are pre ATA100 and
229 * also early ATA100 devices.
232 * None (inherited from caller).
235 static void sis_old_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
237 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
238 int port
= sis_port_base(adev
);
240 int speed
= adev
->pio_mode
- XFER_PIO_0
;
242 const u8 active
[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
243 const u8 recovery
[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
245 sis_set_fifo(ap
, adev
);
247 pci_read_config_byte(pdev
, port
, &t1
);
248 pci_read_config_byte(pdev
, port
+ 1, &t2
);
250 t1
&= ~0x0F; /* Clear active/recovery timings */
254 t2
|= recovery
[speed
];
256 pci_write_config_byte(pdev
, port
, t1
);
257 pci_write_config_byte(pdev
, port
+ 1, t2
);
261 * sis_100_set_pioode - Initialize host controller PATA PIO timings
262 * @ap: Port whose timings we are configuring
263 * @adev: Device we are configuring for.
265 * Set PIO mode for device, in host controller PCI config space. This
266 * function handles PIO set up for ATA100 devices and early ATA133.
269 * None (inherited from caller).
272 static void sis_100_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
274 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
275 int port
= sis_port_base(adev
);
276 int speed
= adev
->pio_mode
- XFER_PIO_0
;
278 const u8 actrec
[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
280 sis_set_fifo(ap
, adev
);
282 pci_write_config_byte(pdev
, port
, actrec
[speed
]);
286 * sis_133_set_pioode - Initialize host controller PATA PIO timings
287 * @ap: Port whose timings we are configuring
288 * @adev: Device we are configuring for.
290 * Set PIO mode for device, in host controller PCI config space. This
291 * function handles PIO set up for the later ATA133 devices.
294 * None (inherited from caller).
297 static void sis_133_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
299 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
303 int speed
= adev
->pio_mode
- XFER_PIO_0
;
305 const u32 timing133
[] = {
306 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
312 const u32 timing100
[] = {
313 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
320 sis_set_fifo(ap
, adev
);
322 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
323 pci_read_config_dword(pdev
, 0x54, ®54
);
324 if (reg54
& 0x40000000)
326 port
+= 8 * ap
->port_no
+ 4 * adev
->devno
;
328 pci_read_config_dword(pdev
, port
, &t1
);
329 t1
&= 0xC0C00FFF; /* Mask out timing */
331 if (t1
& 0x08) /* 100 or 133 ? */
332 t1
|= timing133
[speed
];
334 t1
|= timing100
[speed
];
335 pci_write_config_byte(pdev
, port
, t1
);
339 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
340 * @ap: Port whose timings we are configuring
341 * @adev: Device to program
343 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
344 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
345 * the old ide/pci driver.
348 * None (inherited from caller).
351 static void sis_old_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
353 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
354 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
355 int drive_pci
= sis_port_base(adev
);
358 const u16 mwdma_bits
[] = { 0x707, 0x202, 0x202 };
359 const u16 udma_bits
[] = { 0xE000, 0xC000, 0xA000 };
361 pci_read_config_word(pdev
, drive_pci
, &timing
);
363 if (adev
->dma_mode
< XFER_UDMA_0
) {
364 /* bits 3-0 hold recovery timing bits 8-10 active timing and
365 the higer bits are dependant on the device */
367 timing
|= mwdma_bits
[speed
];
368 pci_write_config_word(pdev
, drive_pci
, timing
);
370 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
371 speed
= adev
->dma_mode
- XFER_UDMA_0
;
373 timing
|= udma_bits
[speed
];
378 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
379 * @ap: Port whose timings we are configuring
380 * @adev: Device to program
382 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
383 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
384 * the old ide/pci driver.
387 * None (inherited from caller).
390 static void sis_66_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
392 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
393 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
394 int drive_pci
= sis_port_base(adev
);
397 const u16 mwdma_bits
[] = { 0x707, 0x202, 0x202 };
398 const u16 udma_bits
[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
400 pci_read_config_word(pdev
, drive_pci
, &timing
);
402 if (adev
->dma_mode
< XFER_UDMA_0
) {
403 /* bits 3-0 hold recovery timing bits 8-10 active timing and
404 the higer bits are dependant on the device, bit 15 udma */
406 timing
|= mwdma_bits
[speed
];
408 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
409 speed
= adev
->dma_mode
- XFER_UDMA_0
;
411 timing
|= udma_bits
[speed
];
413 pci_write_config_word(pdev
, drive_pci
, timing
);
417 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
418 * @ap: Port whose timings we are configuring
419 * @adev: Device to program
421 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
422 * Handles UDMA66 and early UDMA100 devices.
425 * None (inherited from caller).
428 static void sis_100_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
430 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
431 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
432 int drive_pci
= sis_port_base(adev
);
435 const u16 udma_bits
[] = { 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
437 pci_read_config_word(pdev
, drive_pci
, &timing
);
439 if (adev
->dma_mode
< XFER_UDMA_0
) {
440 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
442 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
443 speed
= adev
->dma_mode
- XFER_UDMA_0
;
445 timing
|= udma_bits
[speed
];
447 pci_write_config_word(pdev
, drive_pci
, timing
);
451 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
452 * @ap: Port whose timings we are configuring
453 * @adev: Device to program
455 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
456 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
457 * the old ide/pci driver.
460 * None (inherited from caller).
463 static void sis_133_early_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
465 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
466 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
467 int drive_pci
= sis_port_base(adev
);
470 const u16 udma_bits
[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
472 pci_read_config_word(pdev
, drive_pci
, &timing
);
474 if (adev
->dma_mode
< XFER_UDMA_0
) {
475 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
477 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
478 speed
= adev
->dma_mode
- XFER_UDMA_0
;
480 timing
|= udma_bits
[speed
];
482 pci_write_config_word(pdev
, drive_pci
, timing
);
486 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
487 * @ap: Port whose timings we are configuring
488 * @adev: Device to program
490 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
491 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
492 * the old ide/pci driver.
495 * None (inherited from caller).
498 static void sis_133_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
500 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
501 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
506 /* bits 4- cycle time 8 - cvs time */
507 const u32 timing_u100
[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
508 const u32 timing_u133
[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
510 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
511 pci_read_config_dword(pdev
, 0x54, ®54
);
512 if (reg54
& 0x40000000)
514 port
+= (8 * ap
->port_no
) + (4 * adev
->devno
);
516 pci_read_config_dword(pdev
, port
, &t1
);
518 if (adev
->dma_mode
< XFER_UDMA_0
) {
520 /* FIXME: need data sheet to add MWDMA here. Also lacking on
523 speed
= adev
->dma_mode
- XFER_UDMA_0
;
524 /* if & 8 no UDMA133 - need info for ... */
528 t1
|= timing_u133
[speed
];
530 t1
|= timing_u100
[speed
];
532 pci_write_config_dword(pdev
, port
, t1
);
535 static struct scsi_host_template sis_sht
= {
536 .module
= THIS_MODULE
,
538 .ioctl
= ata_scsi_ioctl
,
539 .queuecommand
= ata_scsi_queuecmd
,
540 .can_queue
= ATA_DEF_QUEUE
,
541 .this_id
= ATA_SHT_THIS_ID
,
542 .sg_tablesize
= LIBATA_MAX_PRD
,
543 .max_sectors
= ATA_MAX_SECTORS
,
544 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
545 .emulated
= ATA_SHT_EMULATED
,
546 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
547 .proc_name
= DRV_NAME
,
548 .dma_boundary
= ATA_DMA_BOUNDARY
,
549 .slave_configure
= ata_scsi_slave_config
,
550 .bios_param
= ata_std_bios_param
,
553 static const struct ata_port_operations sis_133_ops
= {
554 .port_disable
= ata_port_disable
,
555 .set_piomode
= sis_133_set_piomode
,
556 .set_dmamode
= sis_133_set_dmamode
,
557 .mode_filter
= ata_pci_default_filter
,
559 .tf_load
= ata_tf_load
,
560 .tf_read
= ata_tf_read
,
561 .check_status
= ata_check_status
,
562 .exec_command
= ata_exec_command
,
563 .dev_select
= ata_std_dev_select
,
565 .freeze
= ata_bmdma_freeze
,
566 .thaw
= ata_bmdma_thaw
,
567 .error_handler
= sis_133_error_handler
,
568 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
570 .bmdma_setup
= ata_bmdma_setup
,
571 .bmdma_start
= ata_bmdma_start
,
572 .bmdma_stop
= ata_bmdma_stop
,
573 .bmdma_status
= ata_bmdma_status
,
574 .qc_prep
= ata_qc_prep
,
575 .qc_issue
= ata_qc_issue_prot
,
576 .data_xfer
= ata_pio_data_xfer
,
578 .eng_timeout
= ata_eng_timeout
,
580 .irq_handler
= ata_interrupt
,
581 .irq_clear
= ata_bmdma_irq_clear
,
583 .port_start
= ata_port_start
,
584 .port_stop
= ata_port_stop
,
585 .host_stop
= ata_host_stop
,
588 static const struct ata_port_operations sis_133_early_ops
= {
589 .port_disable
= ata_port_disable
,
590 .set_piomode
= sis_100_set_piomode
,
591 .set_dmamode
= sis_133_early_set_dmamode
,
592 .mode_filter
= ata_pci_default_filter
,
594 .tf_load
= ata_tf_load
,
595 .tf_read
= ata_tf_read
,
596 .check_status
= ata_check_status
,
597 .exec_command
= ata_exec_command
,
598 .dev_select
= ata_std_dev_select
,
600 .freeze
= ata_bmdma_freeze
,
601 .thaw
= ata_bmdma_thaw
,
602 .error_handler
= sis_66_error_handler
,
603 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
605 .bmdma_setup
= ata_bmdma_setup
,
606 .bmdma_start
= ata_bmdma_start
,
607 .bmdma_stop
= ata_bmdma_stop
,
608 .bmdma_status
= ata_bmdma_status
,
609 .qc_prep
= ata_qc_prep
,
610 .qc_issue
= ata_qc_issue_prot
,
611 .data_xfer
= ata_pio_data_xfer
,
613 .eng_timeout
= ata_eng_timeout
,
615 .irq_handler
= ata_interrupt
,
616 .irq_clear
= ata_bmdma_irq_clear
,
618 .port_start
= ata_port_start
,
619 .port_stop
= ata_port_stop
,
620 .host_stop
= ata_host_stop
,
623 static const struct ata_port_operations sis_100_ops
= {
624 .port_disable
= ata_port_disable
,
625 .set_piomode
= sis_100_set_piomode
,
626 .set_dmamode
= sis_100_set_dmamode
,
627 .mode_filter
= ata_pci_default_filter
,
629 .tf_load
= ata_tf_load
,
630 .tf_read
= ata_tf_read
,
631 .check_status
= ata_check_status
,
632 .exec_command
= ata_exec_command
,
633 .dev_select
= ata_std_dev_select
,
635 .freeze
= ata_bmdma_freeze
,
636 .thaw
= ata_bmdma_thaw
,
637 .error_handler
= sis_66_error_handler
,
638 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
641 .bmdma_setup
= ata_bmdma_setup
,
642 .bmdma_start
= ata_bmdma_start
,
643 .bmdma_stop
= ata_bmdma_stop
,
644 .bmdma_status
= ata_bmdma_status
,
645 .qc_prep
= ata_qc_prep
,
646 .qc_issue
= ata_qc_issue_prot
,
647 .data_xfer
= ata_pio_data_xfer
,
649 .eng_timeout
= ata_eng_timeout
,
651 .irq_handler
= ata_interrupt
,
652 .irq_clear
= ata_bmdma_irq_clear
,
654 .port_start
= ata_port_start
,
655 .port_stop
= ata_port_stop
,
656 .host_stop
= ata_host_stop
,
659 static const struct ata_port_operations sis_66_ops
= {
660 .port_disable
= ata_port_disable
,
661 .set_piomode
= sis_old_set_piomode
,
662 .set_dmamode
= sis_66_set_dmamode
,
663 .mode_filter
= ata_pci_default_filter
,
665 .tf_load
= ata_tf_load
,
666 .tf_read
= ata_tf_read
,
667 .check_status
= ata_check_status
,
668 .exec_command
= ata_exec_command
,
669 .dev_select
= ata_std_dev_select
,
671 .freeze
= ata_bmdma_freeze
,
672 .thaw
= ata_bmdma_thaw
,
673 .error_handler
= sis_66_error_handler
,
674 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
676 .bmdma_setup
= ata_bmdma_setup
,
677 .bmdma_start
= ata_bmdma_start
,
678 .bmdma_stop
= ata_bmdma_stop
,
679 .bmdma_status
= ata_bmdma_status
,
680 .qc_prep
= ata_qc_prep
,
681 .qc_issue
= ata_qc_issue_prot
,
682 .data_xfer
= ata_pio_data_xfer
,
684 .eng_timeout
= ata_eng_timeout
,
686 .irq_handler
= ata_interrupt
,
687 .irq_clear
= ata_bmdma_irq_clear
,
689 .port_start
= ata_port_start
,
690 .port_stop
= ata_port_stop
,
691 .host_stop
= ata_host_stop
,
694 static const struct ata_port_operations sis_old_ops
= {
695 .port_disable
= ata_port_disable
,
696 .set_piomode
= sis_old_set_piomode
,
697 .set_dmamode
= sis_old_set_dmamode
,
698 .mode_filter
= ata_pci_default_filter
,
700 .tf_load
= ata_tf_load
,
701 .tf_read
= ata_tf_read
,
702 .check_status
= ata_check_status
,
703 .exec_command
= ata_exec_command
,
704 .dev_select
= ata_std_dev_select
,
706 .freeze
= ata_bmdma_freeze
,
707 .thaw
= ata_bmdma_thaw
,
708 .error_handler
= sis_old_error_handler
,
709 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
711 .bmdma_setup
= ata_bmdma_setup
,
712 .bmdma_start
= ata_bmdma_start
,
713 .bmdma_stop
= ata_bmdma_stop
,
714 .bmdma_status
= ata_bmdma_status
,
715 .qc_prep
= ata_qc_prep
,
716 .qc_issue
= ata_qc_issue_prot
,
717 .data_xfer
= ata_pio_data_xfer
,
719 .eng_timeout
= ata_eng_timeout
,
721 .irq_handler
= ata_interrupt
,
722 .irq_clear
= ata_bmdma_irq_clear
,
724 .port_start
= ata_port_start
,
725 .port_stop
= ata_port_stop
,
726 .host_stop
= ata_host_stop
,
729 static struct ata_port_info sis_info
= {
731 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
732 .pio_mask
= 0x1f, /* pio0-4 */
735 .port_ops
= &sis_old_ops
,
737 static struct ata_port_info sis_info33
= {
739 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
740 .pio_mask
= 0x1f, /* pio0-4 */
742 .udma_mask
= ATA_UDMA2
, /* UDMA 33 */
743 .port_ops
= &sis_old_ops
,
745 static struct ata_port_info sis_info66
= {
747 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
748 .pio_mask
= 0x1f, /* pio0-4 */
749 .udma_mask
= ATA_UDMA4
, /* UDMA 66 */
750 .port_ops
= &sis_66_ops
,
752 static struct ata_port_info sis_info100
= {
754 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
755 .pio_mask
= 0x1f, /* pio0-4 */
756 .udma_mask
= ATA_UDMA5
,
757 .port_ops
= &sis_100_ops
,
759 static struct ata_port_info sis_info100_early
= {
761 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
762 .udma_mask
= ATA_UDMA5
,
763 .pio_mask
= 0x1f, /* pio0-4 */
764 .port_ops
= &sis_66_ops
,
766 static struct ata_port_info sis_info133
= {
768 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
769 .pio_mask
= 0x1f, /* pio0-4 */
770 .udma_mask
= ATA_UDMA6
,
771 .port_ops
= &sis_133_ops
,
773 static struct ata_port_info sis_info133_early
= {
775 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
776 .pio_mask
= 0x1f, /* pio0-4 */
777 .udma_mask
= ATA_UDMA6
,
778 .port_ops
= &sis_133_early_ops
,
782 static void sis_fixup(struct pci_dev
*pdev
, struct sis_chipset
*sis
)
787 if (sis
->info
== &sis_info133
) {
788 pci_read_config_word(pdev
, 0x50, ®w
);
790 pci_write_config_word(pdev
, 0x50, regw
& ~0x08);
791 pci_read_config_word(pdev
, 0x52, ®w
);
793 pci_write_config_word(pdev
, 0x52, regw
& ~0x08);
797 if (sis
->info
== &sis_info133_early
|| sis
->info
== &sis_info100
) {
799 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
800 /* Set compatibility bit */
801 pci_read_config_byte(pdev
, 0x49, ®
);
803 pci_write_config_byte(pdev
, 0x49, reg
| 0x01);
807 if (sis
->info
== &sis_info66
|| sis
->info
== &sis_info100_early
) {
809 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
810 /* Set compatibility bit */
811 pci_read_config_byte(pdev
, 0x52, ®
);
813 pci_write_config_byte(pdev
, 0x52, reg
| 0x04);
817 if (sis
->info
== &sis_info33
) {
818 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, ®
);
819 if (( reg
& 0x0F ) != 0x00)
820 pci_write_config_byte(pdev
, PCI_CLASS_PROG
, reg
& 0xF0);
821 /* Fall through to ATA16 fixup below */
824 if (sis
->info
== &sis_info
|| sis
->info
== &sis_info33
) {
825 /* force per drive recovery and active timings
826 needed on ATA_33 and below chips */
827 pci_read_config_byte(pdev
, 0x52, ®
);
829 pci_write_config_byte(pdev
, 0x52, reg
|0x08);
837 * sis_init_one - Register SiS ATA PCI device with kernel services
838 * @pdev: PCI device to register
839 * @ent: Entry in sis_pci_tbl matching with @pdev
841 * Called from kernel PCI layer. We probe for combined mode (sigh),
842 * and then hand over control to libata, for it to do the rest.
845 * Inherited from PCI layer (may sleep).
848 * Zero on success, or -ERRNO value.
851 static int sis_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
853 static int printed_version
;
854 static struct ata_port_info
*port_info
[2];
855 struct ata_port_info
*port
;
856 struct pci_dev
*host
= NULL
;
857 struct sis_chipset
*chipset
= NULL
;
859 static struct sis_chipset sis_chipsets
[] = {
861 { 0x0968, &sis_info133
},
862 { 0x0966, &sis_info133
},
863 { 0x0965, &sis_info133
},
864 { 0x0745, &sis_info100
},
865 { 0x0735, &sis_info100
},
866 { 0x0733, &sis_info100
},
867 { 0x0635, &sis_info100
},
868 { 0x0633, &sis_info100
},
870 { 0x0730, &sis_info100_early
}, /* 100 with ATA 66 layout */
871 { 0x0550, &sis_info100_early
}, /* 100 with ATA 66 layout */
873 { 0x0640, &sis_info66
},
874 { 0x0630, &sis_info66
},
875 { 0x0620, &sis_info66
},
876 { 0x0540, &sis_info66
},
877 { 0x0530, &sis_info66
},
879 { 0x5600, &sis_info33
},
880 { 0x5598, &sis_info33
},
881 { 0x5597, &sis_info33
},
882 { 0x5591, &sis_info33
},
883 { 0x5582, &sis_info33
},
884 { 0x5581, &sis_info33
},
886 { 0x5596, &sis_info
},
887 { 0x5571, &sis_info
},
888 { 0x5517, &sis_info
},
889 { 0x5511, &sis_info
},
893 static struct sis_chipset sis133_early
= {
894 0x0, &sis_info133_early
896 static struct sis_chipset sis133
= {
899 static struct sis_chipset sis100_early
= {
900 0x0, &sis_info100_early
902 static struct sis_chipset sis100
= {
906 if (!printed_version
++)
907 dev_printk(KERN_DEBUG
, &pdev
->dev
,
908 "version " DRV_VERSION
"\n");
910 /* We have to find the bridge first */
912 for (chipset
= &sis_chipsets
[0]; chipset
->device
; chipset
++) {
913 host
= pci_get_device(PCI_VENDOR_ID_SI
, chipset
->device
, NULL
);
915 if (chipset
->device
== 0x630) { /* SIS630 */
917 pci_read_config_byte(host
, PCI_REVISION_ID
, &host_rev
);
918 if (host_rev
>= 0x30) /* 630 ET */
919 chipset
= &sis100_early
;
925 /* Look for concealed bridges */
931 /* Disable ID masking and register remapping then
932 see what the real ID is */
934 pci_read_config_dword(pdev
, 0x54, &idemisc
);
935 pci_write_config_dword(pdev
, 0x54, idemisc
& 0x7fffffff);
936 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
937 pci_write_config_dword(pdev
, 0x54, idemisc
);
940 case 0x5518: /* SIS 962/963 */
942 if ((idemisc
& 0x40000000) == 0) {
943 pci_write_config_dword(pdev
, 0x54, idemisc
| 0x40000000);
944 printk(KERN_INFO
"SIS5513: Switching to 5513 register mapping\n");
947 case 0x0180: /* SIS 965/965L */
950 case 0x1180: /* SIS 966/966L */
957 if (chipset
== NULL
) {
958 struct pci_dev
*lpc_bridge
;
964 /* Try the second unmasking technique */
965 pci_read_config_byte(pdev
, 0x4a, &idecfg
);
966 pci_write_config_byte(pdev
, 0x4a, idecfg
| 0x10);
967 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
968 pci_write_config_byte(pdev
, 0x4a, idecfg
);
972 lpc_bridge
= pci_get_slot(pdev
->bus
, 0x10); /* Bus 0 Dev 2 Fn 0 */
973 if (lpc_bridge
== NULL
)
975 pci_read_config_byte(lpc_bridge
, PCI_REVISION_ID
, &sbrev
);
976 pci_read_config_byte(pdev
, 0x49, &prefctl
);
977 pci_dev_put(lpc_bridge
);
979 if (sbrev
== 0x10 && (prefctl
& 0x80)) {
980 chipset
= &sis133_early
;
989 /* No chipset info, no support */
993 port
= chipset
->info
;
994 port
->private_data
= chipset
;
996 sis_fixup(pdev
, chipset
);
998 port_info
[0] = port_info
[1] = port
;
999 return ata_pci_init_one(pdev
, port_info
, 2);
1002 static const struct pci_device_id sis_pci_tbl
[] = {
1003 { PCI_DEVICE(PCI_VENDOR_ID_SI
, 0x5513), }, /* SiS 5513 */
1004 { PCI_DEVICE(PCI_VENDOR_ID_SI
, 0x5518), }, /* SiS 5518 */
1008 static struct pci_driver sis_pci_driver
= {
1010 .id_table
= sis_pci_tbl
,
1011 .probe
= sis_init_one
,
1012 .remove
= ata_pci_remove_one
,
1015 static int __init
sis_init(void)
1017 return pci_register_driver(&sis_pci_driver
);
1020 static void __exit
sis_exit(void)
1022 pci_unregister_driver(&sis_pci_driver
);
1026 module_init(sis_init
);
1027 module_exit(sis_exit
);
1029 MODULE_AUTHOR("Alan Cox");
1030 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
1031 MODULE_LICENSE("GPL");
1032 MODULE_DEVICE_TABLE(pci
, sis_pci_tbl
);
1033 MODULE_VERSION(DRV_VERSION
);