[PATCH] w1: Adds a sysfs entry (w1_master_search) that allows you to disable/enable...
[linux-2.6/verdex.git] / include / asm-arm / arch-lh7a40x / hardware.h
blobaeb07c162e2594d1051d76c230d49751ca8b63b7
1 /* include/asm-arm/arch-lh7a40x/hardware.h
3 * Copyright (C) 2004 Coastal Environmental Systems
5 * [ Substantially cribbed from include/asm-arm/arch-pxa/hardware.h ]
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
13 #ifndef __ASM_ARCH_HARDWARE_H
14 #define __ASM_ARCH_HARDWARE_H
16 #define io_p2v(x) (0xf0000000 | (((x) & 0xfff00000) >> 4) | ((x) & 0x0000ffff))
17 #define io_v2p(x) ( (((x) & 0x0fff0000) << 4) | ((x) & 0x0000ffff))
19 #ifdef __ASSEMBLY__
21 # define __REG(x) io_p2v(x)
22 # define __PREG(x) io_v2p(x)
24 #else
26 # if 0
27 # define __REG(x) (*((volatile u32 *)io_p2v(x)))
28 # else
30 * This __REG() version gives the same results as the one above, except
31 * that we are fooling gcc somehow so it generates far better and smaller
32 * assembly code for access to contigous registers. It's a shame that gcc
33 * doesn't guess this by itself.
35 #include <asm/types.h>
36 typedef struct { volatile u32 offset[4096]; } __regbase;
37 # define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
38 # define __REG(x) __REGP(io_p2v(x))
39 typedef struct { volatile u16 offset[4096]; } __regbase16;
40 # define __REGP16(x) ((__regbase16 *)((x)&~4095))->offset[((x)&4095)>>1]
41 # define __REG16(x) __REGP16(io_p2v(x))
42 typedef struct { volatile u8 offset[4096]; } __regbase8;
43 # define __REGP8(x) ((__regbase8 *)((x)&~4095))->offset[(x)&4095]
44 # define __REG8(x) __REGP8(io_p2v(x))
45 #endif
47 /* Let's kick gcc's ass again... */
48 # define __REG2(x,y) \
49 ( __builtin_constant_p(y) ? (__REG((x) + (y))) \
50 : (*(volatile u32 *)((u32)&__REG(x) + (y))) )
52 # define __PREG(x) (io_v2p((u32)&(x)))
54 #endif
56 #include "registers.h"
58 #endif /* _ASM_ARCH_HARDWARE_H */