include/asm-ppc64/iSeries/LparMap.h

   1 /*
   2  * LparMap.h
   3  * Copyright (C) 2001  Mike Corrigan IBM Corporation
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19 #ifndef _LPARMAP_H
  20 #define _LPARMAP_H
  21
  22 #include <asm/types.h>
  23
  24 /*
  25  * The iSeries hypervisor will set up mapping for one or more
  26  * ESID/VSID pairs (in SLB/segment registers) and will set up
  27  * mappings of one or more ranges of pages to VAs.
  28  * We will have the hypervisor set up the ESID->VSID mapping
  29  * for the four kernel segments (C-F).  With shared processors,
  30  * the hypervisor will clear all segment registers and reload
  31  * these four whenever the processor is switched from one
  32  * partition to another.
  33  */
  34
  35 /* The Vsid and Esid identified below will be used by the hypervisor
  36  * to set up a memory mapping for part of the load area before giving
  37  * control to the Linux kernel.  The load area is 64 MB, but this must
  38  * not attempt to map the whole load area.  The Hashed Page Table may
  39  * need to be located within the load area (if the total partition size
  40  * is 64 MB), but cannot be mapped.  Typically, this should specify
  41  * to map half (32 MB) of the load area.
  42  *
  43  * The hypervisor will set up page table entries for the number of
  44  * pages specified.
  45  *
  46  * In 32-bit mode, the hypervisor will load all four of the
  47  * segment registers (identified by the low-order four bits of the
  48  * Esid field.  In 64-bit mode, the hypervisor will load one SLB
  49  * entry to map the Esid to the Vsid.
  50 */
  51
  52 /* Hypervisor initially maps 32MB of the load area */
  53 #define HvPagesToMap    8192
  54
  55 struct LparMap {
  56         u64     xNumberEsids;   // Number of ESID/VSID pairs (1)
  57         u64     xNumberRanges;  // Number of VA ranges to map (1)
  58         u64     xSegmentTableOffs; // Page number within load area of seg table (0)
  59         u64     xRsvd[5];
  60         u64     xKernelEsid;    // Esid used to map kernel load (0x0C00000000)
  61         u64     xKernelVsid;    // Vsid used to map kernel load (0x0C00000000)
  62         u64     xPages;         // Number of pages to be mapped (8192)
  63         u64     xOffset;        // Offset from start of load area (0)
  64         u64     xVPN;           // Virtual Page Number (0x000C000000000000)
  65 };
  66
  67 extern struct LparMap           xLparMap;
  68
  69 #endif /* _LPARMAP_H */