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[linux-2.6/verdex.git] / include / asm-sparc64 / rwsem.h
blobbf2ae90ed3df8ecef35fbb62444675e7ae8fea9e
1 /* $Id: rwsem.h,v 1.5 2001/11/18 00:12:56 davem Exp $
2 * rwsem.h: R/W semaphores implemented using CAS
4 * Written by David S. Miller (davem@redhat.com), 2001.
5 * Derived from asm-i386/rwsem.h
6 */
7 #ifndef _SPARC64_RWSEM_H
8 #define _SPARC64_RWSEM_H
10 #ifndef _LINUX_RWSEM_H
11 #error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
12 #endif
14 #ifdef __KERNEL__
16 #include <linux/list.h>
17 #include <linux/spinlock.h>
18 #include <asm/rwsem-const.h>
20 struct rwsem_waiter;
22 struct rw_semaphore {
23 signed int count;
24 spinlock_t wait_lock;
25 struct list_head wait_list;
28 #define __RWSEM_INITIALIZER(name) \
29 { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) }
31 #define DECLARE_RWSEM(name) \
32 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
34 static __inline__ void init_rwsem(struct rw_semaphore *sem)
36 sem->count = RWSEM_UNLOCKED_VALUE;
37 spin_lock_init(&sem->wait_lock);
38 INIT_LIST_HEAD(&sem->wait_list);
41 extern void __down_read(struct rw_semaphore *sem);
42 extern int __down_read_trylock(struct rw_semaphore *sem);
43 extern void __down_write(struct rw_semaphore *sem);
44 extern int __down_write_trylock(struct rw_semaphore *sem);
45 extern void __up_read(struct rw_semaphore *sem);
46 extern void __up_write(struct rw_semaphore *sem);
47 extern void __downgrade_write(struct rw_semaphore *sem);
49 static __inline__ int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
51 int tmp = delta;
53 __asm__ __volatile__(
54 "1:\tlduw [%2], %%g1\n\t"
55 "add %%g1, %1, %%g7\n\t"
56 "cas [%2], %%g1, %%g7\n\t"
57 "cmp %%g1, %%g7\n\t"
58 "bne,pn %%icc, 1b\n\t"
59 " membar #StoreLoad | #StoreStore\n\t"
60 "mov %%g7, %0\n\t"
61 : "=&r" (tmp)
62 : "0" (tmp), "r" (sem)
63 : "g1", "g7", "memory", "cc");
65 return tmp + delta;
68 #define rwsem_atomic_add rwsem_atomic_update
70 static __inline__ __u16 rwsem_cmpxchgw(struct rw_semaphore *sem, __u16 __old, __u16 __new)
72 u32 old = (sem->count & 0xffff0000) | (u32) __old;
73 u32 new = (old & 0xffff0000) | (u32) __new;
74 u32 prev;
76 again:
77 __asm__ __volatile__("cas [%2], %3, %0\n\t"
78 "membar #StoreLoad | #StoreStore"
79 : "=&r" (prev)
80 : "0" (new), "r" (sem), "r" (old)
81 : "memory");
83 /* To give the same semantics as x86 cmpxchgw, keep trying
84 * if only the upper 16-bits changed.
86 if (prev != old &&
87 ((prev & 0xffff) == (old & 0xffff)))
88 goto again;
90 return prev & 0xffff;
93 static __inline__ signed long rwsem_cmpxchg(struct rw_semaphore *sem, signed long old, signed long new)
95 return cmpxchg(&sem->count,old,new);
98 #endif /* __KERNEL__ */
100 #endif /* _SPARC64_RWSEM_H */