2 * Routines for control of the CS8427 via i2c bus
3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
4 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <sound/driver.h>
24 #include <linux/slab.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <sound/core.h>
28 #include <sound/control.h>
29 #include <sound/pcm.h>
30 #include <sound/cs8427.h>
31 #include <sound/asoundef.h>
33 static void snd_cs8427_reset(struct snd_i2c_device
*cs8427
);
35 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
36 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
37 MODULE_LICENSE("GPL");
39 #define CS8427_ADDR (0x20>>1) /* fixed address */
41 struct cs8427_stream
{
42 struct snd_pcm_substream
*substream
;
43 char hw_status
[24]; /* hardware status */
44 char def_status
[24]; /* default status */
45 char pcm_status
[24]; /* PCM private status */
47 struct snd_kcontrol
*pcm_ctl
;
51 unsigned char regmap
[0x14]; /* map of first 1 + 13 registers */
53 unsigned int reset_timeout
;
54 struct cs8427_stream playback
;
55 struct cs8427_stream capture
;
58 static unsigned char swapbits(unsigned char val
)
61 unsigned char res
= 0;
62 for (bit
= 0; bit
< 8; bit
++) {
70 int snd_cs8427_reg_write(struct snd_i2c_device
*device
, unsigned char reg
,
78 if ((err
= snd_i2c_sendbytes(device
, buf
, 2)) != 2) {
79 snd_printk(KERN_ERR
"unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n", buf
[0], buf
[1], err
);
80 return err
< 0 ? err
: -EIO
;
85 static int snd_cs8427_reg_read(struct snd_i2c_device
*device
, unsigned char reg
)
90 if ((err
= snd_i2c_sendbytes(device
, ®
, 1)) != 1) {
91 snd_printk(KERN_ERR
"unable to send register 0x%x byte to CS8427\n", reg
);
92 return err
< 0 ? err
: -EIO
;
94 if ((err
= snd_i2c_readbytes(device
, &buf
, 1)) != 1) {
95 snd_printk(KERN_ERR
"unable to read register 0x%x byte from CS8427\n", reg
);
96 return err
< 0 ? err
: -EIO
;
101 static int snd_cs8427_select_corudata(struct snd_i2c_device
*device
, int udata
)
103 struct cs8427
*chip
= device
->private_data
;
106 udata
= udata
? CS8427_BSEL
: 0;
107 if (udata
!= (chip
->regmap
[CS8427_REG_CSDATABUF
] & udata
)) {
108 chip
->regmap
[CS8427_REG_CSDATABUF
] &= ~CS8427_BSEL
;
109 chip
->regmap
[CS8427_REG_CSDATABUF
] |= udata
;
110 err
= snd_cs8427_reg_write(device
, CS8427_REG_CSDATABUF
,
111 chip
->regmap
[CS8427_REG_CSDATABUF
]);
118 static int snd_cs8427_send_corudata(struct snd_i2c_device
*device
,
120 unsigned char *ndata
,
123 struct cs8427
*chip
= device
->private_data
;
124 char *hw_data
= udata
? chip
->playback
.hw_udata
: chip
->playback
.hw_status
;
128 if (!memcmp(hw_data
, ndata
, count
))
130 if ((err
= snd_cs8427_select_corudata(device
, udata
)) < 0)
132 memcpy(hw_data
, ndata
, count
);
134 memset(data
, 0, sizeof(data
));
135 if (memcmp(hw_data
, data
, count
) == 0) {
136 chip
->regmap
[CS8427_REG_UDATABUF
] &= ~CS8427_UBMMASK
;
137 chip
->regmap
[CS8427_REG_UDATABUF
] |= CS8427_UBMZEROS
| CS8427_EFTUI
;
138 if ((err
= snd_cs8427_reg_write(device
, CS8427_REG_UDATABUF
,
139 chip
->regmap
[CS8427_REG_UDATABUF
])) < 0)
144 data
[0] = CS8427_REG_AUTOINC
| CS8427_REG_CORU_DATABUF
;
145 for (idx
= 0; idx
< count
; idx
++)
146 data
[idx
+ 1] = swapbits(ndata
[idx
]);
147 if (snd_i2c_sendbytes(device
, data
, count
+ 1) != count
+ 1)
152 static void snd_cs8427_free(struct snd_i2c_device
*device
)
154 kfree(device
->private_data
);
157 int snd_cs8427_create(struct snd_i2c_bus
*bus
,
159 unsigned int reset_timeout
,
160 struct snd_i2c_device
**r_cs8427
)
162 static unsigned char initvals1
[] = {
163 CS8427_REG_CONTROL1
| CS8427_REG_AUTOINC
,
164 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, TCBL=output */
165 CS8427_SWCLK
| CS8427_TCBLDIR
,
166 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, normal stereo operation */
168 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, Rx=>serial */
169 CS8427_TXDSERIAL
| CS8427_SPDAES3RECEIVER
,
170 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, output time base = OMCK, input time base =
171 recovered input clock, recovered input clock source is ILRCK changed to AES3INPUT (workaround, see snd_cs8427_reset) */
173 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, 24-bit, 64*Fsi */
174 CS8427_SIDEL
| CS8427_SILRPOL
,
175 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format = I2S, 24-bit, 64*Fsi */
176 CS8427_SODEL
| CS8427_SOLRPOL
,
178 static unsigned char initvals2
[] = {
179 CS8427_REG_RECVERRMASK
| CS8427_REG_AUTOINC
,
180 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, biphase, parity status bits */
181 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR, */
182 0xff, /* set everything */
183 /* CS8427_REG_CSDATABUF:
184 Registers 32-55 window to CS buffer
185 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
186 Inhibit D->E transfers (all) of CS data.
187 Allow E->F transfer of CS data.
188 One byte mode; both A/B channels get same written CB data.
189 A channel info is output to chip's EMPH* pin. */
190 CS8427_CBMR
| CS8427_DETCI
,
191 /* CS8427_REG_UDATABUF:
192 Use internal buffer to transmit User (U) data.
193 Chip's U pin is an output.
194 Transmit all O's for user data.
195 Inhibit D->E transfers.
196 Inhibit E->F transfers. */
197 CS8427_UD
| CS8427_EFTUI
| CS8427_DETUI
,
201 struct snd_i2c_device
*device
;
202 unsigned char buf
[24];
204 if ((err
= snd_i2c_device_create(bus
, "CS8427", CS8427_ADDR
| (addr
& 7),
207 chip
= device
->private_data
= kzalloc(sizeof(*chip
), GFP_KERNEL
);
209 snd_i2c_device_free(device
);
212 device
->private_free
= snd_cs8427_free
;
215 if ((err
= snd_cs8427_reg_read(device
, CS8427_REG_ID_AND_VER
)) !=
218 snd_printk(KERN_ERR
"unable to find CS8427 signature "
219 "(expected 0x%x, read 0x%x),\n",
220 CS8427_VER8427A
, err
);
221 snd_printk(KERN_ERR
" initialization is not completed\n");
224 /* turn off run bit while making changes to configuration */
225 if ((err
= snd_cs8427_reg_write(device
, CS8427_REG_CLOCKSOURCE
, 0x00)) < 0)
227 /* send initial values */
228 memcpy(chip
->regmap
+ (initvals1
[0] & 0x7f), initvals1
+ 1, 6);
229 if ((err
= snd_i2c_sendbytes(device
, initvals1
, 7)) != 7) {
230 err
= err
< 0 ? err
: -EIO
;
233 /* Turn off CS8427 interrupt stuff that is not used in hardware */
235 /* from address 9 to 15 */
236 buf
[0] = 9; /* register */
237 if ((err
= snd_i2c_sendbytes(device
, buf
, 7)) != 7)
239 /* send transfer initialization sequence */
240 memcpy(chip
->regmap
+ (initvals2
[0] & 0x7f), initvals2
+ 1, 3);
241 if ((err
= snd_i2c_sendbytes(device
, initvals2
, 4)) != 4) {
242 err
= err
< 0 ? err
: -EIO
;
245 /* write default channel status bytes */
246 buf
[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF
>> 0));
247 buf
[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF
>> 8));
248 buf
[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF
>> 16));
249 buf
[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF
>> 24));
250 memset(buf
+ 4, 0, 24 - 4);
251 if (snd_cs8427_send_corudata(device
, 0, buf
, 24) < 0)
253 memcpy(chip
->playback
.def_status
, buf
, 24);
254 memcpy(chip
->playback
.pcm_status
, buf
, 24);
257 /* turn on run bit and rock'n'roll */
258 if (reset_timeout
< 1)
260 chip
->reset_timeout
= reset_timeout
;
261 snd_cs8427_reset(device
);
263 #if 0 // it's nice for read tests
268 snd_i2c_sendbytes(device
, buf
, 1);
269 snd_i2c_readbytes(device
, buf
, 127);
270 for (xx
= 0; xx
< 127; xx
++)
271 printk(KERN_DEBUG
"reg[0x%x] = 0x%x\n", xx
+1, buf
[xx
]);
281 snd_i2c_device_free(device
);
282 return err
< 0 ? err
: -EIO
;
286 * Reset the chip using run bit, also lock PLL using ILRCK and
287 * put back AES3INPUT. This workaround is described in latest
288 * CS8427 datasheet, otherwise TXDSERIAL will not work.
290 static void snd_cs8427_reset(struct snd_i2c_device
*cs8427
)
293 unsigned long end_time
;
294 int data
, aes3input
= 0;
296 snd_assert(cs8427
, return);
297 chip
= cs8427
->private_data
;
298 snd_i2c_lock(cs8427
->bus
);
299 if ((chip
->regmap
[CS8427_REG_CLOCKSOURCE
] & CS8427_RXDAES3INPUT
) == CS8427_RXDAES3INPUT
) /* AES3 bit is set */
301 chip
->regmap
[CS8427_REG_CLOCKSOURCE
] &= ~(CS8427_RUN
| CS8427_RXDMASK
);
302 snd_cs8427_reg_write(cs8427
, CS8427_REG_CLOCKSOURCE
,
303 chip
->regmap
[CS8427_REG_CLOCKSOURCE
]);
305 chip
->regmap
[CS8427_REG_CLOCKSOURCE
] |= CS8427_RUN
| CS8427_RXDILRCK
;
306 snd_cs8427_reg_write(cs8427
, CS8427_REG_CLOCKSOURCE
,
307 chip
->regmap
[CS8427_REG_CLOCKSOURCE
]);
309 snd_i2c_unlock(cs8427
->bus
);
310 end_time
= jiffies
+ chip
->reset_timeout
;
311 while (time_after_eq(end_time
, jiffies
)) {
312 snd_i2c_lock(cs8427
->bus
);
313 data
= snd_cs8427_reg_read(cs8427
, CS8427_REG_RECVERRORS
);
314 snd_i2c_unlock(cs8427
->bus
);
315 if (!(data
& CS8427_UNLOCK
))
317 schedule_timeout_uninterruptible(1);
319 snd_i2c_lock(cs8427
->bus
);
320 chip
->regmap
[CS8427_REG_CLOCKSOURCE
] &= ~CS8427_RXDMASK
;
322 chip
->regmap
[CS8427_REG_CLOCKSOURCE
] |= CS8427_RXDAES3INPUT
;
323 snd_cs8427_reg_write(cs8427
, CS8427_REG_CLOCKSOURCE
,
324 chip
->regmap
[CS8427_REG_CLOCKSOURCE
]);
325 snd_i2c_unlock(cs8427
->bus
);
328 static int snd_cs8427_in_status_info(struct snd_kcontrol
*kcontrol
,
329 struct snd_ctl_elem_info
*uinfo
)
331 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
333 uinfo
->value
.integer
.min
= 0;
334 uinfo
->value
.integer
.max
= 255;
338 static int snd_cs8427_in_status_get(struct snd_kcontrol
*kcontrol
,
339 struct snd_ctl_elem_value
*ucontrol
)
341 struct snd_i2c_device
*device
= snd_kcontrol_chip(kcontrol
);
344 snd_i2c_lock(device
->bus
);
345 data
= snd_cs8427_reg_read(device
, kcontrol
->private_value
);
346 snd_i2c_unlock(device
->bus
);
349 ucontrol
->value
.integer
.value
[0] = data
;
353 static int snd_cs8427_qsubcode_info(struct snd_kcontrol
*kcontrol
,
354 struct snd_ctl_elem_info
*uinfo
)
356 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
361 static int snd_cs8427_qsubcode_get(struct snd_kcontrol
*kcontrol
,
362 struct snd_ctl_elem_value
*ucontrol
)
364 struct snd_i2c_device
*device
= snd_kcontrol_chip(kcontrol
);
365 unsigned char reg
= CS8427_REG_QSUBCODE
;
368 snd_i2c_lock(device
->bus
);
369 if ((err
= snd_i2c_sendbytes(device
, ®
, 1)) != 1) {
370 snd_printk(KERN_ERR
"unable to send register 0x%x byte to CS8427\n", reg
);
371 snd_i2c_unlock(device
->bus
);
372 return err
< 0 ? err
: -EIO
;
374 if ((err
= snd_i2c_readbytes(device
, ucontrol
->value
.bytes
.data
, 10)) != 10) {
375 snd_printk(KERN_ERR
"unable to read Q-subcode bytes from CS8427\n");
376 snd_i2c_unlock(device
->bus
);
377 return err
< 0 ? err
: -EIO
;
379 snd_i2c_unlock(device
->bus
);
383 static int snd_cs8427_spdif_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
385 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
390 static int snd_cs8427_spdif_get(struct snd_kcontrol
*kcontrol
,
391 struct snd_ctl_elem_value
*ucontrol
)
393 struct snd_i2c_device
*device
= snd_kcontrol_chip(kcontrol
);
394 struct cs8427
*chip
= device
->private_data
;
396 snd_i2c_lock(device
->bus
);
397 memcpy(ucontrol
->value
.iec958
.status
, chip
->playback
.def_status
, 24);
398 snd_i2c_unlock(device
->bus
);
402 static int snd_cs8427_spdif_put(struct snd_kcontrol
*kcontrol
,
403 struct snd_ctl_elem_value
*ucontrol
)
405 struct snd_i2c_device
*device
= snd_kcontrol_chip(kcontrol
);
406 struct cs8427
*chip
= device
->private_data
;
407 unsigned char *status
= kcontrol
->private_value
?
408 chip
->playback
.pcm_status
: chip
->playback
.def_status
;
409 struct snd_pcm_runtime
*runtime
= chip
->playback
.substream
?
410 chip
->playback
.substream
->runtime
: NULL
;
413 snd_i2c_lock(device
->bus
);
414 change
= memcmp(ucontrol
->value
.iec958
.status
, status
, 24) != 0;
415 memcpy(status
, ucontrol
->value
.iec958
.status
, 24);
416 if (change
&& (kcontrol
->private_value
? runtime
!= NULL
: runtime
== NULL
)) {
417 err
= snd_cs8427_send_corudata(device
, 0, status
, 24);
421 snd_i2c_unlock(device
->bus
);
425 static int snd_cs8427_spdif_mask_info(struct snd_kcontrol
*kcontrol
,
426 struct snd_ctl_elem_info
*uinfo
)
428 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
433 static int snd_cs8427_spdif_mask_get(struct snd_kcontrol
*kcontrol
,
434 struct snd_ctl_elem_value
*ucontrol
)
436 memset(ucontrol
->value
.iec958
.status
, 0xff, 24);
440 static struct snd_kcontrol_new snd_cs8427_iec958_controls
[] = {
442 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
443 .info
= snd_cs8427_in_status_info
,
444 .name
= "IEC958 CS8427 Input Status",
445 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
446 .get
= snd_cs8427_in_status_get
,
450 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
451 .info
= snd_cs8427_in_status_info
,
452 .name
= "IEC958 CS8427 Error Status",
453 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
454 .get
= snd_cs8427_in_status_get
,
458 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
459 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
460 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,MASK
),
461 .info
= snd_cs8427_spdif_mask_info
,
462 .get
= snd_cs8427_spdif_mask_get
,
465 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
466 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,DEFAULT
),
467 .info
= snd_cs8427_spdif_info
,
468 .get
= snd_cs8427_spdif_get
,
469 .put
= snd_cs8427_spdif_put
,
473 .access
= SNDRV_CTL_ELEM_ACCESS_READWRITE
| SNDRV_CTL_ELEM_ACCESS_INACTIVE
,
474 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
475 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PCM_STREAM
),
476 .info
= snd_cs8427_spdif_info
,
477 .get
= snd_cs8427_spdif_get
,
478 .put
= snd_cs8427_spdif_put
,
482 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
483 .info
= snd_cs8427_qsubcode_info
,
484 .name
= "IEC958 Q-subcode Capture Default",
485 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
486 .get
= snd_cs8427_qsubcode_get
489 int snd_cs8427_iec958_build(struct snd_i2c_device
*cs8427
,
490 struct snd_pcm_substream
*play_substream
,
491 struct snd_pcm_substream
*cap_substream
)
493 struct cs8427
*chip
= cs8427
->private_data
;
494 struct snd_kcontrol
*kctl
;
498 snd_assert(play_substream
&& cap_substream
, return -EINVAL
);
499 for (idx
= 0; idx
< ARRAY_SIZE(snd_cs8427_iec958_controls
); idx
++) {
500 kctl
= snd_ctl_new1(&snd_cs8427_iec958_controls
[idx
], cs8427
);
503 kctl
->id
.device
= play_substream
->pcm
->device
;
504 kctl
->id
.subdevice
= play_substream
->number
;
505 err
= snd_ctl_add(cs8427
->bus
->card
, kctl
);
508 if (!strcmp(kctl
->id
.name
, SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PCM_STREAM
)))
509 chip
->playback
.pcm_ctl
= kctl
;
512 chip
->playback
.substream
= play_substream
;
513 chip
->capture
.substream
= cap_substream
;
514 snd_assert(chip
->playback
.pcm_ctl
, return -EIO
);
518 int snd_cs8427_iec958_active(struct snd_i2c_device
*cs8427
, int active
)
522 snd_assert(cs8427
, return -ENXIO
);
523 chip
= cs8427
->private_data
;
525 memcpy(chip
->playback
.pcm_status
, chip
->playback
.def_status
, 24);
526 chip
->playback
.pcm_ctl
->vd
[0].access
&= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
527 snd_ctl_notify(cs8427
->bus
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
528 SNDRV_CTL_EVENT_MASK_INFO
, &chip
->playback
.pcm_ctl
->id
);
532 int snd_cs8427_iec958_pcm(struct snd_i2c_device
*cs8427
, unsigned int rate
)
538 snd_assert(cs8427
, return -ENXIO
);
539 chip
= cs8427
->private_data
;
540 status
= chip
->playback
.pcm_status
;
541 snd_i2c_lock(cs8427
->bus
);
542 if (status
[0] & IEC958_AES0_PROFESSIONAL
) {
543 status
[0] &= ~IEC958_AES0_PRO_FS
;
545 case 32000: status
[0] |= IEC958_AES0_PRO_FS_32000
; break;
546 case 44100: status
[0] |= IEC958_AES0_PRO_FS_44100
; break;
547 case 48000: status
[0] |= IEC958_AES0_PRO_FS_48000
; break;
548 default: status
[0] |= IEC958_AES0_PRO_FS_NOTID
; break;
551 status
[3] &= ~IEC958_AES3_CON_FS
;
553 case 32000: status
[3] |= IEC958_AES3_CON_FS_32000
; break;
554 case 44100: status
[3] |= IEC958_AES3_CON_FS_44100
; break;
555 case 48000: status
[3] |= IEC958_AES3_CON_FS_48000
; break;
558 err
= snd_cs8427_send_corudata(cs8427
, 0, status
, 24);
560 snd_ctl_notify(cs8427
->bus
->card
,
561 SNDRV_CTL_EVENT_MASK_VALUE
,
562 &chip
->playback
.pcm_ctl
->id
);
563 reset
= chip
->rate
!= rate
;
565 snd_i2c_unlock(cs8427
->bus
);
567 snd_cs8427_reset(cs8427
);
568 return err
< 0 ? err
: 0;
571 static int __init
alsa_cs8427_module_init(void)
576 static void __exit
alsa_cs8427_module_exit(void)
580 module_init(alsa_cs8427_module_init
)
581 module_exit(alsa_cs8427_module_exit
)
583 EXPORT_SYMBOL(snd_cs8427_create
);
584 EXPORT_SYMBOL(snd_cs8427_reset
);
585 EXPORT_SYMBOL(snd_cs8427_reg_write
);
586 EXPORT_SYMBOL(snd_cs8427_iec958_build
);
587 EXPORT_SYMBOL(snd_cs8427_iec958_active
);
588 EXPORT_SYMBOL(snd_cs8427_iec958_pcm
);