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[PATCH] W1: w1_netlink: New init/fini netlink callbacks.
[linux-2.6/verdex.git] / drivers / media / video / saa7134 / saa7134-dvb.c
blob8be6a90358c84db36c0a4ca54bf6cb17d3d2e570
1 /*
2 * $Id: saa7134-dvb.c,v 1.23 2005/07/24 22:12:47 mkrufky Exp $
3 *
4 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
5 *
6 * Extended 3 / 2005 by Hartmut Hackmann to support various
7 * cards with the tda10046 DVB-T channel decoder
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/kthread.h>
31 #include <linux/suspend.h>
32 #include <linux/config.h>
33
34
35 #include "saa7134-reg.h"
36 #include "saa7134.h"
37
38 #ifdef HAVE_MT352
39 # include "mt352.h"
40 # include "mt352_priv.h" /* FIXME */
41 #endif
42 #ifdef HAVE_TDA1004X
43 # include "tda1004x.h"
44 #endif
45
46 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
47 MODULE_LICENSE("GPL");
48
49 static unsigned int antenna_pwr = 0;
50
51 module_param(antenna_pwr, int, 0444);
52 MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
53
54 /* ------------------------------------------------------------------ */
55
56 #ifdef HAVE_MT352
57 static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
58 {
59 u32 ok;
60
61 if (!on) {
62 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
63 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
64 return 0;
65 }
66
67 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
68 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
69 udelay(10);
70
71 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
72 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
73 udelay(10);
74 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
75 udelay(10);
76 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
77 printk("%s: %s %s\n", dev->name, __FUNCTION__,
78 ok ? "on" : "off");
79
80 if (!ok)
81 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
82 return ok;
83 }
84
85 static int mt352_pinnacle_init(struct dvb_frontend* fe)
86 {
87 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
88 static u8 reset [] = { RESET, 0x80 };
89 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
90 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
91 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
92 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
93 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
94 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
95 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
96 struct saa7134_dev *dev= fe->dvb->priv;
97
98 printk("%s: %s called\n",dev->name,__FUNCTION__);
99
100 mt352_write(fe, clock_config, sizeof(clock_config));
101 udelay(200);
102 mt352_write(fe, reset, sizeof(reset));
103 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
104 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
105 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
106 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
107
108 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
109 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
110 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
111 return 0;
112 }
113
114 static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
115 struct dvb_frontend_parameters* params,
116 u8* pllbuf)
117 {
118 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
119 static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE;
120 struct saa7134_dev *dev = fe->dvb->priv;
121 struct v4l2_frequency f;
122
123 /* set frequency (mt2050) */
124 f.tuner = 0;
125 f.type = V4L2_TUNER_DIGITAL_TV;
126 f.frequency = params->frequency / 1000 * 16 / 1000;
127 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
128 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
129 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off);
130
131 pinnacle_antenna_pwr(dev, antenna_pwr);
132
133 /* mt352 setup */
134 mt352_pinnacle_init(fe);
135 pllbuf[0] = 0xc2;
136 pllbuf[1] = 0x00;
137 pllbuf[2] = 0x00;
138 pllbuf[3] = 0x80;
139 pllbuf[4] = 0x00;
140 return 0;
141 }
142
143 static struct mt352_config pinnacle_300i = {
144 .demod_address = 0x3c >> 1,
145 .adc_clock = 20333,
146 .if2 = 36150,
147 .no_tuner = 1,
148 .demod_init = mt352_pinnacle_init,
149 .pll_set = mt352_pinnacle_pll_set,
150 };
151 #endif
152
153 /* ------------------------------------------------------------------ */
154
155 #ifdef HAVE_TDA1004X
156 static int philips_tu1216_pll_init(struct dvb_frontend *fe)
157 {
158 struct saa7134_dev *dev = fe->dvb->priv;
159 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
160 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
161
162 /* setup PLL configuration */
163 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
164 return -EIO;
165 msleep(1);
166
167 return 0;
168 }
169
170 static int philips_tu1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
171 {
172 struct saa7134_dev *dev = fe->dvb->priv;
173 u8 tuner_buf[4];
174 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,.len =
175 sizeof(tuner_buf) };
176 int tuner_frequency = 0;
177 u8 band, cp, filter;
178
179 /* determine charge pump */
180 tuner_frequency = params->frequency + 36166000;
181 if (tuner_frequency < 87000000)
182 return -EINVAL;
183 else if (tuner_frequency < 130000000)
184 cp = 3;
185 else if (tuner_frequency < 160000000)
186 cp = 5;
187 else if (tuner_frequency < 200000000)
188 cp = 6;
189 else if (tuner_frequency < 290000000)
190 cp = 3;
191 else if (tuner_frequency < 420000000)
192 cp = 5;
193 else if (tuner_frequency < 480000000)
194 cp = 6;
195 else if (tuner_frequency < 620000000)
196 cp = 3;
197 else if (tuner_frequency < 830000000)
198 cp = 5;
199 else if (tuner_frequency < 895000000)
200 cp = 7;
201 else
202 return -EINVAL;
203
204 /* determine band */
205 if (params->frequency < 49000000)
206 return -EINVAL;
207 else if (params->frequency < 161000000)
208 band = 1;
209 else if (params->frequency < 444000000)
210 band = 2;
211 else if (params->frequency < 861000000)
212 band = 4;
213 else
214 return -EINVAL;
215
216 /* setup PLL filter */
217 switch (params->u.ofdm.bandwidth) {
218 case BANDWIDTH_6_MHZ:
219 filter = 0;
220 break;
221
222 case BANDWIDTH_7_MHZ:
223 filter = 0;
224 break;
225
226 case BANDWIDTH_8_MHZ:
227 filter = 1;
228 break;
229
230 default:
231 return -EINVAL;
232 }
233
234 /* calculate divisor
235 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
236 */
237 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
238
239 /* setup tuner buffer */
240 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
241 tuner_buf[1] = tuner_frequency & 0xff;
242 tuner_buf[2] = 0xca;
243 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
244
245 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
246 return -EIO;
247
248 msleep(1);
249 return 0;
250 }
251
252 static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
253 const struct firmware **fw, char *name)
254 {
255 struct saa7134_dev *dev = fe->dvb->priv;
256 return request_firmware(fw, name, &dev->pci->dev);
257 }
258
259 static struct tda1004x_config philips_tu1216_config = {
260
261 .demod_address = 0x8,
262 .invert = 1,
263 .invert_oclk = 1,
264 .xtal_freq = TDA10046_XTAL_4M,
265 .agc_config = TDA10046_AGC_DEFAULT,
266 .if_freq = TDA10046_FREQ_3617,
267 .pll_init = philips_tu1216_pll_init,
268 .pll_set = philips_tu1216_pll_set,
269 .pll_sleep = NULL,
270 .request_firmware = philips_tu1216_request_firmware,
271 };
272
273 /* ------------------------------------------------------------------ */
274
275
276 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
277 {
278 struct saa7134_dev *dev = fe->dvb->priv;
279 /* this message is to set up ATC and ALC */
280 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
281 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
282
283 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
284 return -EIO;
285 msleep(1);
286
287 return 0;
288 }
289
290 static void philips_fmd1216_analog(struct dvb_frontend *fe)
291 {
292 struct saa7134_dev *dev = fe->dvb->priv;
293 /* this message actually turns the tuner back to analog mode */
294 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
295 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
296
297 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
298 msleep(1);
299 fmd1216_init[2] = 0x86;
300 fmd1216_init[3] = 0x54;
301 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
302 msleep(1);
303 }
304
305 static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
306 {
307 struct saa7134_dev *dev = fe->dvb->priv;
308 u8 tuner_buf[4];
309 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
310 sizeof(tuner_buf) };
311 int tuner_frequency = 0;
312 int divider = 0;
313 u8 band, mode, cp;
314
315 /* determine charge pump */
316 tuner_frequency = params->frequency + 36130000;
317 if (tuner_frequency < 87000000)
318 return -EINVAL;
319 /* low band */
320 else if (tuner_frequency < 180000000) {
321 band = 1;
322 mode = 7;
323 cp = 0;
324 } else if (tuner_frequency < 195000000) {
325 band = 1;
326 mode = 6;
327 cp = 1;
328 /* mid band */
329 } else if (tuner_frequency < 366000000) {
330 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
331 band = 10;
332 } else {
333 band = 2;
334 }
335 mode = 7;
336 cp = 0;
337 } else if (tuner_frequency < 478000000) {
338 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
339 band = 10;
340 } else {
341 band = 2;
342 }
343 mode = 6;
344 cp = 1;
345 /* high band */
346 } else if (tuner_frequency < 662000000) {
347 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
348 band = 12;
349 } else {
350 band = 4;
351 }
352 mode = 7;
353 cp = 0;
354 } else if (tuner_frequency < 840000000) {
355 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
356 band = 12;
357 } else {
358 band = 4;
359 }
360 mode = 6;
361 cp = 1;
362 } else {
363 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
364 band = 12;
365 } else {
366 band = 4;
367 }
368 mode = 7;
369 cp = 1;
370
371 }
372 /* calculate divisor */
373 /* ((36166000 + Finput) / 166666) rounded! */
374 divider = (tuner_frequency + 83333) / 166667;
375
376 /* setup tuner buffer */
377 tuner_buf[0] = (divider >> 8) & 0x7f;
378 tuner_buf[1] = divider & 0xff;
379 tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
380 tuner_buf[3] = 0x40 | band;
381
382 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
383 return -EIO;
384 return 0;
385 }
386
387 #ifdef HAVE_TDA1004X
388 static struct tda1004x_config medion_cardbus = {
389 .demod_address = 0x08,
390 .invert = 1,
391 .invert_oclk = 0,
392 .xtal_freq = TDA10046_XTAL_16M,
393 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
394 .if_freq = TDA10046_FREQ_3613,
395 .pll_init = philips_fmd1216_pll_init,
396 .pll_set = philips_fmd1216_pll_set,
397 .pll_sleep = philips_fmd1216_analog,
398 .request_firmware = NULL,
399 };
400 #endif
401
402 /* ------------------------------------------------------------------ */
403
404 struct tda827x_data {
405 u32 lomax;
406 u8 spd;
407 u8 bs;
408 u8 bp;
409 u8 cp;
410 u8 gc3;
411 u8 div1p5;
412 };
413
414 static struct tda827x_data tda827x_dvbt[] = {
415 { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
416 { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
417 { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
418 { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
419 { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
420 { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
421 { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
422 { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
423 { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
424 { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
425 { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
426 { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
427 { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
428 { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
429 { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
430 { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
431 { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
432 { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
433 { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
434 { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
435 { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
436 { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
437 { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
438 { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
439 { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
440 { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
441 { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
442 { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
443 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
444 };
445
446 static int philips_tda827x_pll_init(struct dvb_frontend *fe)
447 {
448 return 0;
449 }
450
451 static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
452 {
453 struct saa7134_dev *dev = fe->dvb->priv;
454 u8 tuner_buf[14];
455
456 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
457 .len = sizeof(tuner_buf) };
458 int i, tuner_freq, if_freq;
459 u32 N;
460 switch (params->u.ofdm.bandwidth) {
461 case BANDWIDTH_6_MHZ:
462 if_freq = 4000000;
463 break;
464 case BANDWIDTH_7_MHZ:
465 if_freq = 4500000;
466 break;
467 default: /* 8 MHz or Auto */
468 if_freq = 5000000;
469 break;
470 }
471 tuner_freq = params->frequency + if_freq;
472
473 i = 0;
474 while (tda827x_dvbt[i].lomax < tuner_freq) {
475 if(tda827x_dvbt[i + 1].lomax == 0)
476 break;
477 i++;
478 }
479
480 N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
481 tuner_buf[0] = 0;
482 tuner_buf[1] = (N>>8) | 0x40;
483 tuner_buf[2] = N & 0xff;
484 tuner_buf[3] = 0;
485 tuner_buf[4] = 0x52;
486 tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
487 (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
488 tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
489 tuner_buf[7] = 0xbf;
490 tuner_buf[8] = 0x2a;
491 tuner_buf[9] = 0x05;
492 tuner_buf[10] = 0xff;
493 tuner_buf[11] = 0x00;
494 tuner_buf[12] = 0x00;
495 tuner_buf[13] = 0x40;
496
497 tuner_msg.len = 14;
498 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
499 return -EIO;
500
501 msleep(500);
502 /* correct CP value */
503 tuner_buf[0] = 0x30;
504 tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
505 tuner_msg.len = 2;
506 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
507
508 return 0;
509 }
510
511 static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
512 {
513 struct saa7134_dev *dev = fe->dvb->priv;
514 static u8 tda827x_sleep[] = { 0x30, 0xd0};
515 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
516 .len = sizeof(tda827x_sleep) };
517 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
518 }
519
520 static struct tda1004x_config tda827x_lifeview_config = {
521 .demod_address = 0x08,
522 .invert = 1,
523 .invert_oclk = 0,
524 .xtal_freq = TDA10046_XTAL_16M,
525 .agc_config = TDA10046_AGC_TDA827X,
526 .if_freq = TDA10046_FREQ_045,
527 .pll_init = philips_tda827x_pll_init,
528 .pll_set = philips_tda827x_pll_set,
529 .pll_sleep = philips_tda827x_pll_sleep,
530 .request_firmware = NULL,
531 };
532 #endif
533
534 /* ------------------------------------------------------------------ */
535
536 static int dvb_init(struct saa7134_dev *dev)
537 {
538 /* init struct videobuf_dvb */
539 dev->ts.nr_bufs = 32;
540 dev->ts.nr_packets = 32*4;
541 dev->dvb.name = dev->name;
542 videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
543 dev->pci, &dev->slock,
544 V4L2_BUF_TYPE_VIDEO_CAPTURE,
545 V4L2_FIELD_ALTERNATE,
546 sizeof(struct saa7134_buf),
547 dev);
548
549 switch (dev->board) {
550 #ifdef HAVE_MT352
551 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
552 printk("%s: pinnacle 300i dvb setup\n",dev->name);
553 dev->dvb.frontend = mt352_attach(&pinnacle_300i,
554 &dev->i2c_adap);
555 break;
556 #endif
557 #ifdef HAVE_TDA1004X
558 case SAA7134_BOARD_MD7134:
559 dev->dvb.frontend = tda10046_attach(&medion_cardbus,
560 &dev->i2c_adap);
561 break;
562 case SAA7134_BOARD_PHILIPS_TOUGH:
563 dev->dvb.frontend = tda10046_attach(&philips_tu1216_config,
564 &dev->i2c_adap);
565 break;
566 case SAA7134_BOARD_FLYDVBTDUO:
567 dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
568 &dev->i2c_adap);
569 break;
570 case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS:
571 dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
572 &dev->i2c_adap);
573 break;
574 #endif
575 default:
576 printk("%s: Huh? unknown DVB card?\n",dev->name);
577 break;
578 }
579
580 if (NULL == dev->dvb.frontend) {
581 printk("%s: frontend initialization failed\n",dev->name);
582 return -1;
583 }
584
585 /* register everything else */
586 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
587 }
588
589 static int dvb_fini(struct saa7134_dev *dev)
590 {
591 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
592
593 switch (dev->board) {
594 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
595 /* otherwise we don't detect the tuner on next insmod */
596 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
597 break;
598 };
599 videobuf_dvb_unregister(&dev->dvb);
600 return 0;
601 }
602
603 static struct saa7134_mpeg_ops dvb_ops = {
604 .type = SAA7134_MPEG_DVB,
605 .init = dvb_init,
606 .fini = dvb_fini,
607 };
608
609 static int __init dvb_register(void)
610 {
611 return saa7134_ts_register(&dvb_ops);
612 }
613
614 static void __exit dvb_unregister(void)
615 {
616 saa7134_ts_unregister(&dvb_ops);
617 }
618
619 module_init(dvb_register);
620 module_exit(dvb_unregister);
621
622 /* ------------------------------------------------------------------ */
623 /*
624 * Local variables:
625 * c-basic-offset: 8
626 * End:
627 */
Verdex Pro support