drivers/scsi/ipr.h

   1 /*
   2  * ipr.h -- driver for IBM Power Linux RAID adapters
   3  *
   4  * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
   5  *
   6  * Copyright (C) 2003, 2004 IBM Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
  23  *                              that broke 64bit platforms.
  24  */
  25
  26 #ifndef _IPR_H
  27 #define _IPR_H
  28
  29 #include <linux/types.h>
  30 #include <linux/completion.h>
  31 #include <linux/list.h>
  32 #include <linux/kref.h>
  33 #include <scsi/scsi.h>
  34 #include <scsi/scsi_cmnd.h>
  35
  36 /*
  37  * Literals
  38  */
  39 #define IPR_DRIVER_VERSION "2.0.14"
  40 #define IPR_DRIVER_DATE "(May 2, 2005)"
  41
  42 /*
  43  * IPR_DBG_TRACE: Setting this to 1 will turn on some general function tracing
  44  *                      resulting in a bunch of extra debugging printks to the console
  45  *
  46  * IPR_DEBUG:   Setting this to 1 will turn on some error path tracing.
  47  *                      Enables the ipr_trace macro.
  48  */
  49 #ifdef IPR_DEBUG_ALL
  50 #define IPR_DEBUG                               1
  51 #define IPR_DBG_TRACE                   1
  52 #else
  53 #define IPR_DEBUG                               0
  54 #define IPR_DBG_TRACE                   0
  55 #endif
  56
  57 /*
  58  * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
  59  *      ops per device for devices not running tagged command queuing.
  60  *      This can be adjusted at runtime through sysfs device attributes.
  61  */
  62 #define IPR_MAX_CMD_PER_LUN                             6
  63
  64 /*
  65  * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
  66  *      ops the mid-layer can send to the adapter.
  67  */
  68 #define IPR_NUM_BASE_CMD_BLKS                           100
  69
  70 #define IPR_SUBS_DEV_ID_2780    0x0264
  71 #define IPR_SUBS_DEV_ID_5702    0x0266
  72 #define IPR_SUBS_DEV_ID_5703    0x0278
  73 #define IPR_SUBS_DEV_ID_572E  0x028D
  74 #define IPR_SUBS_DEV_ID_573E  0x02D3
  75 #define IPR_SUBS_DEV_ID_573D  0x02D4
  76 #define IPR_SUBS_DEV_ID_571A    0x02C0
  77 #define IPR_SUBS_DEV_ID_571B    0x02BE
  78 #define IPR_SUBS_DEV_ID_571E  0x02BF
  79
  80 #define IPR_NAME                                "ipr"
  81
  82 /*
  83  * Return codes
  84  */
  85 #define IPR_RC_JOB_CONTINUE             1
  86 #define IPR_RC_JOB_RETURN               2
  87
  88 /*
  89  * IOASCs
  90  */
  91 #define IPR_IOASC_NR_INIT_CMD_REQUIRED          0x02040200
  92 #define IPR_IOASC_SYNC_REQUIRED                 0x023f0000
  93 #define IPR_IOASC_MED_DO_NOT_REALLOC            0x03110C00
  94 #define IPR_IOASC_HW_SEL_TIMEOUT                        0x04050000
  95 #define IPR_IOASC_HW_DEV_BUS_STATUS                     0x04448500
  96 #define IPR_IOASC_IOASC_MASK                    0xFFFFFF00
  97 #define IPR_IOASC_SCSI_STATUS_MASK              0x000000FF
  98 #define IPR_IOASC_IR_RESOURCE_HANDLE            0x05250000
  99 #define IPR_IOASC_BUS_WAS_RESET                 0x06290000
 100 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER                0x06298000
 101 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST      0x0B5A0000
 102
 103 #define IPR_FIRST_DRIVER_IOASC                  0x10000000
 104 #define IPR_IOASC_IOA_WAS_RESET                 0x10000001
 105 #define IPR_IOASC_PCI_ACCESS_ERROR                      0x10000002
 106
 107 #define IPR_NUM_LOG_HCAMS                               2
 108 #define IPR_NUM_CFG_CHG_HCAMS                           2
 109 #define IPR_NUM_HCAMS   (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
 110 #define IPR_MAX_NUM_TARGETS_PER_BUS                     0x10
 111 #define IPR_MAX_NUM_LUNS_PER_TARGET                     256
 112 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET        8
 113 #define IPR_VSET_BUS                                    0xff
 114 #define IPR_IOA_BUS                                             0xff
 115 #define IPR_IOA_TARGET                                  0xff
 116 #define IPR_IOA_LUN                                             0xff
 117 #define IPR_MAX_NUM_BUSES                               4
 118 #define IPR_MAX_BUS_TO_SCAN                             IPR_MAX_NUM_BUSES
 119
 120 #define IPR_NUM_RESET_RELOAD_RETRIES            3
 121
 122 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
 123 #define IPR_NUM_INTERNAL_CMD_BLKS       (IPR_NUM_HCAMS + \
 124                                      ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
 125
 126 #define IPR_MAX_COMMANDS                IPR_NUM_BASE_CMD_BLKS
 127 #define IPR_NUM_CMD_BLKS                (IPR_NUM_BASE_CMD_BLKS + \
 128                                                 IPR_NUM_INTERNAL_CMD_BLKS)
 129
 130 #define IPR_MAX_PHYSICAL_DEVS                           192
 131
 132 #define IPR_MAX_SGLIST                                  64
 133 #define IPR_IOA_MAX_SECTORS                             32767
 134 #define IPR_VSET_MAX_SECTORS                            512
 135 #define IPR_MAX_CDB_LEN                                 16
 136
 137 #define IPR_DEFAULT_BUS_WIDTH                           16
 138 #define IPR_80MBs_SCSI_RATE             ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 139 #define IPR_U160_SCSI_RATE      ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 140 #define IPR_U320_SCSI_RATE      ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 141 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
 142
 143 #define IPR_IOA_RES_HANDLE                              0xffffffff
 144 #define IPR_IOA_RES_ADDR                                0x00ffffff
 145
 146 /*
 147  * Adapter Commands
 148  */
 149 #define IPR_QUERY_RSRC_STATE                            0xC2
 150 #define IPR_RESET_DEVICE                                0xC3
 151 #define IPR_RESET_TYPE_SELECT                           0x80
 152 #define IPR_LUN_RESET                                   0x40
 153 #define IPR_TARGET_RESET                                        0x20
 154 #define IPR_BUS_RESET                                   0x10
 155 #define IPR_ID_HOST_RR_Q                                0xC4
 156 #define IPR_QUERY_IOA_CONFIG                            0xC5
 157 #define IPR_CANCEL_ALL_REQUESTS                 0xCE
 158 #define IPR_HOST_CONTROLLED_ASYNC                       0xCF
 159 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE      0x01
 160 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA           0x02
 161 #define IPR_SET_SUPPORTED_DEVICES                       0xFB
 162 #define IPR_IOA_SHUTDOWN                                0xF7
 163 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE                    0x05
 164
 165 /*
 166  * Timeouts
 167  */
 168 #define IPR_SHUTDOWN_TIMEOUT                    (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
 169 #define IPR_VSET_RW_TIMEOUT                     (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
 170 #define IPR_ABBREV_SHUTDOWN_TIMEOUT             (10 * HZ)
 171 #define IPR_DEVICE_RESET_TIMEOUT                (ipr_fastfail ? 10 * HZ : 30 * HZ)
 172 #define IPR_CANCEL_ALL_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 173 #define IPR_ABORT_TASK_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 174 #define IPR_INTERNAL_TIMEOUT                    (ipr_fastfail ? 10 * HZ : 30 * HZ)
 175 #define IPR_WRITE_BUFFER_TIMEOUT                (10 * 60 * HZ)
 176 #define IPR_SET_SUP_DEVICE_TIMEOUT              (2 * 60 * HZ)
 177 #define IPR_REQUEST_SENSE_TIMEOUT               (10 * HZ)
 178 #define IPR_OPERATIONAL_TIMEOUT         (5 * 60)
 179 #define IPR_WAIT_FOR_RESET_TIMEOUT              (2 * HZ)
 180 #define IPR_CHECK_FOR_RESET_TIMEOUT             (HZ / 10)
 181 #define IPR_WAIT_FOR_BIST_TIMEOUT               (2 * HZ)
 182 #define IPR_DUMP_TIMEOUT                        (15 * HZ)
 183
 184 /*
 185  * SCSI Literals
 186  */
 187 #define IPR_VENDOR_ID_LEN                       8
 188 #define IPR_PROD_ID_LEN                         16
 189 #define IPR_SERIAL_NUM_LEN                      8
 190
 191 /*
 192  * Hardware literals
 193  */
 194 #define IPR_FMT2_MBX_ADDR_MASK                          0x0fffffff
 195 #define IPR_FMT2_MBX_BAR_SEL_MASK                       0xf0000000
 196 #define IPR_FMT2_MKR_BAR_SEL_SHIFT                      28
 197 #define IPR_GET_FMT2_BAR_SEL(mbx) \
 198 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
 199 #define IPR_SDT_FMT2_BAR0_SEL                           0x0
 200 #define IPR_SDT_FMT2_BAR1_SEL                           0x1
 201 #define IPR_SDT_FMT2_BAR2_SEL                           0x2
 202 #define IPR_SDT_FMT2_BAR3_SEL                           0x3
 203 #define IPR_SDT_FMT2_BAR4_SEL                           0x4
 204 #define IPR_SDT_FMT2_BAR5_SEL                           0x5
 205 #define IPR_SDT_FMT2_EXP_ROM_SEL                        0x8
 206 #define IPR_FMT2_SDT_READY_TO_USE                       0xC4D4E3F2
 207 #define IPR_DOORBELL                                    0x82800000
 208
 209 #define IPR_PCII_IOA_TRANS_TO_OPER                      (0x80000000 >> 0)
 210 #define IPR_PCII_IOARCB_XFER_FAILED                     (0x80000000 >> 3)
 211 #define IPR_PCII_IOA_UNIT_CHECKED                       (0x80000000 >> 4)
 212 #define IPR_PCII_NO_HOST_RRQ                            (0x80000000 >> 5)
 213 #define IPR_PCII_CRITICAL_OPERATION                     (0x80000000 >> 6)
 214 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE           (0x80000000 >> 7)
 215 #define IPR_PCII_IOARRIN_LOST                           (0x80000000 >> 27)
 216 #define IPR_PCII_MMIO_ERROR                             (0x80000000 >> 28)
 217 #define IPR_PCII_PROC_ERR_STATE                 (0x80000000 >> 29)
 218 #define IPR_PCII_HRRQ_UPDATED                           (0x80000000 >> 30)
 219 #define IPR_PCII_CORE_ISSUED_RST_REQ            (0x80000000 >> 31)
 220
 221 #define IPR_PCII_ERROR_INTERRUPTS \
 222 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
 223 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
 224
 225 #define IPR_PCII_OPER_INTERRUPTS \
 226 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
 227
 228 #define IPR_UPROCI_RESET_ALERT                  (0x80000000 >> 7)
 229 #define IPR_UPROCI_IO_DEBUG_ALERT                       (0x80000000 >> 9)
 230
 231 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC            200000  /* 200 ms */
 232 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC           200000  /* 200 ms */
 233
 234 /*
 235  * Dump literals
 236  */
 237 #define IPR_MAX_IOA_DUMP_SIZE                           (4 * 1024 * 1024)
 238 #define IPR_NUM_SDT_ENTRIES                             511
 239 #define IPR_MAX_NUM_DUMP_PAGES  ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
 240
 241 /*
 242  * Misc literals
 243  */
 244 #define IPR_NUM_IOADL_ENTRIES                   IPR_MAX_SGLIST
 245
 246 /*
 247  * Adapter interface types
 248  */
 249
 250 struct ipr_res_addr {
 251         u8 reserved;
 252         u8 bus;
 253         u8 target;
 254         u8 lun;
 255 #define IPR_GET_PHYS_LOC(res_addr) \
 256         (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
 257 }__attribute__((packed, aligned (4)));
 258
 259 struct ipr_std_inq_vpids {
 260         u8 vendor_id[IPR_VENDOR_ID_LEN];
 261         u8 product_id[IPR_PROD_ID_LEN];
 262 }__attribute__((packed));
 263
 264 struct ipr_std_inq_data {
 265         u8 peri_qual_dev_type;
 266 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
 267 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
 268
 269         u8 removeable_medium_rsvd;
 270 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
 271
 272 #define IPR_IS_DASD_DEVICE(std_inq) \
 273 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
 274 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
 275
 276 #define IPR_IS_SES_DEVICE(std_inq) \
 277 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
 278
 279         u8 version;
 280         u8 aen_naca_fmt;
 281         u8 additional_len;
 282         u8 sccs_rsvd;
 283         u8 bq_enc_multi;
 284         u8 sync_cmdq_flags;
 285
 286         struct ipr_std_inq_vpids vpids;
 287
 288         u8 ros_rsvd_ram_rsvd[4];
 289
 290         u8 serial_num[IPR_SERIAL_NUM_LEN];
 291 }__attribute__ ((packed));
 292
 293 struct ipr_config_table_entry {
 294         u8 service_level;
 295         u8 array_id;
 296         u8 flags;
 297 #define IPR_IS_IOA_RESOURCE     0x80
 298 #define IPR_IS_ARRAY_MEMBER 0x20
 299 #define IPR_IS_HOT_SPARE        0x10
 300
 301         u8 rsvd_subtype;
 302 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
 303 #define IPR_SUBTYPE_AF_DASD                     0
 304 #define IPR_SUBTYPE_GENERIC_SCSI        1
 305 #define IPR_SUBTYPE_VOLUME_SET          2
 306
 307         struct ipr_res_addr res_addr;
 308         __be32 res_handle;
 309         __be32 reserved4[2];
 310         struct ipr_std_inq_data std_inq_data;
 311 }__attribute__ ((packed, aligned (4)));
 312
 313 struct ipr_config_table_hdr {
 314         u8 num_entries;
 315         u8 flags;
 316 #define IPR_UCODE_DOWNLOAD_REQ  0x10
 317         __be16 reserved;
 318 }__attribute__((packed, aligned (4)));
 319
 320 struct ipr_config_table {
 321         struct ipr_config_table_hdr hdr;
 322         struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
 323 }__attribute__((packed, aligned (4)));
 324
 325 struct ipr_hostrcb_cfg_ch_not {
 326         struct ipr_config_table_entry cfgte;
 327         u8 reserved[936];
 328 }__attribute__((packed, aligned (4)));
 329
 330 struct ipr_supported_device {
 331         __be16 data_length;
 332         u8 reserved;
 333         u8 num_records;
 334         struct ipr_std_inq_vpids vpids;
 335         u8 reserved2[16];
 336 }__attribute__((packed, aligned (4)));
 337
 338 /* Command packet structure */
 339 struct ipr_cmd_pkt {
 340         __be16 reserved;                /* Reserved by IOA */
 341         u8 request_type;
 342 #define IPR_RQTYPE_SCSICDB              0x00
 343 #define IPR_RQTYPE_IOACMD               0x01
 344 #define IPR_RQTYPE_HCAM                 0x02
 345
 346         u8 luntar_luntrn;
 347
 348         u8 flags_hi;
 349 #define IPR_FLAGS_HI_WRITE_NOT_READ             0x80
 350 #define IPR_FLAGS_HI_NO_ULEN_CHK                0x20
 351 #define IPR_FLAGS_HI_SYNC_OVERRIDE              0x10
 352 #define IPR_FLAGS_HI_SYNC_COMPLETE              0x08
 353 #define IPR_FLAGS_HI_NO_LINK_DESC               0x04
 354
 355         u8 flags_lo;
 356 #define IPR_FLAGS_LO_ALIGNED_BFR                0x20
 357 #define IPR_FLAGS_LO_DELAY_AFTER_RST    0x10
 358 #define IPR_FLAGS_LO_UNTAGGED_TASK              0x00
 359 #define IPR_FLAGS_LO_SIMPLE_TASK                0x02
 360 #define IPR_FLAGS_LO_ORDERED_TASK               0x04
 361 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK             0x06
 362 #define IPR_FLAGS_LO_ACA_TASK                   0x08
 363
 364         u8 cdb[16];
 365         __be16 timeout;
 366 }__attribute__ ((packed, aligned(4)));
 367
 368 /* IOA Request Control Block    128 bytes  */
 369 struct ipr_ioarcb {
 370         __be32 ioarcb_host_pci_addr;
 371         __be32 reserved;
 372         __be32 res_handle;
 373         __be32 host_response_handle;
 374         __be32 reserved1;
 375         __be32 reserved2;
 376         __be32 reserved3;
 377
 378         __be32 write_data_transfer_length;
 379         __be32 read_data_transfer_length;
 380         __be32 write_ioadl_addr;
 381         __be32 write_ioadl_len;
 382         __be32 read_ioadl_addr;
 383         __be32 read_ioadl_len;
 384
 385         __be32 ioasa_host_pci_addr;
 386         __be16 ioasa_len;
 387         __be16 reserved4;
 388
 389         struct ipr_cmd_pkt cmd_pkt;
 390
 391         __be32 add_cmd_parms_len;
 392         __be32 add_cmd_parms[10];
 393 }__attribute__((packed, aligned (4)));
 394
 395 struct ipr_ioadl_desc {
 396         __be32 flags_and_data_len;
 397 #define IPR_IOADL_FLAGS_MASK            0xff000000
 398 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
 399 #define IPR_IOADL_DATA_LEN_MASK         0x00ffffff
 400 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
 401 #define IPR_IOADL_FLAGS_READ            0x48000000
 402 #define IPR_IOADL_FLAGS_READ_LAST       0x49000000
 403 #define IPR_IOADL_FLAGS_WRITE           0x68000000
 404 #define IPR_IOADL_FLAGS_WRITE_LAST      0x69000000
 405 #define IPR_IOADL_FLAGS_LAST            0x01000000
 406
 407         __be32 address;
 408 }__attribute__((packed, aligned (8)));
 409
 410 struct ipr_ioasa_vset {
 411         __be32 failing_lba_hi;
 412         __be32 failing_lba_lo;
 413         __be32 ioa_data[22];
 414 }__attribute__((packed, aligned (4)));
 415
 416 struct ipr_ioasa_af_dasd {
 417         __be32 failing_lba;
 418 }__attribute__((packed, aligned (4)));
 419
 420 struct ipr_ioasa_gpdd {
 421         u8 end_state;
 422         u8 bus_phase;
 423         __be16 reserved;
 424         __be32 ioa_data[23];
 425 }__attribute__((packed, aligned (4)));
 426
 427 struct ipr_ioasa_raw {
 428         __be32 ioa_data[24];
 429 }__attribute__((packed, aligned (4)));
 430
 431 struct ipr_ioasa {
 432         __be32 ioasc;
 433 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
 434 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
 435 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
 436 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
 437
 438         __be16 ret_stat_len;    /* Length of the returned IOASA */
 439
 440         __be16 avail_stat_len;  /* Total Length of status available. */
 441
 442         __be32 residual_data_len;       /* number of bytes in the host data */
 443         /* buffers that were not used by the IOARCB command. */
 444
 445         __be32 ilid;
 446 #define IPR_NO_ILID                     0
 447 #define IPR_DRIVER_ILID         0xffffffff
 448
 449         __be32 fd_ioasc;
 450
 451         __be32 fd_phys_locator;
 452
 453         __be32 fd_res_handle;
 454
 455         __be32 ioasc_specific;  /* status code specific field */
 456 #define IPR_IOASC_SPECIFIC_MASK         0x00ffffff
 457 #define IPR_FIELD_POINTER_VALID         (0x80000000 >> 8)
 458 #define IPR_FIELD_POINTER_MASK          0x0000ffff
 459
 460         union {
 461                 struct ipr_ioasa_vset vset;
 462                 struct ipr_ioasa_af_dasd dasd;
 463                 struct ipr_ioasa_gpdd gpdd;
 464                 struct ipr_ioasa_raw raw;
 465         } u;
 466 }__attribute__((packed, aligned (4)));
 467
 468 struct ipr_mode_parm_hdr {
 469         u8 length;
 470         u8 medium_type;
 471         u8 device_spec_parms;
 472         u8 block_desc_len;
 473 }__attribute__((packed));
 474
 475 struct ipr_mode_pages {
 476         struct ipr_mode_parm_hdr hdr;
 477         u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
 478 }__attribute__((packed));
 479
 480 struct ipr_mode_page_hdr {
 481         u8 ps_page_code;
 482 #define IPR_MODE_PAGE_PS        0x80
 483 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
 484         u8 page_length;
 485 }__attribute__ ((packed));
 486
 487 struct ipr_dev_bus_entry {
 488         struct ipr_res_addr res_addr;
 489         u8 flags;
 490 #define IPR_SCSI_ATTR_ENABLE_QAS                        0x80
 491 #define IPR_SCSI_ATTR_DISABLE_QAS                       0x40
 492 #define IPR_SCSI_ATTR_QAS_MASK                          0xC0
 493 #define IPR_SCSI_ATTR_ENABLE_TM                         0x20
 494 #define IPR_SCSI_ATTR_NO_TERM_PWR                       0x10
 495 #define IPR_SCSI_ATTR_TM_SUPPORTED                      0x08
 496 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED     0x04
 497
 498         u8 scsi_id;
 499         u8 bus_width;
 500         u8 extended_reset_delay;
 501 #define IPR_EXTENDED_RESET_DELAY        7
 502
 503         __be32 max_xfer_rate;
 504
 505         u8 spinup_delay;
 506         u8 reserved3;
 507         __be16 reserved4;
 508 }__attribute__((packed, aligned (4)));
 509
 510 struct ipr_mode_page28 {
 511         struct ipr_mode_page_hdr hdr;
 512         u8 num_entries;
 513         u8 entry_length;
 514         struct ipr_dev_bus_entry bus[0];
 515 }__attribute__((packed));
 516
 517 struct ipr_ioa_vpd {
 518         struct ipr_std_inq_data std_inq_data;
 519         u8 ascii_part_num[12];
 520         u8 reserved[40];
 521         u8 ascii_plant_code[4];
 522 }__attribute__((packed));
 523
 524 struct ipr_inquiry_page3 {
 525         u8 peri_qual_dev_type;
 526         u8 page_code;
 527         u8 reserved1;
 528         u8 page_length;
 529         u8 ascii_len;
 530         u8 reserved2[3];
 531         u8 load_id[4];
 532         u8 major_release;
 533         u8 card_type;
 534         u8 minor_release[2];
 535         u8 ptf_number[4];
 536         u8 patch_number[4];
 537 }__attribute__((packed));
 538
 539 struct ipr_hostrcb_device_data_entry {
 540         struct ipr_std_inq_vpids dev_vpids;
 541         u8 dev_sn[IPR_SERIAL_NUM_LEN];
 542         struct ipr_res_addr dev_res_addr;
 543         struct ipr_std_inq_vpids new_dev_vpids;
 544         u8 new_dev_sn[IPR_SERIAL_NUM_LEN];
 545         struct ipr_std_inq_vpids ioa_last_with_dev_vpids;
 546         u8 ioa_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
 547         struct ipr_std_inq_vpids cfc_last_with_dev_vpids;
 548         u8 cfc_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
 549         __be32 ioa_data[5];
 550 }__attribute__((packed, aligned (4)));
 551
 552 struct ipr_hostrcb_array_data_entry {
 553         struct ipr_std_inq_vpids vpids;
 554         u8 serial_num[IPR_SERIAL_NUM_LEN];
 555         struct ipr_res_addr expected_dev_res_addr;
 556         struct ipr_res_addr dev_res_addr;
 557 }__attribute__((packed, aligned (4)));
 558
 559 struct ipr_hostrcb_type_ff_error {
 560         __be32 ioa_data[246];
 561 }__attribute__((packed, aligned (4)));
 562
 563 struct ipr_hostrcb_type_01_error {
 564         __be32 seek_counter;
 565         __be32 read_counter;
 566         u8 sense_data[32];
 567         __be32 ioa_data[236];
 568 }__attribute__((packed, aligned (4)));
 569
 570 struct ipr_hostrcb_type_02_error {
 571         struct ipr_std_inq_vpids ioa_vpids;
 572         u8 ioa_sn[IPR_SERIAL_NUM_LEN];
 573         struct ipr_std_inq_vpids cfc_vpids;
 574         u8 cfc_sn[IPR_SERIAL_NUM_LEN];
 575         struct ipr_std_inq_vpids ioa_last_attached_to_cfc_vpids;
 576         u8 ioa_last_attached_to_cfc_sn[IPR_SERIAL_NUM_LEN];
 577         struct ipr_std_inq_vpids cfc_last_attached_to_ioa_vpids;
 578         u8 cfc_last_attached_to_ioa_sn[IPR_SERIAL_NUM_LEN];
 579         __be32 ioa_data[3];
 580         u8 reserved[844];
 581 }__attribute__((packed, aligned (4)));
 582
 583 struct ipr_hostrcb_type_03_error {
 584         struct ipr_std_inq_vpids ioa_vpids;
 585         u8 ioa_sn[IPR_SERIAL_NUM_LEN];
 586         struct ipr_std_inq_vpids cfc_vpids;
 587         u8 cfc_sn[IPR_SERIAL_NUM_LEN];
 588         __be32 errors_detected;
 589         __be32 errors_logged;
 590         u8 ioa_data[12];
 591         struct ipr_hostrcb_device_data_entry dev_entry[3];
 592         u8 reserved[444];
 593 }__attribute__((packed, aligned (4)));
 594
 595 struct ipr_hostrcb_type_04_error {
 596         struct ipr_std_inq_vpids ioa_vpids;
 597         u8 ioa_sn[IPR_SERIAL_NUM_LEN];
 598         struct ipr_std_inq_vpids cfc_vpids;
 599         u8 cfc_sn[IPR_SERIAL_NUM_LEN];
 600         u8 ioa_data[12];
 601         struct ipr_hostrcb_array_data_entry array_member[10];
 602         __be32 exposed_mode_adn;
 603         __be32 array_id;
 604         struct ipr_std_inq_vpids incomp_dev_vpids;
 605         u8 incomp_dev_sn[IPR_SERIAL_NUM_LEN];
 606         __be32 ioa_data2;
 607         struct ipr_hostrcb_array_data_entry array_member2[8];
 608         struct ipr_res_addr last_func_vset_res_addr;
 609         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 610         u8 protection_level[8];
 611         u8 reserved[124];
 612 }__attribute__((packed, aligned (4)));
 613
 614 struct ipr_hostrcb_error {
 615         __be32 failing_dev_ioasc;
 616         struct ipr_res_addr failing_dev_res_addr;
 617         __be32 failing_dev_res_handle;
 618         __be32 prc;
 619         union {
 620                 struct ipr_hostrcb_type_ff_error type_ff_error;
 621                 struct ipr_hostrcb_type_01_error type_01_error;
 622                 struct ipr_hostrcb_type_02_error type_02_error;
 623                 struct ipr_hostrcb_type_03_error type_03_error;
 624                 struct ipr_hostrcb_type_04_error type_04_error;
 625         } u;
 626 }__attribute__((packed, aligned (4)));
 627
 628 struct ipr_hostrcb_raw {
 629         __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
 630 }__attribute__((packed, aligned (4)));
 631
 632 struct ipr_hcam {
 633         u8 op_code;
 634 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE                      0xE1
 635 #define IPR_HOST_RCB_OP_CODE_LOG_DATA                           0xE2
 636
 637         u8 notify_type;
 638 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED        0x00
 639 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY                       0x01
 640 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY                       0x02
 641 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY         0x10
 642 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY       0x11
 643
 644         u8 notifications_lost;
 645 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST                      0
 646 #define IPR_HOST_RCB_NOTIFICATIONS_LOST                         0x80
 647
 648         u8 flags;
 649 #define IPR_HOSTRCB_INTERNAL_OPER       0x80
 650 #define IPR_HOSTRCB_ERR_RESP_SENT       0x40
 651
 652         u8 overlay_id;
 653 #define IPR_HOST_RCB_OVERLAY_ID_1                               0x01
 654 #define IPR_HOST_RCB_OVERLAY_ID_2                               0x02
 655 #define IPR_HOST_RCB_OVERLAY_ID_3                               0x03
 656 #define IPR_HOST_RCB_OVERLAY_ID_4                               0x04
 657 #define IPR_HOST_RCB_OVERLAY_ID_6                               0x06
 658 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT                 0xFF
 659
 660         u8 reserved1[3];
 661         __be32 ilid;
 662         __be32 time_since_last_ioa_reset;
 663         __be32 reserved2;
 664         __be32 length;
 665
 666         union {
 667                 struct ipr_hostrcb_error error;
 668                 struct ipr_hostrcb_cfg_ch_not ccn;
 669                 struct ipr_hostrcb_raw raw;
 670         } u;
 671 }__attribute__((packed, aligned (4)));
 672
 673 struct ipr_hostrcb {
 674         struct ipr_hcam hcam;
 675         dma_addr_t hostrcb_dma;
 676         struct list_head queue;
 677 };
 678
 679 /* IPR smart dump table structures */
 680 struct ipr_sdt_entry {
 681         __be32 bar_str_offset;
 682         __be32 end_offset;
 683         u8 entry_byte;
 684         u8 reserved[3];
 685
 686         u8 flags;
 687 #define IPR_SDT_ENDIAN          0x80
 688 #define IPR_SDT_VALID_ENTRY     0x20
 689
 690         u8 resv;
 691         __be16 priority;
 692 }__attribute__((packed, aligned (4)));
 693
 694 struct ipr_sdt_header {
 695         __be32 state;
 696         __be32 num_entries;
 697         __be32 num_entries_used;
 698         __be32 dump_size;
 699 }__attribute__((packed, aligned (4)));
 700
 701 struct ipr_sdt {
 702         struct ipr_sdt_header hdr;
 703         struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
 704 }__attribute__((packed, aligned (4)));
 705
 706 struct ipr_uc_sdt {
 707         struct ipr_sdt_header hdr;
 708         struct ipr_sdt_entry entry[1];
 709 }__attribute__((packed, aligned (4)));
 710
 711 /*
 712  * Driver types
 713  */
 714 struct ipr_bus_attributes {
 715         u8 bus;
 716         u8 qas_enabled;
 717         u8 bus_width;
 718         u8 reserved;
 719         u32 max_xfer_rate;
 720 };
 721
 722 struct ipr_resource_entry {
 723         struct ipr_config_table_entry cfgte;
 724         u8 needs_sync_complete:1;
 725         u8 in_erp:1;
 726         u8 add_to_ml:1;
 727         u8 del_from_ml:1;
 728         u8 resetting_device:1;
 729
 730         struct scsi_device *sdev;
 731         struct list_head queue;
 732 };
 733
 734 struct ipr_resource_hdr {
 735         u16 num_entries;
 736         u16 reserved;
 737 };
 738
 739 struct ipr_resource_table {
 740         struct ipr_resource_hdr hdr;
 741         struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
 742 };
 743
 744 struct ipr_misc_cbs {
 745         struct ipr_ioa_vpd ioa_vpd;
 746         struct ipr_inquiry_page3 page3_data;
 747         struct ipr_mode_pages mode_pages;
 748         struct ipr_supported_device supp_dev;
 749 };
 750
 751 struct ipr_interrupt_offsets {
 752         unsigned long set_interrupt_mask_reg;
 753         unsigned long clr_interrupt_mask_reg;
 754         unsigned long sense_interrupt_mask_reg;
 755         unsigned long clr_interrupt_reg;
 756
 757         unsigned long sense_interrupt_reg;
 758         unsigned long ioarrin_reg;
 759         unsigned long sense_uproc_interrupt_reg;
 760         unsigned long set_uproc_interrupt_reg;
 761         unsigned long clr_uproc_interrupt_reg;
 762 };
 763
 764 struct ipr_interrupts {
 765         void __iomem *set_interrupt_mask_reg;
 766         void __iomem *clr_interrupt_mask_reg;
 767         void __iomem *sense_interrupt_mask_reg;
 768         void __iomem *clr_interrupt_reg;
 769
 770         void __iomem *sense_interrupt_reg;
 771         void __iomem *ioarrin_reg;
 772         void __iomem *sense_uproc_interrupt_reg;
 773         void __iomem *set_uproc_interrupt_reg;
 774         void __iomem *clr_uproc_interrupt_reg;
 775 };
 776
 777 struct ipr_chip_cfg_t {
 778         u32 mailbox;
 779         u8 cache_line_size;
 780         struct ipr_interrupt_offsets regs;
 781 };
 782
 783 struct ipr_chip_t {
 784         u16 vendor;
 785         u16 device;
 786         const struct ipr_chip_cfg_t *cfg;
 787 };
 788
 789 enum ipr_shutdown_type {
 790         IPR_SHUTDOWN_NORMAL = 0x00,
 791         IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
 792         IPR_SHUTDOWN_ABBREV = 0x80,
 793         IPR_SHUTDOWN_NONE = 0x100
 794 };
 795
 796 struct ipr_trace_entry {
 797         u32 time;
 798
 799         u8 op_code;
 800         u8 type;
 801 #define IPR_TRACE_START                 0x00
 802 #define IPR_TRACE_FINISH                0xff
 803         u16 cmd_index;
 804
 805         __be32 res_handle;
 806         union {
 807                 u32 ioasc;
 808                 u32 add_data;
 809                 u32 res_addr;
 810         } u;
 811 };
 812
 813 struct ipr_sglist {
 814         u32 order;
 815         u32 num_sg;
 816         u32 buffer_len;
 817         struct scatterlist scatterlist[1];
 818 };
 819
 820 enum ipr_sdt_state {
 821         INACTIVE,
 822         WAIT_FOR_DUMP,
 823         GET_DUMP,
 824         ABORT_DUMP,
 825         DUMP_OBTAINED
 826 };
 827
 828 /* Per-controller data */
 829 struct ipr_ioa_cfg {
 830         char eye_catcher[8];
 831 #define IPR_EYECATCHER                  "iprcfg"
 832
 833         struct list_head queue;
 834
 835         u8 allow_interrupts:1;
 836         u8 in_reset_reload:1;
 837         u8 in_ioa_bringdown:1;
 838         u8 ioa_unit_checked:1;
 839         u8 ioa_is_dead:1;
 840         u8 dump_taken:1;
 841         u8 allow_cmds:1;
 842         u8 allow_ml_add_del:1;
 843
 844         u16 type; /* CCIN of the card */
 845
 846         u8 log_level;
 847 #define IPR_MAX_LOG_LEVEL                       4
 848 #define IPR_DEFAULT_LOG_LEVEL           2
 849
 850 #define IPR_NUM_TRACE_INDEX_BITS        8
 851 #define IPR_NUM_TRACE_ENTRIES           (1 << IPR_NUM_TRACE_INDEX_BITS)
 852 #define IPR_TRACE_SIZE  (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
 853         char trace_start[8];
 854 #define IPR_TRACE_START_LABEL                   "trace"
 855         struct ipr_trace_entry *trace;
 856         u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
 857
 858         /*
 859          * Queue for free command blocks
 860          */
 861         char ipr_free_label[8];
 862 #define IPR_FREEQ_LABEL                 "free-q"
 863         struct list_head free_q;
 864
 865         /*
 866          * Queue for command blocks outstanding to the adapter
 867          */
 868         char ipr_pending_label[8];
 869 #define IPR_PENDQ_LABEL                 "pend-q"
 870         struct list_head pending_q;
 871
 872         char cfg_table_start[8];
 873 #define IPR_CFG_TBL_START               "cfg"
 874         struct ipr_config_table *cfg_table;
 875         dma_addr_t cfg_table_dma;
 876
 877         char resource_table_label[8];
 878 #define IPR_RES_TABLE_LABEL             "res_tbl"
 879         struct ipr_resource_entry *res_entries;
 880         struct list_head free_res_q;
 881         struct list_head used_res_q;
 882
 883         char ipr_hcam_label[8];
 884 #define IPR_HCAM_LABEL                  "hcams"
 885         struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
 886         dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
 887         struct list_head hostrcb_free_q;
 888         struct list_head hostrcb_pending_q;
 889
 890         __be32 *host_rrq;
 891         dma_addr_t host_rrq_dma;
 892 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK   0xfffffffc
 893 #define IPR_HRRQ_RESP_BIT_SET                   0x00000002
 894 #define IPR_HRRQ_TOGGLE_BIT                             0x00000001
 895 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT  2
 896         volatile __be32 *hrrq_start;
 897         volatile __be32 *hrrq_end;
 898         volatile __be32 *hrrq_curr;
 899         volatile u32 toggle_bit;
 900
 901         struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
 902
 903         const struct ipr_chip_cfg_t *chip_cfg;
 904
 905         void __iomem *hdw_dma_regs;     /* iomapped PCI memory space */
 906         unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
 907         void __iomem *ioa_mailbox;
 908         struct ipr_interrupts regs;
 909
 910         u16 saved_pcix_cmd_reg;
 911         u16 reset_retries;
 912
 913         u32 errors_logged;
 914
 915         struct Scsi_Host *host;
 916         struct pci_dev *pdev;
 917         struct ipr_sglist *ucode_sglist;
 918         struct ipr_mode_pages *saved_mode_pages;
 919         u8 saved_mode_page_len;
 920
 921         struct work_struct work_q;
 922
 923         wait_queue_head_t reset_wait_q;
 924
 925         struct ipr_dump *dump;
 926         enum ipr_sdt_state sdt_state;
 927
 928         struct ipr_misc_cbs *vpd_cbs;
 929         dma_addr_t vpd_cbs_dma;
 930
 931         struct pci_pool *ipr_cmd_pool;
 932
 933         struct ipr_cmnd *reset_cmd;
 934
 935         char ipr_cmd_label[8];
 936 #define IPR_CMD_LABEL           "ipr_cmnd"
 937         struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
 938         u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
 939 };
 940
 941 struct ipr_cmnd {
 942         struct ipr_ioarcb ioarcb;
 943         struct ipr_ioasa ioasa;
 944         struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
 945         struct list_head queue;
 946         struct scsi_cmnd *scsi_cmd;
 947         struct completion completion;
 948         struct timer_list timer;
 949         void (*done) (struct ipr_cmnd *);
 950         int (*job_step) (struct ipr_cmnd *);
 951         u16 cmd_index;
 952         u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
 953         dma_addr_t sense_buffer_dma;
 954         unsigned short dma_use_sg;
 955         dma_addr_t dma_handle;
 956         struct ipr_cmnd *sibling;
 957         union {
 958                 enum ipr_shutdown_type shutdown_type;
 959                 struct ipr_hostrcb *hostrcb;
 960                 unsigned long time_left;
 961                 unsigned long scratch;
 962                 struct ipr_resource_entry *res;
 963                 struct scsi_device *sdev;
 964         } u;
 965
 966         struct ipr_ioa_cfg *ioa_cfg;
 967 };
 968
 969 struct ipr_ses_table_entry {
 970         char product_id[17];
 971         char compare_product_id_byte[17];
 972         u32 max_bus_speed_limit;        /* MB/sec limit for this backplane */
 973 };
 974
 975 struct ipr_dump_header {
 976         u32 eye_catcher;
 977 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
 978         u32 len;
 979         u32 num_entries;
 980         u32 first_entry_offset;
 981         u32 status;
 982 #define IPR_DUMP_STATUS_SUCCESS                 0
 983 #define IPR_DUMP_STATUS_QUAL_SUCCESS            2
 984 #define IPR_DUMP_STATUS_FAILED                  0xffffffff
 985         u32 os;
 986 #define IPR_DUMP_OS_LINUX       0x4C4E5558
 987         u32 driver_name;
 988 #define IPR_DUMP_DRIVER_NAME    0x49505232
 989 }__attribute__((packed, aligned (4)));
 990
 991 struct ipr_dump_entry_header {
 992         u32 eye_catcher;
 993 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
 994         u32 len;
 995         u32 num_elems;
 996         u32 offset;
 997         u32 data_type;
 998 #define IPR_DUMP_DATA_TYPE_ASCII        0x41534349
 999 #define IPR_DUMP_DATA_TYPE_BINARY       0x42494E41
1000         u32 id;
1001 #define IPR_DUMP_IOA_DUMP_ID            0x494F4131
1002 #define IPR_DUMP_LOCATION_ID            0x4C4F4341
1003 #define IPR_DUMP_TRACE_ID               0x54524143
1004 #define IPR_DUMP_DRIVER_VERSION_ID      0x44525652
1005 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1006 #define IPR_DUMP_IOA_CTRL_BLK           0x494F4342
1007 #define IPR_DUMP_PEND_OPS               0x414F5053
1008         u32 status;
1009 }__attribute__((packed, aligned (4)));
1010
1011 struct ipr_dump_location_entry {
1012         struct ipr_dump_entry_header hdr;
1013         u8 location[BUS_ID_SIZE];
1014 }__attribute__((packed));
1015
1016 struct ipr_dump_trace_entry {
1017         struct ipr_dump_entry_header hdr;
1018         u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1019 }__attribute__((packed, aligned (4)));
1020
1021 struct ipr_dump_version_entry {
1022         struct ipr_dump_entry_header hdr;
1023         u8 version[sizeof(IPR_DRIVER_VERSION)];
1024 };
1025
1026 struct ipr_dump_ioa_type_entry {
1027         struct ipr_dump_entry_header hdr;
1028         u32 type;
1029         u32 fw_version;
1030 };
1031
1032 struct ipr_driver_dump {
1033         struct ipr_dump_header hdr;
1034         struct ipr_dump_version_entry version_entry;
1035         struct ipr_dump_location_entry location_entry;
1036         struct ipr_dump_ioa_type_entry ioa_type_entry;
1037         struct ipr_dump_trace_entry trace_entry;
1038 }__attribute__((packed));
1039
1040 struct ipr_ioa_dump {
1041         struct ipr_dump_entry_header hdr;
1042         struct ipr_sdt sdt;
1043         __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1044         u32 reserved;
1045         u32 next_page_index;
1046         u32 page_offset;
1047         u32 format;
1048 #define IPR_SDT_FMT2            2
1049 #define IPR_SDT_UNKNOWN         3
1050 }__attribute__((packed, aligned (4)));
1051
1052 struct ipr_dump {
1053         struct kref kref;
1054         struct ipr_ioa_cfg *ioa_cfg;
1055         struct ipr_driver_dump driver_dump;
1056         struct ipr_ioa_dump ioa_dump;
1057 };
1058
1059 struct ipr_error_table_t {
1060         u32 ioasc;
1061         int log_ioasa;
1062         int log_hcam;
1063         char *error;
1064 };
1065
1066 struct ipr_software_inq_lid_info {
1067         __be32 load_id;
1068         __be32 timestamp[3];
1069 }__attribute__((packed, aligned (4)));
1070
1071 struct ipr_ucode_image_header {
1072         __be32 header_length;
1073         __be32 lid_table_offset;
1074         u8 major_release;
1075         u8 card_type;
1076         u8 minor_release[2];
1077         u8 reserved[20];
1078         char eyecatcher[16];
1079         __be32 num_lids;
1080         struct ipr_software_inq_lid_info lid[1];
1081 }__attribute__((packed, aligned (4)));
1082
1083 /*
1084  * Macros
1085  */
1086 #if IPR_DEBUG
1087 #define IPR_DBG_CMD(CMD) do { CMD; } while (0)
1088 #else
1089 #define IPR_DBG_CMD(CMD)
1090 #endif
1091
1092 #ifdef CONFIG_SCSI_IPR_TRACE
1093 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1094 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1095 #else
1096 #define ipr_create_trace_file(kobj, attr) 0
1097 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1098 #endif
1099
1100 #ifdef CONFIG_SCSI_IPR_DUMP
1101 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1102 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1103 #else
1104 #define ipr_create_dump_file(kobj, attr) 0
1105 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1106 #endif
1107
1108 /*
1109  * Error logging macros
1110  */
1111 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1112 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1113 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1114 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1115 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1116
1117 #define ipr_sdev_printk(level, sdev, fmt, ...) \
1118         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, sdev->host->host_no, \
1119                 sdev->channel, sdev->id, sdev->lun, ##__VA_ARGS__)
1120
1121 #define ipr_sdev_err(sdev, fmt, ...) \
1122         ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1123
1124 #define ipr_sdev_info(sdev, fmt, ...) \
1125         ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1126
1127 #define ipr_sdev_dbg(sdev, fmt, ...) \
1128         IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1129
1130 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1131         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1132                 res.bus, res.target, res.lun, ##__VA_ARGS__)
1133
1134 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1135         ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1136 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1137         IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1138
1139 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1140         __FILE__, __FUNCTION__, __LINE__)
1141
1142 #if IPR_DBG_TRACE
1143 #define ENTER printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__)
1144 #define LEAVE printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__)
1145 #else
1146 #define ENTER
1147 #define LEAVE
1148 #endif
1149
1150 #define ipr_err_separator \
1151 ipr_err("----------------------------------------------------------\n")
1152
1153
1154 /*
1155  * Inlines
1156  */
1157
1158 /**
1159  * ipr_is_ioa_resource - Determine if a resource is the IOA
1160  * @res:        resource entry struct
1161  *
1162  * Return value:
1163  *      1 if IOA / 0 if not IOA
1164  **/
1165 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1166 {
1167         return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1168 }
1169
1170 /**
1171  * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1172  * @res:        resource entry struct
1173  *
1174  * Return value:
1175  *      1 if AF DASD / 0 if not AF DASD
1176  **/
1177 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1178 {
1179         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1180             !ipr_is_ioa_resource(res) &&
1181             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1182                 return 1;
1183         else
1184                 return 0;
1185 }
1186
1187 /**
1188  * ipr_is_vset_device - Determine if a resource is a VSET
1189  * @res:        resource entry struct
1190  *
1191  * Return value:
1192  *      1 if VSET / 0 if not VSET
1193  **/
1194 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1195 {
1196         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1197             !ipr_is_ioa_resource(res) &&
1198             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1199                 return 1;
1200         else
1201                 return 0;
1202 }
1203
1204 /**
1205  * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1206  * @res:        resource entry struct
1207  *
1208  * Return value:
1209  *      1 if GSCSI / 0 if not GSCSI
1210  **/
1211 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1212 {
1213         if (!ipr_is_ioa_resource(res) &&
1214             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1215                 return 1;
1216         else
1217                 return 0;
1218 }
1219
1220 /**
1221  * ipr_is_device - Determine if resource address is that of a device
1222  * @res_addr:   resource address struct
1223  *
1224  * Return value:
1225  *      1 if AF / 0 if not AF
1226  **/
1227 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1228 {
1229         if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1230             (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1231                 return 1;
1232
1233         return 0;
1234 }
1235
1236 /**
1237  * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1238  * @sdt_word:   SDT address
1239  *
1240  * Return value:
1241  *      1 if format 2 / 0 if not
1242  **/
1243 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1244 {
1245         u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1246
1247         switch (bar_sel) {
1248         case IPR_SDT_FMT2_BAR0_SEL:
1249         case IPR_SDT_FMT2_BAR1_SEL:
1250         case IPR_SDT_FMT2_BAR2_SEL:
1251         case IPR_SDT_FMT2_BAR3_SEL:
1252         case IPR_SDT_FMT2_BAR4_SEL:
1253         case IPR_SDT_FMT2_BAR5_SEL:
1254         case IPR_SDT_FMT2_EXP_ROM_SEL:
1255                 return 1;
1256         };
1257
1258         return 0;
1259 }
1260
1261 #endif