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[PATCH] W1: w1_netlink: New init/fini netlink callbacks.
[linux-2.6/verdex.git] / drivers / serial / imx.c
blob4c985e6b3784b0b611413c74deba61a98c086997
1 /*
2 * linux/drivers/serial/imx.c
3 *
4 * Driver for Motorola IMX serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
27 */
28 #include <linux/config.h>
29
30 #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31 #define SUPPORT_SYSRQ
32 #endif
33
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/hardware.h>
48
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_IMX_MAJOR 204
51 #define MINOR_START 41
52
53 #define NR_PORTS 2
54
55 #define IMX_ISR_PASS_LIMIT 256
56
57 /*
58 * This is the size of our serial port register set.
59 */
60 #define UART_PORT_SIZE 0x100
61
62 /*
63 * This determines how often we check the modem status signals
64 * for any change. They generally aren't connected to an IRQ
65 * so we have to poll them. We also check immediately before
66 * filling the TX fifo incase CTS has been dropped.
67 */
68 #define MCTRL_TIMEOUT (250*HZ/1000)
69
70 #define DRIVER_NAME "IMX-uart"
71
72 struct imx_port {
73 struct uart_port port;
74 struct timer_list timer;
75 unsigned int old_status;
76 int txirq,rxirq;
77 };
78
79 /*
80 * Handle any change of modem status signal since we were last called.
81 */
82 static void imx_mctrl_check(struct imx_port *sport)
83 {
84 unsigned int status, changed;
85
86 status = sport->port.ops->get_mctrl(&sport->port);
87 changed = status ^ sport->old_status;
88
89 if (changed == 0)
90 return;
91
92 sport->old_status = status;
93
94 if (changed & TIOCM_RI)
95 sport->port.icount.rng++;
96 if (changed & TIOCM_DSR)
97 sport->port.icount.dsr++;
98 if (changed & TIOCM_CAR)
99 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
100 if (changed & TIOCM_CTS)
101 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
102
103 wake_up_interruptible(&sport->port.info->delta_msr_wait);
104 }
105
106 /*
107 * This is our per-port timeout handler, for checking the
108 * modem status signals.
109 */
110 static void imx_timeout(unsigned long data)
111 {
112 struct imx_port *sport = (struct imx_port *)data;
113 unsigned long flags;
114
115 if (sport->port.info) {
116 spin_lock_irqsave(&sport->port.lock, flags);
117 imx_mctrl_check(sport);
118 spin_unlock_irqrestore(&sport->port.lock, flags);
119
120 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
121 }
122 }
123
124 /*
125 * interrupts disabled on entry
126 */
127 static void imx_stop_tx(struct uart_port *port)
128 {
129 struct imx_port *sport = (struct imx_port *)port;
130 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
131 }
132
133 /*
134 * interrupts disabled on entry
135 */
136 static void imx_stop_rx(struct uart_port *port)
137 {
138 struct imx_port *sport = (struct imx_port *)port;
139 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
140 }
141
142 /*
143 * Set the modem control timer to fire immediately.
144 */
145 static void imx_enable_ms(struct uart_port *port)
146 {
147 struct imx_port *sport = (struct imx_port *)port;
148
149 mod_timer(&sport->timer, jiffies);
150 }
151
152 static inline void imx_transmit_buffer(struct imx_port *sport)
153 {
154 struct circ_buf *xmit = &sport->port.info->xmit;
155
156 do {
157 /* send xmit->buf[xmit->tail]
158 * out the port here */
159 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
160 xmit->tail = (xmit->tail + 1) &
161 (UART_XMIT_SIZE - 1);
162 sport->port.icount.tx++;
163 if (uart_circ_empty(xmit))
164 break;
165 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
166
167 if (uart_circ_empty(xmit))
168 imx_stop_tx(&sport->port);
169 }
170
171 /*
172 * interrupts disabled on entry
173 */
174 static void imx_start_tx(struct uart_port *port)
175 {
176 struct imx_port *sport = (struct imx_port *)port;
177
178 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
179
180 if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
181 imx_transmit_buffer(sport);
182 }
183
184 static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
185 {
186 struct imx_port *sport = (struct imx_port *)dev_id;
187 struct circ_buf *xmit = &sport->port.info->xmit;
188 unsigned long flags;
189
190 spin_lock_irqsave(&sport->port.lock,flags);
191 if (sport->port.x_char)
192 {
193 /* Send next char */
194 URTX0((u32)sport->port.membase) = sport->port.x_char;
195 goto out;
196 }
197
198 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
199 imx_stop_tx(&sport->port);
200 goto out;
201 }
202
203 imx_transmit_buffer(sport);
204
205 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
206 uart_write_wakeup(&sport->port);
207
208 out:
209 spin_unlock_irqrestore(&sport->port.lock,flags);
210 return IRQ_HANDLED;
211 }
212
213 static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
214 {
215 struct imx_port *sport = dev_id;
216 unsigned int rx,flg,ignored = 0;
217 struct tty_struct *tty = sport->port.info->tty;
218 unsigned long flags;
219
220 rx = URXD0((u32)sport->port.membase);
221 spin_lock_irqsave(&sport->port.lock,flags);
222
223 do {
224 flg = TTY_NORMAL;
225 sport->port.icount.rx++;
226
227 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
228 USR2((u32)sport->port.membase) |= USR2_BRCD;
229 if(uart_handle_break(&sport->port))
230 goto ignore_char;
231 }
232
233 if (uart_handle_sysrq_char
234 (&sport->port, (unsigned char)rx, regs))
235 goto ignore_char;
236
237 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
238 goto handle_error;
239
240 error_return:
241 tty_insert_flip_char(tty, rx, flg);
242
243 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
244 goto out;
245
246 ignore_char:
247 rx = URXD0((u32)sport->port.membase);
248 } while(rx & URXD_CHARRDY);
249
250 out:
251 spin_unlock_irqrestore(&sport->port.lock,flags);
252 tty_flip_buffer_push(tty);
253 return IRQ_HANDLED;
254
255 handle_error:
256 if (rx & URXD_PRERR)
257 sport->port.icount.parity++;
258 else if (rx & URXD_FRMERR)
259 sport->port.icount.frame++;
260 if (rx & URXD_OVRRUN)
261 sport->port.icount.overrun++;
262
263 if (rx & sport->port.ignore_status_mask) {
264 if (++ignored > 100)
265 goto out;
266 goto ignore_char;
267 }
268
269 rx &= sport->port.read_status_mask;
270
271 if (rx & URXD_PRERR)
272 flg = TTY_PARITY;
273 else if (rx & URXD_FRMERR)
274 flg = TTY_FRAME;
275 if (rx & URXD_OVRRUN)
276 flg = TTY_OVERRUN;
277
278 #ifdef SUPPORT_SYSRQ
279 sport->port.sysrq = 0;
280 #endif
281 goto error_return;
282 }
283
284 /*
285 * Return TIOCSER_TEMT when transmitter is not busy.
286 */
287 static unsigned int imx_tx_empty(struct uart_port *port)
288 {
289 struct imx_port *sport = (struct imx_port *)port;
290
291 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
292 }
293
294 /*
295 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
296 */
297 static unsigned int imx_get_mctrl(struct uart_port *port)
298 {
299 struct imx_port *sport = (struct imx_port *)port;
300 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
301
302 if (USR1((u32)sport->port.membase) & USR1_RTSS)
303 tmp |= TIOCM_CTS;
304
305 if (UCR2((u32)sport->port.membase) & UCR2_CTS)
306 tmp |= TIOCM_RTS;
307
308 return tmp;
309 }
310
311 static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
312 {
313 struct imx_port *sport = (struct imx_port *)port;
314
315 if (mctrl & TIOCM_RTS)
316 UCR2((u32)sport->port.membase) |= UCR2_CTS;
317 else
318 UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
319 }
320
321 /*
322 * Interrupts always disabled.
323 */
324 static void imx_break_ctl(struct uart_port *port, int break_state)
325 {
326 struct imx_port *sport = (struct imx_port *)port;
327 unsigned long flags;
328
329 spin_lock_irqsave(&sport->port.lock, flags);
330
331 if ( break_state != 0 )
332 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
333 else
334 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
335
336 spin_unlock_irqrestore(&sport->port.lock, flags);
337 }
338
339 #define TXTL 2 /* reset default */
340 #define RXTL 1 /* reset default */
341
342 static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
343 {
344 unsigned int val;
345 unsigned int ufcr_rfdiv;
346
347 /* set receiver / transmitter trigger level.
348 * RFDIV is set such way to satisfy requested uartclk value
349 */
350 val = TXTL<<10 | RXTL;
351 ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
352
353 if(!ufcr_rfdiv)
354 ufcr_rfdiv = 1;
355
356 if(ufcr_rfdiv >= 7)
357 ufcr_rfdiv = 6;
358 else
359 ufcr_rfdiv = 6 - ufcr_rfdiv;
360
361 val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
362
363 UFCR((u32)sport->port.membase) = val;
364
365 return 0;
366 }
367
368 static int imx_startup(struct uart_port *port)
369 {
370 struct imx_port *sport = (struct imx_port *)port;
371 int retval;
372 unsigned long flags;
373
374 imx_setup_ufcr(sport, 0);
375
376 /* disable the DREN bit (Data Ready interrupt enable) before
377 * requesting IRQs
378 */
379 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
380
381 /*
382 * Allocate the IRQ
383 */
384 retval = request_irq(sport->rxirq, imx_rxint, 0,
385 DRIVER_NAME, sport);
386 if (retval) goto error_out2;
387
388 retval = request_irq(sport->txirq, imx_txint, 0,
389 "imx-uart", sport);
390 if (retval) goto error_out1;
391
392 /*
393 * Finally, clear and enable interrupts
394 */
395
396 UCR1((u32)sport->port.membase) |=
397 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
398
399 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
400 /*
401 * Enable modem status interrupts
402 */
403 spin_lock_irqsave(&sport->port.lock,flags);
404 imx_enable_ms(&sport->port);
405 spin_unlock_irqrestore(&sport->port.lock,flags);
406
407 return 0;
408
409 error_out1:
410 free_irq(sport->rxirq, sport);
411 error_out2:
412 free_irq(sport->txirq, sport);
413 return retval;
414 }
415
416 static void imx_shutdown(struct uart_port *port)
417 {
418 struct imx_port *sport = (struct imx_port *)port;
419
420 /*
421 * Stop our timer.
422 */
423 del_timer_sync(&sport->timer);
424
425 /*
426 * Free the interrupts
427 */
428 free_irq(sport->txirq, sport);
429 free_irq(sport->rxirq, sport);
430
431 /*
432 * Disable all interrupts, port and break condition.
433 */
434
435 UCR1((u32)sport->port.membase) &=
436 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
437 }
438
439 static void
440 imx_set_termios(struct uart_port *port, struct termios *termios,
441 struct termios *old)
442 {
443 struct imx_port *sport = (struct imx_port *)port;
444 unsigned long flags;
445 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
446 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
447
448 /*
449 * If we don't support modem control lines, don't allow
450 * these to be set.
451 */
452 if (0) {
453 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
454 termios->c_cflag |= CLOCAL;
455 }
456
457 /*
458 * We only support CS7 and CS8.
459 */
460 while ((termios->c_cflag & CSIZE) != CS7 &&
461 (termios->c_cflag & CSIZE) != CS8) {
462 termios->c_cflag &= ~CSIZE;
463 termios->c_cflag |= old_csize;
464 old_csize = CS8;
465 }
466
467 if ((termios->c_cflag & CSIZE) == CS8)
468 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
469 else
470 ucr2 = UCR2_SRST | UCR2_IRTS;
471
472 if (termios->c_cflag & CRTSCTS) {
473 ucr2 &= ~UCR2_IRTS;
474 ucr2 |= UCR2_CTSC;
475 }
476
477 if (termios->c_cflag & CSTOPB)
478 ucr2 |= UCR2_STPB;
479 if (termios->c_cflag & PARENB) {
480 ucr2 |= UCR2_PREN;
481 if (!(termios->c_cflag & PARODD))
482 ucr2 |= UCR2_PROE;
483 }
484
485 /*
486 * Ask the core to calculate the divisor for us.
487 */
488 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
489 quot = uart_get_divisor(port, baud);
490
491 spin_lock_irqsave(&sport->port.lock, flags);
492
493 sport->port.read_status_mask = 0;
494 if (termios->c_iflag & INPCK)
495 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
496 if (termios->c_iflag & (BRKINT | PARMRK))
497 sport->port.read_status_mask |= URXD_BRK;
498
499 /*
500 * Characters to ignore
501 */
502 sport->port.ignore_status_mask = 0;
503 if (termios->c_iflag & IGNPAR)
504 sport->port.ignore_status_mask |= URXD_PRERR;
505 if (termios->c_iflag & IGNBRK) {
506 sport->port.ignore_status_mask |= URXD_BRK;
507 /*
508 * If we're ignoring parity and break indicators,
509 * ignore overruns too (for real raw support).
510 */
511 if (termios->c_iflag & IGNPAR)
512 sport->port.ignore_status_mask |= URXD_OVRRUN;
513 }
514
515 del_timer_sync(&sport->timer);
516
517 /*
518 * Update the per-port timeout.
519 */
520 uart_update_timeout(port, termios->c_cflag, baud);
521
522 /*
523 * disable interrupts and drain transmitter
524 */
525 old_ucr1 = UCR1((u32)sport->port.membase);
526 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
527
528 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
529 barrier();
530
531 /* then, disable everything */
532 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
533 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
534
535 /* set the parity, stop bits and data size */
536 UCR2((u32)sport->port.membase) = ucr2;
537
538 /* set the baud rate. We assume uartclk = 16 MHz
539 *
540 * baud * 16 UBIR - 1
541 * --------- = --------
542 * uartclk UBMR - 1
543 */
544 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
545 UBMR((u32)sport->port.membase) = 10000 - 1;
546
547 UCR1((u32)sport->port.membase) = old_ucr1;
548 UCR2((u32)sport->port.membase) |= old_txrxen;
549
550 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
551 imx_enable_ms(&sport->port);
552
553 spin_unlock_irqrestore(&sport->port.lock, flags);
554 }
555
556 static const char *imx_type(struct uart_port *port)
557 {
558 struct imx_port *sport = (struct imx_port *)port;
559
560 return sport->port.type == PORT_IMX ? "IMX" : NULL;
561 }
562
563 /*
564 * Release the memory region(s) being used by 'port'.
565 */
566 static void imx_release_port(struct uart_port *port)
567 {
568 struct imx_port *sport = (struct imx_port *)port;
569
570 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
571 }
572
573 /*
574 * Request the memory region(s) being used by 'port'.
575 */
576 static int imx_request_port(struct uart_port *port)
577 {
578 struct imx_port *sport = (struct imx_port *)port;
579
580 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
581 "imx-uart") != NULL ? 0 : -EBUSY;
582 }
583
584 /*
585 * Configure/autoconfigure the port.
586 */
587 static void imx_config_port(struct uart_port *port, int flags)
588 {
589 struct imx_port *sport = (struct imx_port *)port;
590
591 if (flags & UART_CONFIG_TYPE &&
592 imx_request_port(&sport->port) == 0)
593 sport->port.type = PORT_IMX;
594 }
595
596 /*
597 * Verify the new serial_struct (for TIOCSSERIAL).
598 * The only change we allow are to the flags and type, and
599 * even then only between PORT_IMX and PORT_UNKNOWN
600 */
601 static int
602 imx_verify_port(struct uart_port *port, struct serial_struct *ser)
603 {
604 struct imx_port *sport = (struct imx_port *)port;
605 int ret = 0;
606
607 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
608 ret = -EINVAL;
609 if (sport->port.irq != ser->irq)
610 ret = -EINVAL;
611 if (ser->io_type != UPIO_MEM)
612 ret = -EINVAL;
613 if (sport->port.uartclk / 16 != ser->baud_base)
614 ret = -EINVAL;
615 if ((void *)sport->port.mapbase != ser->iomem_base)
616 ret = -EINVAL;
617 if (sport->port.iobase != ser->port)
618 ret = -EINVAL;
619 if (ser->hub6 != 0)
620 ret = -EINVAL;
621 return ret;
622 }
623
624 static struct uart_ops imx_pops = {
625 .tx_empty = imx_tx_empty,
626 .set_mctrl = imx_set_mctrl,
627 .get_mctrl = imx_get_mctrl,
628 .stop_tx = imx_stop_tx,
629 .start_tx = imx_start_tx,
630 .stop_rx = imx_stop_rx,
631 .enable_ms = imx_enable_ms,
632 .break_ctl = imx_break_ctl,
633 .startup = imx_startup,
634 .shutdown = imx_shutdown,
635 .set_termios = imx_set_termios,
636 .type = imx_type,
637 .release_port = imx_release_port,
638 .request_port = imx_request_port,
639 .config_port = imx_config_port,
640 .verify_port = imx_verify_port,
641 };
642
643 static struct imx_port imx_ports[] = {
644 {
645 .txirq = UART1_MINT_TX,
646 .rxirq = UART1_MINT_RX,
647 .port = {
648 .type = PORT_IMX,
649 .iotype = SERIAL_IO_MEM,
650 .membase = (void *)IMX_UART1_BASE,
651 .mapbase = IMX_UART1_BASE, /* FIXME */
652 .irq = UART1_MINT_RX,
653 .uartclk = 16000000,
654 .fifosize = 8,
655 .flags = ASYNC_BOOT_AUTOCONF,
656 .ops = &imx_pops,
657 .line = 0,
658 },
659 }, {
660 .txirq = UART2_MINT_TX,
661 .rxirq = UART2_MINT_RX,
662 .port = {
663 .type = PORT_IMX,
664 .iotype = SERIAL_IO_MEM,
665 .membase = (void *)IMX_UART2_BASE,
666 .mapbase = IMX_UART2_BASE, /* FIXME */
667 .irq = UART2_MINT_RX,
668 .uartclk = 16000000,
669 .fifosize = 8,
670 .flags = ASYNC_BOOT_AUTOCONF,
671 .ops = &imx_pops,
672 .line = 1,
673 },
674 }
675 };
676
677 /*
678 * Setup the IMX serial ports.
679 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
680 * Which serial port this ends up being depends on the machine you're
681 * running this kernel on. I'm not convinced that this is a good idea,
682 * but that's the way it traditionally works.
683 *
684 */
685 static void __init imx_init_ports(void)
686 {
687 static int first = 1;
688 int i;
689
690 if (!first)
691 return;
692 first = 0;
693
694 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
695 init_timer(&imx_ports[i].timer);
696 imx_ports[i].timer.function = imx_timeout;
697 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
698 }
699
700 imx_gpio_mode(PC9_PF_UART1_CTS);
701 imx_gpio_mode(PC10_PF_UART1_RTS);
702 imx_gpio_mode(PC11_PF_UART1_TXD);
703 imx_gpio_mode(PC12_PF_UART1_RXD);
704 imx_gpio_mode(PB28_PF_UART2_CTS);
705 imx_gpio_mode(PB29_PF_UART2_RTS);
706
707 imx_gpio_mode(PB30_PF_UART2_TXD);
708 imx_gpio_mode(PB31_PF_UART2_RXD);
709
710 #if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
711 * is implemented.
712 */
713 imx_gpio_mode(PD7_AF_UART2_DTR);
714 imx_gpio_mode(PD8_AF_UART2_DCD);
715 imx_gpio_mode(PD9_AF_UART2_RI);
716 imx_gpio_mode(PD10_AF_UART2_DSR);
717 #endif
718
719
720 }
721
722 #ifdef CONFIG_SERIAL_IMX_CONSOLE
723
724 /*
725 * Interrupts are disabled on entering
726 */
727 static void
728 imx_console_write(struct console *co, const char *s, unsigned int count)
729 {
730 struct imx_port *sport = &imx_ports[co->index];
731 unsigned int old_ucr1, old_ucr2, i;
732
733 /*
734 * First, save UCR1/2 and then disable interrupts
735 */
736 old_ucr1 = UCR1((u32)sport->port.membase);
737 old_ucr2 = UCR2((u32)sport->port.membase);
738
739 UCR1((u32)sport->port.membase) =
740 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
741 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
742 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
743
744 /*
745 * Now, do each character
746 */
747 for (i = 0; i < count; i++) {
748
749 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
750 barrier();
751
752 URTX0((u32)sport->port.membase) = s[i];
753
754 if (s[i] == '\n') {
755 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
756 barrier();
757 URTX0((u32)sport->port.membase) = '\r';
758 }
759 }
760
761 /*
762 * Finally, wait for transmitter to become empty
763 * and restore UCR1/2
764 */
765 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
766
767 UCR1((u32)sport->port.membase) = old_ucr1;
768 UCR2((u32)sport->port.membase) = old_ucr2;
769 }
770
771 /*
772 * If the port was already initialised (eg, by a boot loader),
773 * try to determine the current setup.
774 */
775 static void __init
776 imx_console_get_options(struct imx_port *sport, int *baud,
777 int *parity, int *bits)
778 {
779
780 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
781 /* ok, the port was enabled */
782 unsigned int ucr2, ubir,ubmr, uartclk;
783 unsigned int baud_raw;
784 unsigned int ucfr_rfdiv;
785
786 ucr2 = UCR2((u32)sport->port.membase);
787
788 *parity = 'n';
789 if (ucr2 & UCR2_PREN) {
790 if (ucr2 & UCR2_PROE)
791 *parity = 'o';
792 else
793 *parity = 'e';
794 }
795
796 if (ucr2 & UCR2_WS)
797 *bits = 8;
798 else
799 *bits = 7;
800
801 ubir = UBIR((u32)sport->port.membase) & 0xffff;
802 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
803
804
805 ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
806 if (ucfr_rfdiv == 6)
807 ucfr_rfdiv = 7;
808 else
809 ucfr_rfdiv = 6 - ucfr_rfdiv;
810
811 uartclk = imx_get_perclk1();
812 uartclk /= ucfr_rfdiv;
813
814 { /*
815 * The next code provides exact computation of
816 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
817 * without need of float support or long long division,
818 * which would be required to prevent 32bit arithmetic overflow
819 */
820 unsigned int mul = ubir + 1;
821 unsigned int div = 16 * (ubmr + 1);
822 unsigned int rem = uartclk % div;
823
824 baud_raw = (uartclk / div) * mul;
825 baud_raw += (rem * mul + div / 2) / div;
826 *baud = (baud_raw + 50) / 100 * 100;
827 }
828
829 if(*baud != baud_raw)
830 printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
831 baud_raw, *baud);
832 }
833 }
834
835 static int __init
836 imx_console_setup(struct console *co, char *options)
837 {
838 struct imx_port *sport;
839 int baud = 9600;
840 int bits = 8;
841 int parity = 'n';
842 int flow = 'n';
843
844 /*
845 * Check whether an invalid uart number has been specified, and
846 * if so, search for the first available port that does have
847 * console support.
848 */
849 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
850 co->index = 0;
851 sport = &imx_ports[co->index];
852
853 if (options)
854 uart_parse_options(options, &baud, &parity, &bits, &flow);
855 else
856 imx_console_get_options(sport, &baud, &parity, &bits);
857
858 imx_setup_ufcr(sport, 0);
859
860 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
861 }
862
863 extern struct uart_driver imx_reg;
864 static struct console imx_console = {
865 .name = "ttySMX",
866 .write = imx_console_write,
867 .device = uart_console_device,
868 .setup = imx_console_setup,
869 .flags = CON_PRINTBUFFER,
870 .index = -1,
871 .data = &imx_reg,
872 };
873
874 static int __init imx_rs_console_init(void)
875 {
876 imx_init_ports();
877 register_console(&imx_console);
878 return 0;
879 }
880 console_initcall(imx_rs_console_init);
881
882 #define IMX_CONSOLE &imx_console
883 #else
884 #define IMX_CONSOLE NULL
885 #endif
886
887 static struct uart_driver imx_reg = {
888 .owner = THIS_MODULE,
889 .driver_name = DRIVER_NAME,
890 .dev_name = "ttySMX",
891 .devfs_name = "ttsmx/",
892 .major = SERIAL_IMX_MAJOR,
893 .minor = MINOR_START,
894 .nr = ARRAY_SIZE(imx_ports),
895 .cons = IMX_CONSOLE,
896 };
897
898 static int serial_imx_suspend(struct device *_dev, pm_message_t state, u32 level)
899 {
900 struct imx_port *sport = dev_get_drvdata(_dev);
901
902 if (sport && level == SUSPEND_DISABLE)
903 uart_suspend_port(&imx_reg, &sport->port);
904
905 return 0;
906 }
907
908 static int serial_imx_resume(struct device *_dev, u32 level)
909 {
910 struct imx_port *sport = dev_get_drvdata(_dev);
911
912 if (sport && level == RESUME_ENABLE)
913 uart_resume_port(&imx_reg, &sport->port);
914
915 return 0;
916 }
917
918 static int serial_imx_probe(struct device *_dev)
919 {
920 struct platform_device *dev = to_platform_device(_dev);
921
922 imx_ports[dev->id].port.dev = _dev;
923 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
924 dev_set_drvdata(_dev, &imx_ports[dev->id]);
925 return 0;
926 }
927
928 static int serial_imx_remove(struct device *_dev)
929 {
930 struct imx_port *sport = dev_get_drvdata(_dev);
931
932 dev_set_drvdata(_dev, NULL);
933
934 if (sport)
935 uart_remove_one_port(&imx_reg, &sport->port);
936
937 return 0;
938 }
939
940 static struct device_driver serial_imx_driver = {
941 .name = "imx-uart",
942 .bus = &platform_bus_type,
943 .probe = serial_imx_probe,
944 .remove = serial_imx_remove,
945
946 .suspend = serial_imx_suspend,
947 .resume = serial_imx_resume,
948 };
949
950 static int __init imx_serial_init(void)
951 {
952 int ret;
953
954 printk(KERN_INFO "Serial: IMX driver\n");
955
956 imx_init_ports();
957
958 ret = uart_register_driver(&imx_reg);
959 if (ret)
960 return ret;
961
962 ret = driver_register(&serial_imx_driver);
963 if (ret != 0)
964 uart_unregister_driver(&imx_reg);
965
966 return 0;
967 }
968
969 static void __exit imx_serial_exit(void)
970 {
971 uart_unregister_driver(&imx_reg);
972 }
973
974 module_init(imx_serial_init);
975 module_exit(imx_serial_exit);
976
977 MODULE_AUTHOR("Sascha Hauer");
978 MODULE_DESCRIPTION("IMX generic serial port driver");
979 MODULE_LICENSE("GPL");
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