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[TCP]: TCP_CONG_YEAH requires TCP_CONG_VEGAS
[linux-2.6/verdex.git] / arch / powerpc / platforms / powermac / feature.c
blobf29705f8047de2be29b70e302be880ea694408fd
1 /*
2 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
3 * Ben. Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 * TODO:
11 *
12 * - Replace mdelay with some schedule loop if possible
13 * - Shorten some obfuscated delays on some routines (like modem
14 * power)
15 * - Refcount some clocks (see darwin)
16 * - Split split split...
17 *
18 */
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/spinlock.h>
25 #include <linux/adb.h>
26 #include <linux/pmu.h>
27 #include <linux/ioport.h>
28 #include <linux/pci.h>
29 #include <asm/sections.h>
30 #include <asm/errno.h>
31 #include <asm/ohare.h>
32 #include <asm/heathrow.h>
33 #include <asm/keylargo.h>
34 #include <asm/uninorth.h>
35 #include <asm/io.h>
36 #include <asm/prom.h>
37 #include <asm/machdep.h>
38 #include <asm/pmac_feature.h>
39 #include <asm/dbdma.h>
40 #include <asm/pci-bridge.h>
41 #include <asm/pmac_low_i2c.h>
42
43 #undef DEBUG_FEATURE
44
45 #ifdef DEBUG_FEATURE
46 #define DBG(fmt...) printk(KERN_DEBUG fmt)
47 #else
48 #define DBG(fmt...)
49 #endif
50
51 #ifdef CONFIG_6xx
52 extern int powersave_lowspeed;
53 #endif
54
55 extern int powersave_nap;
56 extern struct device_node *k2_skiplist[2];
57
58 /*
59 * We use a single global lock to protect accesses. Each driver has
60 * to take care of its own locking
61 */
62 DEFINE_SPINLOCK(feature_lock);
63
64 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
65 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
66
67
68 /*
69 * Instance of some macio stuffs
70 */
71 struct macio_chip macio_chips[MAX_MACIO_CHIPS];
72
73 struct macio_chip *macio_find(struct device_node *child, int type)
74 {
75 while(child) {
76 int i;
77
78 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
79 if (child == macio_chips[i].of_node &&
80 (!type || macio_chips[i].type == type))
81 return &macio_chips[i];
82 child = child->parent;
83 }
84 return NULL;
85 }
86 EXPORT_SYMBOL_GPL(macio_find);
87
88 static const char *macio_names[] =
89 {
90 "Unknown",
91 "Grand Central",
92 "OHare",
93 "OHareII",
94 "Heathrow",
95 "Gatwick",
96 "Paddington",
97 "Keylargo",
98 "Pangea",
99 "Intrepid",
100 "K2",
101 "Shasta",
102 };
103
104
105 struct device_node *uninorth_node;
106 u32 __iomem *uninorth_base;
107
108 static u32 uninorth_rev;
109 static int uninorth_maj;
110 static void __iomem *u3_ht_base;
111
112 /*
113 * For each motherboard family, we have a table of functions pointers
114 * that handle the various features.
115 */
116
117 typedef long (*feature_call)(struct device_node *node, long param, long value);
118
119 struct feature_table_entry {
120 unsigned int selector;
121 feature_call function;
122 };
123
124 struct pmac_mb_def
125 {
126 const char* model_string;
127 const char* model_name;
128 int model_id;
129 struct feature_table_entry* features;
130 unsigned long board_flags;
131 };
132 static struct pmac_mb_def pmac_mb;
133
134 /*
135 * Here are the chip specific feature functions
136 */
137
138 static inline int simple_feature_tweak(struct device_node *node, int type,
139 int reg, u32 mask, int value)
140 {
141 struct macio_chip* macio;
142 unsigned long flags;
143
144 macio = macio_find(node, type);
145 if (!macio)
146 return -ENODEV;
147 LOCK(flags);
148 if (value)
149 MACIO_BIS(reg, mask);
150 else
151 MACIO_BIC(reg, mask);
152 (void)MACIO_IN32(reg);
153 UNLOCK(flags);
154
155 return 0;
156 }
157
158 #ifndef CONFIG_POWER4
159
160 static long ohare_htw_scc_enable(struct device_node *node, long param,
161 long value)
162 {
163 struct macio_chip* macio;
164 unsigned long chan_mask;
165 unsigned long fcr;
166 unsigned long flags;
167 int htw, trans;
168 unsigned long rmask;
169
170 macio = macio_find(node, 0);
171 if (!macio)
172 return -ENODEV;
173 if (!strcmp(node->name, "ch-a"))
174 chan_mask = MACIO_FLAG_SCCA_ON;
175 else if (!strcmp(node->name, "ch-b"))
176 chan_mask = MACIO_FLAG_SCCB_ON;
177 else
178 return -ENODEV;
179
180 htw = (macio->type == macio_heathrow || macio->type == macio_paddington
181 || macio->type == macio_gatwick);
182 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
183 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
184 pmac_mb.model_id != PMAC_TYPE_YIKES);
185 if (value) {
186 #ifdef CONFIG_ADB_PMU
187 if ((param & 0xfff) == PMAC_SCC_IRDA)
188 pmu_enable_irled(1);
189 #endif /* CONFIG_ADB_PMU */
190 LOCK(flags);
191 fcr = MACIO_IN32(OHARE_FCR);
192 /* Check if scc cell need enabling */
193 if (!(fcr & OH_SCC_ENABLE)) {
194 fcr |= OH_SCC_ENABLE;
195 if (htw) {
196 /* Side effect: this will also power up the
197 * modem, but it's too messy to figure out on which
198 * ports this controls the tranceiver and on which
199 * it controls the modem
200 */
201 if (trans)
202 fcr &= ~HRW_SCC_TRANS_EN_N;
203 MACIO_OUT32(OHARE_FCR, fcr);
204 fcr |= (rmask = HRW_RESET_SCC);
205 MACIO_OUT32(OHARE_FCR, fcr);
206 } else {
207 fcr |= (rmask = OH_SCC_RESET);
208 MACIO_OUT32(OHARE_FCR, fcr);
209 }
210 UNLOCK(flags);
211 (void)MACIO_IN32(OHARE_FCR);
212 mdelay(15);
213 LOCK(flags);
214 fcr &= ~rmask;
215 MACIO_OUT32(OHARE_FCR, fcr);
216 }
217 if (chan_mask & MACIO_FLAG_SCCA_ON)
218 fcr |= OH_SCCA_IO;
219 if (chan_mask & MACIO_FLAG_SCCB_ON)
220 fcr |= OH_SCCB_IO;
221 MACIO_OUT32(OHARE_FCR, fcr);
222 macio->flags |= chan_mask;
223 UNLOCK(flags);
224 if (param & PMAC_SCC_FLAG_XMON)
225 macio->flags |= MACIO_FLAG_SCC_LOCKED;
226 } else {
227 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
228 return -EPERM;
229 LOCK(flags);
230 fcr = MACIO_IN32(OHARE_FCR);
231 if (chan_mask & MACIO_FLAG_SCCA_ON)
232 fcr &= ~OH_SCCA_IO;
233 if (chan_mask & MACIO_FLAG_SCCB_ON)
234 fcr &= ~OH_SCCB_IO;
235 MACIO_OUT32(OHARE_FCR, fcr);
236 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
237 fcr &= ~OH_SCC_ENABLE;
238 if (htw && trans)
239 fcr |= HRW_SCC_TRANS_EN_N;
240 MACIO_OUT32(OHARE_FCR, fcr);
241 }
242 macio->flags &= ~(chan_mask);
243 UNLOCK(flags);
244 mdelay(10);
245 #ifdef CONFIG_ADB_PMU
246 if ((param & 0xfff) == PMAC_SCC_IRDA)
247 pmu_enable_irled(0);
248 #endif /* CONFIG_ADB_PMU */
249 }
250 return 0;
251 }
252
253 static long ohare_floppy_enable(struct device_node *node, long param,
254 long value)
255 {
256 return simple_feature_tweak(node, macio_ohare,
257 OHARE_FCR, OH_FLOPPY_ENABLE, value);
258 }
259
260 static long ohare_mesh_enable(struct device_node *node, long param, long value)
261 {
262 return simple_feature_tweak(node, macio_ohare,
263 OHARE_FCR, OH_MESH_ENABLE, value);
264 }
265
266 static long ohare_ide_enable(struct device_node *node, long param, long value)
267 {
268 switch(param) {
269 case 0:
270 /* For some reason, setting the bit in set_initial_features()
271 * doesn't stick. I'm still investigating... --BenH.
272 */
273 if (value)
274 simple_feature_tweak(node, macio_ohare,
275 OHARE_FCR, OH_IOBUS_ENABLE, 1);
276 return simple_feature_tweak(node, macio_ohare,
277 OHARE_FCR, OH_IDE0_ENABLE, value);
278 case 1:
279 return simple_feature_tweak(node, macio_ohare,
280 OHARE_FCR, OH_BAY_IDE_ENABLE, value);
281 default:
282 return -ENODEV;
283 }
284 }
285
286 static long ohare_ide_reset(struct device_node *node, long param, long value)
287 {
288 switch(param) {
289 case 0:
290 return simple_feature_tweak(node, macio_ohare,
291 OHARE_FCR, OH_IDE0_RESET_N, !value);
292 case 1:
293 return simple_feature_tweak(node, macio_ohare,
294 OHARE_FCR, OH_IDE1_RESET_N, !value);
295 default:
296 return -ENODEV;
297 }
298 }
299
300 static long ohare_sleep_state(struct device_node *node, long param, long value)
301 {
302 struct macio_chip* macio = &macio_chips[0];
303
304 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
305 return -EPERM;
306 if (value == 1) {
307 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
308 } else if (value == 0) {
309 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
310 }
311
312 return 0;
313 }
314
315 static long heathrow_modem_enable(struct device_node *node, long param,
316 long value)
317 {
318 struct macio_chip* macio;
319 u8 gpio;
320 unsigned long flags;
321
322 macio = macio_find(node, macio_unknown);
323 if (!macio)
324 return -ENODEV;
325 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
326 if (!value) {
327 LOCK(flags);
328 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
329 UNLOCK(flags);
330 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
331 mdelay(250);
332 }
333 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
334 pmac_mb.model_id != PMAC_TYPE_YIKES) {
335 LOCK(flags);
336 if (value)
337 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
338 else
339 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
340 UNLOCK(flags);
341 (void)MACIO_IN32(HEATHROW_FCR);
342 mdelay(250);
343 }
344 if (value) {
345 LOCK(flags);
346 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
347 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
348 UNLOCK(flags); mdelay(250); LOCK(flags);
349 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
350 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
351 UNLOCK(flags); mdelay(250); LOCK(flags);
352 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
353 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
354 UNLOCK(flags); mdelay(250);
355 }
356 return 0;
357 }
358
359 static long heathrow_floppy_enable(struct device_node *node, long param,
360 long value)
361 {
362 return simple_feature_tweak(node, macio_unknown,
363 HEATHROW_FCR,
364 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
365 value);
366 }
367
368 static long heathrow_mesh_enable(struct device_node *node, long param,
369 long value)
370 {
371 struct macio_chip* macio;
372 unsigned long flags;
373
374 macio = macio_find(node, macio_unknown);
375 if (!macio)
376 return -ENODEV;
377 LOCK(flags);
378 /* Set clear mesh cell enable */
379 if (value)
380 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
381 else
382 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
383 (void)MACIO_IN32(HEATHROW_FCR);
384 udelay(10);
385 /* Set/Clear termination power */
386 if (value)
387 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
388 else
389 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
390 (void)MACIO_IN32(HEATHROW_MBCR);
391 udelay(10);
392 UNLOCK(flags);
393
394 return 0;
395 }
396
397 static long heathrow_ide_enable(struct device_node *node, long param,
398 long value)
399 {
400 switch(param) {
401 case 0:
402 return simple_feature_tweak(node, macio_unknown,
403 HEATHROW_FCR, HRW_IDE0_ENABLE, value);
404 case 1:
405 return simple_feature_tweak(node, macio_unknown,
406 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
407 default:
408 return -ENODEV;
409 }
410 }
411
412 static long heathrow_ide_reset(struct device_node *node, long param,
413 long value)
414 {
415 switch(param) {
416 case 0:
417 return simple_feature_tweak(node, macio_unknown,
418 HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
419 case 1:
420 return simple_feature_tweak(node, macio_unknown,
421 HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
422 default:
423 return -ENODEV;
424 }
425 }
426
427 static long heathrow_bmac_enable(struct device_node *node, long param,
428 long value)
429 {
430 struct macio_chip* macio;
431 unsigned long flags;
432
433 macio = macio_find(node, 0);
434 if (!macio)
435 return -ENODEV;
436 if (value) {
437 LOCK(flags);
438 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
439 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
440 UNLOCK(flags);
441 (void)MACIO_IN32(HEATHROW_FCR);
442 mdelay(10);
443 LOCK(flags);
444 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
445 UNLOCK(flags);
446 (void)MACIO_IN32(HEATHROW_FCR);
447 mdelay(10);
448 } else {
449 LOCK(flags);
450 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
451 UNLOCK(flags);
452 }
453 return 0;
454 }
455
456 static long heathrow_sound_enable(struct device_node *node, long param,
457 long value)
458 {
459 struct macio_chip* macio;
460 unsigned long flags;
461
462 /* B&W G3 and Yikes don't support that properly (the
463 * sound appear to never come back after beeing shut down).
464 */
465 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
466 pmac_mb.model_id == PMAC_TYPE_YIKES)
467 return 0;
468
469 macio = macio_find(node, 0);
470 if (!macio)
471 return -ENODEV;
472 if (value) {
473 LOCK(flags);
474 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
475 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
476 UNLOCK(flags);
477 (void)MACIO_IN32(HEATHROW_FCR);
478 } else {
479 LOCK(flags);
480 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
481 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
482 UNLOCK(flags);
483 }
484 return 0;
485 }
486
487 static u32 save_fcr[6];
488 static u32 save_mbcr;
489 static struct dbdma_regs save_dbdma[13];
490 static struct dbdma_regs save_alt_dbdma[13];
491
492 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save)
493 {
494 int i;
495
496 /* Save state & config of DBDMA channels */
497 for (i = 0; i < 13; i++) {
498 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
499 (macio->base + ((0x8000+i*0x100)>>2));
500 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
501 save[i].cmdptr = in_le32(&chan->cmdptr);
502 save[i].intr_sel = in_le32(&chan->intr_sel);
503 save[i].br_sel = in_le32(&chan->br_sel);
504 save[i].wait_sel = in_le32(&chan->wait_sel);
505 }
506 }
507
508 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save)
509 {
510 int i;
511
512 /* Save state & config of DBDMA channels */
513 for (i = 0; i < 13; i++) {
514 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
515 (macio->base + ((0x8000+i*0x100)>>2));
516 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
517 while (in_le32(&chan->status) & ACTIVE)
518 mb();
519 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
520 out_le32(&chan->cmdptr, save[i].cmdptr);
521 out_le32(&chan->intr_sel, save[i].intr_sel);
522 out_le32(&chan->br_sel, save[i].br_sel);
523 out_le32(&chan->wait_sel, save[i].wait_sel);
524 }
525 }
526
527 static void heathrow_sleep(struct macio_chip *macio, int secondary)
528 {
529 if (secondary) {
530 dbdma_save(macio, save_alt_dbdma);
531 save_fcr[2] = MACIO_IN32(0x38);
532 save_fcr[3] = MACIO_IN32(0x3c);
533 } else {
534 dbdma_save(macio, save_dbdma);
535 save_fcr[0] = MACIO_IN32(0x38);
536 save_fcr[1] = MACIO_IN32(0x3c);
537 save_mbcr = MACIO_IN32(0x34);
538 /* Make sure sound is shut down */
539 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
540 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
541 /* This seems to be necessary as well or the fan
542 * keeps coming up and battery drains fast */
543 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
544 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
545 /* Make sure eth is down even if module or sleep
546 * won't work properly */
547 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
548 }
549 /* Make sure modem is shut down */
550 MACIO_OUT8(HRW_GPIO_MODEM_RESET,
551 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
552 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
553 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
554
555 /* Let things settle */
556 (void)MACIO_IN32(HEATHROW_FCR);
557 }
558
559 static void heathrow_wakeup(struct macio_chip *macio, int secondary)
560 {
561 if (secondary) {
562 MACIO_OUT32(0x38, save_fcr[2]);
563 (void)MACIO_IN32(0x38);
564 mdelay(1);
565 MACIO_OUT32(0x3c, save_fcr[3]);
566 (void)MACIO_IN32(0x38);
567 mdelay(10);
568 dbdma_restore(macio, save_alt_dbdma);
569 } else {
570 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
571 (void)MACIO_IN32(0x38);
572 mdelay(1);
573 MACIO_OUT32(0x3c, save_fcr[1]);
574 (void)MACIO_IN32(0x38);
575 mdelay(1);
576 MACIO_OUT32(0x34, save_mbcr);
577 (void)MACIO_IN32(0x38);
578 mdelay(10);
579 dbdma_restore(macio, save_dbdma);
580 }
581 }
582
583 static long heathrow_sleep_state(struct device_node *node, long param,
584 long value)
585 {
586 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
587 return -EPERM;
588 if (value == 1) {
589 if (macio_chips[1].type == macio_gatwick)
590 heathrow_sleep(&macio_chips[0], 1);
591 heathrow_sleep(&macio_chips[0], 0);
592 } else if (value == 0) {
593 heathrow_wakeup(&macio_chips[0], 0);
594 if (macio_chips[1].type == macio_gatwick)
595 heathrow_wakeup(&macio_chips[0], 1);
596 }
597 return 0;
598 }
599
600 static long core99_scc_enable(struct device_node *node, long param, long value)
601 {
602 struct macio_chip* macio;
603 unsigned long flags;
604 unsigned long chan_mask;
605 u32 fcr;
606
607 macio = macio_find(node, 0);
608 if (!macio)
609 return -ENODEV;
610 if (!strcmp(node->name, "ch-a"))
611 chan_mask = MACIO_FLAG_SCCA_ON;
612 else if (!strcmp(node->name, "ch-b"))
613 chan_mask = MACIO_FLAG_SCCB_ON;
614 else
615 return -ENODEV;
616
617 if (value) {
618 int need_reset_scc = 0;
619 int need_reset_irda = 0;
620
621 LOCK(flags);
622 fcr = MACIO_IN32(KEYLARGO_FCR0);
623 /* Check if scc cell need enabling */
624 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
625 fcr |= KL0_SCC_CELL_ENABLE;
626 need_reset_scc = 1;
627 }
628 if (chan_mask & MACIO_FLAG_SCCA_ON) {
629 fcr |= KL0_SCCA_ENABLE;
630 /* Don't enable line drivers for I2S modem */
631 if ((param & 0xfff) == PMAC_SCC_I2S1)
632 fcr &= ~KL0_SCC_A_INTF_ENABLE;
633 else
634 fcr |= KL0_SCC_A_INTF_ENABLE;
635 }
636 if (chan_mask & MACIO_FLAG_SCCB_ON) {
637 fcr |= KL0_SCCB_ENABLE;
638 /* Perform irda specific inits */
639 if ((param & 0xfff) == PMAC_SCC_IRDA) {
640 fcr &= ~KL0_SCC_B_INTF_ENABLE;
641 fcr |= KL0_IRDA_ENABLE;
642 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
643 fcr |= KL0_IRDA_SOURCE1_SEL;
644 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
645 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
646 need_reset_irda = 1;
647 } else
648 fcr |= KL0_SCC_B_INTF_ENABLE;
649 }
650 MACIO_OUT32(KEYLARGO_FCR0, fcr);
651 macio->flags |= chan_mask;
652 if (need_reset_scc) {
653 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
654 (void)MACIO_IN32(KEYLARGO_FCR0);
655 UNLOCK(flags);
656 mdelay(15);
657 LOCK(flags);
658 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
659 }
660 if (need_reset_irda) {
661 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
662 (void)MACIO_IN32(KEYLARGO_FCR0);
663 UNLOCK(flags);
664 mdelay(15);
665 LOCK(flags);
666 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
667 }
668 UNLOCK(flags);
669 if (param & PMAC_SCC_FLAG_XMON)
670 macio->flags |= MACIO_FLAG_SCC_LOCKED;
671 } else {
672 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
673 return -EPERM;
674 LOCK(flags);
675 fcr = MACIO_IN32(KEYLARGO_FCR0);
676 if (chan_mask & MACIO_FLAG_SCCA_ON)
677 fcr &= ~KL0_SCCA_ENABLE;
678 if (chan_mask & MACIO_FLAG_SCCB_ON) {
679 fcr &= ~KL0_SCCB_ENABLE;
680 /* Perform irda specific clears */
681 if ((param & 0xfff) == PMAC_SCC_IRDA) {
682 fcr &= ~KL0_IRDA_ENABLE;
683 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
684 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
685 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
686 }
687 }
688 MACIO_OUT32(KEYLARGO_FCR0, fcr);
689 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
690 fcr &= ~KL0_SCC_CELL_ENABLE;
691 MACIO_OUT32(KEYLARGO_FCR0, fcr);
692 }
693 macio->flags &= ~(chan_mask);
694 UNLOCK(flags);
695 mdelay(10);
696 }
697 return 0;
698 }
699
700 static long
701 core99_modem_enable(struct device_node *node, long param, long value)
702 {
703 struct macio_chip* macio;
704 u8 gpio;
705 unsigned long flags;
706
707 /* Hack for internal USB modem */
708 if (node == NULL) {
709 if (macio_chips[0].type != macio_keylargo)
710 return -ENODEV;
711 node = macio_chips[0].of_node;
712 }
713 macio = macio_find(node, 0);
714 if (!macio)
715 return -ENODEV;
716 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
717 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
718 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
719
720 if (!value) {
721 LOCK(flags);
722 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
723 UNLOCK(flags);
724 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
725 mdelay(250);
726 }
727 LOCK(flags);
728 if (value) {
729 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
730 UNLOCK(flags);
731 (void)MACIO_IN32(KEYLARGO_FCR2);
732 mdelay(250);
733 } else {
734 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
735 UNLOCK(flags);
736 }
737 if (value) {
738 LOCK(flags);
739 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
740 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
741 UNLOCK(flags); mdelay(250); LOCK(flags);
742 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
743 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
744 UNLOCK(flags); mdelay(250); LOCK(flags);
745 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
746 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
747 UNLOCK(flags); mdelay(250);
748 }
749 return 0;
750 }
751
752 static long
753 pangea_modem_enable(struct device_node *node, long param, long value)
754 {
755 struct macio_chip* macio;
756 u8 gpio;
757 unsigned long flags;
758
759 /* Hack for internal USB modem */
760 if (node == NULL) {
761 if (macio_chips[0].type != macio_pangea &&
762 macio_chips[0].type != macio_intrepid)
763 return -ENODEV;
764 node = macio_chips[0].of_node;
765 }
766 macio = macio_find(node, 0);
767 if (!macio)
768 return -ENODEV;
769 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
770 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
771 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
772
773 if (!value) {
774 LOCK(flags);
775 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
776 UNLOCK(flags);
777 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
778 mdelay(250);
779 }
780 LOCK(flags);
781 if (value) {
782 MACIO_OUT8(KL_GPIO_MODEM_POWER,
783 KEYLARGO_GPIO_OUTPUT_ENABLE);
784 UNLOCK(flags);
785 (void)MACIO_IN32(KEYLARGO_FCR2);
786 mdelay(250);
787 } else {
788 MACIO_OUT8(KL_GPIO_MODEM_POWER,
789 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
790 UNLOCK(flags);
791 }
792 if (value) {
793 LOCK(flags);
794 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
795 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
796 UNLOCK(flags); mdelay(250); LOCK(flags);
797 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
798 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
799 UNLOCK(flags); mdelay(250); LOCK(flags);
800 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
801 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
802 UNLOCK(flags); mdelay(250);
803 }
804 return 0;
805 }
806
807 static long
808 core99_ata100_enable(struct device_node *node, long value)
809 {
810 unsigned long flags;
811 struct pci_dev *pdev = NULL;
812 u8 pbus, pid;
813 int rc;
814
815 if (uninorth_rev < 0x24)
816 return -ENODEV;
817
818 LOCK(flags);
819 if (value)
820 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
821 else
822 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
823 (void)UN_IN(UNI_N_CLOCK_CNTL);
824 UNLOCK(flags);
825 udelay(20);
826
827 if (value) {
828 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
829 pdev = pci_find_slot(pbus, pid);
830 if (pdev == NULL)
831 return 0;
832 rc = pci_enable_device(pdev);
833 if (rc)
834 return rc;
835 pci_set_master(pdev);
836 }
837 return 0;
838 }
839
840 static long
841 core99_ide_enable(struct device_node *node, long param, long value)
842 {
843 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
844 * based ata-100
845 */
846 switch(param) {
847 case 0:
848 return simple_feature_tweak(node, macio_unknown,
849 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
850 case 1:
851 return simple_feature_tweak(node, macio_unknown,
852 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
853 case 2:
854 return simple_feature_tweak(node, macio_unknown,
855 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
856 case 3:
857 return core99_ata100_enable(node, value);
858 default:
859 return -ENODEV;
860 }
861 }
862
863 static long
864 core99_ide_reset(struct device_node *node, long param, long value)
865 {
866 switch(param) {
867 case 0:
868 return simple_feature_tweak(node, macio_unknown,
869 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
870 case 1:
871 return simple_feature_tweak(node, macio_unknown,
872 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
873 case 2:
874 return simple_feature_tweak(node, macio_unknown,
875 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
876 default:
877 return -ENODEV;
878 }
879 }
880
881 static long
882 core99_gmac_enable(struct device_node *node, long param, long value)
883 {
884 unsigned long flags;
885
886 LOCK(flags);
887 if (value)
888 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
889 else
890 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
891 (void)UN_IN(UNI_N_CLOCK_CNTL);
892 UNLOCK(flags);
893 udelay(20);
894
895 return 0;
896 }
897
898 static long
899 core99_gmac_phy_reset(struct device_node *node, long param, long value)
900 {
901 unsigned long flags;
902 struct macio_chip *macio;
903
904 macio = &macio_chips[0];
905 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
906 macio->type != macio_intrepid)
907 return -ENODEV;
908
909 LOCK(flags);
910 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
911 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
912 UNLOCK(flags);
913 mdelay(10);
914 LOCK(flags);
915 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
916 KEYLARGO_GPIO_OUTOUT_DATA);
917 UNLOCK(flags);
918 mdelay(10);
919
920 return 0;
921 }
922
923 static long
924 core99_sound_chip_enable(struct device_node *node, long param, long value)
925 {
926 struct macio_chip* macio;
927 unsigned long flags;
928
929 macio = macio_find(node, 0);
930 if (!macio)
931 return -ENODEV;
932
933 /* Do a better probe code, screamer G4 desktops &
934 * iMacs can do that too, add a recalibrate in
935 * the driver as well
936 */
937 if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
938 pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
939 LOCK(flags);
940 if (value)
941 MACIO_OUT8(KL_GPIO_SOUND_POWER,
942 KEYLARGO_GPIO_OUTPUT_ENABLE |
943 KEYLARGO_GPIO_OUTOUT_DATA);
944 else
945 MACIO_OUT8(KL_GPIO_SOUND_POWER,
946 KEYLARGO_GPIO_OUTPUT_ENABLE);
947 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
948 UNLOCK(flags);
949 }
950 return 0;
951 }
952
953 static long
954 core99_airport_enable(struct device_node *node, long param, long value)
955 {
956 struct macio_chip* macio;
957 unsigned long flags;
958 int state;
959
960 macio = macio_find(node, 0);
961 if (!macio)
962 return -ENODEV;
963
964 /* Hint: we allow passing of macio itself for the sake of the
965 * sleep code
966 */
967 if (node != macio->of_node &&
968 (!node->parent || node->parent != macio->of_node))
969 return -ENODEV;
970 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
971 if (value == state)
972 return 0;
973 if (value) {
974 /* This code is a reproduction of OF enable-cardslot
975 * and init-wireless methods, slightly hacked until
976 * I got it working.
977 */
978 LOCK(flags);
979 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
980 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
981 UNLOCK(flags);
982 mdelay(10);
983 LOCK(flags);
984 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
985 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
986 UNLOCK(flags);
987
988 mdelay(10);
989
990 LOCK(flags);
991 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
992 (void)MACIO_IN32(KEYLARGO_FCR2);
993 udelay(10);
994 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
995 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
996 udelay(10);
997 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
998 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
999 udelay(10);
1000 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1001 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1002 udelay(10);
1003 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1004 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1005 udelay(10);
1006 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1007 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1008 UNLOCK(flags);
1009 udelay(10);
1010 MACIO_OUT32(0x1c000, 0);
1011 mdelay(1);
1012 MACIO_OUT8(0x1a3e0, 0x41);
1013 (void)MACIO_IN8(0x1a3e0);
1014 udelay(10);
1015 LOCK(flags);
1016 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1017 (void)MACIO_IN32(KEYLARGO_FCR2);
1018 UNLOCK(flags);
1019 mdelay(100);
1020
1021 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1022 } else {
1023 LOCK(flags);
1024 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1025 (void)MACIO_IN32(KEYLARGO_FCR2);
1026 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1027 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1028 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1029 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1030 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1031 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1032 UNLOCK(flags);
1033
1034 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1035 }
1036 return 0;
1037 }
1038
1039 #ifdef CONFIG_SMP
1040 static long
1041 core99_reset_cpu(struct device_node *node, long param, long value)
1042 {
1043 unsigned int reset_io = 0;
1044 unsigned long flags;
1045 struct macio_chip *macio;
1046 struct device_node *np;
1047 struct device_node *cpus;
1048 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0,
1049 KL_GPIO_RESET_CPU1,
1050 KL_GPIO_RESET_CPU2,
1051 KL_GPIO_RESET_CPU3 };
1052
1053 macio = &macio_chips[0];
1054 if (macio->type != macio_keylargo)
1055 return -ENODEV;
1056
1057 cpus = of_find_node_by_path("/cpus");
1058 if (cpus == NULL)
1059 return -ENODEV;
1060 for (np = cpus->child; np != NULL; np = np->sibling) {
1061 const u32 *num = of_get_property(np, "reg", NULL);
1062 const u32 *rst = of_get_property(np, "soft-reset", NULL);
1063 if (num == NULL || rst == NULL)
1064 continue;
1065 if (param == *num) {
1066 reset_io = *rst;
1067 break;
1068 }
1069 }
1070 of_node_put(cpus);
1071 if (np == NULL || reset_io == 0)
1072 reset_io = dflt_reset_lines[param];
1073
1074 LOCK(flags);
1075 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1076 (void)MACIO_IN8(reset_io);
1077 udelay(1);
1078 MACIO_OUT8(reset_io, 0);
1079 (void)MACIO_IN8(reset_io);
1080 UNLOCK(flags);
1081
1082 return 0;
1083 }
1084 #endif /* CONFIG_SMP */
1085
1086 static long
1087 core99_usb_enable(struct device_node *node, long param, long value)
1088 {
1089 struct macio_chip *macio;
1090 unsigned long flags;
1091 const char *prop;
1092 int number;
1093 u32 reg;
1094
1095 macio = &macio_chips[0];
1096 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1097 macio->type != macio_intrepid)
1098 return -ENODEV;
1099
1100 prop = of_get_property(node, "AAPL,clock-id", NULL);
1101 if (!prop)
1102 return -ENODEV;
1103 if (strncmp(prop, "usb0u048", 8) == 0)
1104 number = 0;
1105 else if (strncmp(prop, "usb1u148", 8) == 0)
1106 number = 2;
1107 else if (strncmp(prop, "usb2u248", 8) == 0)
1108 number = 4;
1109 else
1110 return -ENODEV;
1111
1112 /* Sorry for the brute-force locking, but this is only used during
1113 * sleep and the timing seem to be critical
1114 */
1115 LOCK(flags);
1116 if (value) {
1117 /* Turn ON */
1118 if (number == 0) {
1119 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1120 (void)MACIO_IN32(KEYLARGO_FCR0);
1121 UNLOCK(flags);
1122 mdelay(1);
1123 LOCK(flags);
1124 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1125 } else if (number == 2) {
1126 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1127 UNLOCK(flags);
1128 (void)MACIO_IN32(KEYLARGO_FCR0);
1129 mdelay(1);
1130 LOCK(flags);
1131 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1132 } else if (number == 4) {
1133 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1134 UNLOCK(flags);
1135 (void)MACIO_IN32(KEYLARGO_FCR1);
1136 mdelay(1);
1137 LOCK(flags);
1138 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1139 }
1140 if (number < 4) {
1141 reg = MACIO_IN32(KEYLARGO_FCR4);
1142 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1143 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1144 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1145 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1146 MACIO_OUT32(KEYLARGO_FCR4, reg);
1147 (void)MACIO_IN32(KEYLARGO_FCR4);
1148 udelay(10);
1149 } else {
1150 reg = MACIO_IN32(KEYLARGO_FCR3);
1151 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1152 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1153 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1154 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1155 MACIO_OUT32(KEYLARGO_FCR3, reg);
1156 (void)MACIO_IN32(KEYLARGO_FCR3);
1157 udelay(10);
1158 }
1159 if (macio->type == macio_intrepid) {
1160 /* wait for clock stopped bits to clear */
1161 u32 test0 = 0, test1 = 0;
1162 u32 status0, status1;
1163 int timeout = 1000;
1164
1165 UNLOCK(flags);
1166 switch (number) {
1167 case 0:
1168 test0 = UNI_N_CLOCK_STOPPED_USB0;
1169 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1170 break;
1171 case 2:
1172 test0 = UNI_N_CLOCK_STOPPED_USB1;
1173 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1174 break;
1175 case 4:
1176 test0 = UNI_N_CLOCK_STOPPED_USB2;
1177 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1178 break;
1179 }
1180 do {
1181 if (--timeout <= 0) {
1182 printk(KERN_ERR "core99_usb_enable: "
1183 "Timeout waiting for clocks\n");
1184 break;
1185 }
1186 mdelay(1);
1187 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1188 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1189 } while ((status0 & test0) | (status1 & test1));
1190 LOCK(flags);
1191 }
1192 } else {
1193 /* Turn OFF */
1194 if (number < 4) {
1195 reg = MACIO_IN32(KEYLARGO_FCR4);
1196 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1197 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1198 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1199 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1200 MACIO_OUT32(KEYLARGO_FCR4, reg);
1201 (void)MACIO_IN32(KEYLARGO_FCR4);
1202 udelay(1);
1203 } else {
1204 reg = MACIO_IN32(KEYLARGO_FCR3);
1205 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1206 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1207 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1208 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1209 MACIO_OUT32(KEYLARGO_FCR3, reg);
1210 (void)MACIO_IN32(KEYLARGO_FCR3);
1211 udelay(1);
1212 }
1213 if (number == 0) {
1214 if (macio->type != macio_intrepid)
1215 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1216 (void)MACIO_IN32(KEYLARGO_FCR0);
1217 udelay(1);
1218 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1219 (void)MACIO_IN32(KEYLARGO_FCR0);
1220 } else if (number == 2) {
1221 if (macio->type != macio_intrepid)
1222 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1223 (void)MACIO_IN32(KEYLARGO_FCR0);
1224 udelay(1);
1225 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1226 (void)MACIO_IN32(KEYLARGO_FCR0);
1227 } else if (number == 4) {
1228 udelay(1);
1229 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1230 (void)MACIO_IN32(KEYLARGO_FCR1);
1231 }
1232 udelay(1);
1233 }
1234 UNLOCK(flags);
1235
1236 return 0;
1237 }
1238
1239 static long
1240 core99_firewire_enable(struct device_node *node, long param, long value)
1241 {
1242 unsigned long flags;
1243 struct macio_chip *macio;
1244
1245 macio = &macio_chips[0];
1246 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1247 macio->type != macio_intrepid)
1248 return -ENODEV;
1249 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1250 return -ENODEV;
1251
1252 LOCK(flags);
1253 if (value) {
1254 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1255 (void)UN_IN(UNI_N_CLOCK_CNTL);
1256 } else {
1257 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1258 (void)UN_IN(UNI_N_CLOCK_CNTL);
1259 }
1260 UNLOCK(flags);
1261 mdelay(1);
1262
1263 return 0;
1264 }
1265
1266 static long
1267 core99_firewire_cable_power(struct device_node *node, long param, long value)
1268 {
1269 unsigned long flags;
1270 struct macio_chip *macio;
1271
1272 /* Trick: we allow NULL node */
1273 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1274 return -ENODEV;
1275 macio = &macio_chips[0];
1276 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1277 macio->type != macio_intrepid)
1278 return -ENODEV;
1279 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1280 return -ENODEV;
1281
1282 LOCK(flags);
1283 if (value) {
1284 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1285 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1286 udelay(10);
1287 } else {
1288 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1289 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1290 }
1291 UNLOCK(flags);
1292 mdelay(1);
1293
1294 return 0;
1295 }
1296
1297 static long
1298 intrepid_aack_delay_enable(struct device_node *node, long param, long value)
1299 {
1300 unsigned long flags;
1301
1302 if (uninorth_rev < 0xd2)
1303 return -ENODEV;
1304
1305 LOCK(flags);
1306 if (param)
1307 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1308 else
1309 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1310 UNLOCK(flags);
1311
1312 return 0;
1313 }
1314
1315
1316 #endif /* CONFIG_POWER4 */
1317
1318 static long
1319 core99_read_gpio(struct device_node *node, long param, long value)
1320 {
1321 struct macio_chip *macio = &macio_chips[0];
1322
1323 return MACIO_IN8(param);
1324 }
1325
1326
1327 static long
1328 core99_write_gpio(struct device_node *node, long param, long value)
1329 {
1330 struct macio_chip *macio = &macio_chips[0];
1331
1332 MACIO_OUT8(param, (u8)(value & 0xff));
1333 return 0;
1334 }
1335
1336 #ifdef CONFIG_POWER4
1337 static long g5_gmac_enable(struct device_node *node, long param, long value)
1338 {
1339 struct macio_chip *macio = &macio_chips[0];
1340 unsigned long flags;
1341
1342 if (node == NULL)
1343 return -ENODEV;
1344
1345 LOCK(flags);
1346 if (value) {
1347 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1348 mb();
1349 k2_skiplist[0] = NULL;
1350 } else {
1351 k2_skiplist[0] = node;
1352 mb();
1353 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1354 }
1355
1356 UNLOCK(flags);
1357 mdelay(1);
1358
1359 return 0;
1360 }
1361
1362 static long g5_fw_enable(struct device_node *node, long param, long value)
1363 {
1364 struct macio_chip *macio = &macio_chips[0];
1365 unsigned long flags;
1366
1367 if (node == NULL)
1368 return -ENODEV;
1369
1370 LOCK(flags);
1371 if (value) {
1372 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1373 mb();
1374 k2_skiplist[1] = NULL;
1375 } else {
1376 k2_skiplist[1] = node;
1377 mb();
1378 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1379 }
1380
1381 UNLOCK(flags);
1382 mdelay(1);
1383
1384 return 0;
1385 }
1386
1387 static long g5_mpic_enable(struct device_node *node, long param, long value)
1388 {
1389 unsigned long flags;
1390 struct device_node *parent = of_get_parent(node);
1391 int is_u3;
1392
1393 if (parent == NULL)
1394 return 0;
1395 is_u3 = strcmp(parent->name, "u3") == 0 ||
1396 strcmp(parent->name, "u4") == 0;
1397 of_node_put(parent);
1398 if (!is_u3)
1399 return 0;
1400
1401 LOCK(flags);
1402 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1403 UNLOCK(flags);
1404
1405 return 0;
1406 }
1407
1408 static long g5_eth_phy_reset(struct device_node *node, long param, long value)
1409 {
1410 struct macio_chip *macio = &macio_chips[0];
1411 struct device_node *phy;
1412 int need_reset;
1413
1414 /*
1415 * We must not reset the combo PHYs, only the BCM5221 found in
1416 * the iMac G5.
1417 */
1418 phy = of_get_next_child(node, NULL);
1419 if (!phy)
1420 return -ENODEV;
1421 need_reset = of_device_is_compatible(phy, "B5221");
1422 of_node_put(phy);
1423 if (!need_reset)
1424 return 0;
1425
1426 /* PHY reset is GPIO 29, not in device-tree unfortunately */
1427 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
1428 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
1429 /* Thankfully, this is now always called at a time when we can
1430 * schedule by sungem.
1431 */
1432 msleep(10);
1433 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
1434
1435 return 0;
1436 }
1437
1438 static long g5_i2s_enable(struct device_node *node, long param, long value)
1439 {
1440 /* Very crude implementation for now */
1441 struct macio_chip *macio = &macio_chips[0];
1442 unsigned long flags;
1443 int cell;
1444 u32 fcrs[3][3] = {
1445 { 0,
1446 K2_FCR1_I2S0_CELL_ENABLE |
1447 K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE,
1448 KL3_I2S0_CLK18_ENABLE
1449 },
1450 { KL0_SCC_A_INTF_ENABLE,
1451 K2_FCR1_I2S1_CELL_ENABLE |
1452 K2_FCR1_I2S1_CLK_ENABLE_BIT | K2_FCR1_I2S1_ENABLE,
1453 KL3_I2S1_CLK18_ENABLE
1454 },
1455 { KL0_SCC_B_INTF_ENABLE,
1456 SH_FCR1_I2S2_CELL_ENABLE |
1457 SH_FCR1_I2S2_CLK_ENABLE_BIT | SH_FCR1_I2S2_ENABLE,
1458 SH_FCR3_I2S2_CLK18_ENABLE
1459 },
1460 };
1461
1462 if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1463 return -ENODEV;
1464 if (strncmp(node->name, "i2s-", 4))
1465 return -ENODEV;
1466 cell = node->name[4] - 'a';
1467 switch(cell) {
1468 case 0:
1469 case 1:
1470 break;
1471 case 2:
1472 if (macio->type == macio_shasta)
1473 break;
1474 default:
1475 return -ENODEV;
1476 }
1477
1478 LOCK(flags);
1479 if (value) {
1480 MACIO_BIC(KEYLARGO_FCR0, fcrs[cell][0]);
1481 MACIO_BIS(KEYLARGO_FCR1, fcrs[cell][1]);
1482 MACIO_BIS(KEYLARGO_FCR3, fcrs[cell][2]);
1483 } else {
1484 MACIO_BIC(KEYLARGO_FCR3, fcrs[cell][2]);
1485 MACIO_BIC(KEYLARGO_FCR1, fcrs[cell][1]);
1486 MACIO_BIS(KEYLARGO_FCR0, fcrs[cell][0]);
1487 }
1488 udelay(10);
1489 UNLOCK(flags);
1490
1491 return 0;
1492 }
1493
1494
1495 #ifdef CONFIG_SMP
1496 static long g5_reset_cpu(struct device_node *node, long param, long value)
1497 {
1498 unsigned int reset_io = 0;
1499 unsigned long flags;
1500 struct macio_chip *macio;
1501 struct device_node *np;
1502 struct device_node *cpus;
1503
1504 macio = &macio_chips[0];
1505 if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1506 return -ENODEV;
1507
1508 cpus = of_find_node_by_path("/cpus");
1509 if (cpus == NULL)
1510 return -ENODEV;
1511 for (np = cpus->child; np != NULL; np = np->sibling) {
1512 const u32 *num = of_get_property(np, "reg", NULL);
1513 const u32 *rst = of_get_property(np, "soft-reset", NULL);
1514 if (num == NULL || rst == NULL)
1515 continue;
1516 if (param == *num) {
1517 reset_io = *rst;
1518 break;
1519 }
1520 }
1521 of_node_put(cpus);
1522 if (np == NULL || reset_io == 0)
1523 return -ENODEV;
1524
1525 LOCK(flags);
1526 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1527 (void)MACIO_IN8(reset_io);
1528 udelay(1);
1529 MACIO_OUT8(reset_io, 0);
1530 (void)MACIO_IN8(reset_io);
1531 UNLOCK(flags);
1532
1533 return 0;
1534 }
1535 #endif /* CONFIG_SMP */
1536
1537 /*
1538 * This can be called from pmac_smp so isn't static
1539 *
1540 * This takes the second CPU off the bus on dual CPU machines
1541 * running UP
1542 */
1543 void g5_phy_disable_cpu1(void)
1544 {
1545 if (uninorth_maj == 3)
1546 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1547 }
1548 #endif /* CONFIG_POWER4 */
1549
1550 #ifndef CONFIG_POWER4
1551
1552
1553 #ifdef CONFIG_PM
1554 static u32 save_gpio_levels[2];
1555 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
1556 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
1557 static u32 save_unin_clock_ctl;
1558
1559 static void keylargo_shutdown(struct macio_chip *macio, int sleep_mode)
1560 {
1561 u32 temp;
1562
1563 if (sleep_mode) {
1564 mdelay(1);
1565 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1566 (void)MACIO_IN32(KEYLARGO_FCR0);
1567 mdelay(1);
1568 }
1569
1570 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1571 KL0_SCC_CELL_ENABLE |
1572 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1573 KL0_IRDA_CLK19_ENABLE);
1574
1575 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1576 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1577
1578 MACIO_BIC(KEYLARGO_FCR1,
1579 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1580 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1581 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1582 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1583 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1584 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1585 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1586 KL1_UIDE_ENABLE);
1587
1588 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1589 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1590
1591 temp = MACIO_IN32(KEYLARGO_FCR3);
1592 if (macio->rev >= 2) {
1593 temp |= KL3_SHUTDOWN_PLL2X;
1594 if (sleep_mode)
1595 temp |= KL3_SHUTDOWN_PLL_TOTAL;
1596 }
1597
1598 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1599 KL3_SHUTDOWN_PLLKW35;
1600 if (sleep_mode)
1601 temp |= KL3_SHUTDOWN_PLLKW12;
1602 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1603 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1604 if (sleep_mode)
1605 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1606 MACIO_OUT32(KEYLARGO_FCR3, temp);
1607
1608 /* Flush posted writes & wait a bit */
1609 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1610 }
1611
1612 static void pangea_shutdown(struct macio_chip *macio, int sleep_mode)
1613 {
1614 u32 temp;
1615
1616 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1617 KL0_SCC_CELL_ENABLE |
1618 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1619
1620 MACIO_BIC(KEYLARGO_FCR1,
1621 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1622 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1623 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1624 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1625 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1626 KL1_UIDE_ENABLE);
1627 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1628 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1629
1630 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1631
1632 temp = MACIO_IN32(KEYLARGO_FCR3);
1633 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1634 KL3_SHUTDOWN_PLLKW35;
1635 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1636 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1637 if (sleep_mode)
1638 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1639 MACIO_OUT32(KEYLARGO_FCR3, temp);
1640
1641 /* Flush posted writes & wait a bit */
1642 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1643 }
1644
1645 static void intrepid_shutdown(struct macio_chip *macio, int sleep_mode)
1646 {
1647 u32 temp;
1648
1649 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1650 KL0_SCC_CELL_ENABLE);
1651
1652 MACIO_BIC(KEYLARGO_FCR1,
1653 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1654 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1655 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1656 KL1_EIDE0_ENABLE);
1657 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1658 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1659
1660 temp = MACIO_IN32(KEYLARGO_FCR3);
1661 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1662 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1663 if (sleep_mode)
1664 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1665 MACIO_OUT32(KEYLARGO_FCR3, temp);
1666
1667 /* Flush posted writes & wait a bit */
1668 (void)MACIO_IN32(KEYLARGO_FCR0);
1669 mdelay(10);
1670 }
1671
1672
1673 static int
1674 core99_sleep(void)
1675 {
1676 struct macio_chip *macio;
1677 int i;
1678
1679 macio = &macio_chips[0];
1680 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1681 macio->type != macio_intrepid)
1682 return -ENODEV;
1683
1684 /* We power off the wireless slot in case it was not done
1685 * by the driver. We don't power it on automatically however
1686 */
1687 if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1688 core99_airport_enable(macio->of_node, 0, 0);
1689
1690 /* We power off the FW cable. Should be done by the driver... */
1691 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1692 core99_firewire_enable(NULL, 0, 0);
1693 core99_firewire_cable_power(NULL, 0, 0);
1694 }
1695
1696 /* We make sure int. modem is off (in case driver lost it) */
1697 if (macio->type == macio_keylargo)
1698 core99_modem_enable(macio->of_node, 0, 0);
1699 else
1700 pangea_modem_enable(macio->of_node, 0, 0);
1701
1702 /* We make sure the sound is off as well */
1703 core99_sound_chip_enable(macio->of_node, 0, 0);
1704
1705 /*
1706 * Save various bits of KeyLargo
1707 */
1708
1709 /* Save the state of the various GPIOs */
1710 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1711 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1712 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1713 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1714 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1715 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1716
1717 /* Save the FCRs */
1718 if (macio->type == macio_keylargo)
1719 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1720 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1721 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1722 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1723 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1724 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1725 if (macio->type == macio_pangea || macio->type == macio_intrepid)
1726 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1727
1728 /* Save state & config of DBDMA channels */
1729 dbdma_save(macio, save_dbdma);
1730
1731 /*
1732 * Turn off as much as we can
1733 */
1734 if (macio->type == macio_pangea)
1735 pangea_shutdown(macio, 1);
1736 else if (macio->type == macio_intrepid)
1737 intrepid_shutdown(macio, 1);
1738 else if (macio->type == macio_keylargo)
1739 keylargo_shutdown(macio, 1);
1740
1741 /*
1742 * Put the host bridge to sleep
1743 */
1744
1745 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1746 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1747 * enabled !
1748 */
1749 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1750 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1751 udelay(100);
1752 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1753 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1754 mdelay(10);
1755
1756 /*
1757 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1758 */
1759 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1760 MACIO_BIS(0x506e0, 0x00400000);
1761 MACIO_BIS(0x506e0, 0x80000000);
1762 }
1763 return 0;
1764 }
1765
1766 static int
1767 core99_wake_up(void)
1768 {
1769 struct macio_chip *macio;
1770 int i;
1771
1772 macio = &macio_chips[0];
1773 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1774 macio->type != macio_intrepid)
1775 return -ENODEV;
1776
1777 /*
1778 * Wakeup the host bridge
1779 */
1780 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1781 udelay(10);
1782 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1783 udelay(10);
1784
1785 /*
1786 * Restore KeyLargo
1787 */
1788
1789 if (macio->type == macio_keylargo) {
1790 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1791 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1792 }
1793 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1794 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1795 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1796 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1797 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1798 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1799 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1800 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1801 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1802 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1803 if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1804 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1805 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1806 }
1807
1808 dbdma_restore(macio, save_dbdma);
1809
1810 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1811 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1812 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1813 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1814 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1815 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1816
1817 /* FIXME more black magic with OpenPIC ... */
1818 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1819 MACIO_BIC(0x506e0, 0x00400000);
1820 MACIO_BIC(0x506e0, 0x80000000);
1821 }
1822
1823 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1824 udelay(100);
1825
1826 return 0;
1827 }
1828
1829 #endif /* CONFIG_PM */
1830
1831 static long
1832 core99_sleep_state(struct device_node *node, long param, long value)
1833 {
1834 /* Param == 1 means to enter the "fake sleep" mode that is
1835 * used for CPU speed switch
1836 */
1837 if (param == 1) {
1838 if (value == 1) {
1839 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1840 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1841 } else {
1842 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1843 udelay(10);
1844 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1845 udelay(10);
1846 }
1847 return 0;
1848 }
1849 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1850 return -EPERM;
1851
1852 #ifdef CONFIG_PM
1853 if (value == 1)
1854 return core99_sleep();
1855 else if (value == 0)
1856 return core99_wake_up();
1857
1858 #endif /* CONFIG_PM */
1859 return 0;
1860 }
1861
1862 #endif /* CONFIG_POWER4 */
1863
1864 static long
1865 generic_dev_can_wake(struct device_node *node, long param, long value)
1866 {
1867 /* Todo: eventually check we are really dealing with on-board
1868 * video device ...
1869 */
1870
1871 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1872 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1873 return 0;
1874 }
1875
1876 static long generic_get_mb_info(struct device_node *node, long param, long value)
1877 {
1878 switch(param) {
1879 case PMAC_MB_INFO_MODEL:
1880 return pmac_mb.model_id;
1881 case PMAC_MB_INFO_FLAGS:
1882 return pmac_mb.board_flags;
1883 case PMAC_MB_INFO_NAME:
1884 /* hack hack hack... but should work */
1885 *((const char **)value) = pmac_mb.model_name;
1886 return 0;
1887 }
1888 return -EINVAL;
1889 }
1890
1891
1892 /*
1893 * Table definitions
1894 */
1895
1896 /* Used on any machine
1897 */
1898 static struct feature_table_entry any_features[] = {
1899 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1900 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1901 { 0, NULL }
1902 };
1903
1904 #ifndef CONFIG_POWER4
1905
1906 /* OHare based motherboards. Currently, we only use these on the
1907 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1908 * to have issues with turning on/off those asic cells
1909 */
1910 static struct feature_table_entry ohare_features[] = {
1911 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1912 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1913 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
1914 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable},
1915 { PMAC_FTR_IDE_RESET, ohare_ide_reset},
1916 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state },
1917 { 0, NULL }
1918 };
1919
1920 /* Heathrow desktop machines (Beige G3).
1921 * Separated as some features couldn't be properly tested
1922 * and the serial port control bits appear to confuse it.
1923 */
1924 static struct feature_table_entry heathrow_desktop_features[] = {
1925 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1926 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1927 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1928 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1929 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1930 { 0, NULL }
1931 };
1932
1933 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1934 * powerbooks.
1935 */
1936 static struct feature_table_entry heathrow_laptop_features[] = {
1937 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1938 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1939 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1940 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1941 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1942 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1943 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1944 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1945 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1946 { 0, NULL }
1947 };
1948
1949 /* Paddington based machines
1950 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1951 */
1952 static struct feature_table_entry paddington_features[] = {
1953 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1954 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1955 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1956 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1957 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1958 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1959 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1960 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1961 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1962 { 0, NULL }
1963 };
1964
1965 /* Core99 & MacRISC 2 machines (all machines released since the
1966 * iBook (included), that is all AGP machines, except pangea
1967 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1968 * used on iBook2 & iMac "flow power".
1969 */
1970 static struct feature_table_entry core99_features[] = {
1971 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1972 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1973 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1974 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1975 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1976 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1977 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1978 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1979 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1980 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1981 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1982 #ifdef CONFIG_PM
1983 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1984 #endif
1985 #ifdef CONFIG_SMP
1986 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
1987 #endif /* CONFIG_SMP */
1988 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1989 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1990 { 0, NULL }
1991 };
1992
1993 /* RackMac
1994 */
1995 static struct feature_table_entry rackmac_features[] = {
1996 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1997 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1998 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1999 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2000 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2001 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2002 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2003 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2004 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2005 #ifdef CONFIG_SMP
2006 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
2007 #endif /* CONFIG_SMP */
2008 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2009 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2010 { 0, NULL }
2011 };
2012
2013 /* Pangea features
2014 */
2015 static struct feature_table_entry pangea_features[] = {
2016 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2017 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2018 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2019 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2020 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2021 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2022 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2023 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2024 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2025 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2026 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2027 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2028 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2029 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2030 { 0, NULL }
2031 };
2032
2033 /* Intrepid features
2034 */
2035 static struct feature_table_entry intrepid_features[] = {
2036 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2037 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2038 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2039 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2040 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2041 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2042 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2043 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2044 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2045 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2046 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2047 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2048 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2049 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2050 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable },
2051 { 0, NULL }
2052 };
2053
2054 #else /* CONFIG_POWER4 */
2055
2056 /* G5 features
2057 */
2058 static struct feature_table_entry g5_features[] = {
2059 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
2060 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
2061 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
2062 { PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset },
2063 { PMAC_FTR_SOUND_CHIP_ENABLE, g5_i2s_enable },
2064 #ifdef CONFIG_SMP
2065 { PMAC_FTR_RESET_CPU, g5_reset_cpu },
2066 #endif /* CONFIG_SMP */
2067 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2068 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2069 { 0, NULL }
2070 };
2071
2072 #endif /* CONFIG_POWER4 */
2073
2074 static struct pmac_mb_def pmac_mb_defs[] = {
2075 #ifndef CONFIG_POWER4
2076 /*
2077 * Desktops
2078 */
2079
2080 { "AAPL,8500", "PowerMac 8500/8600",
2081 PMAC_TYPE_PSURGE, NULL,
2082 0
2083 },
2084 { "AAPL,9500", "PowerMac 9500/9600",
2085 PMAC_TYPE_PSURGE, NULL,
2086 0
2087 },
2088 { "AAPL,7200", "PowerMac 7200",
2089 PMAC_TYPE_PSURGE, NULL,
2090 0
2091 },
2092 { "AAPL,7300", "PowerMac 7200/7300",
2093 PMAC_TYPE_PSURGE, NULL,
2094 0
2095 },
2096 { "AAPL,7500", "PowerMac 7500",
2097 PMAC_TYPE_PSURGE, NULL,
2098 0
2099 },
2100 { "AAPL,ShinerESB", "Apple Network Server",
2101 PMAC_TYPE_ANS, NULL,
2102 0
2103 },
2104 { "AAPL,e407", "Alchemy",
2105 PMAC_TYPE_ALCHEMY, NULL,
2106 0
2107 },
2108 { "AAPL,e411", "Gazelle",
2109 PMAC_TYPE_GAZELLE, NULL,
2110 0
2111 },
2112 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)",
2113 PMAC_TYPE_GOSSAMER, heathrow_desktop_features,
2114 0
2115 },
2116 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)",
2117 PMAC_TYPE_SILK, heathrow_desktop_features,
2118 0
2119 },
2120 { "PowerMac1,1", "Blue&White G3",
2121 PMAC_TYPE_YOSEMITE, paddington_features,
2122 0
2123 },
2124 { "PowerMac1,2", "PowerMac G4 PCI Graphics",
2125 PMAC_TYPE_YIKES, paddington_features,
2126 0
2127 },
2128 { "PowerMac2,1", "iMac FireWire",
2129 PMAC_TYPE_FW_IMAC, core99_features,
2130 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2131 },
2132 { "PowerMac2,2", "iMac FireWire",
2133 PMAC_TYPE_FW_IMAC, core99_features,
2134 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2135 },
2136 { "PowerMac3,1", "PowerMac G4 AGP Graphics",
2137 PMAC_TYPE_SAWTOOTH, core99_features,
2138 PMAC_MB_OLD_CORE99
2139 },
2140 { "PowerMac3,2", "PowerMac G4 AGP Graphics",
2141 PMAC_TYPE_SAWTOOTH, core99_features,
2142 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2143 },
2144 { "PowerMac3,3", "PowerMac G4 AGP Graphics",
2145 PMAC_TYPE_SAWTOOTH, core99_features,
2146 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2147 },
2148 { "PowerMac3,4", "PowerMac G4 Silver",
2149 PMAC_TYPE_QUICKSILVER, core99_features,
2150 PMAC_MB_MAY_SLEEP
2151 },
2152 { "PowerMac3,5", "PowerMac G4 Silver",
2153 PMAC_TYPE_QUICKSILVER, core99_features,
2154 PMAC_MB_MAY_SLEEP
2155 },
2156 { "PowerMac3,6", "PowerMac G4 Windtunnel",
2157 PMAC_TYPE_WINDTUNNEL, core99_features,
2158 PMAC_MB_MAY_SLEEP,
2159 },
2160 { "PowerMac4,1", "iMac \"Flower Power\"",
2161 PMAC_TYPE_PANGEA_IMAC, pangea_features,
2162 PMAC_MB_MAY_SLEEP
2163 },
2164 { "PowerMac4,2", "Flat panel iMac",
2165 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
2166 PMAC_MB_CAN_SLEEP
2167 },
2168 { "PowerMac4,4", "eMac",
2169 PMAC_TYPE_EMAC, core99_features,
2170 PMAC_MB_MAY_SLEEP
2171 },
2172 { "PowerMac5,1", "PowerMac G4 Cube",
2173 PMAC_TYPE_CUBE, core99_features,
2174 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2175 },
2176 { "PowerMac6,1", "Flat panel iMac",
2177 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2178 PMAC_MB_MAY_SLEEP,
2179 },
2180 { "PowerMac6,3", "Flat panel iMac",
2181 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2182 PMAC_MB_MAY_SLEEP,
2183 },
2184 { "PowerMac6,4", "eMac",
2185 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2186 PMAC_MB_MAY_SLEEP,
2187 },
2188 { "PowerMac10,1", "Mac mini",
2189 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2190 PMAC_MB_MAY_SLEEP,
2191 },
2192 { "iMac,1", "iMac (first generation)",
2193 PMAC_TYPE_ORIG_IMAC, paddington_features,
2194 0
2195 },
2196
2197 /*
2198 * Xserve's
2199 */
2200
2201 { "RackMac1,1", "XServe",
2202 PMAC_TYPE_RACKMAC, rackmac_features,
2203 0,
2204 },
2205 { "RackMac1,2", "XServe rev. 2",
2206 PMAC_TYPE_RACKMAC, rackmac_features,
2207 0,
2208 },
2209
2210 /*
2211 * Laptops
2212 */
2213
2214 { "AAPL,3400/2400", "PowerBook 3400",
2215 PMAC_TYPE_HOOPER, ohare_features,
2216 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2217 },
2218 { "AAPL,3500", "PowerBook 3500",
2219 PMAC_TYPE_KANGA, ohare_features,
2220 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2221 },
2222 { "AAPL,PowerBook1998", "PowerBook Wallstreet",
2223 PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
2224 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2225 },
2226 { "PowerBook1,1", "PowerBook 101 (Lombard)",
2227 PMAC_TYPE_101_PBOOK, paddington_features,
2228 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2229 },
2230 { "PowerBook2,1", "iBook (first generation)",
2231 PMAC_TYPE_ORIG_IBOOK, core99_features,
2232 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2233 },
2234 { "PowerBook2,2", "iBook FireWire",
2235 PMAC_TYPE_FW_IBOOK, core99_features,
2236 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2237 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2238 },
2239 { "PowerBook3,1", "PowerBook Pismo",
2240 PMAC_TYPE_PISMO, core99_features,
2241 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2242 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2243 },
2244 { "PowerBook3,2", "PowerBook Titanium",
2245 PMAC_TYPE_TITANIUM, core99_features,
2246 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2247 },
2248 { "PowerBook3,3", "PowerBook Titanium II",
2249 PMAC_TYPE_TITANIUM2, core99_features,
2250 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2251 },
2252 { "PowerBook3,4", "PowerBook Titanium III",
2253 PMAC_TYPE_TITANIUM3, core99_features,
2254 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2255 },
2256 { "PowerBook3,5", "PowerBook Titanium IV",
2257 PMAC_TYPE_TITANIUM4, core99_features,
2258 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2259 },
2260 { "PowerBook4,1", "iBook 2",
2261 PMAC_TYPE_IBOOK2, pangea_features,
2262 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2263 },
2264 { "PowerBook4,2", "iBook 2",
2265 PMAC_TYPE_IBOOK2, pangea_features,
2266 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2267 },
2268 { "PowerBook4,3", "iBook 2 rev. 2",
2269 PMAC_TYPE_IBOOK2, pangea_features,
2270 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2271 },
2272 { "PowerBook5,1", "PowerBook G4 17\"",
2273 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2274 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2275 },
2276 { "PowerBook5,2", "PowerBook G4 15\"",
2277 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2278 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2279 },
2280 { "PowerBook5,3", "PowerBook G4 17\"",
2281 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2282 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2283 },
2284 { "PowerBook5,4", "PowerBook G4 15\"",
2285 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2286 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2287 },
2288 { "PowerBook5,5", "PowerBook G4 17\"",
2289 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2290 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2291 },
2292 { "PowerBook5,6", "PowerBook G4 15\"",
2293 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2294 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2295 },
2296 { "PowerBook5,7", "PowerBook G4 17\"",
2297 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2298 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2299 },
2300 { "PowerBook5,8", "PowerBook G4 15\"",
2301 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2302 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE,
2303 },
2304 { "PowerBook5,9", "PowerBook G4 17\"",
2305 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2306 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE,
2307 },
2308 { "PowerBook6,1", "PowerBook G4 12\"",
2309 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2310 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2311 },
2312 { "PowerBook6,2", "PowerBook G4",
2313 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2314 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2315 },
2316 { "PowerBook6,3", "iBook G4",
2317 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2318 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2319 },
2320 { "PowerBook6,4", "PowerBook G4 12\"",
2321 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2322 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2323 },
2324 { "PowerBook6,5", "iBook G4",
2325 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2326 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2327 },
2328 { "PowerBook6,7", "iBook G4",
2329 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2330 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2331 },
2332 { "PowerBook6,8", "PowerBook G4 12\"",
2333 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2334 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2335 },
2336 #else /* CONFIG_POWER4 */
2337 { "PowerMac7,2", "PowerMac G5",
2338 PMAC_TYPE_POWERMAC_G5, g5_features,
2339 0,
2340 },
2341 #ifdef CONFIG_PPC64
2342 { "PowerMac7,3", "PowerMac G5",
2343 PMAC_TYPE_POWERMAC_G5, g5_features,
2344 0,
2345 },
2346 { "PowerMac8,1", "iMac G5",
2347 PMAC_TYPE_IMAC_G5, g5_features,
2348 0,
2349 },
2350 { "PowerMac9,1", "PowerMac G5",
2351 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2352 0,
2353 },
2354 { "PowerMac11,2", "PowerMac G5 Dual Core",
2355 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2356 0,
2357 },
2358 { "PowerMac12,1", "iMac G5 (iSight)",
2359 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2360 0,
2361 },
2362 { "RackMac3,1", "XServe G5",
2363 PMAC_TYPE_XSERVE_G5, g5_features,
2364 0,
2365 },
2366 #endif /* CONFIG_PPC64 */
2367 #endif /* CONFIG_POWER4 */
2368 };
2369
2370 /*
2371 * The toplevel feature_call callback
2372 */
2373 long pmac_do_feature_call(unsigned int selector, ...)
2374 {
2375 struct device_node *node;
2376 long param, value;
2377 int i;
2378 feature_call func = NULL;
2379 va_list args;
2380
2381 if (pmac_mb.features)
2382 for (i=0; pmac_mb.features[i].function; i++)
2383 if (pmac_mb.features[i].selector == selector) {
2384 func = pmac_mb.features[i].function;
2385 break;
2386 }
2387 if (!func)
2388 for (i=0; any_features[i].function; i++)
2389 if (any_features[i].selector == selector) {
2390 func = any_features[i].function;
2391 break;
2392 }
2393 if (!func)
2394 return -ENODEV;
2395
2396 va_start(args, selector);
2397 node = (struct device_node*)va_arg(args, void*);
2398 param = va_arg(args, long);
2399 value = va_arg(args, long);
2400 va_end(args);
2401
2402 return func(node, param, value);
2403 }
2404
2405 static int __init probe_motherboard(void)
2406 {
2407 int i;
2408 struct macio_chip *macio = &macio_chips[0];
2409 const char *model = NULL;
2410 struct device_node *dt;
2411 int ret = 0;
2412
2413 /* Lookup known motherboard type in device-tree. First try an
2414 * exact match on the "model" property, then try a "compatible"
2415 * match is none is found.
2416 */
2417 dt = of_find_node_by_name(NULL, "device-tree");
2418 if (dt != NULL)
2419 model = of_get_property(dt, "model", NULL);
2420 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2421 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2422 pmac_mb = pmac_mb_defs[i];
2423 goto found;
2424 }
2425 }
2426 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2427 if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
2428 pmac_mb = pmac_mb_defs[i];
2429 goto found;
2430 }
2431 }
2432
2433 /* Fallback to selection depending on mac-io chip type */
2434 switch(macio->type) {
2435 #ifndef CONFIG_POWER4
2436 case macio_grand_central:
2437 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2438 pmac_mb.model_name = "Unknown PowerSurge";
2439 break;
2440 case macio_ohare:
2441 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2442 pmac_mb.model_name = "Unknown OHare-based";
2443 break;
2444 case macio_heathrow:
2445 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2446 pmac_mb.model_name = "Unknown Heathrow-based";
2447 pmac_mb.features = heathrow_desktop_features;
2448 break;
2449 case macio_paddington:
2450 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2451 pmac_mb.model_name = "Unknown Paddington-based";
2452 pmac_mb.features = paddington_features;
2453 break;
2454 case macio_keylargo:
2455 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2456 pmac_mb.model_name = "Unknown Keylargo-based";
2457 pmac_mb.features = core99_features;
2458 break;
2459 case macio_pangea:
2460 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2461 pmac_mb.model_name = "Unknown Pangea-based";
2462 pmac_mb.features = pangea_features;
2463 break;
2464 case macio_intrepid:
2465 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2466 pmac_mb.model_name = "Unknown Intrepid-based";
2467 pmac_mb.features = intrepid_features;
2468 break;
2469 #else /* CONFIG_POWER4 */
2470 case macio_keylargo2:
2471 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2472 pmac_mb.model_name = "Unknown K2-based";
2473 pmac_mb.features = g5_features;
2474 break;
2475 case macio_shasta:
2476 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_SHASTA;
2477 pmac_mb.model_name = "Unknown Shasta-based";
2478 pmac_mb.features = g5_features;
2479 break;
2480 #endif /* CONFIG_POWER4 */
2481 default:
2482 ret = -ENODEV;
2483 goto done;
2484 }
2485 found:
2486 #ifndef CONFIG_POWER4
2487 /* Fixup Hooper vs. Comet */
2488 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2489 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2490 if (!mach_id_ptr) {
2491 ret = -ENODEV;
2492 goto done;
2493 }
2494 /* Here, I used to disable the media-bay on comet. It
2495 * appears this is wrong, the floppy connector is actually
2496 * a kind of media-bay and works with the current driver.
2497 */
2498 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2499 pmac_mb.model_id = PMAC_TYPE_COMET;
2500 iounmap(mach_id_ptr);
2501 }
2502
2503 /* Set default value of powersave_nap on machines that support it.
2504 * It appears that uninorth rev 3 has a problem with it, we don't
2505 * enable it on those. In theory, the flush-on-lock property is
2506 * supposed to be set when not supported, but I'm not very confident
2507 * that all Apple OF revs did it properly, I do it the paranoid way.
2508 */
2509 while (uninorth_base && uninorth_rev > 3) {
2510 struct device_node *cpus = of_find_node_by_path("/cpus");
2511 struct device_node *np;
2512
2513 if (!cpus || !cpus->child) {
2514 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2515 of_node_put(cpus);
2516 break;
2517 }
2518 np = cpus->child;
2519 /* Nap mode not supported on SMP */
2520 if (np->sibling) {
2521 of_node_put(cpus);
2522 break;
2523 }
2524 /* Nap mode not supported if flush-on-lock property is present */
2525 if (of_get_property(np, "flush-on-lock", NULL)) {
2526 of_node_put(cpus);
2527 break;
2528 }
2529 of_node_put(cpus);
2530 powersave_nap = 1;
2531 printk(KERN_DEBUG "Processor NAP mode on idle enabled.\n");
2532 break;
2533 }
2534
2535 /* On CPUs that support it (750FX), lowspeed by default during
2536 * NAP mode
2537 */
2538 powersave_lowspeed = 1;
2539
2540 #else /* CONFIG_POWER4 */
2541 powersave_nap = 1;
2542 #endif /* CONFIG_POWER4 */
2543
2544 /* Check for "mobile" machine */
2545 if (model && (strncmp(model, "PowerBook", 9) == 0
2546 || strncmp(model, "iBook", 5) == 0))
2547 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2548
2549
2550 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2551 done:
2552 of_node_put(dt);
2553 return ret;
2554 }
2555
2556 /* Initialize the Core99 UniNorth host bridge and memory controller
2557 */
2558 static void __init probe_uninorth(void)
2559 {
2560 const u32 *addrp;
2561 phys_addr_t address;
2562 unsigned long actrl;
2563
2564 /* Locate core99 Uni-N */
2565 uninorth_node = of_find_node_by_name(NULL, "uni-n");
2566 /* Locate G5 u3 */
2567 if (uninorth_node == NULL) {
2568 uninorth_node = of_find_node_by_name(NULL, "u3");
2569 uninorth_maj = 3;
2570 }
2571 /* Locate G5 u4 */
2572 if (uninorth_node == NULL) {
2573 uninorth_node = of_find_node_by_name(NULL, "u4");
2574 uninorth_maj = 4;
2575 }
2576 if (uninorth_node == NULL)
2577 return;
2578
2579 addrp = of_get_property(uninorth_node, "reg", NULL);
2580 if (addrp == NULL)
2581 return;
2582 address = of_translate_address(uninorth_node, addrp);
2583 if (address == 0)
2584 return;
2585 uninorth_base = ioremap(address, 0x40000);
2586 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2587 if (uninorth_maj == 3 || uninorth_maj == 4)
2588 u3_ht_base = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2589
2590 printk(KERN_INFO "Found %s memory controller & host bridge"
2591 " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" :
2592 uninorth_maj == 4 ? "U4" : "UniNorth",
2593 (unsigned int)address, uninorth_rev);
2594 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2595
2596 /* Set the arbitrer QAck delay according to what Apple does
2597 */
2598 if (uninorth_rev < 0x11) {
2599 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2600 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2601 UNI_N_ARB_CTRL_QACK_DELAY) <<
2602 UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2603 UN_OUT(UNI_N_ARB_CTRL, actrl);
2604 }
2605
2606 /* Some more magic as done by them in recent MacOS X on UniNorth
2607 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2608 * memory timeout
2609 */
2610 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) ||
2611 uninorth_rev == 0xc0)
2612 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2613 }
2614
2615 static void __init probe_one_macio(const char *name, const char *compat, int type)
2616 {
2617 struct device_node* node;
2618 int i;
2619 volatile u32 __iomem *base;
2620 const u32 *addrp, *revp;
2621 phys_addr_t addr;
2622 u64 size;
2623
2624 for (node = NULL; (node = of_find_node_by_name(node, name)) != NULL;) {
2625 if (!compat)
2626 break;
2627 if (of_device_is_compatible(node, compat))
2628 break;
2629 }
2630 if (!node)
2631 return;
2632 for(i=0; i<MAX_MACIO_CHIPS; i++) {
2633 if (!macio_chips[i].of_node)
2634 break;
2635 if (macio_chips[i].of_node == node)
2636 return;
2637 }
2638
2639 if (i >= MAX_MACIO_CHIPS) {
2640 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2641 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2642 return;
2643 }
2644 addrp = of_get_pci_address(node, 0, &size, NULL);
2645 if (addrp == NULL) {
2646 printk(KERN_ERR "pmac_feature: %s: can't find base !\n",
2647 node->full_name);
2648 return;
2649 }
2650 addr = of_translate_address(node, addrp);
2651 if (addr == 0) {
2652 printk(KERN_ERR "pmac_feature: %s, can't translate base !\n",
2653 node->full_name);
2654 return;
2655 }
2656 base = ioremap(addr, (unsigned long)size);
2657 if (!base) {
2658 printk(KERN_ERR "pmac_feature: %s, can't map mac-io chip !\n",
2659 node->full_name);
2660 return;
2661 }
2662 if (type == macio_keylargo || type == macio_keylargo2) {
2663 const u32 *did = of_get_property(node, "device-id", NULL);
2664 if (*did == 0x00000025)
2665 type = macio_pangea;
2666 if (*did == 0x0000003e)
2667 type = macio_intrepid;
2668 if (*did == 0x0000004f)
2669 type = macio_shasta;
2670 }
2671 macio_chips[i].of_node = node;
2672 macio_chips[i].type = type;
2673 macio_chips[i].base = base;
2674 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
2675 macio_chips[i].name = macio_names[type];
2676 revp = of_get_property(node, "revision-id", NULL);
2677 if (revp)
2678 macio_chips[i].rev = *revp;
2679 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2680 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2681 }
2682
2683 static int __init
2684 probe_macios(void)
2685 {
2686 /* Warning, ordering is important */
2687 probe_one_macio("gc", NULL, macio_grand_central);
2688 probe_one_macio("ohare", NULL, macio_ohare);
2689 probe_one_macio("pci106b,7", NULL, macio_ohareII);
2690 probe_one_macio("mac-io", "keylargo", macio_keylargo);
2691 probe_one_macio("mac-io", "paddington", macio_paddington);
2692 probe_one_macio("mac-io", "gatwick", macio_gatwick);
2693 probe_one_macio("mac-io", "heathrow", macio_heathrow);
2694 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2695
2696 /* Make sure the "main" macio chip appear first */
2697 if (macio_chips[0].type == macio_gatwick
2698 && macio_chips[1].type == macio_heathrow) {
2699 struct macio_chip temp = macio_chips[0];
2700 macio_chips[0] = macio_chips[1];
2701 macio_chips[1] = temp;
2702 }
2703 if (macio_chips[0].type == macio_ohareII
2704 && macio_chips[1].type == macio_ohare) {
2705 struct macio_chip temp = macio_chips[0];
2706 macio_chips[0] = macio_chips[1];
2707 macio_chips[1] = temp;
2708 }
2709 macio_chips[0].lbus.index = 0;
2710 macio_chips[1].lbus.index = 1;
2711
2712 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2713 }
2714
2715 static void __init
2716 initial_serial_shutdown(struct device_node *np)
2717 {
2718 int len;
2719 const struct slot_names_prop {
2720 int count;
2721 char name[1];
2722 } *slots;
2723 const char *conn;
2724 int port_type = PMAC_SCC_ASYNC;
2725 int modem = 0;
2726
2727 slots = of_get_property(np, "slot-names", &len);
2728 conn = of_get_property(np, "AAPL,connector", &len);
2729 if (conn && (strcmp(conn, "infrared") == 0))
2730 port_type = PMAC_SCC_IRDA;
2731 else if (of_device_is_compatible(np, "cobalt"))
2732 modem = 1;
2733 else if (slots && slots->count > 0) {
2734 if (strcmp(slots->name, "IrDA") == 0)
2735 port_type = PMAC_SCC_IRDA;
2736 else if (strcmp(slots->name, "Modem") == 0)
2737 modem = 1;
2738 }
2739 if (modem)
2740 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2741 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2742 }
2743
2744 static void __init
2745 set_initial_features(void)
2746 {
2747 struct device_node *np;
2748
2749 /* That hack appears to be necessary for some StarMax motherboards
2750 * but I'm not too sure it was audited for side-effects on other
2751 * ohare based machines...
2752 * Since I still have difficulties figuring the right way to
2753 * differenciate them all and since that hack was there for a long
2754 * time, I'll keep it around
2755 */
2756 if (macio_chips[0].type == macio_ohare) {
2757 struct macio_chip *macio = &macio_chips[0];
2758 np = of_find_node_by_name(NULL, "via-pmu");
2759 if (np)
2760 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2761 else
2762 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2763 of_node_put(np);
2764 } else if (macio_chips[1].type == macio_ohare) {
2765 struct macio_chip *macio = &macio_chips[1];
2766 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2767 }
2768
2769 #ifdef CONFIG_POWER4
2770 if (macio_chips[0].type == macio_keylargo2 ||
2771 macio_chips[0].type == macio_shasta) {
2772 #ifndef CONFIG_SMP
2773 /* On SMP machines running UP, we have the second CPU eating
2774 * bus cycles. We need to take it off the bus. This is done
2775 * from pmac_smp for SMP kernels running on one CPU
2776 */
2777 np = of_find_node_by_type(NULL, "cpu");
2778 if (np != NULL)
2779 np = of_find_node_by_type(np, "cpu");
2780 if (np != NULL) {
2781 g5_phy_disable_cpu1();
2782 of_node_put(np);
2783 }
2784 #endif /* CONFIG_SMP */
2785 /* Enable GMAC for now for PCI probing. It will be disabled
2786 * later on after PCI probe
2787 */
2788 np = of_find_node_by_name(NULL, "ethernet");
2789 while(np) {
2790 if (of_device_is_compatible(np, "K2-GMAC"))
2791 g5_gmac_enable(np, 0, 1);
2792 np = of_find_node_by_name(np, "ethernet");
2793 }
2794
2795 /* Enable FW before PCI probe. Will be disabled later on
2796 * Note: We should have a batter way to check that we are
2797 * dealing with uninorth internal cell and not a PCI cell
2798 * on the external PCI. The code below works though.
2799 */
2800 np = of_find_node_by_name(NULL, "firewire");
2801 while(np) {
2802 if (of_device_is_compatible(np, "pci106b,5811")) {
2803 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2804 g5_fw_enable(np, 0, 1);
2805 }
2806 np = of_find_node_by_name(np, "firewire");
2807 }
2808 }
2809 #else /* CONFIG_POWER4 */
2810
2811 if (macio_chips[0].type == macio_keylargo ||
2812 macio_chips[0].type == macio_pangea ||
2813 macio_chips[0].type == macio_intrepid) {
2814 /* Enable GMAC for now for PCI probing. It will be disabled
2815 * later on after PCI probe
2816 */
2817 np = of_find_node_by_name(NULL, "ethernet");
2818 while(np) {
2819 if (np->parent
2820 && of_device_is_compatible(np->parent, "uni-north")
2821 && of_device_is_compatible(np, "gmac"))
2822 core99_gmac_enable(np, 0, 1);
2823 np = of_find_node_by_name(np, "ethernet");
2824 }
2825
2826 /* Enable FW before PCI probe. Will be disabled later on
2827 * Note: We should have a batter way to check that we are
2828 * dealing with uninorth internal cell and not a PCI cell
2829 * on the external PCI. The code below works though.
2830 */
2831 np = of_find_node_by_name(NULL, "firewire");
2832 while(np) {
2833 if (np->parent
2834 && of_device_is_compatible(np->parent, "uni-north")
2835 && (of_device_is_compatible(np, "pci106b,18") ||
2836 of_device_is_compatible(np, "pci106b,30") ||
2837 of_device_is_compatible(np, "pci11c1,5811"))) {
2838 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2839 core99_firewire_enable(np, 0, 1);
2840 }
2841 np = of_find_node_by_name(np, "firewire");
2842 }
2843
2844 /* Enable ATA-100 before PCI probe. */
2845 np = of_find_node_by_name(NULL, "ata-6");
2846 while(np) {
2847 if (np->parent
2848 && of_device_is_compatible(np->parent, "uni-north")
2849 && of_device_is_compatible(np, "kauai-ata")) {
2850 core99_ata100_enable(np, 1);
2851 }
2852 np = of_find_node_by_name(np, "ata-6");
2853 }
2854
2855 /* Switch airport off */
2856 for_each_node_by_name(np, "radio") {
2857 if (np && np->parent == macio_chips[0].of_node) {
2858 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2859 core99_airport_enable(np, 0, 0);
2860 }
2861 }
2862 of_node_put(np);
2863 }
2864
2865 /* On all machines that support sound PM, switch sound off */
2866 if (macio_chips[0].of_node)
2867 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2868 macio_chips[0].of_node, 0, 0);
2869
2870 /* While on some desktop G3s, we turn it back on */
2871 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2872 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2873 pmac_mb.model_id == PMAC_TYPE_SILK)) {
2874 struct macio_chip *macio = &macio_chips[0];
2875 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2876 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2877 }
2878
2879 #endif /* CONFIG_POWER4 */
2880
2881 /* On all machines, switch modem & serial ports off */
2882 for_each_node_by_name(np, "ch-a")
2883 initial_serial_shutdown(np);
2884 of_node_put(np);
2885 for_each_node_by_name(np, "ch-b")
2886 initial_serial_shutdown(np);
2887 of_node_put(np);
2888 }
2889
2890 void __init
2891 pmac_feature_init(void)
2892 {
2893 /* Detect the UniNorth memory controller */
2894 probe_uninorth();
2895
2896 /* Probe mac-io controllers */
2897 if (probe_macios()) {
2898 printk(KERN_WARNING "No mac-io chip found\n");
2899 return;
2900 }
2901
2902 /* Probe machine type */
2903 if (probe_motherboard())
2904 printk(KERN_WARNING "Unknown PowerMac !\n");
2905
2906 /* Set some initial features (turn off some chips that will
2907 * be later turned on)
2908 */
2909 set_initial_features();
2910 }
2911
2912 #if 0
2913 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2914 {
2915 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2916 int bits[8] = { 8,16,0,32,2,4,0,0 };
2917 int freq = (frq >> 8) & 0xf;
2918
2919 if (freqs[freq] == 0)
2920 printk("%s: Unknown HT link frequency %x\n", name, freq);
2921 else
2922 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2923 name, freqs[freq],
2924 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2925 }
2926
2927 void __init pmac_check_ht_link(void)
2928 {
2929 u32 ufreq, freq, ucfg, cfg;
2930 struct device_node *pcix_node;
2931 u8 px_bus, px_devfn;
2932 struct pci_controller *px_hose;
2933
2934 (void)in_be32(u3_ht_base + U3_HT_LINK_COMMAND);
2935 ucfg = cfg = in_be32(u3_ht_base + U3_HT_LINK_CONFIG);
2936 ufreq = freq = in_be32(u3_ht_base + U3_HT_LINK_FREQ);
2937 dump_HT_speeds("U3 HyperTransport", cfg, freq);
2938
2939 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2940 if (pcix_node == NULL) {
2941 printk("No PCI-X bridge found\n");
2942 return;
2943 }
2944 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2945 printk("PCI-X bridge found but not matched to pci\n");
2946 return;
2947 }
2948 px_hose = pci_find_hose_for_OF_device(pcix_node);
2949 if (px_hose == NULL) {
2950 printk("PCI-X bridge found but not matched to host\n");
2951 return;
2952 }
2953 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2954 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2955 dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2956 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2957 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2958 dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2959 }
2960 #endif /* 0 */
2961
2962 /*
2963 * Early video resume hook
2964 */
2965
2966 static void (*pmac_early_vresume_proc)(void *data);
2967 static void *pmac_early_vresume_data;
2968
2969 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2970 {
2971 if (!machine_is(powermac))
2972 return;
2973 preempt_disable();
2974 pmac_early_vresume_proc = proc;
2975 pmac_early_vresume_data = data;
2976 preempt_enable();
2977 }
2978 EXPORT_SYMBOL(pmac_set_early_video_resume);
2979
2980 void pmac_call_early_video_resume(void)
2981 {
2982 if (pmac_early_vresume_proc)
2983 pmac_early_vresume_proc(pmac_early_vresume_data);
2984 }
2985
2986 /*
2987 * AGP related suspend/resume code
2988 */
2989
2990 static struct pci_dev *pmac_agp_bridge;
2991 static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2992 static int (*pmac_agp_resume)(struct pci_dev *bridge);
2993
2994 void pmac_register_agp_pm(struct pci_dev *bridge,
2995 int (*suspend)(struct pci_dev *bridge),
2996 int (*resume)(struct pci_dev *bridge))
2997 {
2998 if (suspend || resume) {
2999 pmac_agp_bridge = bridge;
3000 pmac_agp_suspend = suspend;
3001 pmac_agp_resume = resume;
3002 return;
3003 }
3004 if (bridge != pmac_agp_bridge)
3005 return;
3006 pmac_agp_suspend = pmac_agp_resume = NULL;
3007 return;
3008 }
3009 EXPORT_SYMBOL(pmac_register_agp_pm);
3010
3011 void pmac_suspend_agp_for_card(struct pci_dev *dev)
3012 {
3013 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
3014 return;
3015 if (pmac_agp_bridge->bus != dev->bus)
3016 return;
3017 pmac_agp_suspend(pmac_agp_bridge);
3018 }
3019 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
3020
3021 void pmac_resume_agp_for_card(struct pci_dev *dev)
3022 {
3023 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3024 return;
3025 if (pmac_agp_bridge->bus != dev->bus)
3026 return;
3027 pmac_agp_resume(pmac_agp_bridge);
3028 }
3029 EXPORT_SYMBOL(pmac_resume_agp_for_card);
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