?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[TCP]: TCP_CONG_YEAH requires TCP_CONG_VEGAS
[linux-2.6/verdex.git] / drivers / net / e1000 / e1000_main.c
blob637ae8f6879199444716e0c8025ec56a3eaacdc0
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 #ifdef CONFIG_PCI_MSI
162 static irqreturn_t e1000_intr_msi(int irq, void *data);
163 #endif
164 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
166 #ifdef CONFIG_E1000_NAPI
167 static int e1000_clean(struct net_device *poll_dev, int *budget);
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int *work_done, int work_to_do);
171 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring,
173 int *work_done, int work_to_do);
174 #else
175 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 #endif
180 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
183 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
186 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
189 void e1000_set_ethtool_ops(struct net_device *netdev);
190 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_tx_timeout(struct net_device *dev);
193 static void e1000_reset_task(struct work_struct *work);
194 static void e1000_smartspeed(struct e1000_adapter *adapter);
195 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
197
198 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
203 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
204 #ifdef CONFIG_PM
205 static int e1000_resume(struct pci_dev *pdev);
206 #endif
207 static void e1000_shutdown(struct pci_dev *pdev);
208
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void e1000_netpoll (struct net_device *netdev);
212 #endif
213
214 extern void e1000_check_options(struct e1000_adapter *adapter);
215
216 #define COPYBREAK_DEFAULT 256
217 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
218 module_param(copybreak, uint, 0644);
219 MODULE_PARM_DESC(copybreak,
220 "Maximum size of packet that is copied to a new buffer on receive");
221
222 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
223 pci_channel_state_t state);
224 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
225 static void e1000_io_resume(struct pci_dev *pdev);
226
227 static struct pci_error_handlers e1000_err_handler = {
228 .error_detected = e1000_io_error_detected,
229 .slot_reset = e1000_io_slot_reset,
230 .resume = e1000_io_resume,
231 };
232
233 static struct pci_driver e1000_driver = {
234 .name = e1000_driver_name,
235 .id_table = e1000_pci_tbl,
236 .probe = e1000_probe,
237 .remove = __devexit_p(e1000_remove),
238 #ifdef CONFIG_PM
239 /* Power Managment Hooks */
240 .suspend = e1000_suspend,
241 .resume = e1000_resume,
242 #endif
243 .shutdown = e1000_shutdown,
244 .err_handler = &e1000_err_handler
245 };
246
247 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
248 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
249 MODULE_LICENSE("GPL");
250 MODULE_VERSION(DRV_VERSION);
251
252 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
253 module_param(debug, int, 0);
254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
255
256 /**
257 * e1000_init_module - Driver Registration Routine
258 *
259 * e1000_init_module is the first routine called when the driver is
260 * loaded. All it does is register with the PCI subsystem.
261 **/
262
263 static int __init
264 e1000_init_module(void)
265 {
266 int ret;
267 printk(KERN_INFO "%s - version %s\n",
268 e1000_driver_string, e1000_driver_version);
269
270 printk(KERN_INFO "%s\n", e1000_copyright);
271
272 ret = pci_register_driver(&e1000_driver);
273 if (copybreak != COPYBREAK_DEFAULT) {
274 if (copybreak == 0)
275 printk(KERN_INFO "e1000: copybreak disabled\n");
276 else
277 printk(KERN_INFO "e1000: copybreak enabled for "
278 "packets <= %u bytes\n", copybreak);
279 }
280 return ret;
281 }
282
283 module_init(e1000_init_module);
284
285 /**
286 * e1000_exit_module - Driver Exit Cleanup Routine
287 *
288 * e1000_exit_module is called just before the driver is removed
289 * from memory.
290 **/
291
292 static void __exit
293 e1000_exit_module(void)
294 {
295 pci_unregister_driver(&e1000_driver);
296 }
297
298 module_exit(e1000_exit_module);
299
300 static int e1000_request_irq(struct e1000_adapter *adapter)
301 {
302 struct net_device *netdev = adapter->netdev;
303 int flags, err = 0;
304
305 flags = IRQF_SHARED;
306 #ifdef CONFIG_PCI_MSI
307 if (adapter->hw.mac_type >= e1000_82571) {
308 adapter->have_msi = TRUE;
309 if ((err = pci_enable_msi(adapter->pdev))) {
310 DPRINTK(PROBE, ERR,
311 "Unable to allocate MSI interrupt Error: %d\n", err);
312 adapter->have_msi = FALSE;
313 }
314 }
315 if (adapter->have_msi) {
316 flags &= ~IRQF_SHARED;
317 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
318 netdev->name, netdev);
319 if (err)
320 DPRINTK(PROBE, ERR,
321 "Unable to allocate interrupt Error: %d\n", err);
322 } else
323 #endif
324 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
325 netdev->name, netdev)))
326 DPRINTK(PROBE, ERR,
327 "Unable to allocate interrupt Error: %d\n", err);
328
329 return err;
330 }
331
332 static void e1000_free_irq(struct e1000_adapter *adapter)
333 {
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338 #ifdef CONFIG_PCI_MSI
339 if (adapter->have_msi)
340 pci_disable_msi(adapter->pdev);
341 #endif
342 }
343
344 /**
345 * e1000_irq_disable - Mask off interrupt generation on the NIC
346 * @adapter: board private structure
347 **/
348
349 static void
350 e1000_irq_disable(struct e1000_adapter *adapter)
351 {
352 atomic_inc(&adapter->irq_sem);
353 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
354 E1000_WRITE_FLUSH(&adapter->hw);
355 synchronize_irq(adapter->pdev->irq);
356 }
357
358 /**
359 * e1000_irq_enable - Enable default interrupt generation settings
360 * @adapter: board private structure
361 **/
362
363 static void
364 e1000_irq_enable(struct e1000_adapter *adapter)
365 {
366 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
367 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
368 E1000_WRITE_FLUSH(&adapter->hw);
369 }
370 }
371
372 static void
373 e1000_update_mng_vlan(struct e1000_adapter *adapter)
374 {
375 struct net_device *netdev = adapter->netdev;
376 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
377 uint16_t old_vid = adapter->mng_vlan_id;
378 if (adapter->vlgrp) {
379 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
380 if (adapter->hw.mng_cookie.status &
381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
382 e1000_vlan_rx_add_vid(netdev, vid);
383 adapter->mng_vlan_id = vid;
384 } else
385 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
386
387 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
388 (vid != old_vid) &&
389 !vlan_group_get_device(adapter->vlgrp, old_vid))
390 e1000_vlan_rx_kill_vid(netdev, old_vid);
391 } else
392 adapter->mng_vlan_id = vid;
393 }
394 }
395
396 /**
397 * e1000_release_hw_control - release control of the h/w to f/w
398 * @adapter: address of board private structure
399 *
400 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
401 * For ASF and Pass Through versions of f/w this means that the
402 * driver is no longer loaded. For AMT version (only with 82573) i
403 * of the f/w this means that the network i/f is closed.
404 *
405 **/
406
407 static void
408 e1000_release_hw_control(struct e1000_adapter *adapter)
409 {
410 uint32_t ctrl_ext;
411 uint32_t swsm;
412
413 /* Let firmware taken over control of h/w */
414 switch (adapter->hw.mac_type) {
415 case e1000_82573:
416 swsm = E1000_READ_REG(&adapter->hw, SWSM);
417 E1000_WRITE_REG(&adapter->hw, SWSM,
418 swsm & ~E1000_SWSM_DRV_LOAD);
419 break;
420 case e1000_82571:
421 case e1000_82572:
422 case e1000_80003es2lan:
423 case e1000_ich8lan:
424 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
425 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
426 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
427 break;
428 default:
429 break;
430 }
431 }
432
433 /**
434 * e1000_get_hw_control - get control of the h/w from f/w
435 * @adapter: address of board private structure
436 *
437 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
438 * For ASF and Pass Through versions of f/w this means that
439 * the driver is loaded. For AMT version (only with 82573)
440 * of the f/w this means that the network i/f is open.
441 *
442 **/
443
444 static void
445 e1000_get_hw_control(struct e1000_adapter *adapter)
446 {
447 uint32_t ctrl_ext;
448 uint32_t swsm;
449
450 /* Let firmware know the driver has taken over */
451 switch (adapter->hw.mac_type) {
452 case e1000_82573:
453 swsm = E1000_READ_REG(&adapter->hw, SWSM);
454 E1000_WRITE_REG(&adapter->hw, SWSM,
455 swsm | E1000_SWSM_DRV_LOAD);
456 break;
457 case e1000_82571:
458 case e1000_82572:
459 case e1000_80003es2lan:
460 case e1000_ich8lan:
461 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
462 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
463 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
464 break;
465 default:
466 break;
467 }
468 }
469
470 static void
471 e1000_init_manageability(struct e1000_adapter *adapter)
472 {
473 if (adapter->en_mng_pt) {
474 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
475
476 /* disable hardware interception of ARP */
477 manc &= ~(E1000_MANC_ARP_EN);
478
479 /* enable receiving management packets to the host */
480 /* this will probably generate destination unreachable messages
481 * from the host OS, but the packets will be handled on SMBUS */
482 if (adapter->hw.has_manc2h) {
483 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
484
485 manc |= E1000_MANC_EN_MNG2HOST;
486 #define E1000_MNG2HOST_PORT_623 (1 << 5)
487 #define E1000_MNG2HOST_PORT_664 (1 << 6)
488 manc2h |= E1000_MNG2HOST_PORT_623;
489 manc2h |= E1000_MNG2HOST_PORT_664;
490 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
491 }
492
493 E1000_WRITE_REG(&adapter->hw, MANC, manc);
494 }
495 }
496
497 static void
498 e1000_release_manageability(struct e1000_adapter *adapter)
499 {
500 if (adapter->en_mng_pt) {
501 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
502
503 /* re-enable hardware interception of ARP */
504 manc |= E1000_MANC_ARP_EN;
505
506 if (adapter->hw.has_manc2h)
507 manc &= ~E1000_MANC_EN_MNG2HOST;
508
509 /* don't explicitly have to mess with MANC2H since
510 * MANC has an enable disable that gates MANC2H */
511
512 E1000_WRITE_REG(&adapter->hw, MANC, manc);
513 }
514 }
515
516 /**
517 * e1000_configure - configure the hardware for RX and TX
518 * @adapter = private board structure
519 **/
520 static void e1000_configure(struct e1000_adapter *adapter)
521 {
522 struct net_device *netdev = adapter->netdev;
523 int i;
524
525 e1000_set_multi(netdev);
526
527 e1000_restore_vlan(adapter);
528 e1000_init_manageability(adapter);
529
530 e1000_configure_tx(adapter);
531 e1000_setup_rctl(adapter);
532 e1000_configure_rx(adapter);
533 /* call E1000_DESC_UNUSED which always leaves
534 * at least 1 descriptor unused to make sure
535 * next_to_use != next_to_clean */
536 for (i = 0; i < adapter->num_rx_queues; i++) {
537 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
538 adapter->alloc_rx_buf(adapter, ring,
539 E1000_DESC_UNUSED(ring));
540 }
541
542 adapter->tx_queue_len = netdev->tx_queue_len;
543 }
544
545 int e1000_up(struct e1000_adapter *adapter)
546 {
547 /* hardware has been reset, we need to reload some things */
548 e1000_configure(adapter);
549
550 clear_bit(__E1000_DOWN, &adapter->flags);
551
552 #ifdef CONFIG_E1000_NAPI
553 netif_poll_enable(adapter->netdev);
554 #endif
555 e1000_irq_enable(adapter);
556
557 /* fire a link change interrupt to start the watchdog */
558 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
559 return 0;
560 }
561
562 /**
563 * e1000_power_up_phy - restore link in case the phy was powered down
564 * @adapter: address of board private structure
565 *
566 * The phy may be powered down to save power and turn off link when the
567 * driver is unloaded and wake on lan is not enabled (among others)
568 * *** this routine MUST be followed by a call to e1000_reset ***
569 *
570 **/
571
572 void e1000_power_up_phy(struct e1000_adapter *adapter)
573 {
574 uint16_t mii_reg = 0;
575
576 /* Just clear the power down bit to wake the phy back up */
577 if (adapter->hw.media_type == e1000_media_type_copper) {
578 /* according to the manual, the phy will retain its
579 * settings across a power-down/up cycle */
580 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
581 mii_reg &= ~MII_CR_POWER_DOWN;
582 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
583 }
584 }
585
586 static void e1000_power_down_phy(struct e1000_adapter *adapter)
587 {
588 /* Power down the PHY so no link is implied when interface is down *
589 * The PHY cannot be powered down if any of the following is TRUE *
590 * (a) WoL is enabled
591 * (b) AMT is active
592 * (c) SoL/IDER session is active */
593 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
594 adapter->hw.media_type == e1000_media_type_copper) {
595 uint16_t mii_reg = 0;
596
597 switch (adapter->hw.mac_type) {
598 case e1000_82540:
599 case e1000_82545:
600 case e1000_82545_rev_3:
601 case e1000_82546:
602 case e1000_82546_rev_3:
603 case e1000_82541:
604 case e1000_82541_rev_2:
605 case e1000_82547:
606 case e1000_82547_rev_2:
607 if (E1000_READ_REG(&adapter->hw, MANC) &
608 E1000_MANC_SMBUS_EN)
609 goto out;
610 break;
611 case e1000_82571:
612 case e1000_82572:
613 case e1000_82573:
614 case e1000_80003es2lan:
615 case e1000_ich8lan:
616 if (e1000_check_mng_mode(&adapter->hw) ||
617 e1000_check_phy_reset_block(&adapter->hw))
618 goto out;
619 break;
620 default:
621 goto out;
622 }
623 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
624 mii_reg |= MII_CR_POWER_DOWN;
625 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
626 mdelay(1);
627 }
628 out:
629 return;
630 }
631
632 void
633 e1000_down(struct e1000_adapter *adapter)
634 {
635 struct net_device *netdev = adapter->netdev;
636
637 /* signal that we're down so the interrupt handler does not
638 * reschedule our watchdog timer */
639 set_bit(__E1000_DOWN, &adapter->flags);
640
641 #ifdef CONFIG_E1000_NAPI
642 netif_poll_disable(netdev);
643 #endif
644 e1000_irq_disable(adapter);
645
646 del_timer_sync(&adapter->tx_fifo_stall_timer);
647 del_timer_sync(&adapter->watchdog_timer);
648 del_timer_sync(&adapter->phy_info_timer);
649
650 netdev->tx_queue_len = adapter->tx_queue_len;
651 adapter->link_speed = 0;
652 adapter->link_duplex = 0;
653 netif_carrier_off(netdev);
654 netif_stop_queue(netdev);
655
656 e1000_reset(adapter);
657 e1000_clean_all_tx_rings(adapter);
658 e1000_clean_all_rx_rings(adapter);
659 }
660
661 void
662 e1000_reinit_locked(struct e1000_adapter *adapter)
663 {
664 WARN_ON(in_interrupt());
665 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
666 msleep(1);
667 e1000_down(adapter);
668 e1000_up(adapter);
669 clear_bit(__E1000_RESETTING, &adapter->flags);
670 }
671
672 void
673 e1000_reset(struct e1000_adapter *adapter)
674 {
675 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
676 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
677 boolean_t legacy_pba_adjust = FALSE;
678
679 /* Repartition Pba for greater than 9k mtu
680 * To take effect CTRL.RST is required.
681 */
682
683 switch (adapter->hw.mac_type) {
684 case e1000_82542_rev2_0:
685 case e1000_82542_rev2_1:
686 case e1000_82543:
687 case e1000_82544:
688 case e1000_82540:
689 case e1000_82541:
690 case e1000_82541_rev_2:
691 legacy_pba_adjust = TRUE;
692 pba = E1000_PBA_48K;
693 break;
694 case e1000_82545:
695 case e1000_82545_rev_3:
696 case e1000_82546:
697 case e1000_82546_rev_3:
698 pba = E1000_PBA_48K;
699 break;
700 case e1000_82547:
701 case e1000_82547_rev_2:
702 legacy_pba_adjust = TRUE;
703 pba = E1000_PBA_30K;
704 break;
705 case e1000_82571:
706 case e1000_82572:
707 case e1000_80003es2lan:
708 pba = E1000_PBA_38K;
709 break;
710 case e1000_82573:
711 pba = E1000_PBA_20K;
712 break;
713 case e1000_ich8lan:
714 pba = E1000_PBA_8K;
715 case e1000_undefined:
716 case e1000_num_macs:
717 break;
718 }
719
720 if (legacy_pba_adjust == TRUE) {
721 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
722 pba -= 8; /* allocate more FIFO for Tx */
723
724 if (adapter->hw.mac_type == e1000_82547) {
725 adapter->tx_fifo_head = 0;
726 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
727 adapter->tx_fifo_size =
728 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
729 atomic_set(&adapter->tx_fifo_stall, 0);
730 }
731 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
732 /* adjust PBA for jumbo frames */
733 E1000_WRITE_REG(&adapter->hw, PBA, pba);
734
735 /* To maintain wire speed transmits, the Tx FIFO should be
736 * large enough to accomodate two full transmit packets,
737 * rounded up to the next 1KB and expressed in KB. Likewise,
738 * the Rx FIFO should be large enough to accomodate at least
739 * one full receive packet and is similarly rounded up and
740 * expressed in KB. */
741 pba = E1000_READ_REG(&adapter->hw, PBA);
742 /* upper 16 bits has Tx packet buffer allocation size in KB */
743 tx_space = pba >> 16;
744 /* lower 16 bits has Rx packet buffer allocation size in KB */
745 pba &= 0xffff;
746 /* don't include ethernet FCS because hardware appends/strips */
747 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
748 VLAN_TAG_SIZE;
749 min_tx_space = min_rx_space;
750 min_tx_space *= 2;
751 min_tx_space = ALIGN(min_tx_space, 1024);
752 min_tx_space >>= 10;
753 min_rx_space = ALIGN(min_rx_space, 1024);
754 min_rx_space >>= 10;
755
756 /* If current Tx allocation is less than the min Tx FIFO size,
757 * and the min Tx FIFO size is less than the current Rx FIFO
758 * allocation, take space away from current Rx allocation */
759 if (tx_space < min_tx_space &&
760 ((min_tx_space - tx_space) < pba)) {
761 pba = pba - (min_tx_space - tx_space);
762
763 /* PCI/PCIx hardware has PBA alignment constraints */
764 switch (adapter->hw.mac_type) {
765 case e1000_82545 ... e1000_82546_rev_3:
766 pba &= ~(E1000_PBA_8K - 1);
767 break;
768 default:
769 break;
770 }
771
772 /* if short on rx space, rx wins and must trump tx
773 * adjustment or use Early Receive if available */
774 if (pba < min_rx_space) {
775 switch (adapter->hw.mac_type) {
776 case e1000_82573:
777 /* ERT enabled in e1000_configure_rx */
778 break;
779 default:
780 pba = min_rx_space;
781 break;
782 }
783 }
784 }
785 }
786
787 E1000_WRITE_REG(&adapter->hw, PBA, pba);
788
789 /* flow control settings */
790 /* Set the FC high water mark to 90% of the FIFO size.
791 * Required to clear last 3 LSB */
792 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
793 /* We can't use 90% on small FIFOs because the remainder
794 * would be less than 1 full frame. In this case, we size
795 * it to allow at least a full frame above the high water
796 * mark. */
797 if (pba < E1000_PBA_16K)
798 fc_high_water_mark = (pba * 1024) - 1600;
799
800 adapter->hw.fc_high_water = fc_high_water_mark;
801 adapter->hw.fc_low_water = fc_high_water_mark - 8;
802 if (adapter->hw.mac_type == e1000_80003es2lan)
803 adapter->hw.fc_pause_time = 0xFFFF;
804 else
805 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
806 adapter->hw.fc_send_xon = 1;
807 adapter->hw.fc = adapter->hw.original_fc;
808
809 /* Allow time for pending master requests to run */
810 e1000_reset_hw(&adapter->hw);
811 if (adapter->hw.mac_type >= e1000_82544)
812 E1000_WRITE_REG(&adapter->hw, WUC, 0);
813
814 if (e1000_init_hw(&adapter->hw))
815 DPRINTK(PROBE, ERR, "Hardware Error\n");
816 e1000_update_mng_vlan(adapter);
817
818 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
819 if (adapter->hw.mac_type >= e1000_82544 &&
820 adapter->hw.mac_type <= e1000_82547_rev_2 &&
821 adapter->hw.autoneg == 1 &&
822 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
823 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
824 /* clear phy power management bit if we are in gig only mode,
825 * which if enabled will attempt negotiation to 100Mb, which
826 * can cause a loss of link at power off or driver unload */
827 ctrl &= ~E1000_CTRL_SWDPIN3;
828 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
829 }
830
831 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
832 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
833
834 e1000_reset_adaptive(&adapter->hw);
835 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
836
837 if (!adapter->smart_power_down &&
838 (adapter->hw.mac_type == e1000_82571 ||
839 adapter->hw.mac_type == e1000_82572)) {
840 uint16_t phy_data = 0;
841 /* speed up time to link by disabling smart power down, ignore
842 * the return value of this function because there is nothing
843 * different we would do if it failed */
844 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
845 &phy_data);
846 phy_data &= ~IGP02E1000_PM_SPD;
847 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
848 phy_data);
849 }
850
851 e1000_release_manageability(adapter);
852 }
853
854 /**
855 * e1000_probe - Device Initialization Routine
856 * @pdev: PCI device information struct
857 * @ent: entry in e1000_pci_tbl
858 *
859 * Returns 0 on success, negative on failure
860 *
861 * e1000_probe initializes an adapter identified by a pci_dev structure.
862 * The OS initialization, configuring of the adapter private structure,
863 * and a hardware reset occur.
864 **/
865
866 static int __devinit
867 e1000_probe(struct pci_dev *pdev,
868 const struct pci_device_id *ent)
869 {
870 struct net_device *netdev;
871 struct e1000_adapter *adapter;
872 unsigned long mmio_start, mmio_len;
873 unsigned long flash_start, flash_len;
874
875 static int cards_found = 0;
876 static int global_quad_port_a = 0; /* global ksp3 port a indication */
877 int i, err, pci_using_dac;
878 uint16_t eeprom_data = 0;
879 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
880 if ((err = pci_enable_device(pdev)))
881 return err;
882
883 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
884 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
885 pci_using_dac = 1;
886 } else {
887 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
888 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
889 E1000_ERR("No usable DMA configuration, aborting\n");
890 goto err_dma;
891 }
892 pci_using_dac = 0;
893 }
894
895 if ((err = pci_request_regions(pdev, e1000_driver_name)))
896 goto err_pci_reg;
897
898 pci_set_master(pdev);
899
900 err = -ENOMEM;
901 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
902 if (!netdev)
903 goto err_alloc_etherdev;
904
905 SET_MODULE_OWNER(netdev);
906 SET_NETDEV_DEV(netdev, &pdev->dev);
907
908 pci_set_drvdata(pdev, netdev);
909 adapter = netdev_priv(netdev);
910 adapter->netdev = netdev;
911 adapter->pdev = pdev;
912 adapter->hw.back = adapter;
913 adapter->msg_enable = (1 << debug) - 1;
914
915 mmio_start = pci_resource_start(pdev, BAR_0);
916 mmio_len = pci_resource_len(pdev, BAR_0);
917
918 err = -EIO;
919 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
920 if (!adapter->hw.hw_addr)
921 goto err_ioremap;
922
923 for (i = BAR_1; i <= BAR_5; i++) {
924 if (pci_resource_len(pdev, i) == 0)
925 continue;
926 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
927 adapter->hw.io_base = pci_resource_start(pdev, i);
928 break;
929 }
930 }
931
932 netdev->open = &e1000_open;
933 netdev->stop = &e1000_close;
934 netdev->hard_start_xmit = &e1000_xmit_frame;
935 netdev->get_stats = &e1000_get_stats;
936 netdev->set_multicast_list = &e1000_set_multi;
937 netdev->set_mac_address = &e1000_set_mac;
938 netdev->change_mtu = &e1000_change_mtu;
939 netdev->do_ioctl = &e1000_ioctl;
940 e1000_set_ethtool_ops(netdev);
941 netdev->tx_timeout = &e1000_tx_timeout;
942 netdev->watchdog_timeo = 5 * HZ;
943 #ifdef CONFIG_E1000_NAPI
944 netdev->poll = &e1000_clean;
945 netdev->weight = 64;
946 #endif
947 netdev->vlan_rx_register = e1000_vlan_rx_register;
948 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
949 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
950 #ifdef CONFIG_NET_POLL_CONTROLLER
951 netdev->poll_controller = e1000_netpoll;
952 #endif
953 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
954
955 netdev->mem_start = mmio_start;
956 netdev->mem_end = mmio_start + mmio_len;
957 netdev->base_addr = adapter->hw.io_base;
958
959 adapter->bd_number = cards_found;
960
961 /* setup the private structure */
962
963 if ((err = e1000_sw_init(adapter)))
964 goto err_sw_init;
965
966 err = -EIO;
967 /* Flash BAR mapping must happen after e1000_sw_init
968 * because it depends on mac_type */
969 if ((adapter->hw.mac_type == e1000_ich8lan) &&
970 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
971 flash_start = pci_resource_start(pdev, 1);
972 flash_len = pci_resource_len(pdev, 1);
973 adapter->hw.flash_address = ioremap(flash_start, flash_len);
974 if (!adapter->hw.flash_address)
975 goto err_flashmap;
976 }
977
978 if (e1000_check_phy_reset_block(&adapter->hw))
979 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
980
981 if (adapter->hw.mac_type >= e1000_82543) {
982 netdev->features = NETIF_F_SG |
983 NETIF_F_HW_CSUM |
984 NETIF_F_HW_VLAN_TX |
985 NETIF_F_HW_VLAN_RX |
986 NETIF_F_HW_VLAN_FILTER;
987 if (adapter->hw.mac_type == e1000_ich8lan)
988 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
989 }
990
991 if ((adapter->hw.mac_type >= e1000_82544) &&
992 (adapter->hw.mac_type != e1000_82547))
993 netdev->features |= NETIF_F_TSO;
994
995 if (adapter->hw.mac_type > e1000_82547_rev_2)
996 netdev->features |= NETIF_F_TSO6;
997 if (pci_using_dac)
998 netdev->features |= NETIF_F_HIGHDMA;
999
1000 netdev->features |= NETIF_F_LLTX;
1001
1002 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1003
1004 /* initialize eeprom parameters */
1005
1006 if (e1000_init_eeprom_params(&adapter->hw)) {
1007 E1000_ERR("EEPROM initialization failed\n");
1008 goto err_eeprom;
1009 }
1010
1011 /* before reading the EEPROM, reset the controller to
1012 * put the device in a known good starting state */
1013
1014 e1000_reset_hw(&adapter->hw);
1015
1016 /* make sure the EEPROM is good */
1017
1018 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1019 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1020 goto err_eeprom;
1021 }
1022
1023 /* copy the MAC address out of the EEPROM */
1024
1025 if (e1000_read_mac_addr(&adapter->hw))
1026 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1027 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1028 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1029
1030 if (!is_valid_ether_addr(netdev->perm_addr)) {
1031 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1032 goto err_eeprom;
1033 }
1034
1035 e1000_get_bus_info(&adapter->hw);
1036
1037 init_timer(&adapter->tx_fifo_stall_timer);
1038 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1039 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1040
1041 init_timer(&adapter->watchdog_timer);
1042 adapter->watchdog_timer.function = &e1000_watchdog;
1043 adapter->watchdog_timer.data = (unsigned long) adapter;
1044
1045 init_timer(&adapter->phy_info_timer);
1046 adapter->phy_info_timer.function = &e1000_update_phy_info;
1047 adapter->phy_info_timer.data = (unsigned long) adapter;
1048
1049 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1050
1051 e1000_check_options(adapter);
1052
1053 /* Initial Wake on LAN setting
1054 * If APM wake is enabled in the EEPROM,
1055 * enable the ACPI Magic Packet filter
1056 */
1057
1058 switch (adapter->hw.mac_type) {
1059 case e1000_82542_rev2_0:
1060 case e1000_82542_rev2_1:
1061 case e1000_82543:
1062 break;
1063 case e1000_82544:
1064 e1000_read_eeprom(&adapter->hw,
1065 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1066 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1067 break;
1068 case e1000_ich8lan:
1069 e1000_read_eeprom(&adapter->hw,
1070 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1071 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1072 break;
1073 case e1000_82546:
1074 case e1000_82546_rev_3:
1075 case e1000_82571:
1076 case e1000_80003es2lan:
1077 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1078 e1000_read_eeprom(&adapter->hw,
1079 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1080 break;
1081 }
1082 /* Fall Through */
1083 default:
1084 e1000_read_eeprom(&adapter->hw,
1085 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1086 break;
1087 }
1088 if (eeprom_data & eeprom_apme_mask)
1089 adapter->eeprom_wol |= E1000_WUFC_MAG;
1090
1091 /* now that we have the eeprom settings, apply the special cases
1092 * where the eeprom may be wrong or the board simply won't support
1093 * wake on lan on a particular port */
1094 switch (pdev->device) {
1095 case E1000_DEV_ID_82546GB_PCIE:
1096 adapter->eeprom_wol = 0;
1097 break;
1098 case E1000_DEV_ID_82546EB_FIBER:
1099 case E1000_DEV_ID_82546GB_FIBER:
1100 case E1000_DEV_ID_82571EB_FIBER:
1101 /* Wake events only supported on port A for dual fiber
1102 * regardless of eeprom setting */
1103 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1104 adapter->eeprom_wol = 0;
1105 break;
1106 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1107 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1108 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1109 /* if quad port adapter, disable WoL on all but port A */
1110 if (global_quad_port_a != 0)
1111 adapter->eeprom_wol = 0;
1112 else
1113 adapter->quad_port_a = 1;
1114 /* Reset for multiple quad port adapters */
1115 if (++global_quad_port_a == 4)
1116 global_quad_port_a = 0;
1117 break;
1118 }
1119
1120 /* initialize the wol settings based on the eeprom settings */
1121 adapter->wol = adapter->eeprom_wol;
1122
1123 /* print bus type/speed/width info */
1124 {
1125 struct e1000_hw *hw = &adapter->hw;
1126 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1127 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1128 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1129 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1130 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1131 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1132 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1133 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1134 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1135 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1136 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1137 "32-bit"));
1138 }
1139
1140 for (i = 0; i < 6; i++)
1141 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1142
1143 /* reset the hardware with the new settings */
1144 e1000_reset(adapter);
1145
1146 /* If the controller is 82573 and f/w is AMT, do not set
1147 * DRV_LOAD until the interface is up. For all other cases,
1148 * let the f/w know that the h/w is now under the control
1149 * of the driver. */
1150 if (adapter->hw.mac_type != e1000_82573 ||
1151 !e1000_check_mng_mode(&adapter->hw))
1152 e1000_get_hw_control(adapter);
1153
1154 strcpy(netdev->name, "eth%d");
1155 if ((err = register_netdev(netdev)))
1156 goto err_register;
1157
1158 /* tell the stack to leave us alone until e1000_open() is called */
1159 netif_carrier_off(netdev);
1160 netif_stop_queue(netdev);
1161
1162 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1163
1164 cards_found++;
1165 return 0;
1166
1167 err_register:
1168 e1000_release_hw_control(adapter);
1169 err_eeprom:
1170 if (!e1000_check_phy_reset_block(&adapter->hw))
1171 e1000_phy_hw_reset(&adapter->hw);
1172
1173 if (adapter->hw.flash_address)
1174 iounmap(adapter->hw.flash_address);
1175 err_flashmap:
1176 #ifdef CONFIG_E1000_NAPI
1177 for (i = 0; i < adapter->num_rx_queues; i++)
1178 dev_put(&adapter->polling_netdev[i]);
1179 #endif
1180
1181 kfree(adapter->tx_ring);
1182 kfree(adapter->rx_ring);
1183 #ifdef CONFIG_E1000_NAPI
1184 kfree(adapter->polling_netdev);
1185 #endif
1186 err_sw_init:
1187 iounmap(adapter->hw.hw_addr);
1188 err_ioremap:
1189 free_netdev(netdev);
1190 err_alloc_etherdev:
1191 pci_release_regions(pdev);
1192 err_pci_reg:
1193 err_dma:
1194 pci_disable_device(pdev);
1195 return err;
1196 }
1197
1198 /**
1199 * e1000_remove - Device Removal Routine
1200 * @pdev: PCI device information struct
1201 *
1202 * e1000_remove is called by the PCI subsystem to alert the driver
1203 * that it should release a PCI device. The could be caused by a
1204 * Hot-Plug event, or because the driver is going to be removed from
1205 * memory.
1206 **/
1207
1208 static void __devexit
1209 e1000_remove(struct pci_dev *pdev)
1210 {
1211 struct net_device *netdev = pci_get_drvdata(pdev);
1212 struct e1000_adapter *adapter = netdev_priv(netdev);
1213 #ifdef CONFIG_E1000_NAPI
1214 int i;
1215 #endif
1216
1217 cancel_work_sync(&adapter->reset_task);
1218
1219 e1000_release_manageability(adapter);
1220
1221 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1222 * would have already happened in close and is redundant. */
1223 e1000_release_hw_control(adapter);
1224
1225 unregister_netdev(netdev);
1226 #ifdef CONFIG_E1000_NAPI
1227 for (i = 0; i < adapter->num_rx_queues; i++)
1228 dev_put(&adapter->polling_netdev[i]);
1229 #endif
1230
1231 if (!e1000_check_phy_reset_block(&adapter->hw))
1232 e1000_phy_hw_reset(&adapter->hw);
1233
1234 kfree(adapter->tx_ring);
1235 kfree(adapter->rx_ring);
1236 #ifdef CONFIG_E1000_NAPI
1237 kfree(adapter->polling_netdev);
1238 #endif
1239
1240 iounmap(adapter->hw.hw_addr);
1241 if (adapter->hw.flash_address)
1242 iounmap(adapter->hw.flash_address);
1243 pci_release_regions(pdev);
1244
1245 free_netdev(netdev);
1246
1247 pci_disable_device(pdev);
1248 }
1249
1250 /**
1251 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1252 * @adapter: board private structure to initialize
1253 *
1254 * e1000_sw_init initializes the Adapter private data structure.
1255 * Fields are initialized based on PCI device information and
1256 * OS network device settings (MTU size).
1257 **/
1258
1259 static int __devinit
1260 e1000_sw_init(struct e1000_adapter *adapter)
1261 {
1262 struct e1000_hw *hw = &adapter->hw;
1263 struct net_device *netdev = adapter->netdev;
1264 struct pci_dev *pdev = adapter->pdev;
1265 #ifdef CONFIG_E1000_NAPI
1266 int i;
1267 #endif
1268
1269 /* PCI config space info */
1270
1271 hw->vendor_id = pdev->vendor;
1272 hw->device_id = pdev->device;
1273 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1274 hw->subsystem_id = pdev->subsystem_device;
1275
1276 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1277
1278 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1279
1280 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1281 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1282 hw->max_frame_size = netdev->mtu +
1283 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1284 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1285
1286 /* identify the MAC */
1287
1288 if (e1000_set_mac_type(hw)) {
1289 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1290 return -EIO;
1291 }
1292
1293 switch (hw->mac_type) {
1294 default:
1295 break;
1296 case e1000_82541:
1297 case e1000_82547:
1298 case e1000_82541_rev_2:
1299 case e1000_82547_rev_2:
1300 hw->phy_init_script = 1;
1301 break;
1302 }
1303
1304 e1000_set_media_type(hw);
1305
1306 hw->wait_autoneg_complete = FALSE;
1307 hw->tbi_compatibility_en = TRUE;
1308 hw->adaptive_ifs = TRUE;
1309
1310 /* Copper options */
1311
1312 if (hw->media_type == e1000_media_type_copper) {
1313 hw->mdix = AUTO_ALL_MODES;
1314 hw->disable_polarity_correction = FALSE;
1315 hw->master_slave = E1000_MASTER_SLAVE;
1316 }
1317
1318 adapter->num_tx_queues = 1;
1319 adapter->num_rx_queues = 1;
1320
1321 if (e1000_alloc_queues(adapter)) {
1322 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1323 return -ENOMEM;
1324 }
1325
1326 #ifdef CONFIG_E1000_NAPI
1327 for (i = 0; i < adapter->num_rx_queues; i++) {
1328 adapter->polling_netdev[i].priv = adapter;
1329 adapter->polling_netdev[i].poll = &e1000_clean;
1330 adapter->polling_netdev[i].weight = 64;
1331 dev_hold(&adapter->polling_netdev[i]);
1332 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1333 }
1334 spin_lock_init(&adapter->tx_queue_lock);
1335 #endif
1336
1337 atomic_set(&adapter->irq_sem, 1);
1338 spin_lock_init(&adapter->stats_lock);
1339
1340 set_bit(__E1000_DOWN, &adapter->flags);
1341
1342 return 0;
1343 }
1344
1345 /**
1346 * e1000_alloc_queues - Allocate memory for all rings
1347 * @adapter: board private structure to initialize
1348 *
1349 * We allocate one ring per queue at run-time since we don't know the
1350 * number of queues at compile-time. The polling_netdev array is
1351 * intended for Multiqueue, but should work fine with a single queue.
1352 **/
1353
1354 static int __devinit
1355 e1000_alloc_queues(struct e1000_adapter *adapter)
1356 {
1357 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1358 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1359 if (!adapter->tx_ring)
1360 return -ENOMEM;
1361
1362 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1363 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1364 if (!adapter->rx_ring) {
1365 kfree(adapter->tx_ring);
1366 return -ENOMEM;
1367 }
1368
1369 #ifdef CONFIG_E1000_NAPI
1370 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1371 sizeof(struct net_device),
1372 GFP_KERNEL);
1373 if (!adapter->polling_netdev) {
1374 kfree(adapter->tx_ring);
1375 kfree(adapter->rx_ring);
1376 return -ENOMEM;
1377 }
1378 #endif
1379
1380 return E1000_SUCCESS;
1381 }
1382
1383 /**
1384 * e1000_open - Called when a network interface is made active
1385 * @netdev: network interface device structure
1386 *
1387 * Returns 0 on success, negative value on failure
1388 *
1389 * The open entry point is called when a network interface is made
1390 * active by the system (IFF_UP). At this point all resources needed
1391 * for transmit and receive operations are allocated, the interrupt
1392 * handler is registered with the OS, the watchdog timer is started,
1393 * and the stack is notified that the interface is ready.
1394 **/
1395
1396 static int
1397 e1000_open(struct net_device *netdev)
1398 {
1399 struct e1000_adapter *adapter = netdev_priv(netdev);
1400 int err;
1401
1402 /* disallow open during test */
1403 if (test_bit(__E1000_TESTING, &adapter->flags))
1404 return -EBUSY;
1405
1406 /* allocate transmit descriptors */
1407 err = e1000_setup_all_tx_resources(adapter);
1408 if (err)
1409 goto err_setup_tx;
1410
1411 /* allocate receive descriptors */
1412 err = e1000_setup_all_rx_resources(adapter);
1413 if (err)
1414 goto err_setup_rx;
1415
1416 e1000_power_up_phy(adapter);
1417
1418 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1419 if ((adapter->hw.mng_cookie.status &
1420 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1421 e1000_update_mng_vlan(adapter);
1422 }
1423
1424 /* If AMT is enabled, let the firmware know that the network
1425 * interface is now open */
1426 if (adapter->hw.mac_type == e1000_82573 &&
1427 e1000_check_mng_mode(&adapter->hw))
1428 e1000_get_hw_control(adapter);
1429
1430 /* before we allocate an interrupt, we must be ready to handle it.
1431 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1432 * as soon as we call pci_request_irq, so we have to setup our
1433 * clean_rx handler before we do so. */
1434 e1000_configure(adapter);
1435
1436 err = e1000_request_irq(adapter);
1437 if (err)
1438 goto err_req_irq;
1439
1440 /* From here on the code is the same as e1000_up() */
1441 clear_bit(__E1000_DOWN, &adapter->flags);
1442
1443 #ifdef CONFIG_E1000_NAPI
1444 netif_poll_enable(netdev);
1445 #endif
1446
1447 e1000_irq_enable(adapter);
1448
1449 /* fire a link status change interrupt to start the watchdog */
1450 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1451
1452 return E1000_SUCCESS;
1453
1454 err_req_irq:
1455 e1000_release_hw_control(adapter);
1456 e1000_power_down_phy(adapter);
1457 e1000_free_all_rx_resources(adapter);
1458 err_setup_rx:
1459 e1000_free_all_tx_resources(adapter);
1460 err_setup_tx:
1461 e1000_reset(adapter);
1462
1463 return err;
1464 }
1465
1466 /**
1467 * e1000_close - Disables a network interface
1468 * @netdev: network interface device structure
1469 *
1470 * Returns 0, this is not allowed to fail
1471 *
1472 * The close entry point is called when an interface is de-activated
1473 * by the OS. The hardware is still under the drivers control, but
1474 * needs to be disabled. A global MAC reset is issued to stop the
1475 * hardware, and all transmit and receive resources are freed.
1476 **/
1477
1478 static int
1479 e1000_close(struct net_device *netdev)
1480 {
1481 struct e1000_adapter *adapter = netdev_priv(netdev);
1482
1483 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1484 e1000_down(adapter);
1485 e1000_power_down_phy(adapter);
1486 e1000_free_irq(adapter);
1487
1488 e1000_free_all_tx_resources(adapter);
1489 e1000_free_all_rx_resources(adapter);
1490
1491 /* kill manageability vlan ID if supported, but not if a vlan with
1492 * the same ID is registered on the host OS (let 8021q kill it) */
1493 if ((adapter->hw.mng_cookie.status &
1494 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1495 !(adapter->vlgrp &&
1496 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1497 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1498 }
1499
1500 /* If AMT is enabled, let the firmware know that the network
1501 * interface is now closed */
1502 if (adapter->hw.mac_type == e1000_82573 &&
1503 e1000_check_mng_mode(&adapter->hw))
1504 e1000_release_hw_control(adapter);
1505
1506 return 0;
1507 }
1508
1509 /**
1510 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1511 * @adapter: address of board private structure
1512 * @start: address of beginning of memory
1513 * @len: length of memory
1514 **/
1515 static boolean_t
1516 e1000_check_64k_bound(struct e1000_adapter *adapter,
1517 void *start, unsigned long len)
1518 {
1519 unsigned long begin = (unsigned long) start;
1520 unsigned long end = begin + len;
1521
1522 /* First rev 82545 and 82546 need to not allow any memory
1523 * write location to cross 64k boundary due to errata 23 */
1524 if (adapter->hw.mac_type == e1000_82545 ||
1525 adapter->hw.mac_type == e1000_82546) {
1526 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1527 }
1528
1529 return TRUE;
1530 }
1531
1532 /**
1533 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1534 * @adapter: board private structure
1535 * @txdr: tx descriptor ring (for a specific queue) to setup
1536 *
1537 * Return 0 on success, negative on failure
1538 **/
1539
1540 static int
1541 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1542 struct e1000_tx_ring *txdr)
1543 {
1544 struct pci_dev *pdev = adapter->pdev;
1545 int size;
1546
1547 size = sizeof(struct e1000_buffer) * txdr->count;
1548 txdr->buffer_info = vmalloc(size);
1549 if (!txdr->buffer_info) {
1550 DPRINTK(PROBE, ERR,
1551 "Unable to allocate memory for the transmit descriptor ring\n");
1552 return -ENOMEM;
1553 }
1554 memset(txdr->buffer_info, 0, size);
1555
1556 /* round up to nearest 4K */
1557
1558 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1559 txdr->size = ALIGN(txdr->size, 4096);
1560
1561 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1562 if (!txdr->desc) {
1563 setup_tx_desc_die:
1564 vfree(txdr->buffer_info);
1565 DPRINTK(PROBE, ERR,
1566 "Unable to allocate memory for the transmit descriptor ring\n");
1567 return -ENOMEM;
1568 }
1569
1570 /* Fix for errata 23, can't cross 64kB boundary */
1571 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1572 void *olddesc = txdr->desc;
1573 dma_addr_t olddma = txdr->dma;
1574 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1575 "at %p\n", txdr->size, txdr->desc);
1576 /* Try again, without freeing the previous */
1577 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1578 /* Failed allocation, critical failure */
1579 if (!txdr->desc) {
1580 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1581 goto setup_tx_desc_die;
1582 }
1583
1584 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1585 /* give up */
1586 pci_free_consistent(pdev, txdr->size, txdr->desc,
1587 txdr->dma);
1588 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1589 DPRINTK(PROBE, ERR,
1590 "Unable to allocate aligned memory "
1591 "for the transmit descriptor ring\n");
1592 vfree(txdr->buffer_info);
1593 return -ENOMEM;
1594 } else {
1595 /* Free old allocation, new allocation was successful */
1596 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1597 }
1598 }
1599 memset(txdr->desc, 0, txdr->size);
1600
1601 txdr->next_to_use = 0;
1602 txdr->next_to_clean = 0;
1603 spin_lock_init(&txdr->tx_lock);
1604
1605 return 0;
1606 }
1607
1608 /**
1609 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1610 * (Descriptors) for all queues
1611 * @adapter: board private structure
1612 *
1613 * Return 0 on success, negative on failure
1614 **/
1615
1616 int
1617 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1618 {
1619 int i, err = 0;
1620
1621 for (i = 0; i < adapter->num_tx_queues; i++) {
1622 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1623 if (err) {
1624 DPRINTK(PROBE, ERR,
1625 "Allocation for Tx Queue %u failed\n", i);
1626 for (i-- ; i >= 0; i--)
1627 e1000_free_tx_resources(adapter,
1628 &adapter->tx_ring[i]);
1629 break;
1630 }
1631 }
1632
1633 return err;
1634 }
1635
1636 /**
1637 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1638 * @adapter: board private structure
1639 *
1640 * Configure the Tx unit of the MAC after a reset.
1641 **/
1642
1643 static void
1644 e1000_configure_tx(struct e1000_adapter *adapter)
1645 {
1646 uint64_t tdba;
1647 struct e1000_hw *hw = &adapter->hw;
1648 uint32_t tdlen, tctl, tipg, tarc;
1649 uint32_t ipgr1, ipgr2;
1650
1651 /* Setup the HW Tx Head and Tail descriptor pointers */
1652
1653 switch (adapter->num_tx_queues) {
1654 case 1:
1655 default:
1656 tdba = adapter->tx_ring[0].dma;
1657 tdlen = adapter->tx_ring[0].count *
1658 sizeof(struct e1000_tx_desc);
1659 E1000_WRITE_REG(hw, TDLEN, tdlen);
1660 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1661 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1662 E1000_WRITE_REG(hw, TDT, 0);
1663 E1000_WRITE_REG(hw, TDH, 0);
1664 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1665 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1666 break;
1667 }
1668
1669 /* Set the default values for the Tx Inter Packet Gap timer */
1670 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1671 (hw->media_type == e1000_media_type_fiber ||
1672 hw->media_type == e1000_media_type_internal_serdes))
1673 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1674 else
1675 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1676
1677 switch (hw->mac_type) {
1678 case e1000_82542_rev2_0:
1679 case e1000_82542_rev2_1:
1680 tipg = DEFAULT_82542_TIPG_IPGT;
1681 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1682 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1683 break;
1684 case e1000_80003es2lan:
1685 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1686 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1687 break;
1688 default:
1689 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1690 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1691 break;
1692 }
1693 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1694 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1695 E1000_WRITE_REG(hw, TIPG, tipg);
1696
1697 /* Set the Tx Interrupt Delay register */
1698
1699 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1700 if (hw->mac_type >= e1000_82540)
1701 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1702
1703 /* Program the Transmit Control Register */
1704
1705 tctl = E1000_READ_REG(hw, TCTL);
1706 tctl &= ~E1000_TCTL_CT;
1707 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1708 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1709
1710 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1711 tarc = E1000_READ_REG(hw, TARC0);
1712 /* set the speed mode bit, we'll clear it if we're not at
1713 * gigabit link later */
1714 tarc |= (1 << 21);
1715 E1000_WRITE_REG(hw, TARC0, tarc);
1716 } else if (hw->mac_type == e1000_80003es2lan) {
1717 tarc = E1000_READ_REG(hw, TARC0);
1718 tarc |= 1;
1719 E1000_WRITE_REG(hw, TARC0, tarc);
1720 tarc = E1000_READ_REG(hw, TARC1);
1721 tarc |= 1;
1722 E1000_WRITE_REG(hw, TARC1, tarc);
1723 }
1724
1725 e1000_config_collision_dist(hw);
1726
1727 /* Setup Transmit Descriptor Settings for eop descriptor */
1728 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1729
1730 /* only set IDE if we are delaying interrupts using the timers */
1731 if (adapter->tx_int_delay)
1732 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1733
1734 if (hw->mac_type < e1000_82543)
1735 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1736 else
1737 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1738
1739 /* Cache if we're 82544 running in PCI-X because we'll
1740 * need this to apply a workaround later in the send path. */
1741 if (hw->mac_type == e1000_82544 &&
1742 hw->bus_type == e1000_bus_type_pcix)
1743 adapter->pcix_82544 = 1;
1744
1745 E1000_WRITE_REG(hw, TCTL, tctl);
1746
1747 }
1748
1749 /**
1750 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1751 * @adapter: board private structure
1752 * @rxdr: rx descriptor ring (for a specific queue) to setup
1753 *
1754 * Returns 0 on success, negative on failure
1755 **/
1756
1757 static int
1758 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1759 struct e1000_rx_ring *rxdr)
1760 {
1761 struct pci_dev *pdev = adapter->pdev;
1762 int size, desc_len;
1763
1764 size = sizeof(struct e1000_buffer) * rxdr->count;
1765 rxdr->buffer_info = vmalloc(size);
1766 if (!rxdr->buffer_info) {
1767 DPRINTK(PROBE, ERR,
1768 "Unable to allocate memory for the receive descriptor ring\n");
1769 return -ENOMEM;
1770 }
1771 memset(rxdr->buffer_info, 0, size);
1772
1773 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1774 GFP_KERNEL);
1775 if (!rxdr->ps_page) {
1776 vfree(rxdr->buffer_info);
1777 DPRINTK(PROBE, ERR,
1778 "Unable to allocate memory for the receive descriptor ring\n");
1779 return -ENOMEM;
1780 }
1781
1782 rxdr->ps_page_dma = kcalloc(rxdr->count,
1783 sizeof(struct e1000_ps_page_dma),
1784 GFP_KERNEL);
1785 if (!rxdr->ps_page_dma) {
1786 vfree(rxdr->buffer_info);
1787 kfree(rxdr->ps_page);
1788 DPRINTK(PROBE, ERR,
1789 "Unable to allocate memory for the receive descriptor ring\n");
1790 return -ENOMEM;
1791 }
1792
1793 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1794 desc_len = sizeof(struct e1000_rx_desc);
1795 else
1796 desc_len = sizeof(union e1000_rx_desc_packet_split);
1797
1798 /* Round up to nearest 4K */
1799
1800 rxdr->size = rxdr->count * desc_len;
1801 rxdr->size = ALIGN(rxdr->size, 4096);
1802
1803 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1804
1805 if (!rxdr->desc) {
1806 DPRINTK(PROBE, ERR,
1807 "Unable to allocate memory for the receive descriptor ring\n");
1808 setup_rx_desc_die:
1809 vfree(rxdr->buffer_info);
1810 kfree(rxdr->ps_page);
1811 kfree(rxdr->ps_page_dma);
1812 return -ENOMEM;
1813 }
1814
1815 /* Fix for errata 23, can't cross 64kB boundary */
1816 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1817 void *olddesc = rxdr->desc;
1818 dma_addr_t olddma = rxdr->dma;
1819 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1820 "at %p\n", rxdr->size, rxdr->desc);
1821 /* Try again, without freeing the previous */
1822 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1823 /* Failed allocation, critical failure */
1824 if (!rxdr->desc) {
1825 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1826 DPRINTK(PROBE, ERR,
1827 "Unable to allocate memory "
1828 "for the receive descriptor ring\n");
1829 goto setup_rx_desc_die;
1830 }
1831
1832 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1833 /* give up */
1834 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1835 rxdr->dma);
1836 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1837 DPRINTK(PROBE, ERR,
1838 "Unable to allocate aligned memory "
1839 "for the receive descriptor ring\n");
1840 goto setup_rx_desc_die;
1841 } else {
1842 /* Free old allocation, new allocation was successful */
1843 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1844 }
1845 }
1846 memset(rxdr->desc, 0, rxdr->size);
1847
1848 rxdr->next_to_clean = 0;
1849 rxdr->next_to_use = 0;
1850
1851 return 0;
1852 }
1853
1854 /**
1855 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1856 * (Descriptors) for all queues
1857 * @adapter: board private structure
1858 *
1859 * Return 0 on success, negative on failure
1860 **/
1861
1862 int
1863 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1864 {
1865 int i, err = 0;
1866
1867 for (i = 0; i < adapter->num_rx_queues; i++) {
1868 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1869 if (err) {
1870 DPRINTK(PROBE, ERR,
1871 "Allocation for Rx Queue %u failed\n", i);
1872 for (i-- ; i >= 0; i--)
1873 e1000_free_rx_resources(adapter,
1874 &adapter->rx_ring[i]);
1875 break;
1876 }
1877 }
1878
1879 return err;
1880 }
1881
1882 /**
1883 * e1000_setup_rctl - configure the receive control registers
1884 * @adapter: Board private structure
1885 **/
1886 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1887 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1888 static void
1889 e1000_setup_rctl(struct e1000_adapter *adapter)
1890 {
1891 uint32_t rctl, rfctl;
1892 uint32_t psrctl = 0;
1893 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1894 uint32_t pages = 0;
1895 #endif
1896
1897 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1898
1899 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1900
1901 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1902 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1903 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1904
1905 if (adapter->hw.tbi_compatibility_on == 1)
1906 rctl |= E1000_RCTL_SBP;
1907 else
1908 rctl &= ~E1000_RCTL_SBP;
1909
1910 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1911 rctl &= ~E1000_RCTL_LPE;
1912 else
1913 rctl |= E1000_RCTL_LPE;
1914
1915 /* Setup buffer sizes */
1916 rctl &= ~E1000_RCTL_SZ_4096;
1917 rctl |= E1000_RCTL_BSEX;
1918 switch (adapter->rx_buffer_len) {
1919 case E1000_RXBUFFER_256:
1920 rctl |= E1000_RCTL_SZ_256;
1921 rctl &= ~E1000_RCTL_BSEX;
1922 break;
1923 case E1000_RXBUFFER_512:
1924 rctl |= E1000_RCTL_SZ_512;
1925 rctl &= ~E1000_RCTL_BSEX;
1926 break;
1927 case E1000_RXBUFFER_1024:
1928 rctl |= E1000_RCTL_SZ_1024;
1929 rctl &= ~E1000_RCTL_BSEX;
1930 break;
1931 case E1000_RXBUFFER_2048:
1932 default:
1933 rctl |= E1000_RCTL_SZ_2048;
1934 rctl &= ~E1000_RCTL_BSEX;
1935 break;
1936 case E1000_RXBUFFER_4096:
1937 rctl |= E1000_RCTL_SZ_4096;
1938 break;
1939 case E1000_RXBUFFER_8192:
1940 rctl |= E1000_RCTL_SZ_8192;
1941 break;
1942 case E1000_RXBUFFER_16384:
1943 rctl |= E1000_RCTL_SZ_16384;
1944 break;
1945 }
1946
1947 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1948 /* 82571 and greater support packet-split where the protocol
1949 * header is placed in skb->data and the packet data is
1950 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1951 * In the case of a non-split, skb->data is linearly filled,
1952 * followed by the page buffers. Therefore, skb->data is
1953 * sized to hold the largest protocol header.
1954 */
1955 /* allocations using alloc_page take too long for regular MTU
1956 * so only enable packet split for jumbo frames */
1957 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1958 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1959 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1960 adapter->rx_ps_pages = pages;
1961 else
1962 adapter->rx_ps_pages = 0;
1963 #endif
1964 if (adapter->rx_ps_pages) {
1965 /* Configure extra packet-split registers */
1966 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1967 rfctl |= E1000_RFCTL_EXTEN;
1968 /* disable packet split support for IPv6 extension headers,
1969 * because some malformed IPv6 headers can hang the RX */
1970 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1971 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1972
1973 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1974
1975 rctl |= E1000_RCTL_DTYP_PS;
1976
1977 psrctl |= adapter->rx_ps_bsize0 >>
1978 E1000_PSRCTL_BSIZE0_SHIFT;
1979
1980 switch (adapter->rx_ps_pages) {
1981 case 3:
1982 psrctl |= PAGE_SIZE <<
1983 E1000_PSRCTL_BSIZE3_SHIFT;
1984 case 2:
1985 psrctl |= PAGE_SIZE <<
1986 E1000_PSRCTL_BSIZE2_SHIFT;
1987 case 1:
1988 psrctl |= PAGE_SIZE >>
1989 E1000_PSRCTL_BSIZE1_SHIFT;
1990 break;
1991 }
1992
1993 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1994 }
1995
1996 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1997 }
1998
1999 /**
2000 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2001 * @adapter: board private structure
2002 *
2003 * Configure the Rx unit of the MAC after a reset.
2004 **/
2005
2006 static void
2007 e1000_configure_rx(struct e1000_adapter *adapter)
2008 {
2009 uint64_t rdba;
2010 struct e1000_hw *hw = &adapter->hw;
2011 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2012
2013 if (adapter->rx_ps_pages) {
2014 /* this is a 32 byte descriptor */
2015 rdlen = adapter->rx_ring[0].count *
2016 sizeof(union e1000_rx_desc_packet_split);
2017 adapter->clean_rx = e1000_clean_rx_irq_ps;
2018 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2019 } else {
2020 rdlen = adapter->rx_ring[0].count *
2021 sizeof(struct e1000_rx_desc);
2022 adapter->clean_rx = e1000_clean_rx_irq;
2023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2024 }
2025
2026 /* disable receives while setting up the descriptors */
2027 rctl = E1000_READ_REG(hw, RCTL);
2028 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2029
2030 /* set the Receive Delay Timer Register */
2031 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2032
2033 if (hw->mac_type >= e1000_82540) {
2034 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2035 if (adapter->itr_setting != 0)
2036 E1000_WRITE_REG(hw, ITR,
2037 1000000000 / (adapter->itr * 256));
2038 }
2039
2040 if (hw->mac_type >= e1000_82571) {
2041 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2042 /* Reset delay timers after every interrupt */
2043 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2044 #ifdef CONFIG_E1000_NAPI
2045 /* Auto-Mask interrupts upon ICR access */
2046 ctrl_ext |= E1000_CTRL_EXT_IAME;
2047 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2048 #endif
2049 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2050 E1000_WRITE_FLUSH(hw);
2051 }
2052
2053 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2054 * the Base and Length of the Rx Descriptor Ring */
2055 switch (adapter->num_rx_queues) {
2056 case 1:
2057 default:
2058 rdba = adapter->rx_ring[0].dma;
2059 E1000_WRITE_REG(hw, RDLEN, rdlen);
2060 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2061 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2062 E1000_WRITE_REG(hw, RDT, 0);
2063 E1000_WRITE_REG(hw, RDH, 0);
2064 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2065 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2066 break;
2067 }
2068
2069 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2070 if (hw->mac_type >= e1000_82543) {
2071 rxcsum = E1000_READ_REG(hw, RXCSUM);
2072 if (adapter->rx_csum == TRUE) {
2073 rxcsum |= E1000_RXCSUM_TUOFL;
2074
2075 /* Enable 82571 IPv4 payload checksum for UDP fragments
2076 * Must be used in conjunction with packet-split. */
2077 if ((hw->mac_type >= e1000_82571) &&
2078 (adapter->rx_ps_pages)) {
2079 rxcsum |= E1000_RXCSUM_IPPCSE;
2080 }
2081 } else {
2082 rxcsum &= ~E1000_RXCSUM_TUOFL;
2083 /* don't need to clear IPPCSE as it defaults to 0 */
2084 }
2085 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2086 }
2087
2088 /* enable early receives on 82573, only takes effect if using > 2048
2089 * byte total frame size. for example only for jumbo frames */
2090 #define E1000_ERT_2048 0x100
2091 if (hw->mac_type == e1000_82573)
2092 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2093
2094 /* Enable Receives */
2095 E1000_WRITE_REG(hw, RCTL, rctl);
2096 }
2097
2098 /**
2099 * e1000_free_tx_resources - Free Tx Resources per Queue
2100 * @adapter: board private structure
2101 * @tx_ring: Tx descriptor ring for a specific queue
2102 *
2103 * Free all transmit software resources
2104 **/
2105
2106 static void
2107 e1000_free_tx_resources(struct e1000_adapter *adapter,
2108 struct e1000_tx_ring *tx_ring)
2109 {
2110 struct pci_dev *pdev = adapter->pdev;
2111
2112 e1000_clean_tx_ring(adapter, tx_ring);
2113
2114 vfree(tx_ring->buffer_info);
2115 tx_ring->buffer_info = NULL;
2116
2117 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2118
2119 tx_ring->desc = NULL;
2120 }
2121
2122 /**
2123 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2124 * @adapter: board private structure
2125 *
2126 * Free all transmit software resources
2127 **/
2128
2129 void
2130 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2131 {
2132 int i;
2133
2134 for (i = 0; i < adapter->num_tx_queues; i++)
2135 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2136 }
2137
2138 static void
2139 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2140 struct e1000_buffer *buffer_info)
2141 {
2142 if (buffer_info->dma) {
2143 pci_unmap_page(adapter->pdev,
2144 buffer_info->dma,
2145 buffer_info->length,
2146 PCI_DMA_TODEVICE);
2147 buffer_info->dma = 0;
2148 }
2149 if (buffer_info->skb) {
2150 dev_kfree_skb_any(buffer_info->skb);
2151 buffer_info->skb = NULL;
2152 }
2153 /* buffer_info must be completely set up in the transmit path */
2154 }
2155
2156 /**
2157 * e1000_clean_tx_ring - Free Tx Buffers
2158 * @adapter: board private structure
2159 * @tx_ring: ring to be cleaned
2160 **/
2161
2162 static void
2163 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2164 struct e1000_tx_ring *tx_ring)
2165 {
2166 struct e1000_buffer *buffer_info;
2167 unsigned long size;
2168 unsigned int i;
2169
2170 /* Free all the Tx ring sk_buffs */
2171
2172 for (i = 0; i < tx_ring->count; i++) {
2173 buffer_info = &tx_ring->buffer_info[i];
2174 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2175 }
2176
2177 size = sizeof(struct e1000_buffer) * tx_ring->count;
2178 memset(tx_ring->buffer_info, 0, size);
2179
2180 /* Zero out the descriptor ring */
2181
2182 memset(tx_ring->desc, 0, tx_ring->size);
2183
2184 tx_ring->next_to_use = 0;
2185 tx_ring->next_to_clean = 0;
2186 tx_ring->last_tx_tso = 0;
2187
2188 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2189 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2190 }
2191
2192 /**
2193 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2194 * @adapter: board private structure
2195 **/
2196
2197 static void
2198 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2199 {
2200 int i;
2201
2202 for (i = 0; i < adapter->num_tx_queues; i++)
2203 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2204 }
2205
2206 /**
2207 * e1000_free_rx_resources - Free Rx Resources
2208 * @adapter: board private structure
2209 * @rx_ring: ring to clean the resources from
2210 *
2211 * Free all receive software resources
2212 **/
2213
2214 static void
2215 e1000_free_rx_resources(struct e1000_adapter *adapter,
2216 struct e1000_rx_ring *rx_ring)
2217 {
2218 struct pci_dev *pdev = adapter->pdev;
2219
2220 e1000_clean_rx_ring(adapter, rx_ring);
2221
2222 vfree(rx_ring->buffer_info);
2223 rx_ring->buffer_info = NULL;
2224 kfree(rx_ring->ps_page);
2225 rx_ring->ps_page = NULL;
2226 kfree(rx_ring->ps_page_dma);
2227 rx_ring->ps_page_dma = NULL;
2228
2229 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2230
2231 rx_ring->desc = NULL;
2232 }
2233
2234 /**
2235 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2236 * @adapter: board private structure
2237 *
2238 * Free all receive software resources
2239 **/
2240
2241 void
2242 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2243 {
2244 int i;
2245
2246 for (i = 0; i < adapter->num_rx_queues; i++)
2247 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2248 }
2249
2250 /**
2251 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2252 * @adapter: board private structure
2253 * @rx_ring: ring to free buffers from
2254 **/
2255
2256 static void
2257 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2258 struct e1000_rx_ring *rx_ring)
2259 {
2260 struct e1000_buffer *buffer_info;
2261 struct e1000_ps_page *ps_page;
2262 struct e1000_ps_page_dma *ps_page_dma;
2263 struct pci_dev *pdev = adapter->pdev;
2264 unsigned long size;
2265 unsigned int i, j;
2266
2267 /* Free all the Rx ring sk_buffs */
2268 for (i = 0; i < rx_ring->count; i++) {
2269 buffer_info = &rx_ring->buffer_info[i];
2270 if (buffer_info->skb) {
2271 pci_unmap_single(pdev,
2272 buffer_info->dma,
2273 buffer_info->length,
2274 PCI_DMA_FROMDEVICE);
2275
2276 dev_kfree_skb(buffer_info->skb);
2277 buffer_info->skb = NULL;
2278 }
2279 ps_page = &rx_ring->ps_page[i];
2280 ps_page_dma = &rx_ring->ps_page_dma[i];
2281 for (j = 0; j < adapter->rx_ps_pages; j++) {
2282 if (!ps_page->ps_page[j]) break;
2283 pci_unmap_page(pdev,
2284 ps_page_dma->ps_page_dma[j],
2285 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2286 ps_page_dma->ps_page_dma[j] = 0;
2287 put_page(ps_page->ps_page[j]);
2288 ps_page->ps_page[j] = NULL;
2289 }
2290 }
2291
2292 size = sizeof(struct e1000_buffer) * rx_ring->count;
2293 memset(rx_ring->buffer_info, 0, size);
2294 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2295 memset(rx_ring->ps_page, 0, size);
2296 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2297 memset(rx_ring->ps_page_dma, 0, size);
2298
2299 /* Zero out the descriptor ring */
2300
2301 memset(rx_ring->desc, 0, rx_ring->size);
2302
2303 rx_ring->next_to_clean = 0;
2304 rx_ring->next_to_use = 0;
2305
2306 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2307 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2308 }
2309
2310 /**
2311 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2312 * @adapter: board private structure
2313 **/
2314
2315 static void
2316 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2317 {
2318 int i;
2319
2320 for (i = 0; i < adapter->num_rx_queues; i++)
2321 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2322 }
2323
2324 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2325 * and memory write and invalidate disabled for certain operations
2326 */
2327 static void
2328 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2329 {
2330 struct net_device *netdev = adapter->netdev;
2331 uint32_t rctl;
2332
2333 e1000_pci_clear_mwi(&adapter->hw);
2334
2335 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2336 rctl |= E1000_RCTL_RST;
2337 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2338 E1000_WRITE_FLUSH(&adapter->hw);
2339 mdelay(5);
2340
2341 if (netif_running(netdev))
2342 e1000_clean_all_rx_rings(adapter);
2343 }
2344
2345 static void
2346 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2347 {
2348 struct net_device *netdev = adapter->netdev;
2349 uint32_t rctl;
2350
2351 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2352 rctl &= ~E1000_RCTL_RST;
2353 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2354 E1000_WRITE_FLUSH(&adapter->hw);
2355 mdelay(5);
2356
2357 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2358 e1000_pci_set_mwi(&adapter->hw);
2359
2360 if (netif_running(netdev)) {
2361 /* No need to loop, because 82542 supports only 1 queue */
2362 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2363 e1000_configure_rx(adapter);
2364 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2365 }
2366 }
2367
2368 /**
2369 * e1000_set_mac - Change the Ethernet Address of the NIC
2370 * @netdev: network interface device structure
2371 * @p: pointer to an address structure
2372 *
2373 * Returns 0 on success, negative on failure
2374 **/
2375
2376 static int
2377 e1000_set_mac(struct net_device *netdev, void *p)
2378 {
2379 struct e1000_adapter *adapter = netdev_priv(netdev);
2380 struct sockaddr *addr = p;
2381
2382 if (!is_valid_ether_addr(addr->sa_data))
2383 return -EADDRNOTAVAIL;
2384
2385 /* 82542 2.0 needs to be in reset to write receive address registers */
2386
2387 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2388 e1000_enter_82542_rst(adapter);
2389
2390 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2391 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2392
2393 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2394
2395 /* With 82571 controllers, LAA may be overwritten (with the default)
2396 * due to controller reset from the other port. */
2397 if (adapter->hw.mac_type == e1000_82571) {
2398 /* activate the work around */
2399 adapter->hw.laa_is_present = 1;
2400
2401 /* Hold a copy of the LAA in RAR[14] This is done so that
2402 * between the time RAR[0] gets clobbered and the time it
2403 * gets fixed (in e1000_watchdog), the actual LAA is in one
2404 * of the RARs and no incoming packets directed to this port
2405 * are dropped. Eventaully the LAA will be in RAR[0] and
2406 * RAR[14] */
2407 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2408 E1000_RAR_ENTRIES - 1);
2409 }
2410
2411 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2412 e1000_leave_82542_rst(adapter);
2413
2414 return 0;
2415 }
2416
2417 /**
2418 * e1000_set_multi - Multicast and Promiscuous mode set
2419 * @netdev: network interface device structure
2420 *
2421 * The set_multi entry point is called whenever the multicast address
2422 * list or the network interface flags are updated. This routine is
2423 * responsible for configuring the hardware for proper multicast,
2424 * promiscuous mode, and all-multi behavior.
2425 **/
2426
2427 static void
2428 e1000_set_multi(struct net_device *netdev)
2429 {
2430 struct e1000_adapter *adapter = netdev_priv(netdev);
2431 struct e1000_hw *hw = &adapter->hw;
2432 struct dev_mc_list *mc_ptr;
2433 uint32_t rctl;
2434 uint32_t hash_value;
2435 int i, rar_entries = E1000_RAR_ENTRIES;
2436 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2437 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2438 E1000_NUM_MTA_REGISTERS;
2439
2440 if (adapter->hw.mac_type == e1000_ich8lan)
2441 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2442
2443 /* reserve RAR[14] for LAA over-write work-around */
2444 if (adapter->hw.mac_type == e1000_82571)
2445 rar_entries--;
2446
2447 /* Check for Promiscuous and All Multicast modes */
2448
2449 rctl = E1000_READ_REG(hw, RCTL);
2450
2451 if (netdev->flags & IFF_PROMISC) {
2452 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2453 } else if (netdev->flags & IFF_ALLMULTI) {
2454 rctl |= E1000_RCTL_MPE;
2455 rctl &= ~E1000_RCTL_UPE;
2456 } else {
2457 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2458 }
2459
2460 E1000_WRITE_REG(hw, RCTL, rctl);
2461
2462 /* 82542 2.0 needs to be in reset to write receive address registers */
2463
2464 if (hw->mac_type == e1000_82542_rev2_0)
2465 e1000_enter_82542_rst(adapter);
2466
2467 /* load the first 14 multicast address into the exact filters 1-14
2468 * RAR 0 is used for the station MAC adddress
2469 * if there are not 14 addresses, go ahead and clear the filters
2470 * -- with 82571 controllers only 0-13 entries are filled here
2471 */
2472 mc_ptr = netdev->mc_list;
2473
2474 for (i = 1; i < rar_entries; i++) {
2475 if (mc_ptr) {
2476 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2477 mc_ptr = mc_ptr->next;
2478 } else {
2479 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2480 E1000_WRITE_FLUSH(hw);
2481 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2482 E1000_WRITE_FLUSH(hw);
2483 }
2484 }
2485
2486 /* clear the old settings from the multicast hash table */
2487
2488 for (i = 0; i < mta_reg_count; i++) {
2489 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2490 E1000_WRITE_FLUSH(hw);
2491 }
2492
2493 /* load any remaining addresses into the hash table */
2494
2495 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2496 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2497 e1000_mta_set(hw, hash_value);
2498 }
2499
2500 if (hw->mac_type == e1000_82542_rev2_0)
2501 e1000_leave_82542_rst(adapter);
2502 }
2503
2504 /* Need to wait a few seconds after link up to get diagnostic information from
2505 * the phy */
2506
2507 static void
2508 e1000_update_phy_info(unsigned long data)
2509 {
2510 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2511 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2512 }
2513
2514 /**
2515 * e1000_82547_tx_fifo_stall - Timer Call-back
2516 * @data: pointer to adapter cast into an unsigned long
2517 **/
2518
2519 static void
2520 e1000_82547_tx_fifo_stall(unsigned long data)
2521 {
2522 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2523 struct net_device *netdev = adapter->netdev;
2524 uint32_t tctl;
2525
2526 if (atomic_read(&adapter->tx_fifo_stall)) {
2527 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2528 E1000_READ_REG(&adapter->hw, TDH)) &&
2529 (E1000_READ_REG(&adapter->hw, TDFT) ==
2530 E1000_READ_REG(&adapter->hw, TDFH)) &&
2531 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2532 E1000_READ_REG(&adapter->hw, TDFHS))) {
2533 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2534 E1000_WRITE_REG(&adapter->hw, TCTL,
2535 tctl & ~E1000_TCTL_EN);
2536 E1000_WRITE_REG(&adapter->hw, TDFT,
2537 adapter->tx_head_addr);
2538 E1000_WRITE_REG(&adapter->hw, TDFH,
2539 adapter->tx_head_addr);
2540 E1000_WRITE_REG(&adapter->hw, TDFTS,
2541 adapter->tx_head_addr);
2542 E1000_WRITE_REG(&adapter->hw, TDFHS,
2543 adapter->tx_head_addr);
2544 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2545 E1000_WRITE_FLUSH(&adapter->hw);
2546
2547 adapter->tx_fifo_head = 0;
2548 atomic_set(&adapter->tx_fifo_stall, 0);
2549 netif_wake_queue(netdev);
2550 } else {
2551 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2552 }
2553 }
2554 }
2555
2556 /**
2557 * e1000_watchdog - Timer Call-back
2558 * @data: pointer to adapter cast into an unsigned long
2559 **/
2560 static void
2561 e1000_watchdog(unsigned long data)
2562 {
2563 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2564 struct net_device *netdev = adapter->netdev;
2565 struct e1000_tx_ring *txdr = adapter->tx_ring;
2566 uint32_t link, tctl;
2567 int32_t ret_val;
2568
2569 ret_val = e1000_check_for_link(&adapter->hw);
2570 if ((ret_val == E1000_ERR_PHY) &&
2571 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2572 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2573 /* See e1000_kumeran_lock_loss_workaround() */
2574 DPRINTK(LINK, INFO,
2575 "Gigabit has been disabled, downgrading speed\n");
2576 }
2577
2578 if (adapter->hw.mac_type == e1000_82573) {
2579 e1000_enable_tx_pkt_filtering(&adapter->hw);
2580 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2581 e1000_update_mng_vlan(adapter);
2582 }
2583
2584 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2585 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2586 link = !adapter->hw.serdes_link_down;
2587 else
2588 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2589
2590 if (link) {
2591 if (!netif_carrier_ok(netdev)) {
2592 uint32_t ctrl;
2593 boolean_t txb2b = 1;
2594 e1000_get_speed_and_duplex(&adapter->hw,
2595 &adapter->link_speed,
2596 &adapter->link_duplex);
2597
2598 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2599 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2600 "Flow Control: %s\n",
2601 adapter->link_speed,
2602 adapter->link_duplex == FULL_DUPLEX ?
2603 "Full Duplex" : "Half Duplex",
2604 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2605 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2606 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2607 E1000_CTRL_TFCE) ? "TX" : "None" )));
2608
2609 /* tweak tx_queue_len according to speed/duplex
2610 * and adjust the timeout factor */
2611 netdev->tx_queue_len = adapter->tx_queue_len;
2612 adapter->tx_timeout_factor = 1;
2613 switch (adapter->link_speed) {
2614 case SPEED_10:
2615 txb2b = 0;
2616 netdev->tx_queue_len = 10;
2617 adapter->tx_timeout_factor = 8;
2618 break;
2619 case SPEED_100:
2620 txb2b = 0;
2621 netdev->tx_queue_len = 100;
2622 /* maybe add some timeout factor ? */
2623 break;
2624 }
2625
2626 if ((adapter->hw.mac_type == e1000_82571 ||
2627 adapter->hw.mac_type == e1000_82572) &&
2628 txb2b == 0) {
2629 uint32_t tarc0;
2630 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2631 tarc0 &= ~(1 << 21);
2632 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2633 }
2634
2635 /* disable TSO for pcie and 10/100 speeds, to avoid
2636 * some hardware issues */
2637 if (!adapter->tso_force &&
2638 adapter->hw.bus_type == e1000_bus_type_pci_express){
2639 switch (adapter->link_speed) {
2640 case SPEED_10:
2641 case SPEED_100:
2642 DPRINTK(PROBE,INFO,
2643 "10/100 speed: disabling TSO\n");
2644 netdev->features &= ~NETIF_F_TSO;
2645 netdev->features &= ~NETIF_F_TSO6;
2646 break;
2647 case SPEED_1000:
2648 netdev->features |= NETIF_F_TSO;
2649 netdev->features |= NETIF_F_TSO6;
2650 break;
2651 default:
2652 /* oops */
2653 break;
2654 }
2655 }
2656
2657 /* enable transmits in the hardware, need to do this
2658 * after setting TARC0 */
2659 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2660 tctl |= E1000_TCTL_EN;
2661 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2662
2663 netif_carrier_on(netdev);
2664 netif_wake_queue(netdev);
2665 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2666 adapter->smartspeed = 0;
2667 } else {
2668 /* make sure the receive unit is started */
2669 if (adapter->hw.rx_needs_kicking) {
2670 struct e1000_hw *hw = &adapter->hw;
2671 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2672 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2673 }
2674 }
2675 } else {
2676 if (netif_carrier_ok(netdev)) {
2677 adapter->link_speed = 0;
2678 adapter->link_duplex = 0;
2679 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2680 netif_carrier_off(netdev);
2681 netif_stop_queue(netdev);
2682 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2683
2684 /* 80003ES2LAN workaround--
2685 * For packet buffer work-around on link down event;
2686 * disable receives in the ISR and
2687 * reset device here in the watchdog
2688 */
2689 if (adapter->hw.mac_type == e1000_80003es2lan)
2690 /* reset device */
2691 schedule_work(&adapter->reset_task);
2692 }
2693
2694 e1000_smartspeed(adapter);
2695 }
2696
2697 e1000_update_stats(adapter);
2698
2699 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2700 adapter->tpt_old = adapter->stats.tpt;
2701 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2702 adapter->colc_old = adapter->stats.colc;
2703
2704 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2705 adapter->gorcl_old = adapter->stats.gorcl;
2706 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2707 adapter->gotcl_old = adapter->stats.gotcl;
2708
2709 e1000_update_adaptive(&adapter->hw);
2710
2711 if (!netif_carrier_ok(netdev)) {
2712 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2713 /* We've lost link, so the controller stops DMA,
2714 * but we've got queued Tx work that's never going
2715 * to get done, so reset controller to flush Tx.
2716 * (Do the reset outside of interrupt context). */
2717 adapter->tx_timeout_count++;
2718 schedule_work(&adapter->reset_task);
2719 }
2720 }
2721
2722 /* Cause software interrupt to ensure rx ring is cleaned */
2723 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2724
2725 /* Force detection of hung controller every watchdog period */
2726 adapter->detect_tx_hung = TRUE;
2727
2728 /* With 82571 controllers, LAA may be overwritten due to controller
2729 * reset from the other port. Set the appropriate LAA in RAR[0] */
2730 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2731 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2732
2733 /* Reset the timer */
2734 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2735 }
2736
2737 enum latency_range {
2738 lowest_latency = 0,
2739 low_latency = 1,
2740 bulk_latency = 2,
2741 latency_invalid = 255
2742 };
2743
2744 /**
2745 * e1000_update_itr - update the dynamic ITR value based on statistics
2746 * Stores a new ITR value based on packets and byte
2747 * counts during the last interrupt. The advantage of per interrupt
2748 * computation is faster updates and more accurate ITR for the current
2749 * traffic pattern. Constants in this function were computed
2750 * based on theoretical maximum wire speed and thresholds were set based
2751 * on testing data as well as attempting to minimize response time
2752 * while increasing bulk throughput.
2753 * this functionality is controlled by the InterruptThrottleRate module
2754 * parameter (see e1000_param.c)
2755 * @adapter: pointer to adapter
2756 * @itr_setting: current adapter->itr
2757 * @packets: the number of packets during this measurement interval
2758 * @bytes: the number of bytes during this measurement interval
2759 **/
2760 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2761 uint16_t itr_setting,
2762 int packets,
2763 int bytes)
2764 {
2765 unsigned int retval = itr_setting;
2766 struct e1000_hw *hw = &adapter->hw;
2767
2768 if (unlikely(hw->mac_type < e1000_82540))
2769 goto update_itr_done;
2770
2771 if (packets == 0)
2772 goto update_itr_done;
2773
2774 switch (itr_setting) {
2775 case lowest_latency:
2776 /* jumbo frames get bulk treatment*/
2777 if (bytes/packets > 8000)
2778 retval = bulk_latency;
2779 else if ((packets < 5) && (bytes > 512))
2780 retval = low_latency;
2781 break;
2782 case low_latency: /* 50 usec aka 20000 ints/s */
2783 if (bytes > 10000) {
2784 /* jumbo frames need bulk latency setting */
2785 if (bytes/packets > 8000)
2786 retval = bulk_latency;
2787 else if ((packets < 10) || ((bytes/packets) > 1200))
2788 retval = bulk_latency;
2789 else if ((packets > 35))
2790 retval = lowest_latency;
2791 } else if (bytes/packets > 2000)
2792 retval = bulk_latency;
2793 else if (packets <= 2 && bytes < 512)
2794 retval = lowest_latency;
2795 break;
2796 case bulk_latency: /* 250 usec aka 4000 ints/s */
2797 if (bytes > 25000) {
2798 if (packets > 35)
2799 retval = low_latency;
2800 } else if (bytes < 6000) {
2801 retval = low_latency;
2802 }
2803 break;
2804 }
2805
2806 update_itr_done:
2807 return retval;
2808 }
2809
2810 static void e1000_set_itr(struct e1000_adapter *adapter)
2811 {
2812 struct e1000_hw *hw = &adapter->hw;
2813 uint16_t current_itr;
2814 uint32_t new_itr = adapter->itr;
2815
2816 if (unlikely(hw->mac_type < e1000_82540))
2817 return;
2818
2819 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2820 if (unlikely(adapter->link_speed != SPEED_1000)) {
2821 current_itr = 0;
2822 new_itr = 4000;
2823 goto set_itr_now;
2824 }
2825
2826 adapter->tx_itr = e1000_update_itr(adapter,
2827 adapter->tx_itr,
2828 adapter->total_tx_packets,
2829 adapter->total_tx_bytes);
2830 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2831 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2832 adapter->tx_itr = low_latency;
2833
2834 adapter->rx_itr = e1000_update_itr(adapter,
2835 adapter->rx_itr,
2836 adapter->total_rx_packets,
2837 adapter->total_rx_bytes);
2838 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2839 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2840 adapter->rx_itr = low_latency;
2841
2842 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2843
2844 switch (current_itr) {
2845 /* counts and packets in update_itr are dependent on these numbers */
2846 case lowest_latency:
2847 new_itr = 70000;
2848 break;
2849 case low_latency:
2850 new_itr = 20000; /* aka hwitr = ~200 */
2851 break;
2852 case bulk_latency:
2853 new_itr = 4000;
2854 break;
2855 default:
2856 break;
2857 }
2858
2859 set_itr_now:
2860 if (new_itr != adapter->itr) {
2861 /* this attempts to bias the interrupt rate towards Bulk
2862 * by adding intermediate steps when interrupt rate is
2863 * increasing */
2864 new_itr = new_itr > adapter->itr ?
2865 min(adapter->itr + (new_itr >> 2), new_itr) :
2866 new_itr;
2867 adapter->itr = new_itr;
2868 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2869 }
2870
2871 return;
2872 }
2873
2874 #define E1000_TX_FLAGS_CSUM 0x00000001
2875 #define E1000_TX_FLAGS_VLAN 0x00000002
2876 #define E1000_TX_FLAGS_TSO 0x00000004
2877 #define E1000_TX_FLAGS_IPV4 0x00000008
2878 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2879 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2880
2881 static int
2882 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2883 struct sk_buff *skb)
2884 {
2885 struct e1000_context_desc *context_desc;
2886 struct e1000_buffer *buffer_info;
2887 unsigned int i;
2888 uint32_t cmd_length = 0;
2889 uint16_t ipcse = 0, tucse, mss;
2890 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2891 int err;
2892
2893 if (skb_is_gso(skb)) {
2894 if (skb_header_cloned(skb)) {
2895 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2896 if (err)
2897 return err;
2898 }
2899
2900 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2901 mss = skb_shinfo(skb)->gso_size;
2902 if (skb->protocol == htons(ETH_P_IP)) {
2903 struct iphdr *iph = ip_hdr(skb);
2904 iph->tot_len = 0;
2905 iph->check = 0;
2906 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2907 iph->daddr, 0,
2908 IPPROTO_TCP,
2909 0);
2910 cmd_length = E1000_TXD_CMD_IP;
2911 ipcse = skb_transport_offset(skb) - 1;
2912 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2913 ipv6_hdr(skb)->payload_len = 0;
2914 tcp_hdr(skb)->check =
2915 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2916 &ipv6_hdr(skb)->daddr,
2917 0, IPPROTO_TCP, 0);
2918 ipcse = 0;
2919 }
2920 ipcss = skb_network_offset(skb);
2921 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2922 tucss = skb_transport_offset(skb);
2923 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2924 tucse = 0;
2925
2926 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2927 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2928
2929 i = tx_ring->next_to_use;
2930 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2931 buffer_info = &tx_ring->buffer_info[i];
2932
2933 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2934 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2935 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2936 context_desc->upper_setup.tcp_fields.tucss = tucss;
2937 context_desc->upper_setup.tcp_fields.tucso = tucso;
2938 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2939 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2940 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2941 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2942
2943 buffer_info->time_stamp = jiffies;
2944 buffer_info->next_to_watch = i;
2945
2946 if (++i == tx_ring->count) i = 0;
2947 tx_ring->next_to_use = i;
2948
2949 return TRUE;
2950 }
2951 return FALSE;
2952 }
2953
2954 static boolean_t
2955 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2956 struct sk_buff *skb)
2957 {
2958 struct e1000_context_desc *context_desc;
2959 struct e1000_buffer *buffer_info;
2960 unsigned int i;
2961 uint8_t css;
2962
2963 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2964 css = skb_transport_offset(skb);
2965
2966 i = tx_ring->next_to_use;
2967 buffer_info = &tx_ring->buffer_info[i];
2968 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2969
2970 context_desc->lower_setup.ip_config = 0;
2971 context_desc->upper_setup.tcp_fields.tucss = css;
2972 context_desc->upper_setup.tcp_fields.tucso =
2973 css + skb->csum_offset;
2974 context_desc->upper_setup.tcp_fields.tucse = 0;
2975 context_desc->tcp_seg_setup.data = 0;
2976 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2977
2978 buffer_info->time_stamp = jiffies;
2979 buffer_info->next_to_watch = i;
2980
2981 if (unlikely(++i == tx_ring->count)) i = 0;
2982 tx_ring->next_to_use = i;
2983
2984 return TRUE;
2985 }
2986
2987 return FALSE;
2988 }
2989
2990 #define E1000_MAX_TXD_PWR 12
2991 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2992
2993 static int
2994 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2995 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2996 unsigned int nr_frags, unsigned int mss)
2997 {
2998 struct e1000_buffer *buffer_info;
2999 unsigned int len = skb->len;
3000 unsigned int offset = 0, size, count = 0, i;
3001 unsigned int f;
3002 len -= skb->data_len;
3003
3004 i = tx_ring->next_to_use;
3005
3006 while (len) {
3007 buffer_info = &tx_ring->buffer_info[i];
3008 size = min(len, max_per_txd);
3009 /* Workaround for Controller erratum --
3010 * descriptor for non-tso packet in a linear SKB that follows a
3011 * tso gets written back prematurely before the data is fully
3012 * DMA'd to the controller */
3013 if (!skb->data_len && tx_ring->last_tx_tso &&
3014 !skb_is_gso(skb)) {
3015 tx_ring->last_tx_tso = 0;
3016 size -= 4;
3017 }
3018
3019 /* Workaround for premature desc write-backs
3020 * in TSO mode. Append 4-byte sentinel desc */
3021 if (unlikely(mss && !nr_frags && size == len && size > 8))
3022 size -= 4;
3023 /* work-around for errata 10 and it applies
3024 * to all controllers in PCI-X mode
3025 * The fix is to make sure that the first descriptor of a
3026 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3027 */
3028 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3029 (size > 2015) && count == 0))
3030 size = 2015;
3031
3032 /* Workaround for potential 82544 hang in PCI-X. Avoid
3033 * terminating buffers within evenly-aligned dwords. */
3034 if (unlikely(adapter->pcix_82544 &&
3035 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3036 size > 4))
3037 size -= 4;
3038
3039 buffer_info->length = size;
3040 buffer_info->dma =
3041 pci_map_single(adapter->pdev,
3042 skb->data + offset,
3043 size,
3044 PCI_DMA_TODEVICE);
3045 buffer_info->time_stamp = jiffies;
3046 buffer_info->next_to_watch = i;
3047
3048 len -= size;
3049 offset += size;
3050 count++;
3051 if (unlikely(++i == tx_ring->count)) i = 0;
3052 }
3053
3054 for (f = 0; f < nr_frags; f++) {
3055 struct skb_frag_struct *frag;
3056
3057 frag = &skb_shinfo(skb)->frags[f];
3058 len = frag->size;
3059 offset = frag->page_offset;
3060
3061 while (len) {
3062 buffer_info = &tx_ring->buffer_info[i];
3063 size = min(len, max_per_txd);
3064 /* Workaround for premature desc write-backs
3065 * in TSO mode. Append 4-byte sentinel desc */
3066 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3067 size -= 4;
3068 /* Workaround for potential 82544 hang in PCI-X.
3069 * Avoid terminating buffers within evenly-aligned
3070 * dwords. */
3071 if (unlikely(adapter->pcix_82544 &&
3072 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3073 size > 4))
3074 size -= 4;
3075
3076 buffer_info->length = size;
3077 buffer_info->dma =
3078 pci_map_page(adapter->pdev,
3079 frag->page,
3080 offset,
3081 size,
3082 PCI_DMA_TODEVICE);
3083 buffer_info->time_stamp = jiffies;
3084 buffer_info->next_to_watch = i;
3085
3086 len -= size;
3087 offset += size;
3088 count++;
3089 if (unlikely(++i == tx_ring->count)) i = 0;
3090 }
3091 }
3092
3093 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3094 tx_ring->buffer_info[i].skb = skb;
3095 tx_ring->buffer_info[first].next_to_watch = i;
3096
3097 return count;
3098 }
3099
3100 static void
3101 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3102 int tx_flags, int count)
3103 {
3104 struct e1000_tx_desc *tx_desc = NULL;
3105 struct e1000_buffer *buffer_info;
3106 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3107 unsigned int i;
3108
3109 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3110 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3111 E1000_TXD_CMD_TSE;
3112 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3113
3114 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3115 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3116 }
3117
3118 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3119 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3120 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3121 }
3122
3123 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3124 txd_lower |= E1000_TXD_CMD_VLE;
3125 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3126 }
3127
3128 i = tx_ring->next_to_use;
3129
3130 while (count--) {
3131 buffer_info = &tx_ring->buffer_info[i];
3132 tx_desc = E1000_TX_DESC(*tx_ring, i);
3133 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3134 tx_desc->lower.data =
3135 cpu_to_le32(txd_lower | buffer_info->length);
3136 tx_desc->upper.data = cpu_to_le32(txd_upper);
3137 if (unlikely(++i == tx_ring->count)) i = 0;
3138 }
3139
3140 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3141
3142 /* Force memory writes to complete before letting h/w
3143 * know there are new descriptors to fetch. (Only
3144 * applicable for weak-ordered memory model archs,
3145 * such as IA-64). */
3146 wmb();
3147
3148 tx_ring->next_to_use = i;
3149 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3150 /* we need this if more than one processor can write to our tail
3151 * at a time, it syncronizes IO on IA64/Altix systems */
3152 mmiowb();
3153 }
3154
3155 /**
3156 * 82547 workaround to avoid controller hang in half-duplex environment.
3157 * The workaround is to avoid queuing a large packet that would span
3158 * the internal Tx FIFO ring boundary by notifying the stack to resend
3159 * the packet at a later time. This gives the Tx FIFO an opportunity to
3160 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3161 * to the beginning of the Tx FIFO.
3162 **/
3163
3164 #define E1000_FIFO_HDR 0x10
3165 #define E1000_82547_PAD_LEN 0x3E0
3166
3167 static int
3168 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3169 {
3170 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3171 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3172
3173 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3174
3175 if (adapter->link_duplex != HALF_DUPLEX)
3176 goto no_fifo_stall_required;
3177
3178 if (atomic_read(&adapter->tx_fifo_stall))
3179 return 1;
3180
3181 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3182 atomic_set(&adapter->tx_fifo_stall, 1);
3183 return 1;
3184 }
3185
3186 no_fifo_stall_required:
3187 adapter->tx_fifo_head += skb_fifo_len;
3188 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3189 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3190 return 0;
3191 }
3192
3193 #define MINIMUM_DHCP_PACKET_SIZE 282
3194 static int
3195 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3196 {
3197 struct e1000_hw *hw = &adapter->hw;
3198 uint16_t length, offset;
3199 if (vlan_tx_tag_present(skb)) {
3200 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3201 ( adapter->hw.mng_cookie.status &
3202 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3203 return 0;
3204 }
3205 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3206 struct ethhdr *eth = (struct ethhdr *) skb->data;
3207 if ((htons(ETH_P_IP) == eth->h_proto)) {
3208 const struct iphdr *ip =
3209 (struct iphdr *)((uint8_t *)skb->data+14);
3210 if (IPPROTO_UDP == ip->protocol) {
3211 struct udphdr *udp =
3212 (struct udphdr *)((uint8_t *)ip +
3213 (ip->ihl << 2));
3214 if (ntohs(udp->dest) == 67) {
3215 offset = (uint8_t *)udp + 8 - skb->data;
3216 length = skb->len - offset;
3217
3218 return e1000_mng_write_dhcp_info(hw,
3219 (uint8_t *)udp + 8,
3220 length);
3221 }
3222 }
3223 }
3224 }
3225 return 0;
3226 }
3227
3228 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3229 {
3230 struct e1000_adapter *adapter = netdev_priv(netdev);
3231 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3232
3233 netif_stop_queue(netdev);
3234 /* Herbert's original patch had:
3235 * smp_mb__after_netif_stop_queue();
3236 * but since that doesn't exist yet, just open code it. */
3237 smp_mb();
3238
3239 /* We need to check again in a case another CPU has just
3240 * made room available. */
3241 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3242 return -EBUSY;
3243
3244 /* A reprieve! */
3245 netif_start_queue(netdev);
3246 ++adapter->restart_queue;
3247 return 0;
3248 }
3249
3250 static int e1000_maybe_stop_tx(struct net_device *netdev,
3251 struct e1000_tx_ring *tx_ring, int size)
3252 {
3253 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3254 return 0;
3255 return __e1000_maybe_stop_tx(netdev, size);
3256 }
3257
3258 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3259 static int
3260 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3261 {
3262 struct e1000_adapter *adapter = netdev_priv(netdev);
3263 struct e1000_tx_ring *tx_ring;
3264 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3265 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3266 unsigned int tx_flags = 0;
3267 unsigned int len = skb->len;
3268 unsigned long flags;
3269 unsigned int nr_frags = 0;
3270 unsigned int mss = 0;
3271 int count = 0;
3272 int tso;
3273 unsigned int f;
3274 len -= skb->data_len;
3275
3276 /* This goes back to the question of how to logically map a tx queue
3277 * to a flow. Right now, performance is impacted slightly negatively
3278 * if using multiple tx queues. If the stack breaks away from a
3279 * single qdisc implementation, we can look at this again. */
3280 tx_ring = adapter->tx_ring;
3281
3282 if (unlikely(skb->len <= 0)) {
3283 dev_kfree_skb_any(skb);
3284 return NETDEV_TX_OK;
3285 }
3286
3287 /* 82571 and newer doesn't need the workaround that limited descriptor
3288 * length to 4kB */
3289 if (adapter->hw.mac_type >= e1000_82571)
3290 max_per_txd = 8192;
3291
3292 mss = skb_shinfo(skb)->gso_size;
3293 /* The controller does a simple calculation to
3294 * make sure there is enough room in the FIFO before
3295 * initiating the DMA for each buffer. The calc is:
3296 * 4 = ceil(buffer len/mss). To make sure we don't
3297 * overrun the FIFO, adjust the max buffer len if mss
3298 * drops. */
3299 if (mss) {
3300 uint8_t hdr_len;
3301 max_per_txd = min(mss << 2, max_per_txd);
3302 max_txd_pwr = fls(max_per_txd) - 1;
3303
3304 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3305 * points to just header, pull a few bytes of payload from
3306 * frags into skb->data */
3307 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3308 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3309 switch (adapter->hw.mac_type) {
3310 unsigned int pull_size;
3311 case e1000_82544:
3312 /* Make sure we have room to chop off 4 bytes,
3313 * and that the end alignment will work out to
3314 * this hardware's requirements
3315 * NOTE: this is a TSO only workaround
3316 * if end byte alignment not correct move us
3317 * into the next dword */
3318 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3319 break;
3320 /* fall through */
3321 case e1000_82571:
3322 case e1000_82572:
3323 case e1000_82573:
3324 case e1000_ich8lan:
3325 pull_size = min((unsigned int)4, skb->data_len);
3326 if (!__pskb_pull_tail(skb, pull_size)) {
3327 DPRINTK(DRV, ERR,
3328 "__pskb_pull_tail failed.\n");
3329 dev_kfree_skb_any(skb);
3330 return NETDEV_TX_OK;
3331 }
3332 len = skb->len - skb->data_len;
3333 break;
3334 default:
3335 /* do nothing */
3336 break;
3337 }
3338 }
3339 }
3340
3341 /* reserve a descriptor for the offload context */
3342 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3343 count++;
3344 count++;
3345
3346 /* Controller Erratum workaround */
3347 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3348 count++;
3349
3350 count += TXD_USE_COUNT(len, max_txd_pwr);
3351
3352 if (adapter->pcix_82544)
3353 count++;
3354
3355 /* work-around for errata 10 and it applies to all controllers
3356 * in PCI-X mode, so add one more descriptor to the count
3357 */
3358 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3359 (len > 2015)))
3360 count++;
3361
3362 nr_frags = skb_shinfo(skb)->nr_frags;
3363 for (f = 0; f < nr_frags; f++)
3364 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3365 max_txd_pwr);
3366 if (adapter->pcix_82544)
3367 count += nr_frags;
3368
3369
3370 if (adapter->hw.tx_pkt_filtering &&
3371 (adapter->hw.mac_type == e1000_82573))
3372 e1000_transfer_dhcp_info(adapter, skb);
3373
3374 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3375 /* Collision - tell upper layer to requeue */
3376 return NETDEV_TX_LOCKED;
3377
3378 /* need: count + 2 desc gap to keep tail from touching
3379 * head, otherwise try next time */
3380 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3381 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3382 return NETDEV_TX_BUSY;
3383 }
3384
3385 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3386 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3387 netif_stop_queue(netdev);
3388 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3389 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3390 return NETDEV_TX_BUSY;
3391 }
3392 }
3393
3394 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3395 tx_flags |= E1000_TX_FLAGS_VLAN;
3396 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3397 }
3398
3399 first = tx_ring->next_to_use;
3400
3401 tso = e1000_tso(adapter, tx_ring, skb);
3402 if (tso < 0) {
3403 dev_kfree_skb_any(skb);
3404 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3405 return NETDEV_TX_OK;
3406 }
3407
3408 if (likely(tso)) {
3409 tx_ring->last_tx_tso = 1;
3410 tx_flags |= E1000_TX_FLAGS_TSO;
3411 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3412 tx_flags |= E1000_TX_FLAGS_CSUM;
3413
3414 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3415 * 82571 hardware supports TSO capabilities for IPv6 as well...
3416 * no longer assume, we must. */
3417 if (likely(skb->protocol == htons(ETH_P_IP)))
3418 tx_flags |= E1000_TX_FLAGS_IPV4;
3419
3420 e1000_tx_queue(adapter, tx_ring, tx_flags,
3421 e1000_tx_map(adapter, tx_ring, skb, first,
3422 max_per_txd, nr_frags, mss));
3423
3424 netdev->trans_start = jiffies;
3425
3426 /* Make sure there is space in the ring for the next send. */
3427 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3428
3429 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3430 return NETDEV_TX_OK;
3431 }
3432
3433 /**
3434 * e1000_tx_timeout - Respond to a Tx Hang
3435 * @netdev: network interface device structure
3436 **/
3437
3438 static void
3439 e1000_tx_timeout(struct net_device *netdev)
3440 {
3441 struct e1000_adapter *adapter = netdev_priv(netdev);
3442
3443 /* Do the reset outside of interrupt context */
3444 adapter->tx_timeout_count++;
3445 schedule_work(&adapter->reset_task);
3446 }
3447
3448 static void
3449 e1000_reset_task(struct work_struct *work)
3450 {
3451 struct e1000_adapter *adapter =
3452 container_of(work, struct e1000_adapter, reset_task);
3453
3454 e1000_reinit_locked(adapter);
3455 }
3456
3457 /**
3458 * e1000_get_stats - Get System Network Statistics
3459 * @netdev: network interface device structure
3460 *
3461 * Returns the address of the device statistics structure.
3462 * The statistics are actually updated from the timer callback.
3463 **/
3464
3465 static struct net_device_stats *
3466 e1000_get_stats(struct net_device *netdev)
3467 {
3468 struct e1000_adapter *adapter = netdev_priv(netdev);
3469
3470 /* only return the current stats */
3471 return &adapter->net_stats;
3472 }
3473
3474 /**
3475 * e1000_change_mtu - Change the Maximum Transfer Unit
3476 * @netdev: network interface device structure
3477 * @new_mtu: new value for maximum frame size
3478 *
3479 * Returns 0 on success, negative on failure
3480 **/
3481
3482 static int
3483 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3484 {
3485 struct e1000_adapter *adapter = netdev_priv(netdev);
3486 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3487 uint16_t eeprom_data = 0;
3488
3489 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3490 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3491 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3492 return -EINVAL;
3493 }
3494
3495 /* Adapter-specific max frame size limits. */
3496 switch (adapter->hw.mac_type) {
3497 case e1000_undefined ... e1000_82542_rev2_1:
3498 case e1000_ich8lan:
3499 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3500 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3501 return -EINVAL;
3502 }
3503 break;
3504 case e1000_82573:
3505 /* Jumbo Frames not supported if:
3506 * - this is not an 82573L device
3507 * - ASPM is enabled in any way (0x1A bits 3:2) */
3508 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3509 &eeprom_data);
3510 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3511 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3512 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3513 DPRINTK(PROBE, ERR,
3514 "Jumbo Frames not supported.\n");
3515 return -EINVAL;
3516 }
3517 break;
3518 }
3519 /* ERT will be enabled later to enable wire speed receives */
3520
3521 /* fall through to get support */
3522 case e1000_82571:
3523 case e1000_82572:
3524 case e1000_80003es2lan:
3525 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3526 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3527 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3528 return -EINVAL;
3529 }
3530 break;
3531 default:
3532 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3533 break;
3534 }
3535
3536 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3537 * means we reserve 2 more, this pushes us to allocate from the next
3538 * larger slab size
3539 * i.e. RXBUFFER_2048 --> size-4096 slab */
3540
3541 if (max_frame <= E1000_RXBUFFER_256)
3542 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3543 else if (max_frame <= E1000_RXBUFFER_512)
3544 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3545 else if (max_frame <= E1000_RXBUFFER_1024)
3546 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3547 else if (max_frame <= E1000_RXBUFFER_2048)
3548 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3549 else if (max_frame <= E1000_RXBUFFER_4096)
3550 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3551 else if (max_frame <= E1000_RXBUFFER_8192)
3552 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3553 else if (max_frame <= E1000_RXBUFFER_16384)
3554 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3555
3556 /* adjust allocation if LPE protects us, and we aren't using SBP */
3557 if (!adapter->hw.tbi_compatibility_on &&
3558 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3559 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3560 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3561
3562 netdev->mtu = new_mtu;
3563 adapter->hw.max_frame_size = max_frame;
3564
3565 if (netif_running(netdev))
3566 e1000_reinit_locked(adapter);
3567
3568 return 0;
3569 }
3570
3571 /**
3572 * e1000_update_stats - Update the board statistics counters
3573 * @adapter: board private structure
3574 **/
3575
3576 void
3577 e1000_update_stats(struct e1000_adapter *adapter)
3578 {
3579 struct e1000_hw *hw = &adapter->hw;
3580 struct pci_dev *pdev = adapter->pdev;
3581 unsigned long flags;
3582 uint16_t phy_tmp;
3583
3584 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3585
3586 /*
3587 * Prevent stats update while adapter is being reset, or if the pci
3588 * connection is down.
3589 */
3590 if (adapter->link_speed == 0)
3591 return;
3592 if (pci_channel_offline(pdev))
3593 return;
3594
3595 spin_lock_irqsave(&adapter->stats_lock, flags);
3596
3597 /* these counters are modified from e1000_adjust_tbi_stats,
3598 * called from the interrupt context, so they must only
3599 * be written while holding adapter->stats_lock
3600 */
3601
3602 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3603 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3604 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3605 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3606 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3607 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3608 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3609
3610 if (adapter->hw.mac_type != e1000_ich8lan) {
3611 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3612 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3613 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3614 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3615 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3616 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3617 }
3618
3619 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3620 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3621 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3622 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3623 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3624 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3625 adapter->stats.dc += E1000_READ_REG(hw, DC);
3626 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3627 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3628 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3629 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3630 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3631 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3632 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3633 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3634 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3635 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3636 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3637 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3638 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3639 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3640 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3641 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3642 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3643 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3644 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3645
3646 if (adapter->hw.mac_type != e1000_ich8lan) {
3647 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3648 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3649 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3650 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3651 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3652 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3653 }
3654
3655 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3656 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3657
3658 /* used for adaptive IFS */
3659
3660 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3661 adapter->stats.tpt += hw->tx_packet_delta;
3662 hw->collision_delta = E1000_READ_REG(hw, COLC);
3663 adapter->stats.colc += hw->collision_delta;
3664
3665 if (hw->mac_type >= e1000_82543) {
3666 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3667 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3668 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3669 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3670 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3671 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3672 }
3673 if (hw->mac_type > e1000_82547_rev_2) {
3674 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3675 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3676
3677 if (adapter->hw.mac_type != e1000_ich8lan) {
3678 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3679 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3680 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3681 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3682 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3683 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3684 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3685 }
3686 }
3687
3688 /* Fill out the OS statistics structure */
3689 adapter->net_stats.rx_packets = adapter->stats.gprc;
3690 adapter->net_stats.tx_packets = adapter->stats.gptc;
3691 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3692 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3693 adapter->net_stats.multicast = adapter->stats.mprc;
3694 adapter->net_stats.collisions = adapter->stats.colc;
3695
3696 /* Rx Errors */
3697
3698 /* RLEC on some newer hardware can be incorrect so build
3699 * our own version based on RUC and ROC */
3700 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3701 adapter->stats.crcerrs + adapter->stats.algnerrc +
3702 adapter->stats.ruc + adapter->stats.roc +
3703 adapter->stats.cexterr;
3704 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3705 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3706 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3707 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3708 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3709
3710 /* Tx Errors */
3711 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3712 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3713 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3714 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3715 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3716 if (adapter->hw.bad_tx_carr_stats_fd &&
3717 adapter->link_duplex == FULL_DUPLEX) {
3718 adapter->net_stats.tx_carrier_errors = 0;
3719 adapter->stats.tncrs = 0;
3720 }
3721
3722 /* Tx Dropped needs to be maintained elsewhere */
3723
3724 /* Phy Stats */
3725 if (hw->media_type == e1000_media_type_copper) {
3726 if ((adapter->link_speed == SPEED_1000) &&
3727 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3728 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3729 adapter->phy_stats.idle_errors += phy_tmp;
3730 }
3731
3732 if ((hw->mac_type <= e1000_82546) &&
3733 (hw->phy_type == e1000_phy_m88) &&
3734 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3735 adapter->phy_stats.receive_errors += phy_tmp;
3736 }
3737
3738 /* Management Stats */
3739 if (adapter->hw.has_smbus) {
3740 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3741 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3742 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3743 }
3744
3745 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3746 }
3747 #ifdef CONFIG_PCI_MSI
3748
3749 /**
3750 * e1000_intr_msi - Interrupt Handler
3751 * @irq: interrupt number
3752 * @data: pointer to a network interface device structure
3753 **/
3754
3755 static irqreturn_t
3756 e1000_intr_msi(int irq, void *data)
3757 {
3758 struct net_device *netdev = data;
3759 struct e1000_adapter *adapter = netdev_priv(netdev);
3760 struct e1000_hw *hw = &adapter->hw;
3761 #ifndef CONFIG_E1000_NAPI
3762 int i;
3763 #endif
3764 uint32_t icr = E1000_READ_REG(hw, ICR);
3765
3766 #ifdef CONFIG_E1000_NAPI
3767 /* read ICR disables interrupts using IAM, so keep up with our
3768 * enable/disable accounting */
3769 atomic_inc(&adapter->irq_sem);
3770 #endif
3771 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3772 hw->get_link_status = 1;
3773 /* 80003ES2LAN workaround-- For packet buffer work-around on
3774 * link down event; disable receives here in the ISR and reset
3775 * adapter in watchdog */
3776 if (netif_carrier_ok(netdev) &&
3777 (adapter->hw.mac_type == e1000_80003es2lan)) {
3778 /* disable receives */
3779 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3780 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3781 }
3782 /* guard against interrupt when we're going down */
3783 if (!test_bit(__E1000_DOWN, &adapter->flags))
3784 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3785 }
3786
3787 #ifdef CONFIG_E1000_NAPI
3788 if (likely(netif_rx_schedule_prep(netdev))) {
3789 adapter->total_tx_bytes = 0;
3790 adapter->total_tx_packets = 0;
3791 adapter->total_rx_bytes = 0;
3792 adapter->total_rx_packets = 0;
3793 __netif_rx_schedule(netdev);
3794 } else
3795 e1000_irq_enable(adapter);
3796 #else
3797 adapter->total_tx_bytes = 0;
3798 adapter->total_rx_bytes = 0;
3799 adapter->total_tx_packets = 0;
3800 adapter->total_rx_packets = 0;
3801
3802 for (i = 0; i < E1000_MAX_INTR; i++)
3803 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3804 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3805 break;
3806
3807 if (likely(adapter->itr_setting & 3))
3808 e1000_set_itr(adapter);
3809 #endif
3810
3811 return IRQ_HANDLED;
3812 }
3813 #endif
3814
3815 /**
3816 * e1000_intr - Interrupt Handler
3817 * @irq: interrupt number
3818 * @data: pointer to a network interface device structure
3819 **/
3820
3821 static irqreturn_t
3822 e1000_intr(int irq, void *data)
3823 {
3824 struct net_device *netdev = data;
3825 struct e1000_adapter *adapter = netdev_priv(netdev);
3826 struct e1000_hw *hw = &adapter->hw;
3827 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3828 #ifndef CONFIG_E1000_NAPI
3829 int i;
3830 #endif
3831 if (unlikely(!icr))
3832 return IRQ_NONE; /* Not our interrupt */
3833
3834 #ifdef CONFIG_E1000_NAPI
3835 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3836 * not set, then the adapter didn't send an interrupt */
3837 if (unlikely(hw->mac_type >= e1000_82571 &&
3838 !(icr & E1000_ICR_INT_ASSERTED)))
3839 return IRQ_NONE;
3840
3841 /* Interrupt Auto-Mask...upon reading ICR,
3842 * interrupts are masked. No need for the
3843 * IMC write, but it does mean we should
3844 * account for it ASAP. */
3845 if (likely(hw->mac_type >= e1000_82571))
3846 atomic_inc(&adapter->irq_sem);
3847 #endif
3848
3849 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3850 hw->get_link_status = 1;
3851 /* 80003ES2LAN workaround--
3852 * For packet buffer work-around on link down event;
3853 * disable receives here in the ISR and
3854 * reset adapter in watchdog
3855 */
3856 if (netif_carrier_ok(netdev) &&
3857 (adapter->hw.mac_type == e1000_80003es2lan)) {
3858 /* disable receives */
3859 rctl = E1000_READ_REG(hw, RCTL);
3860 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3861 }
3862 /* guard against interrupt when we're going down */
3863 if (!test_bit(__E1000_DOWN, &adapter->flags))
3864 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3865 }
3866
3867 #ifdef CONFIG_E1000_NAPI
3868 if (unlikely(hw->mac_type < e1000_82571)) {
3869 /* disable interrupts, without the synchronize_irq bit */
3870 atomic_inc(&adapter->irq_sem);
3871 E1000_WRITE_REG(hw, IMC, ~0);
3872 E1000_WRITE_FLUSH(hw);
3873 }
3874 if (likely(netif_rx_schedule_prep(netdev))) {
3875 adapter->total_tx_bytes = 0;
3876 adapter->total_tx_packets = 0;
3877 adapter->total_rx_bytes = 0;
3878 adapter->total_rx_packets = 0;
3879 __netif_rx_schedule(netdev);
3880 } else
3881 /* this really should not happen! if it does it is basically a
3882 * bug, but not a hard error, so enable ints and continue */
3883 e1000_irq_enable(adapter);
3884 #else
3885 /* Writing IMC and IMS is needed for 82547.
3886 * Due to Hub Link bus being occupied, an interrupt
3887 * de-assertion message is not able to be sent.
3888 * When an interrupt assertion message is generated later,
3889 * two messages are re-ordered and sent out.
3890 * That causes APIC to think 82547 is in de-assertion
3891 * state, while 82547 is in assertion state, resulting
3892 * in dead lock. Writing IMC forces 82547 into
3893 * de-assertion state.
3894 */
3895 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3896 atomic_inc(&adapter->irq_sem);
3897 E1000_WRITE_REG(hw, IMC, ~0);
3898 }
3899
3900 adapter->total_tx_bytes = 0;
3901 adapter->total_rx_bytes = 0;
3902 adapter->total_tx_packets = 0;
3903 adapter->total_rx_packets = 0;
3904
3905 for (i = 0; i < E1000_MAX_INTR; i++)
3906 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3907 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3908 break;
3909
3910 if (likely(adapter->itr_setting & 3))
3911 e1000_set_itr(adapter);
3912
3913 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3914 e1000_irq_enable(adapter);
3915
3916 #endif
3917 return IRQ_HANDLED;
3918 }
3919
3920 #ifdef CONFIG_E1000_NAPI
3921 /**
3922 * e1000_clean - NAPI Rx polling callback
3923 * @adapter: board private structure
3924 **/
3925
3926 static int
3927 e1000_clean(struct net_device *poll_dev, int *budget)
3928 {
3929 struct e1000_adapter *adapter;
3930 int work_to_do = min(*budget, poll_dev->quota);
3931 int tx_cleaned = 0, work_done = 0;
3932
3933 /* Must NOT use netdev_priv macro here. */
3934 adapter = poll_dev->priv;
3935
3936 /* Keep link state information with original netdev */
3937 if (!netif_carrier_ok(poll_dev))
3938 goto quit_polling;
3939
3940 /* e1000_clean is called per-cpu. This lock protects
3941 * tx_ring[0] from being cleaned by multiple cpus
3942 * simultaneously. A failure obtaining the lock means
3943 * tx_ring[0] is currently being cleaned anyway. */
3944 if (spin_trylock(&adapter->tx_queue_lock)) {
3945 tx_cleaned = e1000_clean_tx_irq(adapter,
3946 &adapter->tx_ring[0]);
3947 spin_unlock(&adapter->tx_queue_lock);
3948 }
3949
3950 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3951 &work_done, work_to_do);
3952
3953 *budget -= work_done;
3954 poll_dev->quota -= work_done;
3955
3956 /* If no Tx and not enough Rx work done, exit the polling mode */
3957 if ((!tx_cleaned && (work_done == 0)) ||
3958 !netif_running(poll_dev)) {
3959 quit_polling:
3960 if (likely(adapter->itr_setting & 3))
3961 e1000_set_itr(adapter);
3962 netif_rx_complete(poll_dev);
3963 e1000_irq_enable(adapter);
3964 return 0;
3965 }
3966
3967 return 1;
3968 }
3969
3970 #endif
3971 /**
3972 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3973 * @adapter: board private structure
3974 **/
3975
3976 static boolean_t
3977 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3978 struct e1000_tx_ring *tx_ring)
3979 {
3980 struct net_device *netdev = adapter->netdev;
3981 struct e1000_tx_desc *tx_desc, *eop_desc;
3982 struct e1000_buffer *buffer_info;
3983 unsigned int i, eop;
3984 #ifdef CONFIG_E1000_NAPI
3985 unsigned int count = 0;
3986 #endif
3987 boolean_t cleaned = FALSE;
3988 unsigned int total_tx_bytes=0, total_tx_packets=0;
3989
3990 i = tx_ring->next_to_clean;
3991 eop = tx_ring->buffer_info[i].next_to_watch;
3992 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3993
3994 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3995 for (cleaned = FALSE; !cleaned; ) {
3996 tx_desc = E1000_TX_DESC(*tx_ring, i);
3997 buffer_info = &tx_ring->buffer_info[i];
3998 cleaned = (i == eop);
3999
4000 if (cleaned) {
4001 struct sk_buff *skb = buffer_info->skb;
4002 unsigned int segs, bytecount;
4003 segs = skb_shinfo(skb)->gso_segs ?: 1;
4004 /* multiply data chunks by size of headers */
4005 bytecount = ((segs - 1) * skb_headlen(skb)) +
4006 skb->len;
4007 total_tx_packets += segs;
4008 total_tx_bytes += bytecount;
4009 }
4010 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4011 tx_desc->upper.data = 0;
4012
4013 if (unlikely(++i == tx_ring->count)) i = 0;
4014 }
4015
4016 eop = tx_ring->buffer_info[i].next_to_watch;
4017 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4018 #ifdef CONFIG_E1000_NAPI
4019 #define E1000_TX_WEIGHT 64
4020 /* weight of a sort for tx, to avoid endless transmit cleanup */
4021 if (count++ == E1000_TX_WEIGHT) break;
4022 #endif
4023 }
4024
4025 tx_ring->next_to_clean = i;
4026
4027 #define TX_WAKE_THRESHOLD 32
4028 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4029 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4030 /* Make sure that anybody stopping the queue after this
4031 * sees the new next_to_clean.
4032 */
4033 smp_mb();
4034 if (netif_queue_stopped(netdev)) {
4035 netif_wake_queue(netdev);
4036 ++adapter->restart_queue;
4037 }
4038 }
4039
4040 if (adapter->detect_tx_hung) {
4041 /* Detect a transmit hang in hardware, this serializes the
4042 * check with the clearing of time_stamp and movement of i */
4043 adapter->detect_tx_hung = FALSE;
4044 if (tx_ring->buffer_info[eop].dma &&
4045 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4046 (adapter->tx_timeout_factor * HZ))
4047 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4048 E1000_STATUS_TXOFF)) {
4049
4050 /* detected Tx unit hang */
4051 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4052 " Tx Queue <%lu>\n"
4053 " TDH <%x>\n"
4054 " TDT <%x>\n"
4055 " next_to_use <%x>\n"
4056 " next_to_clean <%x>\n"
4057 "buffer_info[next_to_clean]\n"
4058 " time_stamp <%lx>\n"
4059 " next_to_watch <%x>\n"
4060 " jiffies <%lx>\n"
4061 " next_to_watch.status <%x>\n",
4062 (unsigned long)((tx_ring - adapter->tx_ring) /
4063 sizeof(struct e1000_tx_ring)),
4064 readl(adapter->hw.hw_addr + tx_ring->tdh),
4065 readl(adapter->hw.hw_addr + tx_ring->tdt),
4066 tx_ring->next_to_use,
4067 tx_ring->next_to_clean,
4068 tx_ring->buffer_info[eop].time_stamp,
4069 eop,
4070 jiffies,
4071 eop_desc->upper.fields.status);
4072 netif_stop_queue(netdev);
4073 }
4074 }
4075 adapter->total_tx_bytes += total_tx_bytes;
4076 adapter->total_tx_packets += total_tx_packets;
4077 return cleaned;
4078 }
4079
4080 /**
4081 * e1000_rx_checksum - Receive Checksum Offload for 82543
4082 * @adapter: board private structure
4083 * @status_err: receive descriptor status and error fields
4084 * @csum: receive descriptor csum field
4085 * @sk_buff: socket buffer with received data
4086 **/
4087
4088 static void
4089 e1000_rx_checksum(struct e1000_adapter *adapter,
4090 uint32_t status_err, uint32_t csum,
4091 struct sk_buff *skb)
4092 {
4093 uint16_t status = (uint16_t)status_err;
4094 uint8_t errors = (uint8_t)(status_err >> 24);
4095 skb->ip_summed = CHECKSUM_NONE;
4096
4097 /* 82543 or newer only */
4098 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4099 /* Ignore Checksum bit is set */
4100 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4101 /* TCP/UDP checksum error bit is set */
4102 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4103 /* let the stack verify checksum errors */
4104 adapter->hw_csum_err++;
4105 return;
4106 }
4107 /* TCP/UDP Checksum has not been calculated */
4108 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4109 if (!(status & E1000_RXD_STAT_TCPCS))
4110 return;
4111 } else {
4112 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4113 return;
4114 }
4115 /* It must be a TCP or UDP packet with a valid checksum */
4116 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4117 /* TCP checksum is good */
4118 skb->ip_summed = CHECKSUM_UNNECESSARY;
4119 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4120 /* IP fragment with UDP payload */
4121 /* Hardware complements the payload checksum, so we undo it
4122 * and then put the value in host order for further stack use.
4123 */
4124 csum = ntohl(csum ^ 0xFFFF);
4125 skb->csum = csum;
4126 skb->ip_summed = CHECKSUM_COMPLETE;
4127 }
4128 adapter->hw_csum_good++;
4129 }
4130
4131 /**
4132 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4133 * @adapter: board private structure
4134 **/
4135
4136 static boolean_t
4137 #ifdef CONFIG_E1000_NAPI
4138 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4139 struct e1000_rx_ring *rx_ring,
4140 int *work_done, int work_to_do)
4141 #else
4142 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4143 struct e1000_rx_ring *rx_ring)
4144 #endif
4145 {
4146 struct net_device *netdev = adapter->netdev;
4147 struct pci_dev *pdev = adapter->pdev;
4148 struct e1000_rx_desc *rx_desc, *next_rxd;
4149 struct e1000_buffer *buffer_info, *next_buffer;
4150 unsigned long flags;
4151 uint32_t length;
4152 uint8_t last_byte;
4153 unsigned int i;
4154 int cleaned_count = 0;
4155 boolean_t cleaned = FALSE;
4156 unsigned int total_rx_bytes=0, total_rx_packets=0;
4157
4158 i = rx_ring->next_to_clean;
4159 rx_desc = E1000_RX_DESC(*rx_ring, i);
4160 buffer_info = &rx_ring->buffer_info[i];
4161
4162 while (rx_desc->status & E1000_RXD_STAT_DD) {
4163 struct sk_buff *skb;
4164 u8 status;
4165
4166 #ifdef CONFIG_E1000_NAPI
4167 if (*work_done >= work_to_do)
4168 break;
4169 (*work_done)++;
4170 #endif
4171 status = rx_desc->status;
4172 skb = buffer_info->skb;
4173 buffer_info->skb = NULL;
4174
4175 prefetch(skb->data - NET_IP_ALIGN);
4176
4177 if (++i == rx_ring->count) i = 0;
4178 next_rxd = E1000_RX_DESC(*rx_ring, i);
4179 prefetch(next_rxd);
4180
4181 next_buffer = &rx_ring->buffer_info[i];
4182
4183 cleaned = TRUE;
4184 cleaned_count++;
4185 pci_unmap_single(pdev,
4186 buffer_info->dma,
4187 buffer_info->length,
4188 PCI_DMA_FROMDEVICE);
4189
4190 length = le16_to_cpu(rx_desc->length);
4191
4192 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4193 /* All receives must fit into a single buffer */
4194 E1000_DBG("%s: Receive packet consumed multiple"
4195 " buffers\n", netdev->name);
4196 /* recycle */
4197 buffer_info->skb = skb;
4198 goto next_desc;
4199 }
4200
4201 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4202 last_byte = *(skb->data + length - 1);
4203 if (TBI_ACCEPT(&adapter->hw, status,
4204 rx_desc->errors, length, last_byte)) {
4205 spin_lock_irqsave(&adapter->stats_lock, flags);
4206 e1000_tbi_adjust_stats(&adapter->hw,
4207 &adapter->stats,
4208 length, skb->data);
4209 spin_unlock_irqrestore(&adapter->stats_lock,
4210 flags);
4211 length--;
4212 } else {
4213 /* recycle */
4214 buffer_info->skb = skb;
4215 goto next_desc;
4216 }
4217 }
4218
4219 /* adjust length to remove Ethernet CRC, this must be
4220 * done after the TBI_ACCEPT workaround above */
4221 length -= 4;
4222
4223 /* probably a little skewed due to removing CRC */
4224 total_rx_bytes += length;
4225 total_rx_packets++;
4226
4227 /* code added for copybreak, this should improve
4228 * performance for small packets with large amounts
4229 * of reassembly being done in the stack */
4230 if (length < copybreak) {
4231 struct sk_buff *new_skb =
4232 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4233 if (new_skb) {
4234 skb_reserve(new_skb, NET_IP_ALIGN);
4235 skb_copy_to_linear_data_offset(new_skb,
4236 -NET_IP_ALIGN,
4237 (skb->data -
4238 NET_IP_ALIGN),
4239 (length +
4240 NET_IP_ALIGN));
4241 /* save the skb in buffer_info as good */
4242 buffer_info->skb = skb;
4243 skb = new_skb;
4244 }
4245 /* else just continue with the old one */
4246 }
4247 /* end copybreak code */
4248 skb_put(skb, length);
4249
4250 /* Receive Checksum Offload */
4251 e1000_rx_checksum(adapter,
4252 (uint32_t)(status) |
4253 ((uint32_t)(rx_desc->errors) << 24),
4254 le16_to_cpu(rx_desc->csum), skb);
4255
4256 skb->protocol = eth_type_trans(skb, netdev);
4257 #ifdef CONFIG_E1000_NAPI
4258 if (unlikely(adapter->vlgrp &&
4259 (status & E1000_RXD_STAT_VP))) {
4260 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4261 le16_to_cpu(rx_desc->special) &
4262 E1000_RXD_SPC_VLAN_MASK);
4263 } else {
4264 netif_receive_skb(skb);
4265 }
4266 #else /* CONFIG_E1000_NAPI */
4267 if (unlikely(adapter->vlgrp &&
4268 (status & E1000_RXD_STAT_VP))) {
4269 vlan_hwaccel_rx(skb, adapter->vlgrp,
4270 le16_to_cpu(rx_desc->special) &
4271 E1000_RXD_SPC_VLAN_MASK);
4272 } else {
4273 netif_rx(skb);
4274 }
4275 #endif /* CONFIG_E1000_NAPI */
4276 netdev->last_rx = jiffies;
4277
4278 next_desc:
4279 rx_desc->status = 0;
4280
4281 /* return some buffers to hardware, one at a time is too slow */
4282 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4283 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4284 cleaned_count = 0;
4285 }
4286
4287 /* use prefetched values */
4288 rx_desc = next_rxd;
4289 buffer_info = next_buffer;
4290 }
4291 rx_ring->next_to_clean = i;
4292
4293 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4294 if (cleaned_count)
4295 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4296
4297 adapter->total_rx_packets += total_rx_packets;
4298 adapter->total_rx_bytes += total_rx_bytes;
4299 return cleaned;
4300 }
4301
4302 /**
4303 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4304 * @adapter: board private structure
4305 **/
4306
4307 static boolean_t
4308 #ifdef CONFIG_E1000_NAPI
4309 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4310 struct e1000_rx_ring *rx_ring,
4311 int *work_done, int work_to_do)
4312 #else
4313 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4314 struct e1000_rx_ring *rx_ring)
4315 #endif
4316 {
4317 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4318 struct net_device *netdev = adapter->netdev;
4319 struct pci_dev *pdev = adapter->pdev;
4320 struct e1000_buffer *buffer_info, *next_buffer;
4321 struct e1000_ps_page *ps_page;
4322 struct e1000_ps_page_dma *ps_page_dma;
4323 struct sk_buff *skb;
4324 unsigned int i, j;
4325 uint32_t length, staterr;
4326 int cleaned_count = 0;
4327 boolean_t cleaned = FALSE;
4328 unsigned int total_rx_bytes=0, total_rx_packets=0;
4329
4330 i = rx_ring->next_to_clean;
4331 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4332 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4333 buffer_info = &rx_ring->buffer_info[i];
4334
4335 while (staterr & E1000_RXD_STAT_DD) {
4336 ps_page = &rx_ring->ps_page[i];
4337 ps_page_dma = &rx_ring->ps_page_dma[i];
4338 #ifdef CONFIG_E1000_NAPI
4339 if (unlikely(*work_done >= work_to_do))
4340 break;
4341 (*work_done)++;
4342 #endif
4343 skb = buffer_info->skb;
4344
4345 /* in the packet split case this is header only */
4346 prefetch(skb->data - NET_IP_ALIGN);
4347
4348 if (++i == rx_ring->count) i = 0;
4349 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4350 prefetch(next_rxd);
4351
4352 next_buffer = &rx_ring->buffer_info[i];
4353
4354 cleaned = TRUE;
4355 cleaned_count++;
4356 pci_unmap_single(pdev, buffer_info->dma,
4357 buffer_info->length,
4358 PCI_DMA_FROMDEVICE);
4359
4360 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4361 E1000_DBG("%s: Packet Split buffers didn't pick up"
4362 " the full packet\n", netdev->name);
4363 dev_kfree_skb_irq(skb);
4364 goto next_desc;
4365 }
4366
4367 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4368 dev_kfree_skb_irq(skb);
4369 goto next_desc;
4370 }
4371
4372 length = le16_to_cpu(rx_desc->wb.middle.length0);
4373
4374 if (unlikely(!length)) {
4375 E1000_DBG("%s: Last part of the packet spanning"
4376 " multiple descriptors\n", netdev->name);
4377 dev_kfree_skb_irq(skb);
4378 goto next_desc;
4379 }
4380
4381 /* Good Receive */
4382 skb_put(skb, length);
4383
4384 {
4385 /* this looks ugly, but it seems compiler issues make it
4386 more efficient than reusing j */
4387 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4388
4389 /* page alloc/put takes too long and effects small packet
4390 * throughput, so unsplit small packets and save the alloc/put*/
4391 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4392 u8 *vaddr;
4393 /* there is no documentation about how to call
4394 * kmap_atomic, so we can't hold the mapping
4395 * very long */
4396 pci_dma_sync_single_for_cpu(pdev,
4397 ps_page_dma->ps_page_dma[0],
4398 PAGE_SIZE,
4399 PCI_DMA_FROMDEVICE);
4400 vaddr = kmap_atomic(ps_page->ps_page[0],
4401 KM_SKB_DATA_SOFTIRQ);
4402 memcpy(skb_tail_pointer(skb), vaddr, l1);
4403 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4404 pci_dma_sync_single_for_device(pdev,
4405 ps_page_dma->ps_page_dma[0],
4406 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4407 /* remove the CRC */
4408 l1 -= 4;
4409 skb_put(skb, l1);
4410 goto copydone;
4411 } /* if */
4412 }
4413
4414 for (j = 0; j < adapter->rx_ps_pages; j++) {
4415 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4416 break;
4417 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4418 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4419 ps_page_dma->ps_page_dma[j] = 0;
4420 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4421 length);
4422 ps_page->ps_page[j] = NULL;
4423 skb->len += length;
4424 skb->data_len += length;
4425 skb->truesize += length;
4426 }
4427
4428 /* strip the ethernet crc, problem is we're using pages now so
4429 * this whole operation can get a little cpu intensive */
4430 pskb_trim(skb, skb->len - 4);
4431
4432 copydone:
4433 total_rx_bytes += skb->len;
4434 total_rx_packets++;
4435
4436 e1000_rx_checksum(adapter, staterr,
4437 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4438 skb->protocol = eth_type_trans(skb, netdev);
4439
4440 if (likely(rx_desc->wb.upper.header_status &
4441 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4442 adapter->rx_hdr_split++;
4443 #ifdef CONFIG_E1000_NAPI
4444 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4445 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4446 le16_to_cpu(rx_desc->wb.middle.vlan) &
4447 E1000_RXD_SPC_VLAN_MASK);
4448 } else {
4449 netif_receive_skb(skb);
4450 }
4451 #else /* CONFIG_E1000_NAPI */
4452 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4453 vlan_hwaccel_rx(skb, adapter->vlgrp,
4454 le16_to_cpu(rx_desc->wb.middle.vlan) &
4455 E1000_RXD_SPC_VLAN_MASK);
4456 } else {
4457 netif_rx(skb);
4458 }
4459 #endif /* CONFIG_E1000_NAPI */
4460 netdev->last_rx = jiffies;
4461
4462 next_desc:
4463 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4464 buffer_info->skb = NULL;
4465
4466 /* return some buffers to hardware, one at a time is too slow */
4467 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4468 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4469 cleaned_count = 0;
4470 }
4471
4472 /* use prefetched values */
4473 rx_desc = next_rxd;
4474 buffer_info = next_buffer;
4475
4476 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4477 }
4478 rx_ring->next_to_clean = i;
4479
4480 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4481 if (cleaned_count)
4482 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4483
4484 adapter->total_rx_packets += total_rx_packets;
4485 adapter->total_rx_bytes += total_rx_bytes;
4486 return cleaned;
4487 }
4488
4489 /**
4490 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4491 * @adapter: address of board private structure
4492 **/
4493
4494 static void
4495 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4496 struct e1000_rx_ring *rx_ring,
4497 int cleaned_count)
4498 {
4499 struct net_device *netdev = adapter->netdev;
4500 struct pci_dev *pdev = adapter->pdev;
4501 struct e1000_rx_desc *rx_desc;
4502 struct e1000_buffer *buffer_info;
4503 struct sk_buff *skb;
4504 unsigned int i;
4505 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4506
4507 i = rx_ring->next_to_use;
4508 buffer_info = &rx_ring->buffer_info[i];
4509
4510 while (cleaned_count--) {
4511 skb = buffer_info->skb;
4512 if (skb) {
4513 skb_trim(skb, 0);
4514 goto map_skb;
4515 }
4516
4517 skb = netdev_alloc_skb(netdev, bufsz);
4518 if (unlikely(!skb)) {
4519 /* Better luck next round */
4520 adapter->alloc_rx_buff_failed++;
4521 break;
4522 }
4523
4524 /* Fix for errata 23, can't cross 64kB boundary */
4525 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4526 struct sk_buff *oldskb = skb;
4527 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4528 "at %p\n", bufsz, skb->data);
4529 /* Try again, without freeing the previous */
4530 skb = netdev_alloc_skb(netdev, bufsz);
4531 /* Failed allocation, critical failure */
4532 if (!skb) {
4533 dev_kfree_skb(oldskb);
4534 break;
4535 }
4536
4537 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4538 /* give up */
4539 dev_kfree_skb(skb);
4540 dev_kfree_skb(oldskb);
4541 break; /* while !buffer_info->skb */
4542 }
4543
4544 /* Use new allocation */
4545 dev_kfree_skb(oldskb);
4546 }
4547 /* Make buffer alignment 2 beyond a 16 byte boundary
4548 * this will result in a 16 byte aligned IP header after
4549 * the 14 byte MAC header is removed
4550 */
4551 skb_reserve(skb, NET_IP_ALIGN);
4552
4553 buffer_info->skb = skb;
4554 buffer_info->length = adapter->rx_buffer_len;
4555 map_skb:
4556 buffer_info->dma = pci_map_single(pdev,
4557 skb->data,
4558 adapter->rx_buffer_len,
4559 PCI_DMA_FROMDEVICE);
4560
4561 /* Fix for errata 23, can't cross 64kB boundary */
4562 if (!e1000_check_64k_bound(adapter,
4563 (void *)(unsigned long)buffer_info->dma,
4564 adapter->rx_buffer_len)) {
4565 DPRINTK(RX_ERR, ERR,
4566 "dma align check failed: %u bytes at %p\n",
4567 adapter->rx_buffer_len,
4568 (void *)(unsigned long)buffer_info->dma);
4569 dev_kfree_skb(skb);
4570 buffer_info->skb = NULL;
4571
4572 pci_unmap_single(pdev, buffer_info->dma,
4573 adapter->rx_buffer_len,
4574 PCI_DMA_FROMDEVICE);
4575
4576 break; /* while !buffer_info->skb */
4577 }
4578 rx_desc = E1000_RX_DESC(*rx_ring, i);
4579 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4580
4581 if (unlikely(++i == rx_ring->count))
4582 i = 0;
4583 buffer_info = &rx_ring->buffer_info[i];
4584 }
4585
4586 if (likely(rx_ring->next_to_use != i)) {
4587 rx_ring->next_to_use = i;
4588 if (unlikely(i-- == 0))
4589 i = (rx_ring->count - 1);
4590
4591 /* Force memory writes to complete before letting h/w
4592 * know there are new descriptors to fetch. (Only
4593 * applicable for weak-ordered memory model archs,
4594 * such as IA-64). */
4595 wmb();
4596 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4597 }
4598 }
4599
4600 /**
4601 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4602 * @adapter: address of board private structure
4603 **/
4604
4605 static void
4606 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4607 struct e1000_rx_ring *rx_ring,
4608 int cleaned_count)
4609 {
4610 struct net_device *netdev = adapter->netdev;
4611 struct pci_dev *pdev = adapter->pdev;
4612 union e1000_rx_desc_packet_split *rx_desc;
4613 struct e1000_buffer *buffer_info;
4614 struct e1000_ps_page *ps_page;
4615 struct e1000_ps_page_dma *ps_page_dma;
4616 struct sk_buff *skb;
4617 unsigned int i, j;
4618
4619 i = rx_ring->next_to_use;
4620 buffer_info = &rx_ring->buffer_info[i];
4621 ps_page = &rx_ring->ps_page[i];
4622 ps_page_dma = &rx_ring->ps_page_dma[i];
4623
4624 while (cleaned_count--) {
4625 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4626
4627 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4628 if (j < adapter->rx_ps_pages) {
4629 if (likely(!ps_page->ps_page[j])) {
4630 ps_page->ps_page[j] =
4631 alloc_page(GFP_ATOMIC);
4632 if (unlikely(!ps_page->ps_page[j])) {
4633 adapter->alloc_rx_buff_failed++;
4634 goto no_buffers;
4635 }
4636 ps_page_dma->ps_page_dma[j] =
4637 pci_map_page(pdev,
4638 ps_page->ps_page[j],
4639 0, PAGE_SIZE,
4640 PCI_DMA_FROMDEVICE);
4641 }
4642 /* Refresh the desc even if buffer_addrs didn't
4643 * change because each write-back erases
4644 * this info.
4645 */
4646 rx_desc->read.buffer_addr[j+1] =
4647 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4648 } else
4649 rx_desc->read.buffer_addr[j+1] = ~0;
4650 }
4651
4652 skb = netdev_alloc_skb(netdev,
4653 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4654
4655 if (unlikely(!skb)) {
4656 adapter->alloc_rx_buff_failed++;
4657 break;
4658 }
4659
4660 /* Make buffer alignment 2 beyond a 16 byte boundary
4661 * this will result in a 16 byte aligned IP header after
4662 * the 14 byte MAC header is removed
4663 */
4664 skb_reserve(skb, NET_IP_ALIGN);
4665
4666 buffer_info->skb = skb;
4667 buffer_info->length = adapter->rx_ps_bsize0;
4668 buffer_info->dma = pci_map_single(pdev, skb->data,
4669 adapter->rx_ps_bsize0,
4670 PCI_DMA_FROMDEVICE);
4671
4672 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4673
4674 if (unlikely(++i == rx_ring->count)) i = 0;
4675 buffer_info = &rx_ring->buffer_info[i];
4676 ps_page = &rx_ring->ps_page[i];
4677 ps_page_dma = &rx_ring->ps_page_dma[i];
4678 }
4679
4680 no_buffers:
4681 if (likely(rx_ring->next_to_use != i)) {
4682 rx_ring->next_to_use = i;
4683 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4684
4685 /* Force memory writes to complete before letting h/w
4686 * know there are new descriptors to fetch. (Only
4687 * applicable for weak-ordered memory model archs,
4688 * such as IA-64). */
4689 wmb();
4690 /* Hardware increments by 16 bytes, but packet split
4691 * descriptors are 32 bytes...so we increment tail
4692 * twice as much.
4693 */
4694 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4695 }
4696 }
4697
4698 /**
4699 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4700 * @adapter:
4701 **/
4702
4703 static void
4704 e1000_smartspeed(struct e1000_adapter *adapter)
4705 {
4706 uint16_t phy_status;
4707 uint16_t phy_ctrl;
4708
4709 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4710 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4711 return;
4712
4713 if (adapter->smartspeed == 0) {
4714 /* If Master/Slave config fault is asserted twice,
4715 * we assume back-to-back */
4716 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4717 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4718 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4719 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4720 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4721 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4722 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4723 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4724 phy_ctrl);
4725 adapter->smartspeed++;
4726 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4727 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4728 &phy_ctrl)) {
4729 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4730 MII_CR_RESTART_AUTO_NEG);
4731 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4732 phy_ctrl);
4733 }
4734 }
4735 return;
4736 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4737 /* If still no link, perhaps using 2/3 pair cable */
4738 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4739 phy_ctrl |= CR_1000T_MS_ENABLE;
4740 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4741 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4742 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4743 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4744 MII_CR_RESTART_AUTO_NEG);
4745 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4746 }
4747 }
4748 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4749 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4750 adapter->smartspeed = 0;
4751 }
4752
4753 /**
4754 * e1000_ioctl -
4755 * @netdev:
4756 * @ifreq:
4757 * @cmd:
4758 **/
4759
4760 static int
4761 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4762 {
4763 switch (cmd) {
4764 case SIOCGMIIPHY:
4765 case SIOCGMIIREG:
4766 case SIOCSMIIREG:
4767 return e1000_mii_ioctl(netdev, ifr, cmd);
4768 default:
4769 return -EOPNOTSUPP;
4770 }
4771 }
4772
4773 /**
4774 * e1000_mii_ioctl -
4775 * @netdev:
4776 * @ifreq:
4777 * @cmd:
4778 **/
4779
4780 static int
4781 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4782 {
4783 struct e1000_adapter *adapter = netdev_priv(netdev);
4784 struct mii_ioctl_data *data = if_mii(ifr);
4785 int retval;
4786 uint16_t mii_reg;
4787 uint16_t spddplx;
4788 unsigned long flags;
4789
4790 if (adapter->hw.media_type != e1000_media_type_copper)
4791 return -EOPNOTSUPP;
4792
4793 switch (cmd) {
4794 case SIOCGMIIPHY:
4795 data->phy_id = adapter->hw.phy_addr;
4796 break;
4797 case SIOCGMIIREG:
4798 if (!capable(CAP_NET_ADMIN))
4799 return -EPERM;
4800 spin_lock_irqsave(&adapter->stats_lock, flags);
4801 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4802 &data->val_out)) {
4803 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4804 return -EIO;
4805 }
4806 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4807 break;
4808 case SIOCSMIIREG:
4809 if (!capable(CAP_NET_ADMIN))
4810 return -EPERM;
4811 if (data->reg_num & ~(0x1F))
4812 return -EFAULT;
4813 mii_reg = data->val_in;
4814 spin_lock_irqsave(&adapter->stats_lock, flags);
4815 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4816 mii_reg)) {
4817 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4818 return -EIO;
4819 }
4820 if (adapter->hw.media_type == e1000_media_type_copper) {
4821 switch (data->reg_num) {
4822 case PHY_CTRL:
4823 if (mii_reg & MII_CR_POWER_DOWN)
4824 break;
4825 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4826 adapter->hw.autoneg = 1;
4827 adapter->hw.autoneg_advertised = 0x2F;
4828 } else {
4829 if (mii_reg & 0x40)
4830 spddplx = SPEED_1000;
4831 else if (mii_reg & 0x2000)
4832 spddplx = SPEED_100;
4833 else
4834 spddplx = SPEED_10;
4835 spddplx += (mii_reg & 0x100)
4836 ? DUPLEX_FULL :
4837 DUPLEX_HALF;
4838 retval = e1000_set_spd_dplx(adapter,
4839 spddplx);
4840 if (retval) {
4841 spin_unlock_irqrestore(
4842 &adapter->stats_lock,
4843 flags);
4844 return retval;
4845 }
4846 }
4847 if (netif_running(adapter->netdev))
4848 e1000_reinit_locked(adapter);
4849 else
4850 e1000_reset(adapter);
4851 break;
4852 case M88E1000_PHY_SPEC_CTRL:
4853 case M88E1000_EXT_PHY_SPEC_CTRL:
4854 if (e1000_phy_reset(&adapter->hw)) {
4855 spin_unlock_irqrestore(
4856 &adapter->stats_lock, flags);
4857 return -EIO;
4858 }
4859 break;
4860 }
4861 } else {
4862 switch (data->reg_num) {
4863 case PHY_CTRL:
4864 if (mii_reg & MII_CR_POWER_DOWN)
4865 break;
4866 if (netif_running(adapter->netdev))
4867 e1000_reinit_locked(adapter);
4868 else
4869 e1000_reset(adapter);
4870 break;
4871 }
4872 }
4873 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4874 break;
4875 default:
4876 return -EOPNOTSUPP;
4877 }
4878 return E1000_SUCCESS;
4879 }
4880
4881 void
4882 e1000_pci_set_mwi(struct e1000_hw *hw)
4883 {
4884 struct e1000_adapter *adapter = hw->back;
4885 int ret_val = pci_set_mwi(adapter->pdev);
4886
4887 if (ret_val)
4888 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4889 }
4890
4891 void
4892 e1000_pci_clear_mwi(struct e1000_hw *hw)
4893 {
4894 struct e1000_adapter *adapter = hw->back;
4895
4896 pci_clear_mwi(adapter->pdev);
4897 }
4898
4899 void
4900 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4901 {
4902 struct e1000_adapter *adapter = hw->back;
4903
4904 pci_read_config_word(adapter->pdev, reg, value);
4905 }
4906
4907 void
4908 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4909 {
4910 struct e1000_adapter *adapter = hw->back;
4911
4912 pci_write_config_word(adapter->pdev, reg, *value);
4913 }
4914
4915 int32_t
4916 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4917 {
4918 struct e1000_adapter *adapter = hw->back;
4919 uint16_t cap_offset;
4920
4921 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4922 if (!cap_offset)
4923 return -E1000_ERR_CONFIG;
4924
4925 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4926
4927 return E1000_SUCCESS;
4928 }
4929
4930 void
4931 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4932 {
4933 outl(value, port);
4934 }
4935
4936 static void
4937 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4938 {
4939 struct e1000_adapter *adapter = netdev_priv(netdev);
4940 uint32_t ctrl, rctl;
4941
4942 e1000_irq_disable(adapter);
4943 adapter->vlgrp = grp;
4944
4945 if (grp) {
4946 /* enable VLAN tag insert/strip */
4947 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4948 ctrl |= E1000_CTRL_VME;
4949 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4950
4951 if (adapter->hw.mac_type != e1000_ich8lan) {
4952 /* enable VLAN receive filtering */
4953 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4954 rctl |= E1000_RCTL_VFE;
4955 rctl &= ~E1000_RCTL_CFIEN;
4956 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4957 e1000_update_mng_vlan(adapter);
4958 }
4959 } else {
4960 /* disable VLAN tag insert/strip */
4961 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4962 ctrl &= ~E1000_CTRL_VME;
4963 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4964
4965 if (adapter->hw.mac_type != e1000_ich8lan) {
4966 /* disable VLAN filtering */
4967 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4968 rctl &= ~E1000_RCTL_VFE;
4969 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4970 if (adapter->mng_vlan_id !=
4971 (uint16_t)E1000_MNG_VLAN_NONE) {
4972 e1000_vlan_rx_kill_vid(netdev,
4973 adapter->mng_vlan_id);
4974 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4975 }
4976 }
4977 }
4978
4979 e1000_irq_enable(adapter);
4980 }
4981
4982 static void
4983 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4984 {
4985 struct e1000_adapter *adapter = netdev_priv(netdev);
4986 uint32_t vfta, index;
4987
4988 if ((adapter->hw.mng_cookie.status &
4989 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4990 (vid == adapter->mng_vlan_id))
4991 return;
4992 /* add VID to filter table */
4993 index = (vid >> 5) & 0x7F;
4994 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4995 vfta |= (1 << (vid & 0x1F));
4996 e1000_write_vfta(&adapter->hw, index, vfta);
4997 }
4998
4999 static void
5000 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5001 {
5002 struct e1000_adapter *adapter = netdev_priv(netdev);
5003 uint32_t vfta, index;
5004
5005 e1000_irq_disable(adapter);
5006 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5007 e1000_irq_enable(adapter);
5008
5009 if ((adapter->hw.mng_cookie.status &
5010 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5011 (vid == adapter->mng_vlan_id)) {
5012 /* release control to f/w */
5013 e1000_release_hw_control(adapter);
5014 return;
5015 }
5016
5017 /* remove VID from filter table */
5018 index = (vid >> 5) & 0x7F;
5019 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5020 vfta &= ~(1 << (vid & 0x1F));
5021 e1000_write_vfta(&adapter->hw, index, vfta);
5022 }
5023
5024 static void
5025 e1000_restore_vlan(struct e1000_adapter *adapter)
5026 {
5027 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5028
5029 if (adapter->vlgrp) {
5030 uint16_t vid;
5031 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5032 if (!vlan_group_get_device(adapter->vlgrp, vid))
5033 continue;
5034 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5035 }
5036 }
5037 }
5038
5039 int
5040 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5041 {
5042 adapter->hw.autoneg = 0;
5043
5044 /* Fiber NICs only allow 1000 gbps Full duplex */
5045 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5046 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5047 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5048 return -EINVAL;
5049 }
5050
5051 switch (spddplx) {
5052 case SPEED_10 + DUPLEX_HALF:
5053 adapter->hw.forced_speed_duplex = e1000_10_half;
5054 break;
5055 case SPEED_10 + DUPLEX_FULL:
5056 adapter->hw.forced_speed_duplex = e1000_10_full;
5057 break;
5058 case SPEED_100 + DUPLEX_HALF:
5059 adapter->hw.forced_speed_duplex = e1000_100_half;
5060 break;
5061 case SPEED_100 + DUPLEX_FULL:
5062 adapter->hw.forced_speed_duplex = e1000_100_full;
5063 break;
5064 case SPEED_1000 + DUPLEX_FULL:
5065 adapter->hw.autoneg = 1;
5066 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5067 break;
5068 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5069 default:
5070 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5071 return -EINVAL;
5072 }
5073 return 0;
5074 }
5075
5076 static int
5077 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5078 {
5079 struct net_device *netdev = pci_get_drvdata(pdev);
5080 struct e1000_adapter *adapter = netdev_priv(netdev);
5081 uint32_t ctrl, ctrl_ext, rctl, status;
5082 uint32_t wufc = adapter->wol;
5083 #ifdef CONFIG_PM
5084 int retval = 0;
5085 #endif
5086
5087 netif_device_detach(netdev);
5088
5089 if (netif_running(netdev)) {
5090 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5091 e1000_down(adapter);
5092 }
5093
5094 #ifdef CONFIG_PM
5095 retval = pci_save_state(pdev);
5096 if (retval)
5097 return retval;
5098 #endif
5099
5100 status = E1000_READ_REG(&adapter->hw, STATUS);
5101 if (status & E1000_STATUS_LU)
5102 wufc &= ~E1000_WUFC_LNKC;
5103
5104 if (wufc) {
5105 e1000_setup_rctl(adapter);
5106 e1000_set_multi(netdev);
5107
5108 /* turn on all-multi mode if wake on multicast is enabled */
5109 if (wufc & E1000_WUFC_MC) {
5110 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5111 rctl |= E1000_RCTL_MPE;
5112 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5113 }
5114
5115 if (adapter->hw.mac_type >= e1000_82540) {
5116 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5117 /* advertise wake from D3Cold */
5118 #define E1000_CTRL_ADVD3WUC 0x00100000
5119 /* phy power management enable */
5120 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5121 ctrl |= E1000_CTRL_ADVD3WUC |
5122 E1000_CTRL_EN_PHY_PWR_MGMT;
5123 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5124 }
5125
5126 if (adapter->hw.media_type == e1000_media_type_fiber ||
5127 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5128 /* keep the laser running in D3 */
5129 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5130 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5131 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5132 }
5133
5134 /* Allow time for pending master requests to run */
5135 e1000_disable_pciex_master(&adapter->hw);
5136
5137 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5138 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5139 pci_enable_wake(pdev, PCI_D3hot, 1);
5140 pci_enable_wake(pdev, PCI_D3cold, 1);
5141 } else {
5142 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5143 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5144 pci_enable_wake(pdev, PCI_D3hot, 0);
5145 pci_enable_wake(pdev, PCI_D3cold, 0);
5146 }
5147
5148 e1000_release_manageability(adapter);
5149
5150 /* make sure adapter isn't asleep if manageability is enabled */
5151 if (adapter->en_mng_pt) {
5152 pci_enable_wake(pdev, PCI_D3hot, 1);
5153 pci_enable_wake(pdev, PCI_D3cold, 1);
5154 }
5155
5156 if (adapter->hw.phy_type == e1000_phy_igp_3)
5157 e1000_phy_powerdown_workaround(&adapter->hw);
5158
5159 if (netif_running(netdev))
5160 e1000_free_irq(adapter);
5161
5162 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5163 * would have already happened in close and is redundant. */
5164 e1000_release_hw_control(adapter);
5165
5166 pci_disable_device(pdev);
5167
5168 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5169
5170 return 0;
5171 }
5172
5173 #ifdef CONFIG_PM
5174 static int
5175 e1000_resume(struct pci_dev *pdev)
5176 {
5177 struct net_device *netdev = pci_get_drvdata(pdev);
5178 struct e1000_adapter *adapter = netdev_priv(netdev);
5179 uint32_t err;
5180
5181 pci_set_power_state(pdev, PCI_D0);
5182 pci_restore_state(pdev);
5183 if ((err = pci_enable_device(pdev))) {
5184 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5185 return err;
5186 }
5187 pci_set_master(pdev);
5188
5189 pci_enable_wake(pdev, PCI_D3hot, 0);
5190 pci_enable_wake(pdev, PCI_D3cold, 0);
5191
5192 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5193 return err;
5194
5195 e1000_power_up_phy(adapter);
5196 e1000_reset(adapter);
5197 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5198
5199 e1000_init_manageability(adapter);
5200
5201 if (netif_running(netdev))
5202 e1000_up(adapter);
5203
5204 netif_device_attach(netdev);
5205
5206 /* If the controller is 82573 and f/w is AMT, do not set
5207 * DRV_LOAD until the interface is up. For all other cases,
5208 * let the f/w know that the h/w is now under the control
5209 * of the driver. */
5210 if (adapter->hw.mac_type != e1000_82573 ||
5211 !e1000_check_mng_mode(&adapter->hw))
5212 e1000_get_hw_control(adapter);
5213
5214 return 0;
5215 }
5216 #endif
5217
5218 static void e1000_shutdown(struct pci_dev *pdev)
5219 {
5220 e1000_suspend(pdev, PMSG_SUSPEND);
5221 }
5222
5223 #ifdef CONFIG_NET_POLL_CONTROLLER
5224 /*
5225 * Polling 'interrupt' - used by things like netconsole to send skbs
5226 * without having to re-enable interrupts. It's not called while
5227 * the interrupt routine is executing.
5228 */
5229 static void
5230 e1000_netpoll(struct net_device *netdev)
5231 {
5232 struct e1000_adapter *adapter = netdev_priv(netdev);
5233
5234 disable_irq(adapter->pdev->irq);
5235 e1000_intr(adapter->pdev->irq, netdev);
5236 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5237 #ifndef CONFIG_E1000_NAPI
5238 adapter->clean_rx(adapter, adapter->rx_ring);
5239 #endif
5240 enable_irq(adapter->pdev->irq);
5241 }
5242 #endif
5243
5244 /**
5245 * e1000_io_error_detected - called when PCI error is detected
5246 * @pdev: Pointer to PCI device
5247 * @state: The current pci conneection state
5248 *
5249 * This function is called after a PCI bus error affecting
5250 * this device has been detected.
5251 */
5252 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5253 {
5254 struct net_device *netdev = pci_get_drvdata(pdev);
5255 struct e1000_adapter *adapter = netdev->priv;
5256
5257 netif_device_detach(netdev);
5258
5259 if (netif_running(netdev))
5260 e1000_down(adapter);
5261 pci_disable_device(pdev);
5262
5263 /* Request a slot slot reset. */
5264 return PCI_ERS_RESULT_NEED_RESET;
5265 }
5266
5267 /**
5268 * e1000_io_slot_reset - called after the pci bus has been reset.
5269 * @pdev: Pointer to PCI device
5270 *
5271 * Restart the card from scratch, as if from a cold-boot. Implementation
5272 * resembles the first-half of the e1000_resume routine.
5273 */
5274 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5275 {
5276 struct net_device *netdev = pci_get_drvdata(pdev);
5277 struct e1000_adapter *adapter = netdev->priv;
5278
5279 if (pci_enable_device(pdev)) {
5280 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5281 return PCI_ERS_RESULT_DISCONNECT;
5282 }
5283 pci_set_master(pdev);
5284
5285 pci_enable_wake(pdev, PCI_D3hot, 0);
5286 pci_enable_wake(pdev, PCI_D3cold, 0);
5287
5288 e1000_reset(adapter);
5289 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5290
5291 return PCI_ERS_RESULT_RECOVERED;
5292 }
5293
5294 /**
5295 * e1000_io_resume - called when traffic can start flowing again.
5296 * @pdev: Pointer to PCI device
5297 *
5298 * This callback is called when the error recovery driver tells us that
5299 * its OK to resume normal operation. Implementation resembles the
5300 * second-half of the e1000_resume routine.
5301 */
5302 static void e1000_io_resume(struct pci_dev *pdev)
5303 {
5304 struct net_device *netdev = pci_get_drvdata(pdev);
5305 struct e1000_adapter *adapter = netdev->priv;
5306
5307 e1000_init_manageability(adapter);
5308
5309 if (netif_running(netdev)) {
5310 if (e1000_up(adapter)) {
5311 printk("e1000: can't bring device back up after reset\n");
5312 return;
5313 }
5314 }
5315
5316 netif_device_attach(netdev);
5317
5318 /* If the controller is 82573 and f/w is AMT, do not set
5319 * DRV_LOAD until the interface is up. For all other cases,
5320 * let the f/w know that the h/w is now under the control
5321 * of the driver. */
5322 if (adapter->hw.mac_type != e1000_82573 ||
5323 !e1000_check_mng_mode(&adapter->hw))
5324 e1000_get_hw_control(adapter);
5325
5326 }
5327
5328 /* e1000_main.c */
Verdex Pro support