arch/sh64/mach-romram/setup.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * arch/sh64/mach-romram/setup.c
   7  *
   8  * SH-5 ROM/RAM Platform Support
   9  *
  10  * This file handles the architecture-dependent parts of initialization
  11  *
  12  * Copyright (C) 2000, 2001  Paolo Alberelli
  13  *
  14  * benedict.gaster@superh.com:   3rd May 2002
  15  *    Added support for ramdisk, removing statically linked romfs at the same time. *
  16  *
  17  * lethal@linux-sh.org:          15th May 2003
  18  *    Use the generic procfs cpuinfo interface, just return a valid board name.
  19  *
  20  * Sean.McGoogan@superh.com     17th Feb 2004
  21  *      copied from arch/sh64/mach-harp/setup.c
  22  */
  23
  24 #include <linux/stddef.h>
  25 #include <linux/init.h>
  26 #include <linux/config.h>
  27 #include <linux/mm.h>
  28 #include <linux/bootmem.h>
  29 #include <linux/delay.h>
  30 #include <linux/kernel.h>
  31 #include <asm/processor.h>
  32 #include <asm/platform.h>
  33 #include <asm/io.h>
  34 #include <asm/irq.h>
  35 #include <asm/page.h>
  36
  37 #define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource)))
  38
  39 /*
  40  * Platform Dependent Interrupt Priorities.
  41  */
  42
  43 /* Using defaults defined in irq.h */
  44 #define RES NO_PRIORITY         /* Disabled */
  45 #define IR0 IRL0_PRIORITY       /* IRLs */
  46 #define IR1 IRL1_PRIORITY
  47 #define IR2 IRL2_PRIORITY
  48 #define IR3 IRL3_PRIORITY
  49 #define PCA INTA_PRIORITY       /* PCI Ints */
  50 #define PCB INTB_PRIORITY
  51 #define PCC INTC_PRIORITY
  52 #define PCD INTD_PRIORITY
  53 #define SER TOP_PRIORITY
  54 #define ERR TOP_PRIORITY
  55 #define PW0 TOP_PRIORITY
  56 #define PW1 TOP_PRIORITY
  57 #define PW2 TOP_PRIORITY
  58 #define PW3 TOP_PRIORITY
  59 #define DM0 NO_PRIORITY         /* DMA Ints */
  60 #define DM1 NO_PRIORITY
  61 #define DM2 NO_PRIORITY
  62 #define DM3 NO_PRIORITY
  63 #define DAE NO_PRIORITY
  64 #define TU0 TIMER_PRIORITY      /* TMU Ints */
  65 #define TU1 NO_PRIORITY
  66 #define TU2 NO_PRIORITY
  67 #define TI2 NO_PRIORITY
  68 #define ATI NO_PRIORITY         /* RTC Ints */
  69 #define PRI NO_PRIORITY
  70 #define CUI RTC_PRIORITY
  71 #define ERI SCIF_PRIORITY       /* SCIF Ints */
  72 #define RXI SCIF_PRIORITY
  73 #define BRI SCIF_PRIORITY
  74 #define TXI SCIF_PRIORITY
  75 #define ITI TOP_PRIORITY        /* WDT Ints */
  76
  77 /*
  78  * Platform dependent structures: maps and parms block.
  79  */
  80 struct resource io_resources[] = {
  81         /* To be updated with external devices */
  82 };
  83
  84 struct resource kram_resources[] = {
  85         { "Kernel code", 0, 0 },        /* These must be last in the array */
  86         { "Kernel data", 0, 0 }         /* These must be last in the array */
  87 };
  88
  89 struct resource xram_resources[] = {
  90         /* To be updated with external devices */
  91 };
  92
  93 struct resource rom_resources[] = {
  94         /* To be updated with external devices */
  95 };
  96
  97 struct sh64_platform platform_parms = {
  98         .readonly_rootfs =      1,
  99         .initial_root_dev =     0x0100,
 100         .loader_type =          1,
 101         .io_res_p =             io_resources,
 102         .io_res_count =         RES_COUNT(io_resources),
 103         .kram_res_p =           kram_resources,
 104         .kram_res_count =       RES_COUNT(kram_resources),
 105         .xram_res_p =           xram_resources,
 106         .xram_res_count =       RES_COUNT(xram_resources),
 107         .rom_res_p =            rom_resources,
 108         .rom_res_count =        RES_COUNT(rom_resources),
 109 };
 110
 111 int platform_int_priority[NR_INTC_IRQS] = {
 112         IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ  0- 7 */
 113         RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ  8-15 */
 114         PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
 115         RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
 116         TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
 117         RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
 118         RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
 119         RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
 120 };
 121
 122 void __init platform_setup(void)
 123 {
 124         /* ROM/RAM platform leaves the decision to head.S, for now */
 125         platform_parms.fpu_flags = fpu_in_use;
 126 }
 127
 128 void __init platform_monitor(void)
 129 {
 130         /* Nothing yet .. */
 131 }
 132
 133 void __init platform_reserve(void)
 134 {
 135         /* Nothing yet .. */
 136 }
 137
 138 const char *get_system_type(void)
 139 {
 140         return "ROM/RAM";
 141 }
 142