2 amd756.c - Part of lm_sensors, Linux kernel modules for hardware
5 Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
7 Shamelessly ripped from i2c-piix4.c:
9 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
10 Philip Edelbrock <phil@netroedge.com>
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 2002-04-08: Added nForce support. (Csaba Halasz)
29 2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
30 2002-12-28: Rewritten into something that resembles a Linux driver (hch)
31 2003-11-29: Added back AMD8111 removed by the previous rewrite.
36 Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
37 Note: we assume there can only be one device, with one SMBus interface.
40 #include <linux/config.h>
41 #include <linux/module.h>
42 #include <linux/pci.h>
43 #include <linux/kernel.h>
44 #include <linux/delay.h>
45 #include <linux/stddef.h>
46 #include <linux/sched.h>
47 #include <linux/ioport.h>
48 #include <linux/i2c.h>
49 #include <linux/init.h>
52 /* AMD756 SMBus address offsets */
53 #define SMB_ADDR_OFFSET 0xE0
55 #define SMB_GLOBAL_STATUS (0x0 + amd756_ioport)
56 #define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport)
57 #define SMB_HOST_ADDRESS (0x4 + amd756_ioport)
58 #define SMB_HOST_DATA (0x6 + amd756_ioport)
59 #define SMB_HOST_COMMAND (0x8 + amd756_ioport)
60 #define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport)
61 #define SMB_HAS_DATA (0xA + amd756_ioport)
62 #define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport)
63 #define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport)
64 #define SMB_SNOOP_ADDRESS (0xF + amd756_ioport)
66 /* PCI Address Constants */
68 /* address of I/O space */
69 #define SMBBA 0x058 /* mh */
70 #define SMBBANFORCE 0x014
72 /* general configuration */
73 #define SMBGCFG 0x041 /* mh */
75 /* silicon revision code */
79 #define MAX_TIMEOUT 500
81 /* AMD756 constants */
82 #define AMD756_QUICK 0x00
83 #define AMD756_BYTE 0x01
84 #define AMD756_BYTE_DATA 0x02
85 #define AMD756_WORD_DATA 0x03
86 #define AMD756_PROCESS_CALL 0x04
87 #define AMD756_BLOCK_DATA 0x05
90 static unsigned short amd756_ioport
= 0;
93 SMBUS event = I/O 28-29 bit 11
94 see E0 for the status bits and enabled in E2
97 #define GS_ABRT_STS (1 << 0)
98 #define GS_COL_STS (1 << 1)
99 #define GS_PRERR_STS (1 << 2)
100 #define GS_HST_STS (1 << 3)
101 #define GS_HCYC_STS (1 << 4)
102 #define GS_TO_STS (1 << 5)
103 #define GS_SMB_STS (1 << 11)
105 #define GS_CLEAR_STS (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
106 GS_HCYC_STS | GS_TO_STS )
108 #define GE_CYC_TYPE_MASK (7)
109 #define GE_HOST_STC (1 << 3)
110 #define GE_ABORT (1 << 5)
113 static int amd756_transaction(struct i2c_adapter
*adap
)
119 dev_dbg(&adap
->dev
, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
120 "DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS
),
121 inw_p(SMB_GLOBAL_ENABLE
), inw_p(SMB_HOST_ADDRESS
),
122 inb_p(SMB_HOST_DATA
));
124 /* Make sure the SMBus host is ready to start transmitting */
125 if ((temp
= inw_p(SMB_GLOBAL_STATUS
)) & (GS_HST_STS
| GS_SMB_STS
)) {
126 dev_dbg(&adap
->dev
, "SMBus busy (%04x). Waiting...\n", temp
);
129 temp
= inw_p(SMB_GLOBAL_STATUS
);
130 } while ((temp
& (GS_HST_STS
| GS_SMB_STS
)) &&
131 (timeout
++ < MAX_TIMEOUT
));
132 /* If the SMBus is still busy, we give up */
133 if (timeout
>= MAX_TIMEOUT
) {
134 dev_dbg(&adap
->dev
, "Busy wait timeout (%04x)\n", temp
);
140 /* start the transaction by setting the start bit */
141 outw_p(inw(SMB_GLOBAL_ENABLE
) | GE_HOST_STC
, SMB_GLOBAL_ENABLE
);
143 /* We will always wait for a fraction of a second! */
146 temp
= inw_p(SMB_GLOBAL_STATUS
);
147 } while ((temp
& GS_HST_STS
) && (timeout
++ < MAX_TIMEOUT
));
149 /* If the SMBus is still busy, we give up */
150 if (timeout
>= MAX_TIMEOUT
) {
151 dev_dbg(&adap
->dev
, "Completion timeout!\n");
155 if (temp
& GS_PRERR_STS
) {
157 dev_dbg(&adap
->dev
, "SMBus Protocol error (no response)!\n");
160 if (temp
& GS_COL_STS
) {
162 dev_warn(&adap
->dev
, "SMBus collision!\n");
165 if (temp
& GS_TO_STS
) {
167 dev_dbg(&adap
->dev
, "SMBus protocol timeout!\n");
170 if (temp
& GS_HCYC_STS
)
171 dev_dbg(&adap
->dev
, "SMBus protocol success!\n");
173 outw_p(GS_CLEAR_STS
, SMB_GLOBAL_STATUS
);
176 if (((temp
= inw_p(SMB_GLOBAL_STATUS
)) & GS_CLEAR_STS
) != 0x00) {
178 "Failed reset at end of transaction (%04x)\n", temp
);
183 "Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
184 inw_p(SMB_GLOBAL_STATUS
), inw_p(SMB_GLOBAL_ENABLE
),
185 inw_p(SMB_HOST_ADDRESS
), inb_p(SMB_HOST_DATA
));
190 dev_warn(&adap
->dev
, "Sending abort\n");
191 outw_p(inw(SMB_GLOBAL_ENABLE
) | GE_ABORT
, SMB_GLOBAL_ENABLE
);
193 outw_p(GS_CLEAR_STS
, SMB_GLOBAL_STATUS
);
197 /* Return -1 on error. */
198 static s32
amd756_access(struct i2c_adapter
* adap
, u16 addr
,
199 unsigned short flags
, char read_write
,
200 u8 command
, int size
, union i2c_smbus_data
* data
)
204 /** TODO: Should I supporte the 10-bit transfers? */
206 case I2C_SMBUS_PROC_CALL
:
207 dev_dbg(&adap
->dev
, "I2C_SMBUS_PROC_CALL not supported!\n");
208 /* TODO: Well... It is supported, I'm just not sure what to do here... */
210 case I2C_SMBUS_QUICK
:
211 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
216 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
218 if (read_write
== I2C_SMBUS_WRITE
)
219 outb_p(command
, SMB_HOST_DATA
);
222 case I2C_SMBUS_BYTE_DATA
:
223 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
225 outb_p(command
, SMB_HOST_COMMAND
);
226 if (read_write
== I2C_SMBUS_WRITE
)
227 outw_p(data
->byte
, SMB_HOST_DATA
);
228 size
= AMD756_BYTE_DATA
;
230 case I2C_SMBUS_WORD_DATA
:
231 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
233 outb_p(command
, SMB_HOST_COMMAND
);
234 if (read_write
== I2C_SMBUS_WRITE
)
235 outw_p(data
->word
, SMB_HOST_DATA
); /* TODO: endian???? */
236 size
= AMD756_WORD_DATA
;
238 case I2C_SMBUS_BLOCK_DATA
:
239 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
241 outb_p(command
, SMB_HOST_COMMAND
);
242 if (read_write
== I2C_SMBUS_WRITE
) {
243 len
= data
->block
[0];
248 outw_p(len
, SMB_HOST_DATA
);
249 /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
250 for (i
= 1; i
<= len
; i
++)
251 outb_p(data
->block
[i
],
252 SMB_HOST_BLOCK_DATA
);
254 size
= AMD756_BLOCK_DATA
;
258 /* How about enabling interrupts... */
259 outw_p(size
& GE_CYC_TYPE_MASK
, SMB_GLOBAL_ENABLE
);
261 if (amd756_transaction(adap
)) /* Error in transaction */
264 if ((read_write
== I2C_SMBUS_WRITE
) || (size
== AMD756_QUICK
))
270 data
->byte
= inw_p(SMB_HOST_DATA
);
272 case AMD756_BYTE_DATA
:
273 data
->byte
= inw_p(SMB_HOST_DATA
);
275 case AMD756_WORD_DATA
:
276 data
->word
= inw_p(SMB_HOST_DATA
); /* TODO: endian???? */
278 case AMD756_BLOCK_DATA
:
279 data
->block
[0] = inw_p(SMB_HOST_DATA
) & 0x3f;
280 if(data
->block
[0] > 32)
282 /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
283 for (i
= 1; i
<= data
->block
[0]; i
++)
284 data
->block
[i
] = inb_p(SMB_HOST_BLOCK_DATA
);
291 static u32
amd756_func(struct i2c_adapter
*adapter
)
293 return I2C_FUNC_SMBUS_QUICK
| I2C_FUNC_SMBUS_BYTE
|
294 I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_WORD_DATA
|
295 I2C_FUNC_SMBUS_BLOCK_DATA
| I2C_FUNC_SMBUS_PROC_CALL
;
298 static struct i2c_algorithm smbus_algorithm
= {
299 .name
= "Non-I2C SMBus adapter",
300 .id
= I2C_ALGO_SMBUS
,
301 .smbus_xfer
= amd756_access
,
302 .functionality
= amd756_func
,
305 struct i2c_adapter amd756_smbus
= {
306 .owner
= THIS_MODULE
,
307 .class = I2C_CLASS_HWMON
,
308 .algo
= &smbus_algorithm
,
312 enum chiptype
{ AMD756
, AMD766
, AMD768
, NFORCE
, AMD8111
};
313 static const char* chipname
[] = {
314 "AMD756", "AMD766", "AMD768",
315 "nVidia nForce", "AMD8111",
318 static struct pci_device_id amd756_ids
[] = {
319 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_VIPER_740B
),
320 .driver_data
= AMD756
},
321 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_VIPER_7413
),
322 .driver_data
= AMD766
},
323 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_OPUS_7443
),
324 .driver_data
= AMD768
},
325 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_8111_SMBUS
),
326 .driver_data
= AMD8111
},
327 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS
),
328 .driver_data
= NFORCE
},
332 MODULE_DEVICE_TABLE (pci
, amd756_ids
);
334 static int __devinit
amd756_probe(struct pci_dev
*pdev
,
335 const struct pci_device_id
*id
)
337 int nforce
= (id
->driver_data
== NFORCE
);
342 dev_err(&pdev
->dev
, "Only one device supported "
343 "(you have a strange motherboard, btw)\n");
348 if (PCI_FUNC(pdev
->devfn
) != 1)
351 pci_read_config_word(pdev
, SMBBANFORCE
, &amd756_ioport
);
352 amd756_ioport
&= 0xfffc;
354 if (PCI_FUNC(pdev
->devfn
) != 3)
357 pci_read_config_byte(pdev
, SMBGCFG
, &temp
);
358 if ((temp
& 128) == 0) {
360 "Error: SMBus controller I/O not enabled!\n");
364 /* Determine the address of the SMBus areas */
365 /* Technically it is a dword but... */
366 pci_read_config_word(pdev
, SMBBA
, &amd756_ioport
);
367 amd756_ioport
&= 0xff00;
368 amd756_ioport
+= SMB_ADDR_OFFSET
;
371 if (!request_region(amd756_ioport
, SMB_IOSIZE
, "amd756-smbus")) {
372 dev_err(&pdev
->dev
, "SMB region 0x%x already in use!\n",
377 pci_read_config_byte(pdev
, SMBREV
, &temp
);
378 dev_dbg(&pdev
->dev
, "SMBREV = 0x%X\n", temp
);
379 dev_dbg(&pdev
->dev
, "AMD756_smba = 0x%X\n", amd756_ioport
);
381 /* set up the driverfs linkage to our parent device */
382 amd756_smbus
.dev
.parent
= &pdev
->dev
;
384 sprintf(amd756_smbus
.name
, "SMBus %s adapter at %04x",
385 chipname
[id
->driver_data
], amd756_ioport
);
387 error
= i2c_add_adapter(&amd756_smbus
);
390 "Adapter registration failed, module not inserted\n");
397 release_region(amd756_ioport
, SMB_IOSIZE
);
401 static void __devexit
amd756_remove(struct pci_dev
*dev
)
403 i2c_del_adapter(&amd756_smbus
);
404 release_region(amd756_ioport
, SMB_IOSIZE
);
407 static struct pci_driver amd756_driver
= {
408 .name
= "amd756_smbus",
409 .id_table
= amd756_ids
,
410 .probe
= amd756_probe
,
411 .remove
= __devexit_p(amd756_remove
),
414 static int __init
amd756_init(void)
416 return pci_register_driver(&amd756_driver
);
419 static void __exit
amd756_exit(void)
421 pci_unregister_driver(&amd756_driver
);
424 MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
425 MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
426 MODULE_LICENSE("GPL");
428 EXPORT_SYMBOL(amd756_smbus
);
430 module_init(amd756_init
)
431 module_exit(amd756_exit
)