2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/poll.h>
29 #include <linux/ptrace.h>
30 #include <linux/slab.h>
31 #include <linux/wait.h>
35 #include <linux/mutex.h>
37 #include <asm/mmu_context.h>
39 #include "interrupt.h"
41 static int __spu_trap_invalid_dma(struct spu
*spu
)
43 pr_debug("%s\n", __FUNCTION__
);
44 force_sig(SIGBUS
, /* info, */ current
);
48 static int __spu_trap_dma_align(struct spu
*spu
)
50 pr_debug("%s\n", __FUNCTION__
);
51 force_sig(SIGBUS
, /* info, */ current
);
55 static int __spu_trap_error(struct spu
*spu
)
57 pr_debug("%s\n", __FUNCTION__
);
58 force_sig(SIGILL
, /* info, */ current
);
62 static void spu_restart_dma(struct spu
*spu
)
64 struct spu_priv2 __iomem
*priv2
= spu
->priv2
;
66 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING
, &spu
->flags
))
67 out_be64(&priv2
->mfc_control_RW
, MFC_CNTL_RESTART_DMA_COMMAND
);
70 static int __spu_trap_data_seg(struct spu
*spu
, unsigned long ea
)
72 struct spu_priv2 __iomem
*priv2
= spu
->priv2
;
73 struct mm_struct
*mm
= spu
->mm
;
76 pr_debug("%s\n", __FUNCTION__
);
78 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE
, &spu
->flags
)) {
79 /* SLBs are pre-loaded for context switch, so
80 * we should never get here!
82 printk("%s: invalid access during switch!\n", __func__
);
85 if (!mm
|| (REGION_ID(ea
) != USER_REGION_ID
)) {
86 /* Future: support kernel segments so that drivers
89 pr_debug("invalid region access at %016lx\n", ea
);
93 esid
= (ea
& ESID_MASK
) | SLB_ESID_V
;
94 vsid
= (get_vsid(mm
->context
.id
, ea
) << SLB_VSID_SHIFT
) | SLB_VSID_USER
;
95 if (in_hugepage_area(mm
->context
, ea
))
98 out_be64(&priv2
->slb_index_W
, spu
->slb_replace
);
99 out_be64(&priv2
->slb_vsid_RW
, vsid
);
100 out_be64(&priv2
->slb_esid_RW
, esid
);
103 if (spu
->slb_replace
>= 8)
104 spu
->slb_replace
= 0;
106 spu_restart_dma(spu
);
111 extern int hash_page(unsigned long ea
, unsigned long access
, unsigned long trap
); //XXX
112 static int __spu_trap_data_map(struct spu
*spu
, unsigned long ea
, u64 dsisr
)
114 pr_debug("%s, %lx, %lx\n", __FUNCTION__
, dsisr
, ea
);
116 /* Handle kernel space hash faults immediately.
117 User hash faults need to be deferred to process context. */
118 if ((dsisr
& MFC_DSISR_PTE_NOT_FOUND
)
119 && REGION_ID(ea
) != USER_REGION_ID
120 && hash_page(ea
, _PAGE_PRESENT
, 0x300) == 0) {
121 spu_restart_dma(spu
);
125 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE
, &spu
->flags
)) {
126 printk("%s: invalid access during switch!\n", __func__
);
133 if (spu
->stop_callback
)
134 spu
->stop_callback(spu
);
138 static int __spu_trap_mailbox(struct spu
*spu
)
140 if (spu
->ibox_callback
)
141 spu
->ibox_callback(spu
);
143 /* atomically disable SPU mailbox interrupts */
144 spin_lock(&spu
->register_lock
);
145 spu_int_mask_and(spu
, 2, ~0x1);
146 spin_unlock(&spu
->register_lock
);
150 static int __spu_trap_stop(struct spu
*spu
)
152 pr_debug("%s\n", __FUNCTION__
);
153 spu
->stop_code
= in_be32(&spu
->problem
->spu_status_R
);
154 if (spu
->stop_callback
)
155 spu
->stop_callback(spu
);
159 static int __spu_trap_halt(struct spu
*spu
)
161 pr_debug("%s\n", __FUNCTION__
);
162 spu
->stop_code
= in_be32(&spu
->problem
->spu_status_R
);
163 if (spu
->stop_callback
)
164 spu
->stop_callback(spu
);
168 static int __spu_trap_tag_group(struct spu
*spu
)
170 pr_debug("%s\n", __FUNCTION__
);
171 spu
->mfc_callback(spu
);
175 static int __spu_trap_spubox(struct spu
*spu
)
177 if (spu
->wbox_callback
)
178 spu
->wbox_callback(spu
);
180 /* atomically disable SPU mailbox interrupts */
181 spin_lock(&spu
->register_lock
);
182 spu_int_mask_and(spu
, 2, ~0x10);
183 spin_unlock(&spu
->register_lock
);
188 spu_irq_class_0(int irq
, void *data
, struct pt_regs
*regs
)
193 spu
->class_0_pending
= 1;
194 if (spu
->stop_callback
)
195 spu
->stop_callback(spu
);
201 spu_irq_class_0_bottom(struct spu
*spu
)
203 unsigned long stat
, mask
;
205 spu
->class_0_pending
= 0;
207 mask
= spu_int_mask_get(spu
, 0);
208 stat
= spu_int_stat_get(spu
, 0);
212 if (stat
& 1) /* invalid MFC DMA */
213 __spu_trap_invalid_dma(spu
);
215 if (stat
& 2) /* invalid DMA alignment */
216 __spu_trap_dma_align(spu
);
218 if (stat
& 4) /* error on SPU */
219 __spu_trap_error(spu
);
221 spu_int_stat_clear(spu
, 0, stat
);
223 return (stat
& 0x7) ? -EIO
: 0;
225 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom
);
228 spu_irq_class_1(int irq
, void *data
, struct pt_regs
*regs
)
231 unsigned long stat
, mask
, dar
, dsisr
;
235 /* atomically read & clear class1 status. */
236 spin_lock(&spu
->register_lock
);
237 mask
= spu_int_mask_get(spu
, 1);
238 stat
= spu_int_stat_get(spu
, 1) & mask
;
239 dar
= spu_mfc_dar_get(spu
);
240 dsisr
= spu_mfc_dsisr_get(spu
);
241 if (stat
& 2) /* mapping fault */
242 spu_mfc_dsisr_set(spu
, 0ul);
243 spu_int_stat_clear(spu
, 1, stat
);
244 spin_unlock(&spu
->register_lock
);
245 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__
, mask
, stat
,
248 if (stat
& 1) /* segment fault */
249 __spu_trap_data_seg(spu
, dar
);
251 if (stat
& 2) { /* mapping fault */
252 __spu_trap_data_map(spu
, dar
, dsisr
);
255 if (stat
& 4) /* ls compare & suspend on get */
258 if (stat
& 8) /* ls compare & suspend on put */
261 return stat
? IRQ_HANDLED
: IRQ_NONE
;
263 EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom
);
266 spu_irq_class_2(int irq
, void *data
, struct pt_regs
*regs
)
273 stat
= spu_int_stat_get(spu
, 2);
274 mask
= spu_int_mask_get(spu
, 2);
276 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq
, stat
, mask
);
280 if (stat
& 1) /* PPC core mailbox */
281 __spu_trap_mailbox(spu
);
283 if (stat
& 2) /* SPU stop-and-signal */
284 __spu_trap_stop(spu
);
286 if (stat
& 4) /* SPU halted */
287 __spu_trap_halt(spu
);
289 if (stat
& 8) /* DMA tag group complete */
290 __spu_trap_tag_group(spu
);
292 if (stat
& 0x10) /* SPU mailbox threshold */
293 __spu_trap_spubox(spu
);
295 spu_int_stat_clear(spu
, 2, stat
);
296 return stat
? IRQ_HANDLED
: IRQ_NONE
;
300 spu_request_irqs(struct spu
*spu
)
305 irq_base
= IIC_NODE_STRIDE
* spu
->node
+ IIC_SPE_OFFSET
;
307 snprintf(spu
->irq_c0
, sizeof (spu
->irq_c0
), "spe%02d.0", spu
->number
);
308 ret
= request_irq(irq_base
+ spu
->isrc
,
309 spu_irq_class_0
, SA_INTERRUPT
, spu
->irq_c0
, spu
);
313 snprintf(spu
->irq_c1
, sizeof (spu
->irq_c1
), "spe%02d.1", spu
->number
);
314 ret
= request_irq(irq_base
+ IIC_CLASS_STRIDE
+ spu
->isrc
,
315 spu_irq_class_1
, SA_INTERRUPT
, spu
->irq_c1
, spu
);
319 snprintf(spu
->irq_c2
, sizeof (spu
->irq_c2
), "spe%02d.2", spu
->number
);
320 ret
= request_irq(irq_base
+ 2*IIC_CLASS_STRIDE
+ spu
->isrc
,
321 spu_irq_class_2
, SA_INTERRUPT
, spu
->irq_c2
, spu
);
327 free_irq(irq_base
+ IIC_CLASS_STRIDE
+ spu
->isrc
, spu
);
329 free_irq(irq_base
+ spu
->isrc
, spu
);
335 spu_free_irqs(struct spu
*spu
)
339 irq_base
= IIC_NODE_STRIDE
* spu
->node
+ IIC_SPE_OFFSET
;
341 free_irq(irq_base
+ spu
->isrc
, spu
);
342 free_irq(irq_base
+ IIC_CLASS_STRIDE
+ spu
->isrc
, spu
);
343 free_irq(irq_base
+ 2*IIC_CLASS_STRIDE
+ spu
->isrc
, spu
);
346 static LIST_HEAD(spu_list
);
347 static DEFINE_MUTEX(spu_mutex
);
349 static void spu_init_channels(struct spu
*spu
)
351 static const struct {
355 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
356 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
358 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
359 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
360 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
362 struct spu_priv2 __iomem
*priv2
;
367 /* initialize all channel data to zero */
368 for (i
= 0; i
< ARRAY_SIZE(zero_list
); i
++) {
371 out_be64(&priv2
->spu_chnlcntptr_RW
, zero_list
[i
].channel
);
372 for (count
= 0; count
< zero_list
[i
].count
; count
++)
373 out_be64(&priv2
->spu_chnldata_RW
, 0);
376 /* initialize channel counts to meaningful values */
377 for (i
= 0; i
< ARRAY_SIZE(count_list
); i
++) {
378 out_be64(&priv2
->spu_chnlcntptr_RW
, count_list
[i
].channel
);
379 out_be64(&priv2
->spu_chnlcnt_RW
, count_list
[i
].count
);
383 struct spu
*spu_alloc(void)
387 mutex_lock(&spu_mutex
);
388 if (!list_empty(&spu_list
)) {
389 spu
= list_entry(spu_list
.next
, struct spu
, list
);
390 list_del_init(&spu
->list
);
391 pr_debug("Got SPU %x %d\n", spu
->isrc
, spu
->number
);
393 pr_debug("No SPU left\n");
396 mutex_unlock(&spu_mutex
);
399 spu_init_channels(spu
);
403 EXPORT_SYMBOL_GPL(spu_alloc
);
405 void spu_free(struct spu
*spu
)
407 mutex_lock(&spu_mutex
);
408 list_add_tail(&spu
->list
, &spu_list
);
409 mutex_unlock(&spu_mutex
);
411 EXPORT_SYMBOL_GPL(spu_free
);
413 static int spu_handle_mm_fault(struct spu
*spu
)
415 struct mm_struct
*mm
= spu
->mm
;
416 struct vm_area_struct
*vma
;
417 u64 ea
, dsisr
, is_write
;
423 if (!IS_VALID_EA(ea
)) {
430 if (mm
->pgd
== NULL
) {
434 down_read(&mm
->mmap_sem
);
435 vma
= find_vma(mm
, ea
);
438 if (vma
->vm_start
<= ea
)
440 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
443 if (expand_stack(vma
, ea
))
447 is_write
= dsisr
& MFC_DSISR_ACCESS_PUT
;
449 if (!(vma
->vm_flags
& VM_WRITE
))
452 if (dsisr
& MFC_DSISR_ACCESS_DENIED
)
454 if (!(vma
->vm_flags
& (VM_READ
| VM_EXEC
)))
458 switch (handle_mm_fault(mm
, vma
, ea
, is_write
)) {
465 case VM_FAULT_SIGBUS
:
474 up_read(&mm
->mmap_sem
);
478 up_read(&mm
->mmap_sem
);
482 int spu_irq_class_1_bottom(struct spu
*spu
)
484 u64 ea
, dsisr
, access
, error
= 0UL;
489 if (dsisr
& (MFC_DSISR_PTE_NOT_FOUND
| MFC_DSISR_ACCESS_DENIED
)) {
492 access
= (_PAGE_PRESENT
| _PAGE_USER
);
493 access
|= (dsisr
& MFC_DSISR_ACCESS_PUT
) ? _PAGE_RW
: 0UL;
494 local_irq_save(flags
);
495 if (hash_page(ea
, access
, 0x300) != 0)
496 error
|= CLASS1_ENABLE_STORAGE_FAULT_INTR
;
497 local_irq_restore(flags
);
499 if (error
& CLASS1_ENABLE_STORAGE_FAULT_INTR
) {
500 if ((ret
= spu_handle_mm_fault(spu
)) != 0)
501 error
|= CLASS1_ENABLE_STORAGE_FAULT_INTR
;
503 error
&= ~CLASS1_ENABLE_STORAGE_FAULT_INTR
;
508 spu_restart_dma(spu
);
510 __spu_trap_invalid_dma(spu
);
515 void spu_irq_setaffinity(struct spu
*spu
, int cpu
)
517 u64 target
= iic_get_target_id(cpu
);
518 u64 route
= target
<< 48 | target
<< 32 | target
<< 16;
519 spu_int_route_set(spu
, route
);
521 EXPORT_SYMBOL_GPL(spu_irq_setaffinity
);
523 static int __init
find_spu_node_id(struct device_node
*spe
)
526 struct device_node
*cpu
;
527 cpu
= spe
->parent
->parent
;
528 id
= (unsigned int *)get_property(cpu
, "node-id", NULL
);
532 static int __init
cell_spuprop_present(struct spu
*spu
, struct device_node
*spe
,
535 static DEFINE_MUTEX(add_spumem_mutex
);
537 struct address_prop
{
538 unsigned long address
;
540 } __attribute__((packed
)) *p
;
543 unsigned long start_pfn
, nr_pages
;
544 struct pglist_data
*pgdata
;
548 p
= (void*)get_property(spe
, prop
, &proplen
);
549 WARN_ON(proplen
!= sizeof (*p
));
551 start_pfn
= p
->address
>> PAGE_SHIFT
;
552 nr_pages
= ((unsigned long)p
->len
+ PAGE_SIZE
- 1) >> PAGE_SHIFT
;
554 pgdata
= NODE_DATA(spu
->nid
);
555 zone
= pgdata
->node_zones
;
557 /* XXX rethink locking here */
558 mutex_lock(&add_spumem_mutex
);
559 ret
= __add_pages(zone
, start_pfn
, nr_pages
);
560 mutex_unlock(&add_spumem_mutex
);
565 static void __iomem
* __init
map_spe_prop(struct spu
*spu
,
566 struct device_node
*n
, const char *name
)
568 struct address_prop
{
569 unsigned long address
;
571 } __attribute__((packed
)) *prop
;
578 p
= get_property(n
, name
, &proplen
);
579 if (proplen
!= sizeof (struct address_prop
))
584 err
= cell_spuprop_present(spu
, n
, name
);
585 if (err
&& (err
!= -EEXIST
))
588 ret
= ioremap(prop
->address
, prop
->len
);
594 static void spu_unmap(struct spu
*spu
)
598 iounmap(spu
->problem
);
599 iounmap((u8 __iomem
*)spu
->local_store
);
602 static int __init
spu_map_device(struct spu
*spu
, struct device_node
*node
)
608 prop
= get_property(node
, "isrc", NULL
);
611 spu
->isrc
= *(unsigned int *)prop
;
613 spu
->name
= get_property(node
, "name", NULL
);
617 prop
= get_property(node
, "local-store", NULL
);
620 spu
->local_store_phys
= *(unsigned long *)prop
;
622 /* we use local store as ram, not io memory */
623 spu
->local_store
= (void __force
*)
624 map_spe_prop(spu
, node
, "local-store");
625 if (!spu
->local_store
)
628 prop
= get_property(node
, "problem", NULL
);
631 spu
->problem_phys
= *(unsigned long *)prop
;
633 spu
->problem
= map_spe_prop(spu
, node
, "problem");
637 spu
->priv1
= map_spe_prop(spu
, node
, "priv1");
638 /* priv1 is not available on a hypervisor */
640 spu
->priv2
= map_spe_prop(spu
, node
, "priv2");
652 static int __init
create_spu(struct device_node
*spe
)
659 spu
= kmalloc(sizeof (*spu
), GFP_KERNEL
);
663 ret
= spu_map_device(spu
, spe
);
667 spu
->node
= find_spu_node_id(spe
);
668 spu
->nid
= of_node_to_nid(spe
);
673 spu
->slb_replace
= 0;
678 spu
->class_0_pending
= 0;
682 spin_lock_init(&spu
->register_lock
);
684 spu_mfc_sdr_set(spu
, mfspr(SPRN_SDR1
));
685 spu_mfc_sr1_set(spu
, 0x33);
687 spu
->ibox_callback
= NULL
;
688 spu
->wbox_callback
= NULL
;
689 spu
->stop_callback
= NULL
;
690 spu
->mfc_callback
= NULL
;
692 mutex_lock(&spu_mutex
);
693 spu
->number
= number
++;
694 ret
= spu_request_irqs(spu
);
698 list_add(&spu
->list
, &spu_list
);
699 mutex_unlock(&spu_mutex
);
701 pr_debug(KERN_DEBUG
"Using SPE %s %02x %p %p %p %p %d\n",
702 spu
->name
, spu
->isrc
, spu
->local_store
,
703 spu
->problem
, spu
->priv1
, spu
->priv2
, spu
->number
);
707 mutex_unlock(&spu_mutex
);
715 static void destroy_spu(struct spu
*spu
)
717 list_del_init(&spu
->list
);
724 static void cleanup_spu_base(void)
726 struct spu
*spu
, *tmp
;
727 mutex_lock(&spu_mutex
);
728 list_for_each_entry_safe(spu
, tmp
, &spu_list
, list
)
730 mutex_unlock(&spu_mutex
);
732 module_exit(cleanup_spu_base
);
734 static int __init
init_spu_base(void)
736 struct device_node
*node
;
740 for (node
= of_find_node_by_type(NULL
, "spe");
741 node
; node
= of_find_node_by_type(node
, "spe")) {
742 ret
= create_spu(node
);
744 printk(KERN_WARNING
"%s: Error initializing %s\n",
745 __FUNCTION__
, node
->name
);
750 /* in some old firmware versions, the spe is called 'spc', so we
751 look for that as well */
752 for (node
= of_find_node_by_type(NULL
, "spc");
753 node
; node
= of_find_node_by_type(node
, "spc")) {
754 ret
= create_spu(node
);
756 printk(KERN_WARNING
"%s: Error initializing %s\n",
757 __FUNCTION__
, node
->name
);
764 module_init(init_spu_base
);
766 MODULE_LICENSE("GPL");
767 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");