drivers/media/video/cx18/cx18-driver.h

   1 /*
   2  *  cx18 driver internal defines and structures
   3  *
   4  *  Derived from ivtv-driver.h
   5  *
   6  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
   7  *
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation; either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program; if not, write to the Free Software
  20  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  21  *  02111-1307  USA
  22  */
  23
  24 #ifndef CX18_DRIVER_H
  25 #define CX18_DRIVER_H
  26
  27 #include <linux/version.h>
  28 #include <linux/module.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/init.h>
  31 #include <linux/delay.h>
  32 #include <linux/sched.h>
  33 #include <linux/fs.h>
  34 #include <linux/pci.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/spinlock.h>
  37 #include <linux/i2c.h>
  38 #include <linux/i2c-algo-bit.h>
  39 #include <linux/list.h>
  40 #include <linux/unistd.h>
  41 #include <linux/byteorder/swab.h>
  42 #include <linux/pagemap.h>
  43 #include <linux/workqueue.h>
  44 #include <linux/mutex.h>
  45
  46 #include <linux/dvb/video.h>
  47 #include <linux/dvb/audio.h>
  48 #include <media/v4l2-common.h>
  49 #include <media/v4l2-ioctl.h>
  50 #include <media/tuner.h>
  51 #include "cx18-mailbox.h"
  52 #include "cx18-av-core.h"
  53 #include "cx23418.h"
  54
  55 /* DVB */
  56 #include "demux.h"
  57 #include "dmxdev.h"
  58 #include "dvb_demux.h"
  59 #include "dvb_frontend.h"
  60 #include "dvb_net.h"
  61 #include "dvbdev.h"
  62
  63 #ifndef CONFIG_PCI
  64 #  error "This driver requires kernel PCI support."
  65 #endif
  66
  67 #define CX18_MEM_OFFSET 0x00000000
  68 #define CX18_MEM_SIZE   0x04000000
  69 #define CX18_REG_OFFSET 0x02000000
  70
  71 /* Maximum cx18 driver instances. */
  72 #define CX18_MAX_CARDS 32
  73
  74 /* Supported cards */
  75 #define CX18_CARD_HVR_1600_ESMT       0 /* Hauppauge HVR 1600 (ESMT memory) */
  76 #define CX18_CARD_HVR_1600_SAMSUNG    1 /* Hauppauge HVR 1600 (Samsung memory) */
  77 #define CX18_CARD_COMPRO_H900         2 /* Compro VideoMate H900 */
  78 #define CX18_CARD_YUAN_MPC718         3 /* Yuan MPC718 */
  79 #define CX18_CARD_CNXT_RAPTOR_PAL     4 /* Conexant Raptor PAL */
  80 #define CX18_CARD_LAST                4
  81
  82 #define CX18_ENC_STREAM_TYPE_MPG  0
  83 #define CX18_ENC_STREAM_TYPE_TS   1
  84 #define CX18_ENC_STREAM_TYPE_YUV  2
  85 #define CX18_ENC_STREAM_TYPE_VBI  3
  86 #define CX18_ENC_STREAM_TYPE_PCM  4
  87 #define CX18_ENC_STREAM_TYPE_IDX  5
  88 #define CX18_ENC_STREAM_TYPE_RAD  6
  89 #define CX18_MAX_STREAMS          7
  90
  91 /* system vendor and device IDs */
  92 #define PCI_VENDOR_ID_CX      0x14f1
  93 #define PCI_DEVICE_ID_CX23418 0x5b7a
  94
  95 /* subsystem vendor ID */
  96 #define CX18_PCI_ID_HAUPPAUGE           0x0070
  97 #define CX18_PCI_ID_COMPRO              0x185b
  98 #define CX18_PCI_ID_YUAN                0x12ab
  99 #define CX18_PCI_ID_CONEXANT            0x14f1
 100
 101 /* ======================================================================== */
 102 /* ========================== START USER SETTABLE DMA VARIABLES =========== */
 103 /* ======================================================================== */
 104
 105 /* DMA Buffers, Default size in MB allocated */
 106 #define CX18_DEFAULT_ENC_TS_BUFFERS  1
 107 #define CX18_DEFAULT_ENC_MPG_BUFFERS 2
 108 #define CX18_DEFAULT_ENC_IDX_BUFFERS 1
 109 #define CX18_DEFAULT_ENC_YUV_BUFFERS 2
 110 #define CX18_DEFAULT_ENC_VBI_BUFFERS 1
 111 #define CX18_DEFAULT_ENC_PCM_BUFFERS 1
 112
 113 /* i2c stuff */
 114 #define I2C_CLIENTS_MAX 16
 115
 116 /* debugging */
 117
 118 /* Flag to turn on high volume debugging */
 119 #define CX18_DBGFLG_WARN  (1 << 0)
 120 #define CX18_DBGFLG_INFO  (1 << 1)
 121 #define CX18_DBGFLG_API   (1 << 2)
 122 #define CX18_DBGFLG_DMA   (1 << 3)
 123 #define CX18_DBGFLG_IOCTL (1 << 4)
 124 #define CX18_DBGFLG_FILE  (1 << 5)
 125 #define CX18_DBGFLG_I2C   (1 << 6)
 126 #define CX18_DBGFLG_IRQ   (1 << 7)
 127 /* Flag to turn on high volume debugging */
 128 #define CX18_DBGFLG_HIGHVOL (1 << 8)
 129
 130 /* NOTE: extra space before comma in 'cx->num , ## args' is required for
 131    gcc-2.95, otherwise it won't compile. */
 132 #define CX18_DEBUG(x, type, fmt, args...) \
 133         do { \
 134                 if ((x) & cx18_debug) \
 135                         printk(KERN_INFO "cx18-%d " type ": " fmt, cx->num , ## args); \
 136         } while (0)
 137 #define CX18_DEBUG_WARN(fmt, args...)  CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
 138 #define CX18_DEBUG_INFO(fmt, args...)  CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
 139 #define CX18_DEBUG_API(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
 140 #define CX18_DEBUG_DMA(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
 141 #define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
 142 #define CX18_DEBUG_FILE(fmt, args...)  CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
 143 #define CX18_DEBUG_I2C(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
 144 #define CX18_DEBUG_IRQ(fmt, args...)   CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
 145
 146 #define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
 147         do { \
 148                 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
 149                         printk(KERN_INFO "cx18%d " type ": " fmt, cx->num , ## args); \
 150         } while (0)
 151 #define CX18_DEBUG_HI_WARN(fmt, args...)  CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
 152 #define CX18_DEBUG_HI_INFO(fmt, args...)  CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
 153 #define CX18_DEBUG_HI_API(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
 154 #define CX18_DEBUG_HI_DMA(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
 155 #define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
 156 #define CX18_DEBUG_HI_FILE(fmt, args...)  CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
 157 #define CX18_DEBUG_HI_I2C(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
 158 #define CX18_DEBUG_HI_IRQ(fmt, args...)   CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
 159
 160 /* Standard kernel messages */
 161 #define CX18_ERR(fmt, args...)      printk(KERN_ERR  "cx18-%d: " fmt, cx->num , ## args)
 162 #define CX18_WARN(fmt, args...)     printk(KERN_WARNING "cx18-%d: " fmt, cx->num , ## args)
 163 #define CX18_INFO(fmt, args...)     printk(KERN_INFO "cx18-%d: " fmt, cx->num , ## args)
 164
 165 /* Values for CX18_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
 166 #define MPEG_FRAME_TYPE_IFRAME 1
 167 #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
 168 #define MPEG_FRAME_TYPE_ALL 7
 169
 170 #define CX18_MAX_PGM_INDEX (400)
 171
 172 extern int cx18_debug;
 173
 174
 175 struct cx18_options {
 176         int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
 177         int cardtype;           /* force card type on load */
 178         int tuner;              /* set tuner on load */
 179         int radio;              /* enable/disable radio */
 180 };
 181
 182 /* per-buffer bit flags */
 183 #define CX18_F_B_NEED_BUF_SWAP  0       /* this buffer should be byte swapped */
 184
 185 /* per-stream, s_flags */
 186 #define CX18_F_S_CLAIMED        3       /* this stream is claimed */
 187 #define CX18_F_S_STREAMING      4       /* the fw is decoding/encoding this stream */
 188 #define CX18_F_S_INTERNAL_USE   5       /* this stream is used internally (sliced VBI processing) */
 189 #define CX18_F_S_STREAMOFF      7       /* signal end of stream EOS */
 190 #define CX18_F_S_APPL_IO        8       /* this stream is used read/written by an application */
 191
 192 /* per-cx18, i_flags */
 193 #define CX18_F_I_LOADED_FW      0       /* Loaded the firmware the first time */
 194 #define CX18_F_I_EOS            4       /* End of encoder stream reached */
 195 #define CX18_F_I_RADIO_USER     5       /* The radio tuner is selected */
 196 #define CX18_F_I_ENC_PAUSED     13      /* the encoder is paused */
 197 #define CX18_F_I_INITED         21      /* set after first open */
 198 #define CX18_F_I_FAILED         22      /* set if first open failed */
 199
 200 /* These are the VBI types as they appear in the embedded VBI private packets. */
 201 #define CX18_SLICED_TYPE_TELETEXT_B     (1)
 202 #define CX18_SLICED_TYPE_CAPTION_525    (4)
 203 #define CX18_SLICED_TYPE_WSS_625        (5)
 204 #define CX18_SLICED_TYPE_VPS            (7)
 205
 206 struct cx18_buffer {
 207         struct list_head list;
 208         dma_addr_t dma_handle;
 209         u32 id;
 210         unsigned long b_flags;
 211         char *buf;
 212
 213         u32 bytesused;
 214         u32 readpos;
 215 };
 216
 217 struct cx18_queue {
 218         struct list_head list;
 219         u32 buffers;
 220         u32 length;
 221         u32 bytesused;
 222 };
 223
 224 struct cx18_dvb {
 225         struct dmx_frontend hw_frontend;
 226         struct dmx_frontend mem_frontend;
 227         struct dmxdev dmxdev;
 228         struct dvb_adapter dvb_adapter;
 229         struct dvb_demux demux;
 230         struct dvb_frontend *fe;
 231         struct dvb_net dvbnet;
 232         int enabled;
 233         int feeding;
 234         struct mutex feedlock;
 235 };
 236
 237 struct cx18;     /* forward reference */
 238 struct cx18_scb; /* forward reference */
 239
 240 struct cx18_stream {
 241         /* These first four fields are always set, even if the stream
 242            is not actually created. */
 243         struct video_device *v4l2dev;   /* NULL when stream not created */
 244         struct cx18 *cx;                /* for ease of use */
 245         const char *name;               /* name of the stream */
 246         int type;                       /* stream type */
 247         u32 handle;                     /* task handle */
 248         unsigned mdl_offset;
 249
 250         u32 id;
 251         spinlock_t qlock;       /* locks access to the queues */
 252         unsigned long s_flags;  /* status flags, see above */
 253         int dma;                /* can be PCI_DMA_TODEVICE,
 254                                    PCI_DMA_FROMDEVICE or
 255                                    PCI_DMA_NONE */
 256         u64 dma_pts;
 257         wait_queue_head_t waitq;
 258
 259         /* Buffer Stats */
 260         u32 buffers;
 261         u32 buf_size;
 262         u32 buffers_stolen;
 263
 264         /* Buffer Queues */
 265         struct cx18_queue q_free;       /* free buffers */
 266         struct cx18_queue q_full;       /* full buffers */
 267         struct cx18_queue q_io;         /* waiting for I/O */
 268
 269         /* DVB / Digital Transport */
 270         struct cx18_dvb dvb;
 271 };
 272
 273 struct cx18_open_id {
 274         u32 open_id;
 275         int type;
 276         enum v4l2_priority prio;
 277         struct cx18 *cx;
 278 };
 279
 280 /* forward declaration of struct defined in cx18-cards.h */
 281 struct cx18_card;
 282
 283
 284 #define CX18_VBI_FRAMES 32
 285
 286 /* VBI data */
 287 struct vbi_info {
 288         u32 enc_size;
 289         u32 frame;
 290         u8 cc_data_odd[256];
 291         u8 cc_data_even[256];
 292         int cc_pos;
 293         u8 cc_no_update;
 294         u8 vps[5];
 295         u8 vps_found;
 296         int wss;
 297         u8 wss_found;
 298         u8 wss_no_update;
 299         u32 raw_decoder_line_size;
 300         u8 raw_decoder_sav_odd_field;
 301         u8 raw_decoder_sav_even_field;
 302         u32 sliced_decoder_line_size;
 303         u8 sliced_decoder_sav_odd_field;
 304         u8 sliced_decoder_sav_even_field;
 305         struct v4l2_format in;
 306         /* convenience pointer to sliced struct in vbi_in union */
 307         struct v4l2_sliced_vbi_format *sliced_in;
 308         u32 service_set_in;
 309         int insert_mpeg;
 310
 311         /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
 312            One for /dev/vbi0 and one for /dev/vbi8 */
 313         struct v4l2_sliced_vbi_data sliced_data[36];
 314
 315         /* Buffer for VBI data inserted into MPEG stream.
 316            The first byte is a dummy byte that's never used.
 317            The next 16 bytes contain the MPEG header for the VBI data,
 318            the remainder is the actual VBI data.
 319            The max size accepted by the MPEG VBI reinsertion turns out
 320            to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
 321            where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
 322            a single line header byte and 2 * 18 is the number of VBI lines per frame.
 323
 324            However, it seems that the data must be 1K aligned, so we have to
 325            pad the data until the 1 or 2 K boundary.
 326
 327            This pointer array will allocate 2049 bytes to store each VBI frame. */
 328         u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
 329         u32 sliced_mpeg_size[CX18_VBI_FRAMES];
 330         struct cx18_buffer sliced_mpeg_buf;
 331         u32 inserted_frame;
 332
 333         u32 start[2], count;
 334         u32 raw_size;
 335         u32 sliced_size;
 336 };
 337
 338 /* Per cx23418, per I2C bus private algo callback data */
 339 struct cx18_i2c_algo_callback_data {
 340         struct cx18 *cx;
 341         int bus_index;   /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
 342 };
 343
 344 /* Struct to hold info about cx18 cards */
 345 struct cx18 {
 346         int num;                /* board number, -1 during init! */
 347         char name[8];           /* board name for printk and interrupts (e.g. 'cx180') */
 348         struct pci_dev *dev;    /* PCI device */
 349         const struct cx18_card *card;   /* card information */
 350         const char *card_name;  /* full name of the card */
 351         const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
 352         u8 is_50hz;
 353         u8 is_60hz;
 354         u8 is_out_50hz;
 355         u8 is_out_60hz;
 356         u8 nof_inputs;          /* number of video inputs */
 357         u8 nof_audio_inputs;    /* number of audio inputs */
 358         u16 buffer_id;          /* buffer ID counter */
 359         u32 v4l2_cap;           /* V4L2 capabilities of card */
 360         u32 hw_flags;           /* Hardware description of the board */
 361         unsigned mdl_offset;
 362         struct cx18_scb __iomem *scb;   /* pointer to SCB */
 363
 364         struct cx18_av_state av_state;
 365
 366         /* codec settings */
 367         struct cx2341x_mpeg_params params;
 368         u32 filter_mode;
 369         u32 temporal_strength;
 370         u32 spatial_strength;
 371
 372         /* dualwatch */
 373         unsigned long dualwatch_jiffies;
 374         u16 dualwatch_stereo_mode;
 375
 376         /* Digitizer type */
 377         int digitizer;          /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
 378
 379         struct mutex serialize_lock;    /* mutex used to serialize open/close/start/stop/ioctl operations */
 380         struct cx18_options options;    /* User options */
 381         int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
 382         struct cx18_stream streams[CX18_MAX_STREAMS];   /* Stream data */
 383         unsigned long i_flags;  /* global cx18 flags */
 384         atomic_t ana_capturing; /* count number of active analog capture streams */
 385         atomic_t tot_capturing; /* total count number of active capture streams */
 386         spinlock_t lock;        /* lock access to this struct */
 387         int search_pack_header;
 388
 389         spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
 390
 391         int open_id;            /* incremented each time an open occurs, used as
 392                                    unique ID. Starts at 1, so 0 can be used as
 393                                    uninitialized value in the stream->id. */
 394
 395         u32 base_addr;
 396         struct v4l2_prio_state prio;
 397
 398         u8 card_rev;
 399         void __iomem *enc_mem, *reg_mem;
 400
 401         struct vbi_info vbi;
 402
 403         u32 pgm_info_offset;
 404         u32 pgm_info_num;
 405         u32 pgm_info_write_idx;
 406         u32 pgm_info_read_idx;
 407         struct v4l2_enc_idx_entry pgm_info[CX18_MAX_PGM_INDEX];
 408
 409         u64 mpg_data_received;
 410         u64 vbi_data_inserted;
 411
 412         wait_queue_head_t mb_apu_waitq;
 413         wait_queue_head_t mb_cpu_waitq;
 414         wait_queue_head_t mb_epu_waitq;
 415         wait_queue_head_t mb_hpu_waitq;
 416         wait_queue_head_t cap_w;
 417         /* when the current DMA is finished this queue is woken up */
 418         wait_queue_head_t dma_waitq;
 419
 420         /* i2c */
 421         struct i2c_adapter i2c_adap[2];
 422         struct i2c_algo_bit_data i2c_algo[2];
 423         struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
 424         struct i2c_client i2c_client[2];
 425         struct mutex i2c_bus_lock[2];
 426         struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
 427
 428         /* gpio */
 429         u32 gpio_dir;
 430         u32 gpio_val;
 431         struct mutex gpio_lock;
 432
 433         /* v4l2 and User settings */
 434
 435         /* codec settings */
 436         u32 audio_input;
 437         u32 active_input;
 438         u32 active_output;
 439         v4l2_std_id std;
 440         v4l2_std_id tuner_std;  /* The norm of the tuner (fixed) */
 441 };
 442
 443 /* Globals */
 444 extern struct cx18 *cx18_cards[];
 445 extern int cx18_cards_active;
 446 extern int cx18_first_minor;
 447 extern spinlock_t cx18_cards_lock;
 448
 449 /*==============Prototypes==================*/
 450
 451 /* Return non-zero if a signal is pending */
 452 int cx18_msleep_timeout(unsigned int msecs, int intr);
 453
 454 /* Read Hauppauge eeprom */
 455 struct tveeprom; /* forward reference */
 456 void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
 457
 458 /* First-open initialization: load firmware, etc. */
 459 int cx18_init_on_first_open(struct cx18 *cx);
 460
 461 /* This is a PCI post thing, where if the pci register is not read, then
 462    the write doesn't always take effect right away. By reading back the
 463    register any pending PCI writes will be performed (in order), and so
 464    you can be sure that the writes are guaranteed to be done.
 465
 466    Rarely needed, only in some timing sensitive cases.
 467    Apparently if this is not done some motherboards seem
 468    to kill the firmware and get into the broken state until computer is
 469    rebooted. */
 470 #define write_sync(val, reg) \
 471         do { writel(val, reg); readl(reg); } while (0)
 472
 473 #define read_reg(reg) readl(cx->reg_mem + (reg))
 474 #define write_reg(val, reg) writel(val, cx->reg_mem + (reg))
 475 #define write_reg_sync(val, reg) \
 476         do { write_reg(val, reg); read_reg(reg); } while (0)
 477
 478 #define read_enc(addr) readl(cx->enc_mem + (u32)(addr))
 479 #define write_enc(val, addr) writel(val, cx->enc_mem + (u32)(addr))
 480 #define write_enc_sync(val, addr) \
 481         do { write_enc(val, addr); read_enc(addr); } while (0)
 482
 483 #define sw1_irq_enable(val) do { \
 484         write_reg(val, SW1_INT_STATUS); \
 485         write_reg(read_reg(SW1_INT_ENABLE_PCI) | (val), SW1_INT_ENABLE_PCI); \
 486 } while (0)
 487
 488 #define sw1_irq_disable(val) \
 489         write_reg(read_reg(SW1_INT_ENABLE_PCI) & ~(val), SW1_INT_ENABLE_PCI);
 490
 491 #define sw2_irq_enable(val) do { \
 492         write_reg(val, SW2_INT_STATUS); \
 493         write_reg(read_reg(SW2_INT_ENABLE_PCI) | (val), SW2_INT_ENABLE_PCI); \
 494 } while (0)
 495
 496 #define sw2_irq_disable(val) \
 497         write_reg(read_reg(SW2_INT_ENABLE_PCI) & ~(val), SW2_INT_ENABLE_PCI);
 498
 499 #define setup_page(addr) do { \
 500     u32 val = read_reg(0xD000F8) & ~0x1f00; \
 501     write_reg(val | (((addr) >> 17) & 0x1f00), 0xD000F8); \
 502 } while (0)
 503
 504 #endif /* CX18_DRIVER_H */