arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  *
   9  *  $Id$
  10  */
  11
  12 /*
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/tty.h>
  27 #include <linux/ioport.h>
  28 #include <linux/delay.h>
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/highmem.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/module.h>
  35 #include <asm/processor.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/root_dev.h>
  39 #include <linux/pci.h>
  40 #include <linux/acpi.h>
  41 #include <linux/kallsyms.h>
  42 #include <linux/edd.h>
  43 #include <linux/mmzone.h>
  44 #include <linux/kexec.h>
  45
  46 #include <asm/mtrr.h>
  47 #include <asm/uaccess.h>
  48 #include <asm/system.h>
  49 #include <asm/io.h>
  50 #include <asm/smp.h>
  51 #include <asm/msr.h>
  52 #include <asm/desc.h>
  53 #include <video/edid.h>
  54 #include <asm/e820.h>
  55 #include <asm/dma.h>
  56 #include <asm/mpspec.h>
  57 #include <asm/mmu_context.h>
  58 #include <asm/bootsetup.h>
  59 #include <asm/proto.h>
  60 #include <asm/setup.h>
  61 #include <asm/mach_apic.h>
  62 #include <asm/numa.h>
  63
  64 /*
  65  * Machine setup..
  66  */
  67
  68 struct cpuinfo_x86 boot_cpu_data __read_mostly;
  69
  70 unsigned long mmu_cr4_features;
  71
  72 int acpi_disabled;
  73 EXPORT_SYMBOL(acpi_disabled);
  74 #ifdef  CONFIG_ACPI
  75 extern int __initdata acpi_ht;
  76 extern acpi_interrupt_flags     acpi_sci_flags;
  77 int __initdata acpi_force = 0;
  78 #endif
  79
  80 int acpi_numa __initdata;
  81
  82 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  83 int bootloader_type;
  84
  85 unsigned long saved_video_mode;
  86
  87 #ifdef CONFIG_SWIOTLB
  88 int swiotlb;
  89 EXPORT_SYMBOL(swiotlb);
  90 #endif
  91
  92 /*
  93  * Setup options
  94  */
  95 struct drive_info_struct { char dummy[32]; } drive_info;
  96 struct screen_info screen_info;
  97 struct sys_desc_table_struct {
  98         unsigned short length;
  99         unsigned char table[0];
 100 };
 101
 102 struct edid_info edid_info;
 103 struct e820map e820;
 104
 105 extern int root_mountflags;
 106 extern char _text, _etext, _edata, _end;
 107
 108 char command_line[COMMAND_LINE_SIZE];
 109
 110 struct resource standard_io_resources[] = {
 111         { .name = "dma1", .start = 0x00, .end = 0x1f,
 112                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 113         { .name = "pic1", .start = 0x20, .end = 0x21,
 114                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 115         { .name = "timer0", .start = 0x40, .end = 0x43,
 116                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 117         { .name = "timer1", .start = 0x50, .end = 0x53,
 118                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 119         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 120                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 121         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 122                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 123         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 124                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 125         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 126                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 127         { .name = "fpu", .start = 0xf0, .end = 0xff,
 128                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 129 };
 130
 131 #define STANDARD_IO_RESOURCES \
 132         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 133
 134 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 135
 136 struct resource data_resource = {
 137         .name = "Kernel data",
 138         .start = 0,
 139         .end = 0,
 140         .flags = IORESOURCE_RAM,
 141 };
 142 struct resource code_resource = {
 143         .name = "Kernel code",
 144         .start = 0,
 145         .end = 0,
 146         .flags = IORESOURCE_RAM,
 147 };
 148
 149 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 150
 151 static struct resource system_rom_resource = {
 152         .name = "System ROM",
 153         .start = 0xf0000,
 154         .end = 0xfffff,
 155         .flags = IORESOURCE_ROM,
 156 };
 157
 158 static struct resource extension_rom_resource = {
 159         .name = "Extension ROM",
 160         .start = 0xe0000,
 161         .end = 0xeffff,
 162         .flags = IORESOURCE_ROM,
 163 };
 164
 165 static struct resource adapter_rom_resources[] = {
 166         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 167                 .flags = IORESOURCE_ROM },
 168         { .name = "Adapter ROM", .start = 0, .end = 0,
 169                 .flags = IORESOURCE_ROM },
 170         { .name = "Adapter ROM", .start = 0, .end = 0,
 171                 .flags = IORESOURCE_ROM },
 172         { .name = "Adapter ROM", .start = 0, .end = 0,
 173                 .flags = IORESOURCE_ROM },
 174         { .name = "Adapter ROM", .start = 0, .end = 0,
 175                 .flags = IORESOURCE_ROM },
 176         { .name = "Adapter ROM", .start = 0, .end = 0,
 177                 .flags = IORESOURCE_ROM }
 178 };
 179
 180 #define ADAPTER_ROM_RESOURCES \
 181         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 182
 183 static struct resource video_rom_resource = {
 184         .name = "Video ROM",
 185         .start = 0xc0000,
 186         .end = 0xc7fff,
 187         .flags = IORESOURCE_ROM,
 188 };
 189
 190 static struct resource video_ram_resource = {
 191         .name = "Video RAM area",
 192         .start = 0xa0000,
 193         .end = 0xbffff,
 194         .flags = IORESOURCE_RAM,
 195 };
 196
 197 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 198
 199 static int __init romchecksum(unsigned char *rom, unsigned long length)
 200 {
 201         unsigned char *p, sum = 0;
 202
 203         for (p = rom; p < rom + length; p++)
 204                 sum += *p;
 205         return sum == 0;
 206 }
 207
 208 static void __init probe_roms(void)
 209 {
 210         unsigned long start, length, upper;
 211         unsigned char *rom;
 212         int           i;
 213
 214         /* video rom */
 215         upper = adapter_rom_resources[0].start;
 216         for (start = video_rom_resource.start; start < upper; start += 2048) {
 217                 rom = isa_bus_to_virt(start);
 218                 if (!romsignature(rom))
 219                         continue;
 220
 221                 video_rom_resource.start = start;
 222
 223                 /* 0 < length <= 0x7f * 512, historically */
 224                 length = rom[2] * 512;
 225
 226                 /* if checksum okay, trust length byte */
 227                 if (length && romchecksum(rom, length))
 228                         video_rom_resource.end = start + length - 1;
 229
 230                 request_resource(&iomem_resource, &video_rom_resource);
 231                 break;
 232                         }
 233
 234         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 235         if (start < upper)
 236                 start = upper;
 237
 238         /* system rom */
 239         request_resource(&iomem_resource, &system_rom_resource);
 240         upper = system_rom_resource.start;
 241
 242         /* check for extension rom (ignore length byte!) */
 243         rom = isa_bus_to_virt(extension_rom_resource.start);
 244         if (romsignature(rom)) {
 245                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 246                 if (romchecksum(rom, length)) {
 247                         request_resource(&iomem_resource, &extension_rom_resource);
 248                         upper = extension_rom_resource.start;
 249                 }
 250         }
 251
 252         /* check for adapter roms on 2k boundaries */
 253         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 254                 rom = isa_bus_to_virt(start);
 255                 if (!romsignature(rom))
 256                         continue;
 257
 258                 /* 0 < length <= 0x7f * 512, historically */
 259                 length = rom[2] * 512;
 260
 261                 /* but accept any length that fits if checksum okay */
 262                 if (!length || start + length > upper || !romchecksum(rom, length))
 263                         continue;
 264
 265                 adapter_rom_resources[i].start = start;
 266                 adapter_rom_resources[i].end = start + length - 1;
 267                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 268
 269                 start = adapter_rom_resources[i++].end & ~2047UL;
 270         }
 271 }
 272
 273 static __init void parse_cmdline_early (char ** cmdline_p)
 274 {
 275         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 276         int len = 0;
 277
 278         /* Save unparsed command line copy for /proc/cmdline */
 279         memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
 280         saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
 281
 282         for (;;) {
 283                 if (c != ' ')
 284                         goto next_char;
 285
 286 #ifdef  CONFIG_SMP
 287                 /*
 288                  * If the BIOS enumerates physical processors before logical,
 289                  * maxcpus=N at enumeration-time can be used to disable HT.
 290                  */
 291                 else if (!memcmp(from, "maxcpus=", 8)) {
 292                         extern unsigned int maxcpus;
 293
 294                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 295                 }
 296 #endif
 297 #ifdef CONFIG_ACPI
 298                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 299                 if (!memcmp(from, "acpi=off", 8))
 300                         disable_acpi();
 301
 302                 if (!memcmp(from, "acpi=force", 10)) {
 303                         /* add later when we do DMI horrors: */
 304                         acpi_force = 1;
 305                         acpi_disabled = 0;
 306                 }
 307
 308                 /* acpi=ht just means: do ACPI MADT parsing
 309                    at bootup, but don't enable the full ACPI interpreter */
 310                 if (!memcmp(from, "acpi=ht", 7)) {
 311                         if (!acpi_force)
 312                                 disable_acpi();
 313                         acpi_ht = 1;
 314                 }
 315                 else if (!memcmp(from, "pci=noacpi", 10))
 316                         acpi_disable_pci();
 317                 else if (!memcmp(from, "acpi=noirq", 10))
 318                         acpi_noirq_set();
 319
 320                 else if (!memcmp(from, "acpi_sci=edge", 13))
 321                         acpi_sci_flags.trigger =  1;
 322                 else if (!memcmp(from, "acpi_sci=level", 14))
 323                         acpi_sci_flags.trigger = 3;
 324                 else if (!memcmp(from, "acpi_sci=high", 13))
 325                         acpi_sci_flags.polarity = 1;
 326                 else if (!memcmp(from, "acpi_sci=low", 12))
 327                         acpi_sci_flags.polarity = 3;
 328
 329                 /* acpi=strict disables out-of-spec workarounds */
 330                 else if (!memcmp(from, "acpi=strict", 11)) {
 331                         acpi_strict = 1;
 332                 }
 333 #ifdef CONFIG_X86_IO_APIC
 334                 else if (!memcmp(from, "acpi_skip_timer_override", 24))
 335                         acpi_skip_timer_override = 1;
 336 #endif
 337 #endif
 338
 339                 if (!memcmp(from, "disable_timer_pin_1", 19))
 340                         disable_timer_pin_1 = 1;
 341                 if (!memcmp(from, "enable_timer_pin_1", 18))
 342                         disable_timer_pin_1 = -1;
 343
 344                 if (!memcmp(from, "nolapic", 7) ||
 345                     !memcmp(from, "disableapic", 11))
 346                         disable_apic = 1;
 347
 348                 if (!memcmp(from, "noapic", 6))
 349                         skip_ioapic_setup = 1;
 350
 351                 if (!memcmp(from, "apic", 4)) {
 352                         skip_ioapic_setup = 0;
 353                         ioapic_force = 1;
 354                 }
 355
 356                 if (!memcmp(from, "mem=", 4))
 357                         parse_memopt(from+4, &from);
 358
 359 #ifdef CONFIG_NUMA
 360                 if (!memcmp(from, "numa=", 5))
 361                         numa_setup(from+5);
 362 #endif
 363
 364 #ifdef CONFIG_GART_IOMMU
 365                 if (!memcmp(from,"iommu=",6)) {
 366                         iommu_setup(from+6);
 367                 }
 368 #endif
 369
 370                 if (!memcmp(from,"oops=panic", 10))
 371                         panic_on_oops = 1;
 372
 373                 if (!memcmp(from, "noexec=", 7))
 374                         nonx_setup(from + 7);
 375
 376 #ifdef CONFIG_KEXEC
 377                 /* crashkernel=size@addr specifies the location to reserve for
 378                  * a crash kernel.  By reserving this memory we guarantee
 379                  * that linux never set's it up as a DMA target.
 380                  * Useful for holding code to do something appropriate
 381                  * after a kernel panic.
 382                  */
 383                 else if (!memcmp(from, "crashkernel=", 12)) {
 384                         unsigned long size, base;
 385                         size = memparse(from+12, &from);
 386                         if (*from == '@') {
 387                                 base = memparse(from+1, &from);
 388                                 /* FIXME: Do I want a sanity check
 389                                  * to validate the memory range?
 390                                  */
 391                                 crashk_res.start = base;
 392                                 crashk_res.end   = base + size - 1;
 393                         }
 394                 }
 395 #endif
 396
 397         next_char:
 398                 c = *(from++);
 399                 if (!c)
 400                         break;
 401                 if (COMMAND_LINE_SIZE <= ++len)
 402                         break;
 403                 *(to++) = c;
 404         }
 405         *to = '\0';
 406         *cmdline_p = command_line;
 407 }
 408
 409 #ifndef CONFIG_NUMA
 410 static void __init
 411 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 412 {
 413         unsigned long bootmap_size, bootmap;
 414
 415         memory_present(0, start_pfn, end_pfn);
 416         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 417         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 418         if (bootmap == -1L)
 419                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 420         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 421         e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
 422         reserve_bootmem(bootmap, bootmap_size);
 423 }
 424 #endif
 425
 426 /* Use inline assembly to define this because the nops are defined
 427    as inline assembly strings in the include files and we cannot
 428    get them easily into strings. */
 429 asm("\t.data\nk8nops: "
 430     K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
 431     K8_NOP7 K8_NOP8);
 432
 433 extern unsigned char k8nops[];
 434 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
 435      NULL,
 436      k8nops,
 437      k8nops + 1,
 438      k8nops + 1 + 2,
 439      k8nops + 1 + 2 + 3,
 440      k8nops + 1 + 2 + 3 + 4,
 441      k8nops + 1 + 2 + 3 + 4 + 5,
 442      k8nops + 1 + 2 + 3 + 4 + 5 + 6,
 443      k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
 444 };
 445
 446 /* Replace instructions with better alternatives for this CPU type.
 447
 448    This runs before SMP is initialized to avoid SMP problems with
 449    self modifying code. This implies that assymetric systems where
 450    APs have less capabilities than the boot processor are not handled.
 451    In this case boot with "noreplacement". */
 452 void apply_alternatives(void *start, void *end)
 453 {
 454         struct alt_instr *a;
 455         int diff, i, k;
 456         for (a = start; (void *)a < end; a++) {
 457                 if (!boot_cpu_has(a->cpuid))
 458                         continue;
 459
 460                 BUG_ON(a->replacementlen > a->instrlen);
 461                 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
 462                 diff = a->instrlen - a->replacementlen;
 463
 464                 /* Pad the rest with nops */
 465                 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
 466                         k = diff;
 467                         if (k > ASM_NOP_MAX)
 468                                 k = ASM_NOP_MAX;
 469                         __inline_memcpy(a->instr + i, k8_nops[k], k);
 470                 }
 471         }
 472 }
 473
 474 static int no_replacement __initdata = 0;
 475
 476 void __init alternative_instructions(void)
 477 {
 478         extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 479         if (no_replacement)
 480                 return;
 481         apply_alternatives(__alt_instructions, __alt_instructions_end);
 482 }
 483
 484 static int __init noreplacement_setup(char *s)
 485 {
 486      no_replacement = 1;
 487      return 0;
 488 }
 489
 490 __setup("noreplacement", noreplacement_setup);
 491
 492 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 493 struct edd edd;
 494 #ifdef CONFIG_EDD_MODULE
 495 EXPORT_SYMBOL(edd);
 496 #endif
 497 /**
 498  * copy_edd() - Copy the BIOS EDD information
 499  *              from boot_params into a safe place.
 500  *
 501  */
 502 static inline void copy_edd(void)
 503 {
 504      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 505      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 506      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 507      edd.edd_info_nr = EDD_NR;
 508 }
 509 #else
 510 static inline void copy_edd(void)
 511 {
 512 }
 513 #endif
 514
 515 #define EBDA_ADDR_POINTER 0x40E
 516 static void __init reserve_ebda_region(void)
 517 {
 518         unsigned int addr;
 519         /**
 520          * there is a real-mode segmented pointer pointing to the
 521          * 4K EBDA area at 0x40E
 522          */
 523         addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
 524         addr <<= 4;
 525         if (addr)
 526                 reserve_bootmem_generic(addr, PAGE_SIZE);
 527 }
 528
 529 void __init setup_arch(char **cmdline_p)
 530 {
 531         unsigned long kernel_end;
 532
 533         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 534         drive_info = DRIVE_INFO;
 535         screen_info = SCREEN_INFO;
 536         edid_info = EDID_INFO;
 537         saved_video_mode = SAVED_VIDEO_MODE;
 538         bootloader_type = LOADER_TYPE;
 539
 540 #ifdef CONFIG_BLK_DEV_RAM
 541         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 542         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 543         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 544 #endif
 545         setup_memory_region();
 546         copy_edd();
 547
 548         if (!MOUNT_ROOT_RDONLY)
 549                 root_mountflags &= ~MS_RDONLY;
 550         init_mm.start_code = (unsigned long) &_text;
 551         init_mm.end_code = (unsigned long) &_etext;
 552         init_mm.end_data = (unsigned long) &_edata;
 553         init_mm.brk = (unsigned long) &_end;
 554
 555         code_resource.start = virt_to_phys(&_text);
 556         code_resource.end = virt_to_phys(&_etext)-1;
 557         data_resource.start = virt_to_phys(&_etext);
 558         data_resource.end = virt_to_phys(&_edata)-1;
 559
 560         parse_cmdline_early(cmdline_p);
 561
 562         early_identify_cpu(&boot_cpu_data);
 563
 564         /*
 565          * partially used pages are not usable - thus
 566          * we are rounding upwards:
 567          */
 568         end_pfn = e820_end_of_ram();
 569
 570         check_efer();
 571
 572         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 573
 574 #ifdef CONFIG_ACPI
 575         /*
 576          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 577          * Call this early for SRAT node setup.
 578          */
 579         acpi_boot_table_init();
 580 #endif
 581
 582 #ifdef CONFIG_ACPI_NUMA
 583         /*
 584          * Parse SRAT to discover nodes.
 585          */
 586         acpi_numa_init();
 587 #endif
 588
 589 #ifdef CONFIG_NUMA
 590         numa_initmem_init(0, end_pfn);
 591 #else
 592         contig_initmem_init(0, end_pfn);
 593 #endif
 594
 595         /* Reserve direct mapping */
 596         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 597                                 (table_end - table_start) << PAGE_SHIFT);
 598
 599         /* reserve kernel */
 600         kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
 601         reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
 602
 603         /*
 604          * reserve physical page 0 - it's a special BIOS page on many boxes,
 605          * enabling clean reboots, SMP operation, laptop functions.
 606          */
 607         reserve_bootmem_generic(0, PAGE_SIZE);
 608
 609         /* reserve ebda region */
 610         reserve_ebda_region();
 611
 612 #ifdef CONFIG_SMP
 613         /*
 614          * But first pinch a few for the stack/trampoline stuff
 615          * FIXME: Don't need the extra page at 4K, but need to fix
 616          * trampoline before removing it. (see the GDT stuff)
 617          */
 618         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 619
 620         /* Reserve SMP trampoline */
 621         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 622 #endif
 623
 624 #ifdef CONFIG_ACPI_SLEEP
 625        /*
 626         * Reserve low memory region for sleep support.
 627         */
 628        acpi_reserve_bootmem();
 629 #endif
 630 #ifdef CONFIG_X86_LOCAL_APIC
 631         /*
 632          * Find and reserve possible boot-time SMP configuration:
 633          */
 634         find_smp_config();
 635 #endif
 636 #ifdef CONFIG_BLK_DEV_INITRD
 637         if (LOADER_TYPE && INITRD_START) {
 638                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 639                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 640                         initrd_start =
 641                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 642                         initrd_end = initrd_start+INITRD_SIZE;
 643                 }
 644                 else {
 645                         printk(KERN_ERR "initrd extends beyond end of memory "
 646                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 647                             (unsigned long)(INITRD_START + INITRD_SIZE),
 648                             (unsigned long)(end_pfn << PAGE_SHIFT));
 649                         initrd_start = 0;
 650                 }
 651         }
 652 #endif
 653 #ifdef CONFIG_KEXEC
 654         if (crashk_res.start != crashk_res.end) {
 655                 reserve_bootmem(crashk_res.start,
 656                         crashk_res.end - crashk_res.start + 1);
 657         }
 658 #endif
 659
 660         sparse_init();
 661
 662         paging_init();
 663
 664         check_ioapic();
 665
 666 #ifdef CONFIG_ACPI
 667         /*
 668          * Read APIC and some other early information from ACPI tables.
 669          */
 670         acpi_boot_init();
 671 #endif
 672
 673 #ifdef CONFIG_X86_LOCAL_APIC
 674         /*
 675          * get boot-time SMP configuration:
 676          */
 677         if (smp_found_config)
 678                 get_smp_config();
 679         init_apic_mappings();
 680 #endif
 681
 682         /*
 683          * Request address space for all standard RAM and ROM resources
 684          * and also for regions reported as reserved by the e820.
 685          */
 686         probe_roms();
 687         e820_reserve_resources();
 688
 689         request_resource(&iomem_resource, &video_ram_resource);
 690
 691         {
 692         unsigned i;
 693         /* request I/O space for devices used on all i[345]86 PCs */
 694         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 695                 request_resource(&ioport_resource, &standard_io_resources[i]);
 696         }
 697
 698         e820_setup_gap();
 699
 700 #ifdef CONFIG_GART_IOMMU
 701        iommu_hole_init();
 702 #endif
 703
 704 #ifdef CONFIG_VT
 705 #if defined(CONFIG_VGA_CONSOLE)
 706         conswitchp = &vga_con;
 707 #elif defined(CONFIG_DUMMY_CONSOLE)
 708         conswitchp = &dummy_con;
 709 #endif
 710 #endif
 711 }
 712
 713 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
 714 {
 715         unsigned int *v;
 716
 717         if (c->extended_cpuid_level < 0x80000004)
 718                 return 0;
 719
 720         v = (unsigned int *) c->x86_model_id;
 721         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 722         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 723         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 724         c->x86_model_id[48] = 0;
 725         return 1;
 726 }
 727
 728
 729 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 730 {
 731         unsigned int n, dummy, eax, ebx, ecx, edx;
 732
 733         n = c->extended_cpuid_level;
 734
 735         if (n >= 0x80000005) {
 736                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 737                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 738                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 739                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 740                 /* On K8 L1 TLB is inclusive, so don't count it */
 741                 c->x86_tlbsize = 0;
 742         }
 743
 744         if (n >= 0x80000006) {
 745                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 746                 ecx = cpuid_ecx(0x80000006);
 747                 c->x86_cache_size = ecx >> 16;
 748                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 749
 750                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 751                 c->x86_cache_size, ecx & 0xFF);
 752         }
 753
 754         if (n >= 0x80000007)
 755                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 756         if (n >= 0x80000008) {
 757                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 758                 c->x86_virt_bits = (eax >> 8) & 0xff;
 759                 c->x86_phys_bits = eax & 0xff;
 760         }
 761 }
 762
 763 #ifdef CONFIG_NUMA
 764 static int nearby_node(int apicid)
 765 {
 766         int i;
 767         for (i = apicid - 1; i >= 0; i--) {
 768                 int node = apicid_to_node[i];
 769                 if (node != NUMA_NO_NODE && node_online(node))
 770                         return node;
 771         }
 772         for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
 773                 int node = apicid_to_node[i];
 774                 if (node != NUMA_NO_NODE && node_online(node))
 775                         return node;
 776         }
 777         return first_node(node_online_map); /* Shouldn't happen */
 778 }
 779 #endif
 780
 781 /*
 782  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
 783  * Assumes number of cores is a power of two.
 784  */
 785 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 786 {
 787 #ifdef CONFIG_SMP
 788         int cpu = smp_processor_id();
 789         unsigned bits;
 790 #ifdef CONFIG_NUMA
 791         int node = 0;
 792         unsigned apicid = phys_proc_id[cpu];
 793 #endif
 794
 795         bits = 0;
 796         while ((1 << bits) < c->x86_num_cores)
 797                 bits++;
 798
 799         /* Low order bits define the core id (index of core in socket) */
 800         cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
 801         /* Convert the APIC ID into the socket ID */
 802         phys_proc_id[cpu] >>= bits;
 803
 804 #ifdef CONFIG_NUMA
 805         node = phys_proc_id[cpu];
 806         if (apicid_to_node[apicid] != NUMA_NO_NODE)
 807                 node = apicid_to_node[apicid];
 808         if (!node_online(node)) {
 809                 /* Two possibilities here:
 810                    - The CPU is missing memory and no node was created.
 811                    In that case try picking one from a nearby CPU
 812                    - The APIC IDs differ from the HyperTransport node IDs
 813                    which the K8 northbridge parsing fills in.
 814                    Assume they are all increased by a constant offset,
 815                    but in the same order as the HT nodeids.
 816                    If that doesn't result in a usable node fall back to the
 817                    path for the previous case.  */
 818                 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
 819                 if (ht_nodeid >= 0 &&
 820                     apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
 821                         node = apicid_to_node[ht_nodeid];
 822                 /* Pick a nearby node */
 823                 if (!node_online(node))
 824                         node = nearby_node(apicid);
 825         }
 826         cpu_to_node[cpu] = node;
 827
 828         printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
 829                         cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
 830 #endif
 831 #endif
 832 }
 833
 834 static int __init init_amd(struct cpuinfo_x86 *c)
 835 {
 836         int r;
 837         int level;
 838
 839 #ifdef CONFIG_SMP
 840         unsigned long value;
 841
 842         /*
 843          * Disable TLB flush filter by setting HWCR.FFDIS on K8
 844          * bit 6 of msr C001_0015
 845          *
 846          * Errata 63 for SH-B3 steppings
 847          * Errata 122 for all steppings (F+ have it disabled by default)
 848          */
 849         if (c->x86 == 15) {
 850                 rdmsrl(MSR_K8_HWCR, value);
 851                 value |= 1 << 6;
 852                 wrmsrl(MSR_K8_HWCR, value);
 853         }
 854 #endif
 855
 856         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 857            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 858         clear_bit(0*32+31, &c->x86_capability);
 859
 860         /* C-stepping K8? */
 861         level = cpuid_eax(1);
 862         if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
 863                 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
 864
 865         r = get_model_name(c);
 866         if (!r) {
 867                 switch (c->x86) {
 868                 case 15:
 869                         /* Should distinguish Models here, but this is only
 870                            a fallback anyways. */
 871                         strcpy(c->x86_model_id, "Hammer");
 872                         break;
 873                 }
 874         }
 875         display_cacheinfo(c);
 876
 877         if (c->extended_cpuid_level >= 0x80000008) {
 878                 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
 879                 if (c->x86_num_cores & (c->x86_num_cores - 1))
 880                         c->x86_num_cores = 1;
 881
 882                 amd_detect_cmp(c);
 883         }
 884
 885         return r;
 886 }
 887
 888 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 889 {
 890 #ifdef CONFIG_SMP
 891         u32     eax, ebx, ecx, edx;
 892         int     index_msb, tmp;
 893         int     cpu = smp_processor_id();
 894
 895         if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
 896                 return;
 897
 898         cpuid(1, &eax, &ebx, &ecx, &edx);
 899         smp_num_siblings = (ebx & 0xff0000) >> 16;
 900
 901         if (smp_num_siblings == 1) {
 902                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 903         } else if (smp_num_siblings > 1) {
 904                 index_msb = 31;
 905                 /*
 906                  * At this point we only support two siblings per
 907                  * processor package.
 908                  */
 909                 if (smp_num_siblings > NR_CPUS) {
 910                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 911                         smp_num_siblings = 1;
 912                         return;
 913                 }
 914                 tmp = smp_num_siblings;
 915                 while ((tmp & 0x80000000 ) == 0) {
 916                         tmp <<=1 ;
 917                         index_msb--;
 918                 }
 919                 if (smp_num_siblings & (smp_num_siblings - 1))
 920                         index_msb++;
 921                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
 922
 923                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
 924                        phys_proc_id[cpu]);
 925
 926                 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
 927
 928                 tmp = smp_num_siblings;
 929                 index_msb = 31;
 930                 while ((tmp & 0x80000000) == 0) {
 931                         tmp <<=1 ;
 932                         index_msb--;
 933                 }
 934                 if (smp_num_siblings & (smp_num_siblings - 1))
 935                         index_msb++;
 936
 937                 cpu_core_id[cpu] = phys_pkg_id(index_msb);
 938
 939                 if (c->x86_num_cores > 1)
 940                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
 941                                cpu_core_id[cpu]);
 942         }
 943 #endif
 944 }
 945
 946 /*
 947  * find out the number of processor cores on the die
 948  */
 949 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
 950 {
 951         unsigned int eax;
 952
 953         if (c->cpuid_level < 4)
 954                 return 1;
 955
 956         __asm__("cpuid"
 957                 : "=a" (eax)
 958                 : "0" (4), "c" (0)
 959                 : "bx", "dx");
 960
 961         if (eax & 0x1f)
 962                 return ((eax >> 26) + 1);
 963         else
 964                 return 1;
 965 }
 966
 967 static void srat_detect_node(void)
 968 {
 969 #ifdef CONFIG_NUMA
 970         unsigned node;
 971         int cpu = smp_processor_id();
 972
 973         /* Don't do the funky fallback heuristics the AMD version employs
 974            for now. */
 975         node = apicid_to_node[hard_smp_processor_id()];
 976         if (node == NUMA_NO_NODE)
 977                 node = 0;
 978         cpu_to_node[cpu] = node;
 979
 980         if (acpi_numa > 0)
 981                 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
 982 #endif
 983 }
 984
 985 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 986 {
 987         /* Cache sizes */
 988         unsigned n;
 989
 990         init_intel_cacheinfo(c);
 991         n = c->extended_cpuid_level;
 992         if (n >= 0x80000008) {
 993                 unsigned eax = cpuid_eax(0x80000008);
 994                 c->x86_virt_bits = (eax >> 8) & 0xff;
 995                 c->x86_phys_bits = eax & 0xff;
 996         }
 997
 998         if (c->x86 == 15)
 999                 c->x86_cache_alignment = c->x86_clflush_size * 2;
1000         if (c->x86 >= 15)
1001                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1002         c->x86_num_cores = intel_num_cpu_cores(c);
1003
1004         srat_detect_node();
1005 }
1006
1007 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1008 {
1009         char *v = c->x86_vendor_id;
1010
1011         if (!strcmp(v, "AuthenticAMD"))
1012                 c->x86_vendor = X86_VENDOR_AMD;
1013         else if (!strcmp(v, "GenuineIntel"))
1014                 c->x86_vendor = X86_VENDOR_INTEL;
1015         else
1016                 c->x86_vendor = X86_VENDOR_UNKNOWN;
1017 }
1018
1019 struct cpu_model_info {
1020         int vendor;
1021         int family;
1022         char *model_names[16];
1023 };
1024
1025 /* Do some early cpuid on the boot CPU to get some parameter that are
1026    needed before check_bugs. Everything advanced is in identify_cpu
1027    below. */
1028 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1029 {
1030         u32 tfms;
1031
1032         c->loops_per_jiffy = loops_per_jiffy;
1033         c->x86_cache_size = -1;
1034         c->x86_vendor = X86_VENDOR_UNKNOWN;
1035         c->x86_model = c->x86_mask = 0; /* So far unknown... */
1036         c->x86_vendor_id[0] = '\0'; /* Unset */
1037         c->x86_model_id[0] = '\0';  /* Unset */
1038         c->x86_clflush_size = 64;
1039         c->x86_cache_alignment = c->x86_clflush_size;
1040         c->x86_num_cores = 1;
1041         c->extended_cpuid_level = 0;
1042         memset(&c->x86_capability, 0, sizeof c->x86_capability);
1043
1044         /* Get vendor name */
1045         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1046               (unsigned int *)&c->x86_vendor_id[0],
1047               (unsigned int *)&c->x86_vendor_id[8],
1048               (unsigned int *)&c->x86_vendor_id[4]);
1049
1050         get_cpu_vendor(c);
1051
1052         /* Initialize the standard set of capabilities */
1053         /* Note that the vendor-specific code below might override */
1054
1055         /* Intel-defined flags: level 0x00000001 */
1056         if (c->cpuid_level >= 0x00000001) {
1057                 __u32 misc;
1058                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1059                       &c->x86_capability[0]);
1060                 c->x86 = (tfms >> 8) & 0xf;
1061                 c->x86_model = (tfms >> 4) & 0xf;
1062                 c->x86_mask = tfms & 0xf;
1063                 if (c->x86 == 0xf) {
1064                         c->x86 += (tfms >> 20) & 0xff;
1065                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
1066                 }
1067                 if (c->x86_capability[0] & (1<<19))
1068                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1069         } else {
1070                 /* Have CPUID level 0 only - unheard of */
1071                 c->x86 = 4;
1072         }
1073
1074 #ifdef CONFIG_SMP
1075         phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1076 #endif
1077 }
1078
1079 /*
1080  * This does the hard work of actually picking apart the CPU stuff...
1081  */
1082 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1083 {
1084         int i;
1085         u32 xlvl;
1086
1087         early_identify_cpu(c);
1088
1089         /* AMD-defined flags: level 0x80000001 */
1090         xlvl = cpuid_eax(0x80000000);
1091         c->extended_cpuid_level = xlvl;
1092         if ((xlvl & 0xffff0000) == 0x80000000) {
1093                 if (xlvl >= 0x80000001) {
1094                         c->x86_capability[1] = cpuid_edx(0x80000001);
1095                         c->x86_capability[6] = cpuid_ecx(0x80000001);
1096                 }
1097                 if (xlvl >= 0x80000004)
1098                         get_model_name(c); /* Default name */
1099         }
1100
1101         /* Transmeta-defined flags: level 0x80860001 */
1102         xlvl = cpuid_eax(0x80860000);
1103         if ((xlvl & 0xffff0000) == 0x80860000) {
1104                 /* Don't set x86_cpuid_level here for now to not confuse. */
1105                 if (xlvl >= 0x80860001)
1106                         c->x86_capability[2] = cpuid_edx(0x80860001);
1107         }
1108
1109         /*
1110          * Vendor-specific initialization.  In this section we
1111          * canonicalize the feature flags, meaning if there are
1112          * features a certain CPU supports which CPUID doesn't
1113          * tell us, CPUID claiming incorrect flags, or other bugs,
1114          * we handle them here.
1115          *
1116          * At the end of this section, c->x86_capability better
1117          * indicate the features this CPU genuinely supports!
1118          */
1119         switch (c->x86_vendor) {
1120         case X86_VENDOR_AMD:
1121                 init_amd(c);
1122                 break;
1123
1124         case X86_VENDOR_INTEL:
1125                 init_intel(c);
1126                 break;
1127
1128         case X86_VENDOR_UNKNOWN:
1129         default:
1130                 display_cacheinfo(c);
1131                 break;
1132         }
1133
1134         select_idle_routine(c);
1135         detect_ht(c);
1136
1137         /*
1138          * On SMP, boot_cpu_data holds the common feature set between
1139          * all CPUs; so make sure that we indicate which features are
1140          * common between the CPUs.  The first time this routine gets
1141          * executed, c == &boot_cpu_data.
1142          */
1143         if (c != &boot_cpu_data) {
1144                 /* AND the already accumulated flags with these */
1145                 for (i = 0 ; i < NCAPINTS ; i++)
1146                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1147         }
1148
1149 #ifdef CONFIG_X86_MCE
1150         mcheck_init(c);
1151 #endif
1152         if (c == &boot_cpu_data)
1153                 mtrr_bp_init();
1154         else
1155                 mtrr_ap_init();
1156 #ifdef CONFIG_NUMA
1157         numa_add_cpu(smp_processor_id());
1158 #endif
1159 }
1160
1161
1162 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1163 {
1164         if (c->x86_model_id[0])
1165                 printk("%s", c->x86_model_id);
1166
1167         if (c->x86_mask || c->cpuid_level >= 0)
1168                 printk(" stepping %02x\n", c->x86_mask);
1169         else
1170                 printk("\n");
1171 }
1172
1173 /*
1174  *      Get CPU information for use by the procfs.
1175  */
1176
1177 static int show_cpuinfo(struct seq_file *m, void *v)
1178 {
1179         struct cpuinfo_x86 *c = v;
1180
1181         /*
1182          * These flag bits must match the definitions in <asm/cpufeature.h>.
1183          * NULL means this bit is undefined or reserved; either way it doesn't
1184          * have meaning as far as Linux is concerned.  Note that it's important
1185          * to realize there is a difference between this table and CPUID -- if
1186          * applications want to get the raw CPUID data, they should access
1187          * /dev/cpu/<cpu_nr>/cpuid instead.
1188          */
1189         static char *x86_cap_flags[] = {
1190                 /* Intel-defined */
1191                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1192                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1193                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1194                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1195
1196                 /* AMD-defined */
1197                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1198                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1199                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1200                 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1201
1202                 /* Transmeta-defined */
1203                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1204                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1205                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1206                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1207
1208                 /* Other (Linux-defined) */
1209                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1210                 "constant_tsc", NULL, NULL,
1211                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1212                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1213                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214
1215                 /* Intel-defined (#2) */
1216                 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1217                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1218                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1219                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1220
1221                 /* VIA/Cyrix/Centaur-defined */
1222                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1223                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1224                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1225                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1226
1227                 /* AMD-defined (#2) */
1228                 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1229                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1230                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1231                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1232         };
1233         static char *x86_power_flags[] = {
1234                 "ts",   /* temperature sensor */
1235                 "fid",  /* frequency id control */
1236                 "vid",  /* voltage id control */
1237                 "ttp",  /* thermal trip */
1238                 "tm",
1239                 "stc"
1240         };
1241
1242
1243 #ifdef CONFIG_SMP
1244         if (!cpu_online(c-cpu_data))
1245                 return 0;
1246 #endif
1247
1248         seq_printf(m,"processor\t: %u\n"
1249                      "vendor_id\t: %s\n"
1250                      "cpu family\t: %d\n"
1251                      "model\t\t: %d\n"
1252                      "model name\t: %s\n",
1253                      (unsigned)(c-cpu_data),
1254                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1255                      c->x86,
1256                      (int)c->x86_model,
1257                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1258
1259         if (c->x86_mask || c->cpuid_level >= 0)
1260                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1261         else
1262                 seq_printf(m, "stepping\t: unknown\n");
1263
1264         if (cpu_has(c,X86_FEATURE_TSC)) {
1265                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1266                              cpu_khz / 1000, (cpu_khz % 1000));
1267         }
1268
1269         /* Cache size */
1270         if (c->x86_cache_size >= 0)
1271                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1272
1273 #ifdef CONFIG_SMP
1274         if (smp_num_siblings * c->x86_num_cores > 1) {
1275                 int cpu = c - cpu_data;
1276                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1277                 seq_printf(m, "siblings\t: %d\n",
1278                                 c->x86_num_cores * smp_num_siblings);
1279                 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1280                 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1281         }
1282 #endif
1283
1284         seq_printf(m,
1285                 "fpu\t\t: yes\n"
1286                 "fpu_exception\t: yes\n"
1287                 "cpuid level\t: %d\n"
1288                 "wp\t\t: yes\n"
1289                 "flags\t\t:",
1290                    c->cpuid_level);
1291
1292         {
1293                 int i;
1294                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1295                         if ( test_bit(i, &c->x86_capability) &&
1296                              x86_cap_flags[i] != NULL )
1297                                 seq_printf(m, " %s", x86_cap_flags[i]);
1298         }
1299
1300         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1301                    c->loops_per_jiffy/(500000/HZ),
1302                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1303
1304         if (c->x86_tlbsize > 0)
1305                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1306         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1307         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1308
1309         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1310                    c->x86_phys_bits, c->x86_virt_bits);
1311
1312         seq_printf(m, "power management:");
1313         {
1314                 unsigned i;
1315                 for (i = 0; i < 32; i++)
1316                         if (c->x86_power & (1 << i)) {
1317                                 if (i < ARRAY_SIZE(x86_power_flags))
1318                                         seq_printf(m, " %s", x86_power_flags[i]);
1319                                 else
1320                                         seq_printf(m, " [%d]", i);
1321                         }
1322         }
1323
1324         seq_printf(m, "\n\n");
1325
1326         return 0;
1327 }
1328
1329 static void *c_start(struct seq_file *m, loff_t *pos)
1330 {
1331         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1332 }
1333
1334 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1335 {
1336         ++*pos;
1337         return c_start(m, pos);
1338 }
1339
1340 static void c_stop(struct seq_file *m, void *v)
1341 {
1342 }
1343
1344 struct seq_operations cpuinfo_op = {
1345         .start =c_start,
1346         .next = c_next,
1347         .stop = c_stop,
1348         .show = show_cpuinfo,
1349 };